Interlocking processing subsystem data online automatic updating method and system

Abstract

The invention provides an interlocking processing subsystem data online automatic updating method and system, and the method comprises the steps: obtaining to-be-updated data of each board card of an interlocking processing subsystem, the to-be-updated data comprising an operating system mirror image, a board card software mirror image and configuration data; acquiring board card position information of the interlocking processing subsystem and an IP address of a communication board card; displaying a detailed board card arrangement diagram of the interlocking processing subsystem on a visual interface of an upper computer based on the board card position information; a target updating board card is selected on a visual interface of the upper computer, updating operation is carried out, the upper computer communicates with the communication board card through the IP address so as to establish connection with the target updating board card, and the upper computer automatically generates an updating instruction and issues the updating instruction to the target updating board card so as to update the target updating board card. And updating the operating system mirror image, the board card software mirror image and the configuration data to the target updated board card.

Description

Technical Field

[0001] The present invention relates to the technical field of computer interlocking systems, and in particular to an online automatic updating method and system for interlocking processing subsystem data. Background Art

[0002] The lower computer part of the computer interlocking system is composed of an interlocking processing subsystem (IPS), which needs to be updated and upgraded during the engineering and debugging implementation process. The existing method for updating the data of the computer interlocking processing subsystem is: first, manually take out the IPS board from the cage, then remove the UDOC data unit on the board, and then update it through a USB cable or an offline burning USB flash drive, and finally install the updated UDOC data unit back to the board and install the board back to the cage.

[0003] The above method has the following shortcomings: 1. The on-site manual disassembly of the cage is cumbersome, the update speed is slow, and the efficiency is low; 2. It is subject to the burning environment configuration of the burner (offline burning USB flash drive) or the burning line; 3. Offline update, low degree of automation, and manual operation can easily cause data update errors; 4. Plugging in and out the board and removing the chip can easily cause damage to the board's own materials.

[0004] Therefore, it is necessary to propose an online automatic updating method and system for interlocking processing subsystem data. Summary of the invention

[0005] The object of the present invention is to provide a method and system for online automatic updating of interlocking processing subsystem data, so as to solve the problem of difficulty in updating data of each board of the interlocking processing subsystem in the prior art.

[0006] In order to achieve the above-mentioned object of the invention, in a first aspect, the present invention provides a method for online automatic updating of interlocking processing subsystem data, comprising:

[0007] Acquire the data to be updated of each board of the interlocking processing subsystem, wherein the data to be updated includes an operating system image, a board software image, and configuration data;

[0008] Obtaining the board location information of the interlocking processing subsystem and the IP address of the communication board;

[0009] Based on the board position information, a detailed layout diagram of the board of the interlocking processing subsystem is displayed on a visual interface of the host computer;

[0010] The target update board is selected on the visual interface of the host computer, and the update operation is performed. The host computer communicates with the communication board through the IP address to establish a connection with the target update board. The host computer automatically generates an update instruction and sends it to the target update board to update the operating system image, the board software image and the configuration data to the target update board.

[0011] Optionally, the cage of the interlocking processing subsystem includes A series boards and B series boards, and the A series boards and the B series boards both include a first main processing unit board, a second main processing unit single card, a main network communication unit board and a main communication unit board, the first main processing unit board and the second main processing unit board are used to process logical operations, the main network communication unit board and the main communication unit board are the communication boards, which are used to process internal and external communication information.

[0012] Optionally, the IP address includes the IP addresses of the main network communication unit board and the main communication unit board.

[0013] Optionally, the board location information includes a row identifier and a column identifier of each board in a cage of the interlocking processing subsystem.

[0014] Optionally, during the update process, the communication board reports the update progress of the target update board in real time and transmits it to the host computer, and the host computer visualization interface displays the update progress in real time.

[0015] Optionally, the boards in the board detailed layout diagram displayed on the visualization interface may display a progress bar and a color ranging from 0 to 100, wherein the progress bar indicates the update progress and the color indicates the update status.

[0016] Optionally, the boards in the board detailed layout diagram display different colors to indicate update status: white represents not started, blue represents updating, red represents update failure, and green represents update success.

[0017] Optionally, it also includes:

[0018] The host computer sends a version verification instruction to the target update board. When the real-time prompt window in the host computer visualization interface shows that the board version is consistent with the configuration data version, the version verification is passed.

[0019] Optionally, it also includes:

[0020] The host computer sends an overwrite restart command to restart and update the successfully updated board.

[0021] Optionally, it also includes:

[0022] The host computer sends a rollback and restart command to erase the updated data and restore it to its original state.

[0023] Optionally, generating the update instruction includes generating the update instruction based on a Java-driven command line update parameter method, and the update instruction format includes: drive instruction header, board location information, IP address, update operation command, operating system image file path, software image file path, and configuration data file path.

[0024] Optionally, before the update operation starts, the following steps are also included:

[0025] Automatically detect and install the Java environment. After the real-time prompt window on the upper computer visual interface displays that the Java environment detection is OK, select the target update board on the upper computer visual interface to start the update operation.

[0026] In a second aspect, the present invention further provides an online automatic update system for interlocking processing subsystem data, comprising:

[0027] An interlocking processing subsystem, the interlocking processing subsystem comprising a first main processing unit board, a second main processing unit single card, a main network communication unit board and a main communication unit board, the first main processing unit board and the second main processing unit board are used to process logic operations, the main network communication unit board and the main communication unit board are communication boards, used to process internal and external communication information;

[0028] The host computer is used to obtain the data to be updated of each board of the interlocking processing subsystem, obtain the board location information of the interlocking processing subsystem and the IP address of the communication board; display the detailed board layout diagram of the interlocking processing subsystem on a visual interface based on the board location information; receive an operation to select a target update board, and perform an update operation, communicate with the communication board through the IP address to establish a connection with the target update board, automatically generate an update instruction and send it to the target update board, and update the operating system image, the board software image and the configuration data to the target update board.

[0029] Compared with the prior art, the online automatic updating method of interlocking processing subsystem data provided by the present invention has the following advantages:

[0030] 1. Online real-time update, no need to plug and unplug boards, reducing board loss;

[0031] 2. Multiple boards can be updated in parallel, and data upgrade efficiency is high;

[0032] 3. Flexible functions, one-click operation: data update, data erase, data restart, data version query and other functions can be automatically issued instructions for execution by just clicking a button;

[0033] 4. High update accuracy. As long as the input configuration data is correct, the update process is all executed by the software, and there will be no update data errors;

[0034] 5. No need for updater, no need to update software environment installation, any computer can directly run the tool software;

[0035] 6. Improve work efficiency and reduce the labor intensity of relevant personnel on the project site during data upgrade. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 A schematic flow chart of an online automatic update method for interlocking processing subsystem data provided by an embodiment of the present invention;

[0037] Figure 2 A schematic diagram of the arrangement of boards in a cage of an interlocking processing subsystem provided in one embodiment of the present invention;

[0038] Figure 3 A schematic diagram of a visualization interface of a host computer according to an embodiment of the present invention;

[0039] Figure 4 A schematic flow chart of an online automatic updating method of an interlocking processing subsystem provided by an embodiment of the present invention;

[0040] Figure 5 The figure is a schematic diagram of generating instructions in a method for online automatic updating of interlocking processing subsystem data according to an embodiment of the present invention. DETAILED DESCRIPTION

[0041] The following is a further detailed description of the interlocking processing subsystem data online automatic update method and system proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the accompanying drawings are in a very simplified form and use non-precise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In order to make the purposes, features and advantages of the present invention more obvious and easy to understand, please refer to the accompanying drawings. It should be noted that the structures, proportions, sizes, etc. illustrated in the accompanying drawings of this specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the limiting conditions for the implementation of the present invention, so they have no technical substantive significance. Any structural modification, change in proportional relationship or adjustment of size, without affecting the effects that the present invention can produce and the purposes that can be achieved, should still fall within the scope of the technical content disclosed by the present invention.

[0042] See also Figure 1 , Figure 1 An online automatic updating method for interlocking processing subsystem data provided by an embodiment of the present invention includes:

[0043] Step S1: acquiring the data to be updated of each board of the interlocking processing subsystem, wherein the data to be updated includes an operating system image, a board software image and configuration data;

[0044] Step S2: Acquire the board location information of the interlocking processing subsystem and the IP address of the communication board;

[0045] Step S3: displaying a detailed layout diagram of the boards of the interlocking processing subsystem on a visual interface of a host computer based on the board position information;

[0046] Step S4: Select the target update board on the visual interface of the host computer and perform the update operation. The host computer communicates with the communication board through the IP address to establish a connection with the target update board. The host computer automatically generates an update instruction and sends it to the target update board to update the operating system image, the board software image and the configuration data to the target update board.

[0047] The method for online automatic updating of the interlocking processing subsystem data provided in this embodiment does not require manual disassembly of the cage of the interlocking processing subsystem. A connection with a target update board is established through a communication board. The host computer can update the operating system image, board software image and configuration data to the target update board with one click. The update speed is fast and efficient, and it is not dependent on the burning environment configuration of the burner or the burning line. It has a high degree of automation, does not require plugging and unplugging of the board, and will not cause material loss of the board itself.

[0048] First, clarify the board location information in the cage of the actual interlocking processing subsystem, such as Figure 2 As shown, Figure 2 A schematic diagram of the arrangement of boards in a cage of an interlocking processing subsystem provided in an embodiment of the present invention, from Figure 2It can be seen that there are four types of boards in the interlocking processing subsystem cage: MPU1 (Main Processing Unit 1), MPU2 (Main Processing Unit 2), MNCU (Main Network Communication Unit), and MCU (Main Communication Unit). Among them, MPU1 is the first main processing unit board, and MPU2 is the second main processing unit board. The two mainly process the main logic operation, MNCU is the main network communication unit board, and MCU is the main communication unit board. The two mainly process external and internal communication information. The host computer can establish a connection with them through the IP address; all boards are neatly arranged in a row and divided into A series and B series. The number and type of boards in each series are the same. Taking the board as the unit, each board includes the corresponding software image data and configuration data. When the A and B dual systems are running at the same time, if one of the boards fails, the single system can still operate normally.

[0049] The IP address is the IP address of the MNCU and MCU boards; the board location information is R_C, where R represents the row identifier in the cage and C represents the column identifier in the cage; the image data for updating IPS refers to the operating system image CORE_OS and the board software image XXX_CORE.out of the four types of boards; the configuration data refers to the binary file XXX_CORE.bin of the four types of boards, and the image data and configuration are the same in the A series and B series.

[0050] Use QT visualization technology to create a host computer visualization interface, which can be developed across platforms, such as Figure 3 As shown, Figure 3 This is a schematic diagram of the upper computer visualization interface of an embodiment of the present invention. Combined with the board layout information, the detailed layout diagram of the MPU1, MPU2, MNCU, and MCU boards can be automatically drawn on the upper computer visualization interface. Each rectangle represents a board, and Figure 2 The board position information in the same, each board can be selected, and the board itself will be distinguished by color: indicating different update status, which can be customized according to the configuration, such as blue for updating, white for not started, red for update failure, green for update success, etc.

[0051] Update button: Update the selected target board. During the update, a digital progress bar with a value of 0-100 will be displayed for each updated board.

[0052] Restart to take effect button: restart the update function of the board that has been successfully updated.

[0053] Version verification button: Perform version verification on the current data in the target update board in the interlocking processing subsystem to confirm again whether the data has been updated successfully.

[0054] refer to Figure 4 , Figure 4 A flow chart of an online automatic update method of an interlocking processing subsystem provided by an embodiment of the present invention includes the following steps:

[0055] Step 1: Get the image data to be updated for each board of the IPS. The data is a board-specific image file in the format of CORE_OS (operating system image) and XXX_CORE.out (board software image).

[0056] Step 2: Parse the IPS board layout information and the IP address of the communication board.

[0057] Step 3: Using the information from steps 1 and 2, use QT technology to create a host computer visualization interface to present the detailed layout of the IPS board.

[0058] Step 4: Write a program to automatically detect and install the Java environment. After the real-time prompt window on the interface shows that the Java environment has been detected OK, you can select the IPS board to be updated on the interface and start the update.

[0059] Step 5: When starting the update, the user's computer (host computer) will communicate with the MNCU and MCU boards through the IP address. After successful communication, it will establish a connection with other IPS boards, and then generate update instructions based on the Java-driven command line update parameter method and send them to the target board. During the update process, the communication board will report the update progress of the target board in real time and transmit it to the user's computer host interface program, so as to display the update progress in real time and realize online update.

[0060] Step 6: When the update progress reaches 100%, check whether the target IPS update board has been updated. If the update fails, the failure reason will be displayed in the real-time message prompt window, and return to step 4 to update again;

[0061] Step 7: If the target IPS board is updated successfully, start to select overwrite restart or rollback restart. Overwrite restart means updating the updated image data, and rollback restart means erasing the updated data and restoring it to the original state. Start restarting, and then based on the Java-driven command line update parameter method, generate an overwrite restart or rollback restart instruction and send it to the target IPS board. The target IPS board enters the restart state.

[0062] Step 8: Check whether the target IPS board has completed the restart. You can observe the board status on site. If the restart fails, the failure reason will be displayed in the real-time prompt window. Return to step 7 and restart again.

[0063] Step 9: If the target IPS board restarts successfully, it means the update is successful and the on-site board status enters normal working status. On the other hand, you can also perform a version verification operation on it. Based on the Java-driven command line update parameter method, generate a version query instruction and send it to the target IPS board. When the real-time message prompt window shows that the board version is consistent with the configuration data version, it means the version verification is OK and the target IPS board is updated successfully.

[0064] refer to Figure 5 , Figure 5 This is a schematic diagram of the generation of instructions in the online automatic update method of the interlocking processing subsystem data in an embodiment of the present invention, and introduces a command line update parameter method based on Java driver, which is used to generate target instructions. The instruction format is as follows:

[0065] Driver instruction header: Java-jar XXX.jar, XXX indicates a specific java software package file format;

[0066] Board location information: R_C; R represents the number of rows or layers of the OC cage, and C represents the number of columns;

[0067] IP address: XXX.XXX.XXX.XXX, the IP address of the communication board;

[0068] Function operation commands: 0 data upload update, 1 data update restart, 2 data erase restart, 3 get version.

[0069] CORE_OS operating system image file path; XXX_CORE.out software image file path; XXX_CORE.bin file path.

[0070] Generate target function instructions based on the above content.

[0071] Specific examples:

[0072] Assume that the target board location information is 1_2, indicating the second board on the first layer in the cage, the corresponding IP address of the MNCU and MCU communication board is 192.168.1.1, the CORE_OS operating system image file path: C:\Software\MPU2\CORE_OS, the software image file path: C:\Software\MPU2\MPU2_CORE.out, the software configuration file path: C:\Software\MPU2\MPU2_CORE.bin, the Java driver package name is IPS_Burning.jar, and the update instructions are as follows:

[0073]

[0074]

[0075] After sending the above instructions to the MNCU and MCU communication boards, the target boards can enter the corresponding functional states.

[0076] An embodiment of the present invention further provides an interlocking processing subsystem data online automatic update system, comprising:

[0077] An interlocking processing subsystem, the interlocking processing subsystem comprising a first main processing unit board, a second main processing unit single card, a main network communication unit board and a main communication unit board, the first main processing unit board and the second main processing unit board are used to process logic operations, the main network communication unit board and the main communication unit board are communication boards, used to process internal and external communication information;

[0078] The host computer is used to obtain the data to be updated of each board of the interlocking processing subsystem, obtain the board location information of the interlocking processing subsystem and the IP address of the communication board; display the detailed board layout diagram of the interlocking processing subsystem on a visual interface based on the board location information; receive an operation to select a target update board, and perform an update operation, communicate with the communication board through the IP address to establish a connection with the target update board, automatically generate an update instruction and send it to the target update board, and update the operating system image, the board software image and the configuration data to the target update board.

[0079] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0080] It should be noted that the devices and methods disclosed in the embodiments of this article can also be implemented in other ways. The device implementation described above is only schematic. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of this article. In this regard, each box in the flowchart or block diagram can represent a part of a module, program or code, and the module, program segment or part of the code contains one or more executable instructions for implementing the specified logical function, and the module, program segment or part of the code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented by a dedicated hardware-based system for performing a specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions.

[0081] In addition, the functional modules in the various embodiments of this document may be integrated together to form an independent part, or each module may exist independently, or two or more modules may be integrated to form an independent part.

[0082] Although the content of the present invention has been described in detail through the above preferred embodiments, it should be appreciated that the above description should not be considered as a limitation of the present invention. After reading the above content, it will be apparent to those skilled in the art that various modifications and substitutions of the present invention will occur. Therefore, the protection scope of the present invention should be limited by the appended claims.

Claims

1. A method for automatically updating interlocking processing subsystem data online, characterized in that: include: Acquire the data to be updated of each board of the interlocking processing subsystem, wherein the data to be updated includes an operating system image, a board software image, and configuration data; Obtaining the board location information of the interlocking processing subsystem and the IP address of the communication board; Based on the board position information, a detailed layout diagram of the board of the interlocking processing subsystem is displayed on a visual interface of the host computer; The target update board is selected on the visual interface of the host computer, and the update operation is performed. The host computer communicates with the communication board through the IP address to establish a connection with the target update board. The host computer automatically generates an update instruction and sends it to the target update board to update the operating system image, the board software image and the configuration data to the target update board.

2. The method for online automatic updating of interlocking processing subsystem data according to claim 1, characterized in that: The cage of the interlocking processing subsystem includes A series boards and B series boards. Both the A series boards and the B series boards include a first main processing unit board, a second main processing unit single card, a main network communication unit board and a main communication unit board. The first main processing unit board and the second main processing unit board are used to process logical operations, and the main network communication unit board and the main communication unit board are the communication boards, which are used to process internal and external communication information.

3. The method for online automatic updating of interlocking processing subsystem data according to claim 2, characterized in that: The IP address includes the IP addresses of the main network communication unit board and the main communication unit board.

4. The method for online automatic updating of interlocking processing subsystem data according to claim 2, characterized in that: The board location information includes the row identifier and column identifier of each board in the cage of the interlocking processing subsystem.

5. The method for online automatic updating of interlocking processing subsystem data according to claim 1, characterized in that: During the updating process, the communication board reports the updating progress of the target updating board in real time and transmits it to the host computer, and the visual interface of the host computer displays the updating progress in real time.

6. The method for online automatic updating of interlocking processing subsystem data according to claim 1, characterized in that: The boards in the board detailed layout diagram displayed on the visualization interface may display a progress bar and color ranging from 0 to 100, wherein the progress bar indicates the update progress and the color indicates the update status.

7. The method for online automatic updating of interlocking processing subsystem data according to claim 6, characterized in that: The boards in the board detailed layout diagram display different colors to indicate the update status: white represents not started, blue represents updating, red represents update failure, and green represents update success.

8. The method for online automatic updating of interlocking processing subsystem data according to claim 1, characterized in that: Also includes: The host computer sends a version verification instruction to the target update board. When the real-time prompt window in the host computer visualization interface shows that the board version is consistent with the configuration data version, the version verification is passed.

9. The method for online automatic updating of interlocking processing subsystem data according to claim 1, characterized in that: Also includes: The host computer sends an overwrite restart command to restart and update the successfully updated board.

10. The method for online automatic updating of interlocking processing subsystem data according to claim 1, characterized in that: Also includes: The host computer sends a rollback and restart command to erase the updated data and restore it to its original state.

11. The method for online automatic updating of interlocking processing subsystem data according to claim 1, characterized in that: Generating the update instruction includes generating the update instruction based on a Java-driven command line update parameter method, and the update instruction format includes: a drive instruction header, board location information, an IP address, an update operation command, an operating system image file path, a software image file path, and a configuration data file path.

12. The method for online automatic updating of interlocking processing subsystem data according to claim 11, characterized in that: Before the update operation begins, it also includes: Automatically detect and install the Java environment. After the real-time prompt window on the upper computer visual interface displays that the Java environment detection is OK, select the target update board on the upper computer visual interface to start the update operation.

13. An online automatic update system for interlocking processing subsystem data, characterized in that: include: An interlocking processing subsystem, the interlocking processing subsystem comprising a first main processing unit board, a second main processing unit single card, a main network communication unit board and a main communication unit board, the first main processing unit board and the second main processing unit board are used to process logic operations, the main network communication unit board and the main communication unit board are communication boards, used to process internal and external communication information; A host computer, the host computer is used to obtain the data to be updated of each board of the interlocking processing subsystem, obtain the board location information of the interlocking processing subsystem and the IP address of the communication board; Based on the board location information, a detailed board layout diagram of the interlocking processing subsystem is displayed on a visual interface; a receiving operation is performed to select a target update board, and an update operation is performed, the communication board is communicated with through the IP address to establish a connection with the target update board, an update instruction is automatically generated and sent to the target update board, and the operating system image, the board software image and the configuration data are updated to the target update board.

Images