Method and device for determining clock signal frequency
By connecting the clock signal to the frequency meter inside the chip and counting, combining the reference clock frequency and the time count value of the measurement window, the frequency value of the clock signal is calculated and determined, which solves the complex and inefficient problems in the prior art and realizes the Efficient and convenient clock frequency diagnosis.
Patent Information
- Application Number
- CN202310949298.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-07-27
- Publication Date
- 2025-02-11
AI Technical Summary
The prior art is complex and inefficient in determining the chip clock signal frequency, and cannot efficiently observe multiple critical clock frequency values in the chip at the same time, and requires external precision time frequency measurement equipment.
By connecting the clock signal to the frequency meter inside the chip, using the enable signal to count the frequency meter, and reading the count result as the initial frequency value after the measurement window is finished, combining the reference clock frequency and the time count value of the measurement window, calculate Determines the frequency value of the clock signal.
It realizes efficient and convenient determination of clock signal frequency without the need for external precision time frequency measurement equipment, and can observe multiple key clock frequency values at the same time, improving diagnostic efficiency and accuracy.
Smart Images
Figure CN119415323A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of chip fault diagnosis, and more specifically, to a method and device for determining the frequency of a clock signal. Background Art
[0002] In a chip system, the presence or absence and accuracy of clock frequency is a very important part of the entire chip system, which is used to ensure that the chip system can work normally. If the clock required by the corresponding chip system cannot be provided, the chip performance may be damaged, or even fail to work normally in many working scenarios. Therefore, clock diagnosis is required to ensure the stable operation of the entire chip system.
[0003] In general technical solutions, one solution is to select the clock frequency signal to be measured in the chip operation through multiplexing and then pull it to the chip pin. After the chip software configures the corresponding clock output to the chip I / O pin according to the clock selection mapping table, the clock is measured through an oscilloscope or other external equipment. On the one hand, the chip software needs to be configured to select the clock frequency signal to be measured separately, and the method is relatively cumbersome. On the other hand, due to the very limited chip pin resources, it can usually only be output to a fixed clock measurement external pin through multiplexing, which is limited to measuring the clock frequency of a single clock to be measured at the same time, which is inefficient and slow. In addition, this solution usually requires the output pin to be connected to an oscilloscope or other precision measuring equipment in order to accurately measure the output clock frequency. However, due to the complexity and diversity of the chip working scenarios, it is very difficult to prepare the corresponding precision time measurement equipment in many scenarios where the chip fails and urgently needs to diagnose the problem. Therefore, the feasibility of using this method for diagnosis is further improved, and its application difficulty and complexity are increased.
[0004] Another solution is to connect a dedicated reference clock externally and use this reference clock to compare with the clock to be tested, thereby realizing the function of diagnosing the clock to be tested. Specifically, it is to judge whether the clock is abnormal by comparing the difference between the two clocks within a certain time interval, or by whether the frequency calculation value exceeds the threshold. This method usually uses a timer to implement clock diagnosis. On the one hand, this method has a high design complexity, and on the other hand, the corresponding diagnostic accuracy and efficiency are low. It can usually only feedback whether the clock is abnormal compared with the judgment criteria, but cannot show the specific details, which is not conducive to the clock diagnosis and positioning of large-scale complex integrated chips.
[0005] Therefore, there is an urgent need for a clock rapid diagnosis method that does not require the aid of external precision time and frequency measurement equipment, but can accurately and efficiently observe multiple key clock frequency values in the chip at the same time, and perform rapid and real-time diagnosis of key clocks to ensure that the chip can work normally and stably. Summary of the invention
[0006] The embodiments of the present application provide a method and device for determining the frequency of a clock signal, so as to at least solve the problem that the method of determining the frequency of a clock signal in the related art is relatively complex and inefficient, and solve the problem that the current method of determining the frequency of a clock signal is relatively complex and inefficient.
[0007] According to one embodiment of the present application, a method for determining the frequency of a clock signal is provided, comprising: connecting the clock signal to a frequency meter inside a chip, the frequency meter counting the clock signal in response to an enable signal; the frequency meter stops counting after a measurement window ends, and reads the counting result as an initial frequency value of the clock signal; and determining the frequency value of the clock signal based on the initial frequency value, a reference clock frequency of the frequency meter, and a time count value of the measurement window.
[0008] In an exemplary embodiment, the frequency value of the clock signal is determined according to the initial frequency value, the reference clock frequency of the frequency meter and the time count value of the measurement window, including: the frequency value of the clock signal is calculated according to the initial frequency value, the reference clock frequency of the frequency meter and the time count value of the measurement window = the reference clock frequency * the initial frequency value / the time count value of the measurement window.
[0009] According to another embodiment of the present application, a device for determining the frequency of a clock signal is provided, comprising: a counting module, used to connect the clock signal to a frequency meter inside a chip, the frequency meter counting the clock signal in response to an enable signal; a reading module, used for the frequency meter to stop counting after the end of a measurement window, and read the counting result as an initial frequency value of the clock signal; a determination module, used to determine the frequency value of the clock signal based on the initial frequency value, the reference clock frequency of the frequency meter and the time count value of the measurement window.
[0010] According to another embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when run.
[0011] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.
[0012] Through the present application, since the clock signal is connected to the frequency meter inside the chip, the frequency meter starts to count the clock signal under the action of the enable signal, and completes the counting within the measurement window and obtains the count value. After obtaining the count value, the frequency value of the clock signal can be determined based on only three values: the count value, the reference clock frequency of the frequency meter itself, and the count value of the pre-set measurement window time. Therefore, without introducing external precision time and frequency measurement equipment, the problem that the current method of determining the frequency of the clock signal is relatively complicated and inefficient can be solved, and the effect of efficiently and conveniently determining the frequency of the clock signal can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 is a hardware structure block diagram of a computer terminal according to a method for determining a clock signal frequency according to an embodiment of the present application;
[0014] Figure 2 is a flow chart of a method for determining a clock signal frequency according to an embodiment of the present application;
[0015] Figure 3 is a structural block diagram of a device for determining a clock signal frequency according to an embodiment of the present application;
[0016] Figure 4 is a structural block diagram of a device for determining a clock signal frequency according to yet another embodiment of the present application;
[0017] Figure 5 is a flow chart of a method for determining a clock signal frequency according to yet another embodiment of the present application;
[0018] Figure 6 is a schematic diagram of an application example (I) of a method for determining a clock signal frequency according to an embodiment of the present application;
[0019] Figure 7 is a working principle diagram of a frequency meter inside a chip according to an embodiment of the present application;
[0020] Figure 8 is a flow chart of a method for determining a clock signal frequency according to another embodiment of the present application;
[0021] Fig. 9 It is a schematic diagram of application example (II) of the method for determining the frequency of a clock signal according to an embodiment of the present application. DETAILED DESCRIPTION
[0022] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.
[0023] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.
[0024] The following is an explanation of the relevant terms in the embodiments of the present application:
[0025] Control status register: A register that can control the internal status of the chip through chip software.
[0026] Serial-to-parallel converter: A "converter" that converts parallel data into serial data for transmission and converts received serial data into parallel data.
[0027] PCIe bus (peripheral component interconnect express, PCI-Express): is a high-speed serial computer expansion bus standard that supports high-speed serial point-to-point dual-channel high-bandwidth transmission.
[0028] PX4 subsystem: PCIe X4 controller subsystem, which can support up to 4 lanes (channels) working simultaneously.
[0029] PIPE interface: a standard protocol interface used to connect interfaces such as PCIe, Serial Advanced Technology Attachment, Universal Serial Bus, Display Port, etc. with PHY (physical layer).
[0030] The method embodiments provided in the embodiments of the present application can be executed in a mobile terminal, a computer terminal or a similar computing device. Taking running on a computer terminal as an example, Figure 1 1 is a hardware structure block diagram of a computer terminal of a method for determining a clock signal frequency according to an embodiment of the present application. Figure 1 As shown, the computer terminal may include one or more ( Figure 1 Only one is shown in the figure) a processor 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, wherein the above-mentioned computer terminal may also include a transmission device 106 and an input / output device 108 for communication functions. It can be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above-mentioned computer terminal. Figure 1 More or fewer components as shown, or with Figure 1 Different configurations are shown.
[0031] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the method for determining the clock signal frequency in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, to implement the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories may be connected to the computer terminal via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
[0032] The transmission device 106 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of a computer terminal. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.
[0033] In this embodiment, a method for determining the frequency of a clock signal running on the above-mentioned computer terminal is provided. Figure 2 is a flow chart of a method for determining a clock signal frequency according to an embodiment of the present application. Figure 2 As shown, the process includes the following steps:
[0034] Step S202, connecting the clock signal to a frequency meter inside the chip, and the frequency meter counts the clock signal in response to an enable signal;
[0035] Before the frequency meter in step S202 of this embodiment counts the clock signal in response to the enable signal, the method further includes: the frequency meter starts a mode of measuring the frequency of the clock signal in response to a reset signal; and determining a measurement window of the frequency meter.
[0036] The frequency meter is not always in the mode of measuring the frequency of the clock signal, so a switch is required. In the embodiment of the present application, the measurement mode is turned on by the action of a reset signal, and the measurement time is also variable. The frequency meter counts within the measurement window by predetermining the measurement window.
[0037] In an exemplary embodiment, the frequency meter starts the mode of measuring the frequency of the clock signal in response to the reset signal, including: releasing a reset signal to the frequency meter through a first control status register CSR, and the frequency meter starts the mode of measuring the frequency of the clock signal in response to the reset signal, wherein the first CSR is connected to the frequency meter.
[0038] The first CSR releases a reset signal to the frequency meter to start the measurement mode of the frequency meter, wherein the first CSR and the CSRs in other steps are configured through software. Compared with external precision measuring equipment, the method of configuring CSR in the embodiment of the present application is more convenient and quick. After the configuration of the CSR connected to the frequency meter is completed, the measurement of the clock signal can be realized.
[0039] In an exemplary embodiment, determining the measurement window of the frequency meter includes: determining the measurement window of the frequency by a second CSR, wherein the second CSR is connected to the frequency meter.
[0040] In step S202 of this embodiment, the frequency meter counts the clock signal in response to the enable signal, including: releasing the enable signal to the frequency meter through a third CSR, and the frequency meter counts the clock signal in response to the enable signal, wherein the third CSR is connected to the frequency meter.
[0041] After the measurement mode is turned on, it is necessary to determine when the frequency counter starts counting, so under the action of the enable signal, the frequency counter starts counting.
[0042] Step S204, the frequency counter stops counting after the measurement window ends, and reads the counting result as the initial value of the frequency of the clock signal;
[0043] In step S204 of this embodiment, it includes obtaining an end signal indicating the end of the measurement window released by the fourth CSR, and the frequency meter stops counting in response to the end signal, wherein the fourth CSR is connected to the frequency meter; and reading the initial frequency value of the clock signal through the fifth CSR, wherein the fifth CSR is connected to the frequency meter.
[0044] Step S206, determining the frequency value of the clock signal according to the initial frequency value, the reference clock frequency of the frequency meter and the time count value of the measurement window.
[0045] In step S206 of the present embodiment, the frequency value of the clock signal is determined according to the initial frequency value, the reference clock frequency of the frequency meter and the time count value of the measurement window, including: the frequency value of the clock signal is calculated according to the initial frequency value, the reference clock frequency of the frequency meter and the time count value of the measurement window = the reference clock frequency * the initial frequency value / the time count value of the measurement window.
[0046] After obtaining the count value of the frequency meter, the frequency value of the clock signal can be obtained by performing a simple calculation using the above formula in combination with the known reference clock frequency and the time count value of the measurement window.
[0047] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.
[0048] In the present embodiment, a device for determining the frequency of a clock signal is also provided, and the device is used to implement the above-mentioned embodiments and preferred implementation modes, and the descriptions thereof will not be repeated. As used below, the term "module" may implement a combination of software and / or hardware of a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and contemplated.
[0049] Figure 3 is a structural block diagram of a device for determining a clock signal frequency according to an embodiment of the present application, such as Figure 3 As shown, the device includes: a counting module 10 , a reading module 20 , and a determining module 30 .
[0050] A counting module 10, used for connecting the clock signal to a frequency meter inside the chip, and the frequency meter counts the clock signal in response to an enable signal;
[0051] A reading module 20, configured to stop the frequency meter from counting after the measurement window ends, and read the counting result as the initial value of the frequency of the clock signal;
[0052] The determination module 30 is used to determine the frequency value of the clock signal according to the initial frequency value, the reference clock frequency of the frequency meter and the time count value of the measurement window.
[0053] Figure 4 is a structural block diagram of a device for determining a clock signal frequency according to yet another embodiment of the present application, such as Figure 4 As shown, the device includes Figure 3 In addition to all the modules shown, the determination module 30 also includes:
[0054] The calculation unit 31 is used to calculate the frequency value of the clock signal according to the initial frequency value, the reference clock frequency of the frequency meter and the time count value of the measurement window = the reference clock frequency * the initial frequency value / the time count value of the measurement window.
[0055] It should be noted that the above modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.
[0056] To facilitate the understanding of the technical solution provided by the present application, a detailed explanation will be given below in combination with embodiments of specific scenarios.
[0057] Figure 5 is a flow chart of a method for determining a clock signal frequency according to yet another embodiment of the present application. Figure 5 As shown, the method comprises the following steps:
[0058] Step S502, configuring the control status register (CSR) register A through software to release a reset signal;
[0059] Specifically, register A releases the reset signal of the debug module. The reset signal is low and effective. It is configured as 1 and read back to indicate that the configuration is successful and the corresponding reset signal is released, indicating that the debug module is turned on to enter the chip diagnostic mode. Its actual function is the diagnostic start switch of this application.
[0060] Step S504, configuring the CSR register B through software to perform window configuration on the frequency meter inside the chip;
[0061] Step S506, configuring the CSR register C through software, first pull low and then pull high the start_en enable signal of the frequency meter;
[0062] Specifically, the enable signal is first set to 0 (low level) and then to 1 (high level), thereby releasing the enable signal to ensure that the frequency meter can be triggered normally every time, the frequency meter starts to work and enable, and the corresponding clock frequency counting begins.
[0063] Step S508, read CSR register D through software, and wait for the frequency meter completion flag;
[0064] Specifically, when register D is 1, it indicates that the clock frequency measurement is completed.
[0065] Step S510, after detecting that the CSR register D is 1, read the output frequency of the clock frequency to be measured;
[0066] Specifically, after detecting that the CSR register D is 1, that is, after receiving the corresponding freq_done (frequency measurement end) signal (indicating that the frequency diagnosis measurement is completed), the o_freq (output frequency) of the clock frequency to be measured is read, that is, the initial frequency value read out based on the frequency meter inside the chip.
[0067] Step S512, calculating and obtaining a calculated value of the final frequency.
[0068] Specifically, according to the reference clock frequency, the frequency meter window and the output frequency of the clock frequency to be measured, the calculated value of the final required diagnosis frequency, that is, the actual final clock diagnosis result, can be calculated by calculation formula (1).
[0069] The calculation of the final diagnosis result frequency is related to i_basis_clk and i_window;
[0070] The calculation formula is as follows: final_freq = i_basis_clk*o_freq / i_window (1)
[0071] Among them, i_basis_clk represents the reference clock frequency used by the chip's internal frequency meter;
[0072] o_freq represents the initial frequency value read out by the frequency meter inside the chip, which is the measured initial frequency value;
[0073] The corresponding i_window is the calculation window of the frequency meter inside the chip;
[0074] final_freq corresponds to the frequency of the final diagnosis result, which is also the final diagnosis result that this application is concerned with.
[0075] According to another embodiment of the present application, the method for determining the frequency of a clock signal can be applied to Figure 6 The PCIe subsystem in the CPU chip shown in FIG. Figure 6As shown, there is a very important clock pclk between the PCIe controller (PCIe controller) and SerDes (PCIe physical layer), that is, the working clock of the PIPE interface. The presence or absence of this clock affects whether the PCIe controller can work normally, and the specific working frequency of its clock determines the data transmission rate of the PCIe subsystem. The PCIe subsystem data transmission works under gen1 / gen2 / gen3 / gen4 / gen5, and the corresponding pclk works at 62.5MHz / 125MHz / 250MHz / 500MHz / 1000MHz. The two have a sequential correspondence. In chip design, the key clock taking pclk as an example is used for clock diagnosis using the frequency meter inside the chip. On the one hand, the presence or absence of the corresponding clock can be diagnosed, so as to determine whether the corresponding PCIe subsystem is in a normal working state; on the other hand, the specific frequency of the corresponding clock can be measured through diagnosis to determine which transmission rate of the PCIe subsystem is currently in gen1-gen5.
[0076] Figure 7 This is the working principle diagram of the frequency meter inside the chip, such as Figure 7 As shown, the reset signal is used to turn on the diagnosis of the clock and determine the switch of the clock frequency. Under the action of the enable signal, the frequency meter starts counting and displays the specific count value. After the measurement window ends, the count value of the frequency meter is read to determine whether the clock is working normally.
[0077] Figure 8 is a flow chart of a method for determining a clock signal frequency according to another embodiment of the present application. Figure 8 As shown, the method comprises the following steps:
[0078] Step S802, configuring the internal register A of the CSR module through software to release the reset signal;
[0079] Specifically, the chip system software configures the internal register A of the CSR module through the configuration bus, and releases the reset signal of the debugmodule, that is, starts the diagnostic switch.
[0080] Step S804, configuring CSR registers B0, B1, B2, B3 through software, and performing window configuration on frequency meters A, B, C, D inside the chip;
[0081] Step S806, configuring CSR registers C0, C1, C2, and C3 by software, first pull low and then pull high the start_en enable signal of frequency counters A, B, C, and D;
[0082] Step S808, read CSR registers D0, D1, D2, D3 by software, and wait for the frequency meter completion flag of frequency meters A, B, C, D;
[0083] Specifically, when registers D0, D1, D2, and D3 are all 1, it indicates that the clock frequency measurement is completed.
[0084] Step S810, after detecting that the CSR registers D0, D1, D2, and D3 are 1, the output frequency of the clock frequency to be measured is read;
[0085] Specifically, after detecting that the CSR register D0 is 1, that is, after receiving the corresponding freq_done_lane0 signal (indicating that the diagnostic measurement of the frequency meter A is completed), the output frequency o_freq_lane0 of the clock frequency to be measured is read, that is, the initial value of the frequency read out by the frequency meter A inside the chip;
[0086] After detecting that CSR register D1 is 1, that is, after receiving the corresponding freq_done_lane1 signal (indicating that the diagnostic measurement of frequency meter B is completed), read the output frequency o_freq_lane1 of the clock frequency to be measured, that is, the initial value of the frequency read out by the frequency meter B inside the chip;
[0087] After detecting that the CSR register D2 is 1, that is, after receiving the corresponding freq_done_lane2 signal (indicating that the diagnostic measurement of the frequency meter C is completed), read the output frequency o_freq_lane2 of the clock frequency to be measured, that is, the initial value of the frequency read out based on the frequency meter C inside the chip;
[0088] After detecting that CSR register D3 is 1, that is, after receiving the corresponding freq_done_lane3 signal (indicating that the diagnostic measurement of frequency meter D is completed), the output frequency o_freq_lane3 of the clock frequency to be measured is read, that is, the initial value of the frequency read out based on the frequency meter D inside the chip.
[0089] Step S812, calculating and obtaining a calculated value of the final frequency.
[0090] Specifically, according to the reference clock frequency configured by lane0 (channel 0), the frequency meter window and the output frequency o_freq_lane0 of the clock frequency to be measured (based on the initial frequency value read out by the frequency meter A inside the chip), the calculated value of the final required diagnostic frequency can be calculated by the following corresponding calculation formula (2), that is, the actual final clock diagnostic result A.
[0091] The calculation of the final diagnosis result A frequency is related to i_basis_clk_lane0 and i_window_lane0;
[0092] The calculation formula is as follows:
[0093] final_freq_lane0=i_basis_clk_lane0×o_freq_lane0 / i_window_lane0 (2)
[0094] Among them, i_basis_clk_lane0 represents the reference clock frequency used by the internal frequency meter of the chip;
[0095] o_freq_lane0 indicates the initial frequency value read out by the frequency meter inside the chip, which is the measured initial frequency value;
[0096] The corresponding i_window_lane0 is the calculation window of the frequency meter inside the chip;
[0097] final_freq_lane0 corresponds to the frequency of the final diagnosis result, which is also the final diagnosis result A concerned by this application example, that is, the diagnosis result of the tx_clk0 clock output by lane0 (channel 0).
[0098] According to the reference clock frequency configured in lane1 (channel 1), the frequency meter window and the output frequency o_freq_lane1 of the clock frequency to be measured (based on the initial frequency value read out by the frequency meter B inside the chip), the calculated value of the final required diagnostic frequency can be calculated by the following corresponding calculation formula (3), that is, the actual final clock diagnostic result B.
[0099] The calculation of the final diagnosis result B frequency is related to i_basis_clk_lane1 and i_window_lane1 (frequency meter window of frequency meter B);
[0100] The calculation formula is as follows:
[0101] final_freq_lane1=i_basis_clk_lane1×o_freq_lane1 / i_window_lane1 (3)
[0102] Among them, i_basis_clk_lane1 represents the reference clock frequency used by the internal frequency meter of the chip;
[0103] o_freq_lane1 indicates the initial frequency value read out by the frequency meter inside the chip, which is the measured initial frequency value;
[0104] The corresponding i_window_lane1 is the calculation window of the frequency meter inside the chip;
[0105] final_freq_lane1 corresponds to the frequency of the final diagnosis result, which is also the final diagnosis result B concerned by this application example, that is, the diagnosis result of the tx_clk1 clock output by lane1 (channel 1).
[0106] According to the reference clock frequency configured in lane2 (channel 2), the frequency meter window and the output frequency o_freq_lane2 of the clock frequency to be measured (based on the initial frequency value read out by the frequency meter C inside the chip), the calculated value of the final required diagnostic frequency can be calculated by the following corresponding calculation formula (4), that is, the actual final clock diagnostic result C.
[0107] The calculation of the final diagnosis result C frequency is related to i_basis_clk_lane2 and i_window_lane2 (frequency counter window of frequency counter C);
[0108] The calculation formula is as follows:
[0109] final_freq_lane2=i_basis_clk_lane2×o_freq_lane2 / i_window_lane2 (4)
[0110] Among them, i_basis_clk_lane2 represents the reference clock frequency used by the internal frequency meter of the chip;
[0111] o_freq_lane2 indicates the initial frequency value read out by the frequency meter inside the chip, which is the measured initial frequency value;
[0112] The corresponding i_window_lane2 is the calculation window of the frequency meter inside the chip;
[0113] final_freq_lane2 corresponds to the frequency of the final diagnosis result, which is also the final diagnosis result C concerned by this application example, that is, the diagnosis result of the tx_clk2 clock output by lane2 (channel 2).
[0114] According to the reference clock frequency configured in lane3 (channel 3), the frequency meter window and the output frequency o_freq_lane3 of the clock frequency to be measured (based on the initial frequency value read out by the frequency meter D inside the chip), the calculated value of the final required diagnostic frequency can be calculated by the following corresponding calculation formula (5), that is, the actual final clock diagnostic result D.
[0115] The calculation of the frequency of the final diagnosis result D is related to i_basis_clk_lane3 and i_window_lane3 (the frequency meter window of frequency meter D);
[0116] The calculation formula is as follows:
[0117] final_freq_lane3=i_basis_clk_lane3×o_freq_lane3 / i_window_lane3 (5)
[0118] Among them, i_basis_clk_lane3 represents the reference clock frequency used by the internal frequency meter of the chip;
[0119] o_freq_lane3 indicates the initial frequency value read out by the frequency meter inside the chip, which is the measured initial frequency value;
[0120] The corresponding i_window_lane3 is the calculation window of the frequency meter inside the chip;
[0121] final_freq_lane3 corresponds to the frequency of the final diagnosis result, which is also the final diagnosis result D concerned in this application example, that is, the diagnosis result of the tx_clk3 clock output by lane3 (channel 3).
[0122] Finally, the diagnostic results A, B, C, and D of the four clocks tx_clk0-tx_clk3 to be diagnosed corresponding to lane0-lane3 will be fed back to the CSR module. The chip system software can obtain the diagnostic results of the four clocks tx_clk0-tx_clk3 at the same time by reading the register contents of the corresponding addresses, thereby completing the simultaneous measurement and diagnosis of multiple clocks.
[0123] The flowchart of the method for determining the clock signal frequency according to another embodiment of the present application can be applied to Fig. 9 The PX4 subsystem in the multi-mode soft baseband expansion chip (Multi-Mode Chip System, MCS) shown in FIG. Fig. 9 As shown in the figure, the PX4 subsystem contains 4 channels, namely lane0, lane1, lane2 and lane3. The 4 channels will send out 4 clock signals (tx_clk0, tx_clk1, tx_clk2, tx_clk3) respectively. The 4 clocks will interact with the upstream PIPE Bifurcation module. The presence or absence of the 4 clocks and the specific frequency will affect the working conditions of the upstream module. Therefore, Fig. 9 The PX4 subsystem in the MCS chip shown uses the method described in this application to perform clock diagnosis of multiple clocks simultaneously based on the chip's internal frequency meter.
[0124] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.
[0125] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.
[0126] An embodiment of the present application further provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.
[0127] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.
[0128] The method of the embodiment of the present application is used to perform clock diagnosis on the chip without the need for external precision time and frequency measurement equipment, which can reduce costs and improve measurement efficiency; it can simultaneously measure multiple key clock frequency signals and diagnose multiple clocks; using software to configure the corresponding registers, it is convenient to use the chip's internal frequency meter to perform measurements, and complete the clock diagnosis work, which is efficient and convenient.
[0129] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.
[0130] Obviously, those skilled in the art should understand that the above modules or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.
[0131] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application shall be included in the protection scope of the present application.
Claims
1. A method for determining the frequency of a clock signal, characterized in that: include: Connecting the clock signal to a frequency meter inside the chip, wherein the frequency meter counts the clock signal in response to an enable signal; The frequency meter stops counting after the measurement window ends, and reads the counting result as the initial value of the frequency of the clock signal; The frequency value of the clock signal is determined according to the initial frequency value, the reference clock frequency of the frequency meter and the time count value of the measurement window.
2. The method according to claim 1, characterized in that Determining the frequency value of the clock signal according to the initial frequency value, the reference clock frequency of the frequency meter and the time count value of the measurement window comprises: The frequency value of the clock signal is calculated according to the initial frequency value, the reference clock frequency of the frequency meter and the time count value of the measurement window = the reference clock frequency * the initial frequency value / the time count value of the measurement window.
3. The method according to claim 1, characterized in that Before the frequency meter counts the clock signal in response to the enable signal, the frequency meter further includes: The frequency meter starts a mode of measuring the frequency of the clock signal in response to a reset signal; A measurement window of the frequency meter is determined.
4. The method according to claim 3, characterized in that The frequency meter starts the mode of measuring the frequency of the clock signal in response to the reset signal, comprising: A reset signal is released to the frequency meter through a first control status register CSR, and the frequency meter starts the mode of measuring the frequency of the clock signal in response to the reset signal, wherein the first CSR is connected to the frequency meter.
5. The method according to claim 3, characterized in that: Determining the measurement window of the frequency meter comprises: The measurement window of the frequency is determined by a second CSR, wherein the second CSR is connected to the frequency meter.
6. The method according to claim 1, characterized in that The frequency meter counts the clock signal in response to the enable signal, comprising: The enable signal is released to the frequency meter through a third CSR, and the frequency meter counts the clock signal in response to the enable signal, wherein the third CSR is connected to the frequency meter.
7. The method according to claim 1, characterized in that The frequency counter stops counting after the measurement window ends, and reads the initial frequency value of the clock signal, including: Acquire an end signal indicating the end of the measurement window released by the fourth CSR, wherein the frequency meter stops counting in response to the end signal, wherein the fourth CSR is connected to the frequency meter; The initial frequency value of the clock signal is read through a fifth CSR, wherein the fifth CSR is connected to the frequency meter.
8. A device for determining the frequency of a clock signal, characterized in that: include: A counting module, used for connecting the clock signal to a frequency meter inside the chip, wherein the frequency meter counts the clock signal in response to an enable signal; A reading module, used for the frequency meter to stop counting after the measurement window ends, and read the counting result as the initial value of the frequency of the clock signal; A determination module is used to determine the frequency value of the clock signal according to the initial frequency value, the reference clock frequency of the frequency meter and the time count value of the measurement window.
9. The device according to claim 8, characterized in that The determination module also includes: A calculation unit is used to calculate the frequency value of the clock signal according to the initial frequency value, the reference clock frequency of the frequency meter and the time count value of the measurement window = the reference clock frequency * the initial frequency value / the time count value of the measurement window.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method described in any one of claims 1 to 7 when executed by a processor.
11. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method described in any one of claims 1 to 7 are implemented.