Deemphasis device, deemphasis method and core particle integration system

By designing the main tap data logic module, the equalization tap data logic module and the drive switch logic module in the de-emphasis device, the drive switch signal is generated to control the equalization drive stage, which solves the problem of short-circuit current generated within the transmitter drive stage and achieves the further development High energy efficiency.

CN119415448AActive Publication Date: 2025-02-11STRANGE MOORE SHANGHAI INTEGRATED CIRCUIT DESIGN CO LTD
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Patent Information

Application Number
CN202411402120.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-10-09
Publication Date
2025-02-11
Estimated Expiration
2044-10-09

AI Technical Summary

Technical Problem

Short circuit current is generated inside the transmitter drive stage, limiting the energy efficiency of the high-speed interface.

Method used

A de-emphasis device is designed, including a main tap data logic module, an equalizing tap data logic module and a drive switch logic module. By generating a drive switch signal, the enable or off of the equalizing drive stage is controlled to avoid short-circuit current inside the drive stage.

Benefits of technology

It effectively avoids short-circuit current when the equalization path is opposite to the main path driving direction, saves the transmitter's power consumption, and improves the energy efficiency of the high-speed interface.

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Abstract

The invention provides a de-emphasis device, a de-emphasis method and a core particle integration system, and the de-emphasis device comprises a main tap data logic module which forms main tap data according to data to be transmitted; the balanced tap data logic module forms balanced tap data according to the data to be transmitted, the balanced tap data and the main tap data are opposite in phase, and a unit interval exists between the balanced tap data and the main tap data; the driving switch logic module is used for generating a driving switch signal according to the main tap data and the balanced tap data, and the driving switch signal is valid when the tap data and the balanced tap data are the same and is invalid when the tap data and the balanced tap data are opposite; a main tap driving stage which is enabled and driven by the main tap data; and the equalization driving stage is driven by the equalization tap data and is enabled or closed under the control of the driving switch signal. According to the de-emphasis device, the de-emphasis method and the chip integration system provided by the invention, the power consumption of the transmitter can be saved.
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Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuits, and in particular relates to a de-emphasis device, a de-emphasis method and a core particle integration system. Background Art

[0002] As the requirements for computing power in high-performance computing continue to increase, a chiplet integrated system is needed to meet high-performance computing needs. The transmitter driver stage is an important component of the physical layer of the high-speed interconnect interface between chiplets. Given the low-pass characteristics of the channel, the driver stage of the high-speed interface transmitter usually has a certain equalization capability, among which de-emphasis technology has become the most commonly used equalization technology due to its simplicity and practicality.

[0003] In the de-emphasis device, the main tap path and the equalization path are independently configured with driver stages, and then all the driver stages are connected in parallel to drive the channel. At this time, the driving directions of the main tap path and the equalization path to their respective driver stages may be opposite. If the driver stage of the main tap path is pulled up and the driver stage of the equalization path is pulled down, a short-circuit current will be generated inside the transmitter driver stage. Although the short-circuit current helps the transmitter to achieve the equalization function, it does not actually drive the channel and the opposite receiver, but is consumed inside the transmitter driver stage, thereby increasing the ineffective power consumption of the transmitter and limiting the energy efficiency of the entire high-speed interface. Summary of the invention

[0004] The object of the present invention is to provide a de-emphasis device, a de-emphasis method and a core particle integration system, which can solve the problem of short-circuit current generated inside the transmitter driver stage and limiting the energy efficiency of the high-speed interface.

[0005] To achieve the above object, the present invention provides a de-emphasis device, which at least comprises:

[0006] A main tap data logic module, forming main tap data according to the data to be transmitted;

[0007] A balanced tap data logic module, which forms balanced tap data according to the data to be transmitted, wherein the balanced tap data is inverted with the main tap data, and there is a unit interval between the balanced tap data and the main tap data;

[0008] A driving switch logic module generates a driving switch signal according to the main tap data and the balanced tap data, wherein the driving switch signal is valid when the tap data and the balanced tap data are the same, and is invalid when the tap data and the balanced tap data are opposite;

[0009] A main tap driving stage, driven by the main tap data enable;

[0010] The balanced driving stage is driven by the balanced tap data and is enabled or disabled by the driving switch signal.

[0011] In one embodiment of the present invention, the balanced tap data logic module includes a pre-tap data logic module, which forms pre-tap data based on the data to be transmitted, the pre-tap data is inverted with the main tap data, and the pre-tap data is one unit interval ahead of the main tap data.

[0012] In one embodiment of the present invention, the driving switch logic module includes a pre-tap driving switch logic module, and the pre-tap driving switch logic module performs a logic operation on the main tap data and the pre-tap data to generate a pre-tap driving switch signal.

[0013] In one embodiment of the present invention, the balanced driving stage includes a pre-tap driving stage, which is electrically connected to the output end of the pre-tap data logic module and the output end of the pre-tap driving switch logic module, is driven by the pre-tap data, and is enabled or disabled by the pre-tap driving switch signal.

[0014] In one embodiment of the present invention, if the pre-tap data and the main tap data are the same, the pre-tap drive switch logic module outputs a valid pre-tap drive switch signal, and the pre-tap drive stage is enabled and driven by the pre-tap data output by the pre-tap data logic module.

[0015] In one embodiment of the present invention, the balanced tap data logic module includes a rear tap data logic module, which forms rear tap data based on the data to be transmitted, the rear tap data is inverted with the main tap data, and the rear tap data is delayed by one unit interval than the main tap data.

[0016] In one embodiment of the present invention, the driving switch logic module includes a rear-tap driving switch logic module, and the rear-tap driving switch logic module performs a logic operation on the main tap data and the rear tap data to generate a rear-tap driving switch signal.

[0017] In one embodiment of the present invention, the balanced driving stage includes a rear tap driving stage, which is electrically connected to the output end of the rear tap data logic module and the output end of the rear tap driving switch logic module, is driven by the rear tap data, and is enabled or disabled by the rear tap driving switch signal.

[0018] In one embodiment of the present invention, if the rear tap data is the same as the main tap data, the rear tap drive switch logic module outputs a valid rear tap drive switch signal, and the rear tap drive stage is enabled and driven by the rear tap data output by the rear tap data logic module.

[0019] In one embodiment of the present invention, the main tap data logic module includes a first trigger, the input end of the first trigger inputs the data to be transmitted, and the output end of the first trigger outputs the main tap data;

[0020] The main tap driving stage includes a first source series terminal driver, which is connected in series between a power supply and a ground terminal, and a control terminal of a control tube in the first source series terminal driver is controlled by the main tap data.

[0021] In one embodiment of the present invention, the balanced tapped data logic module includes a pre-tapped data logic module, and the pre-tapped data logic module includes a first inverter, the input end of the first inverter inputs the data to be transmitted, and the output end of the first inverter outputs the pre-tapped data.

[0022] In one embodiment of the present invention, the driving switch logic module includes a pre-tap driving switch logic module, and the pre-tap driving switch logic module includes:

[0023] a first XOR gate, wherein an input end of the first XOR gate is electrically connected to an output end of the pre-tap data logic module and an output end of the main-tap data logic module, and an output end of the first XOR gate outputs a first pre-tap drive switch signal; and

[0024] A third inverter, wherein the input end of the third inverter is electrically connected to the output end of the first XOR gate, and the output end of the third inverter outputs a second pre-tap driving switch signal.

[0025] In one embodiment of the present invention, the balanced driving stage includes a pre-tap driving stage, and the pre-tap driving stage includes a first control switch, a second source series terminal driver and a second control switch connected in series in sequence, and the first control switch, the second source series terminal driver and the second control switch are connected in series between a power supply and a ground terminal, the control end of the control tube in the second source series terminal driver is controlled by the main tap data, the first control switch is controlled by the first pre-tap drive switch signal, and the second control switch is controlled by the second pre-tap drive switch signal.

[0026] In one embodiment of the present invention, the balanced tap data logic module includes a post-tap data logic module, and the post-tap data logic module includes a second trigger and a second inverter, the input end of the second trigger is electrically connected to the output end of the first trigger, the input end of the second inverter is electrically connected to the output end of the second trigger, and the output end of the second inverter outputs the post-tap data.

[0027] In one embodiment of the present invention, the driving switch logic module includes a rear-tap driving switch logic module, and the rear-tap driving switch logic module includes:

[0028] a second XOR gate, wherein an input terminal of the second XOR gate is electrically connected to an output terminal of the post-tap data logic module and an output terminal of the main-tap data logic module, and an output terminal of the second XOR gate outputs a first post-tap driving switch signal; and

[0029] A fourth inverter, wherein the input end of the fourth inverter is electrically connected to the output end of the second XOR gate, and the output end of the fourth inverter outputs a second rear-tap driving switch signal.

[0030] In one embodiment of the present invention, the balanced driving stage includes a rear-tap driving stage, and the rear-tap driving stage includes a third control switch, a third source series terminal driver and a fourth control switch connected in series in sequence, and the third control switch, the third source series terminal driver and the fourth control switch are connected in series between a power supply and a ground terminal, the control end of the control tube in the third source series terminal driver is controlled by the main tap data, the third control switch is controlled by the first rear-tap driving switch signal, and the fourth control switch is controlled by the second rear-tap driving switch signal.

[0031] The present invention also provides a de-emphasis method, comprising the following steps:

[0032] forming main tap data using a main tap data logic module;

[0033] Using a balanced tap data logic module to form balanced tap data, the balanced tap data is inverted with the main tap data, and there is a unit interval between the balanced tap data and the main tap data;

[0034] Using a driving switch logic module to generate a driving switch signal, wherein the driving switch signal is valid when the tap data and the balanced tap data are the same, and is invalid when the tap data and the balanced tap data are opposite;

[0035] Using the main tap data to enable driving a main tap driver stage; and

[0036] The balanced tap data is used to drive the balanced driving stage, and the driving switch signal is used to control enabling or disabling the balanced driving stage.

[0037] The present invention also provides a chip integration system, comprising a plurality of chiplets, wherein the de-emphasis device set as described in any one of the above items is arranged in the transmitter of the chiplet.

[0038] In summary, the present invention provides a de-emphasis device, a de-emphasis method and a core integrated system, which compares the main tap data output by the main tap data logic module in the main path and the balanced tap data logic module output by the balanced tap data logic module in the balanced path, and generates a drive switch signal to enable the balanced drive stage in the balanced path, thereby avoiding the balanced drive stage of the balanced path being opposite to the driving direction of the main drive stage of the main path, eliminating the short-circuit current inside the drive stage, and thus saving the power consumption of the transmitter. At the same time, the module for generating the drive switch signal in the present invention is constructed by a CMOS circuit, with simple logic and no static working current, and the cost to the overall power consumption of the transmitter is almost negligible. In addition, the de-emphasis device proposed by the present invention has a wide range of uses, and can reuse existing circuit modules to a large extent, which is conducive to reducing design complexity and shortening the research and development cycle. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for describing the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0040] Figure 1 It is a structural block diagram of a de-emphasis device in one embodiment of the present application.

[0041] Figure 2 is a signal waveform diagram of a de-emphasis device in one embodiment of the present application.

[0042] Figure 3 is a circuit diagram of a de-emphasis device in one embodiment of the present application.

[0043] Description of labels:

[0044] 1011, pre-tap data logic module; 1012, main tap data logic module; 1013, post-tap data logic module; 1021, pre-tap drive switch logic module; 1022, post-tap drive switch logic module; 1031, pre-tap drive stage; 1032, main tap drive stage; 1033, post-tap drive stage; 201, first source series terminal driver; 202, second source series terminal driver; 203, third source series terminal driver. DETAILED DESCRIPTION

[0045] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thoroughly and comprehensively understood.

[0046] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0047] In the description of the present invention, it should be understood that the orientations or positional relationships indicated by the terms "center", "upper", "lower", "front", "back", "left", "right", etc. are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0048] As the requirements for computing power of high-performance computing continue to increase, it is increasingly difficult for a system solution using a single chip to meet the performance requirements of high-performance computing. At the same time, the area of ​​a single computing chip that can provide a large computing power is getting larger and larger, which poses a great challenge to the yield of the chip. In this case, the solution of using a chip integration system to meet the challenges of high-performance computing has become an important means to solve the above problems. In the solution of the chip integration system, high-frequency data interaction is required between different chiplets to complete related calculations. Therefore, the high-speed interconnect interface used for data transmission between chiplets has become one of the most important components of the chip integration system. Among them, the physical layer of the high-speed interconnect directly processes high-speed data, and its performance directly affects the data transmission efficiency of the high-speed interconnect. The transmitter driver stage is an important part of the physical layer of the high-speed interconnect interface between chiplets. In view of the low-pass characteristics of the channel, the driver stage of the high-speed interface transmitter usually has a certain equalization capability. Among them, de-emphasis technology has become one of the most commonly used equalization technologies due to its simplicity and practicality.

[0049] See also Figure 1As shown, in one embodiment of the present invention, a de-emphasis device, a de-emphasis method and a chip integrated system are provided. The de-emphasis device is arranged in the chip integrated system and is located in the transmitter of the chip. Specifically, the de-emphasis device is arranged in the physical layer of the transmitter of the high-speed data transmission interface between chips. Of course, the de-emphasis device can also be used in other circuits and systems that require this function.

[0050] For details, please refer to Figure 1 As shown, in one embodiment of the present invention, the de-emphasis device includes a data logic module, a drive switch logic module and a drive stage. Among them, the data logic module includes a main tap data logic module 1012 and a balanced tap data logic module. The main tap data logic module 1012 forms the main tap data D_MAIN according to the data to be transmitted D_IN. The balanced tap data logic module forms balanced tap data according to the data to be transmitted D_IN, and the balanced tap data is inverted with the main tap data D_MAIN, and a unit interval is set between the balanced tap data and the main tap data D_MAIN. The drive switch logic module generates a drive switch signal according to the main tap data D_MAIN and the balanced tap data, and the drive switch signal is valid when the tap data and the balanced tap data are the same, and invalid when the tap data and the balanced tap data are opposite. The driving stage includes a main tap driving stage 1032 and a balanced driving stage. The main tap driving stage 1032 is enabled and driven by the main tap data D_MAIN, and the balanced driving stage is driven by the balanced tap data and is enabled or disabled by a driving switch signal.

[0051] See also Figure 1 and Figure 2 As shown, in one embodiment of the present invention, the balanced tap data logic module includes a pre-tap data logic module 1011. The pre-tap data logic module 1011 inputs the data to be transmitted D_IN and forms the pre-tap data D_PRE according to the data to be transmitted D_IN. Figure 2 As shown, in this embodiment, the pre-tap data D_PRE is inverted to the main tap data D_MAIN, and the pre-tap data D_PRE is ahead of the main tap data D_MAIN by one unit interval.

[0052] See also Figure 1 and Figure 2 As shown, in one embodiment of the present invention, the balanced tap data logic module includes a post-tap data logic module 1013. The post-tap data logic module 1013 inputs the data to be transmitted D_IN and forms the post-tap data D_POST according to the data to be transmitted D_IN. Figure 2 As shown, in this embodiment, the post-tap data D_POST is inverted with the main tap data D_MAIN, and the post-tap data D_POST is delayed by one unit interval than the main tap data D_MAIN.

[0053] See also Figure 1 and Figure 2 As shown, in one embodiment of the present invention, the driving switch logic module includes a pre-tap driving switch logic module 1021. The pre-tap driving switch logic module 1021 is electrically connected to the output end of the pre-tap data logic module 1011 and the output end of the main tap data logic module 1012, and performs a logic operation on the main tap data D_MAIN and the pre-tap data D_PRE to generate a pre-tap driving switch signal SW_PRE. Figure 2 As shown, the pre-tap driving switch signal SW_PRE is valid when the main tap data D_MAIN and the pre-tap data D_PRE are the same, and controls the enabling of the pre-tap driving stage 1031. The pre-tap driving switch signal SW_PRE is invalid when the main tap data D_MAIN and the pre-tap data D_PRE are opposite, and the pre-tap driving stage 1031 is turned off.

[0054] See also Figure 1 and Figure 2 As shown, in one embodiment of the present invention, the driving switch logic module includes a rear tap driving switch logic module 1022. The rear tap driving switch logic module 1022 is electrically connected to the output end of the rear tap data logic module 1013 and the output end of the main tap data logic module 1012, and performs a logic operation on the main tap data D_MAIN and the rear tap data D_POST to generate a rear tap driving switch signal SW_POST. Figure 2 As shown, the rear tap driving switch signal SW_POST is valid when the main tap data D_MAIN and the rear tap data D_POST are the same, and controls the enabling of the rear tap driving stage 1033. The rear tap driving switch signal SW_POST is invalid when the main tap data D_MAIN and the rear tap data D_POST are opposite, and closes the rear tap driving stage 1033.

[0055] See also Figure 1 and Figure 2 As shown, in one embodiment of the present invention, the balanced driving stage includes a pre-tap driving stage 1031. The pre-tap driving stage 1031 is electrically connected to the output end of the pre-tap data logic module 1011 and the output end of the pre-tap driving switch logic module 1021, driven by the pre-tap data D_PRE, and enabled or disabled by the pre-tap driving switch signal SW_PRE. Figure 2As shown, when the pre-tap data logic module 1011 outputs the pre-tap data D_PRE and the pre-tap drive switch logic module 1021 outputs the valid pre-tap drive switch signal SW_PRE, the pre-tap drive stage 1031 is turned on. When the pre-tap data logic module 1011 does not output the pre-tap data D_PRE or the pre-tap drive switch logic module 1021 outputs the invalid pre-tap drive switch signal SW_PRE, the pre-tap drive stage 1031 is turned off. When the pre-tap drive stage 1031 is turned off, the output of the pre-tap drive stage 1031 is in a high impedance state.

[0056] See also Figure 1 and Figure 2 As shown, in one embodiment of the present invention, the balanced driving stage includes a post-tap driving stage 1033. The post-tap driving stage 1033 is electrically connected to the output end of the post-tap data logic module 1013 and the output end of the post-tap driving switch logic module 1022, driven by the post-tap data D_POST, and enabled or disabled by the post-tap driving switch signal SW_POST. Figure 2 As shown, when the rear tap data logic module 1013 outputs the rear tap data D_POST and the rear tap drive switch logic module 1022 outputs a valid rear tap drive switch signal SW_POST, the rear tap drive stage 1033 is turned on. When the rear tap data logic module 1013 does not output the rear tap data D_POST or the rear tap drive switch logic module 1022 outputs an invalid rear tap drive switch signal SW_POST, the rear tap drive stage 1033 is turned off. When the rear tap drive stage 1033 is turned off, the output of the rear tap drive stage 1033 is in a high impedance state.

[0057] Please note that, see Figure 1 As shown, the main path of de-emphasis includes a main tap data logic module 1012 and a main tap driver stage 1032, and the equalization path of de-emphasis includes an equalization tap data logic module, an equalization tap drive switch logic module and an equalization driver stage. In the present application, one equalization path can be set, or two equalization paths can be set. When one equalization path is set, one equalization path can be a pre-tap path including a pre-tap data logic module 1011, a pre-tap drive switch logic module 1021 and a pre-tap driver stage 1031. One equalization path can also be a post-tap path including a post-tap data logic module 1013, a post-tap drive switch logic module 1022 and a post-tap driver stage 1033. When two equalization paths are set, a pre-tap path including a pre-tap data logic module 1011, a pre-tap drive switch logic module 1021 and a pre-tap drive stage 1031, and a post-tap path including a post-tap data logic module 1013, a post-tap drive switch logic module 1022 and a post-tap drive stage 1033 are simultaneously set in the de-emphasis device.

[0058] See also Figure 1 and Figure 2 As shown, in the channel where the de-emphasis device provided by the present application is located, a termination circuit is provided at the data receiving end. At this time, the driving capability of the overall driving stage output by the de-emphasis device can be adjusted by controlling the opening and closing of the pre-tap driving stage 1031 and the post-tap driving stage 1033, thereby achieving a balancing effect without generating a short-circuit current.

[0059] For details, please refer to Figure 1 and Figure 2 As shown, when the de-emphasis device provided by the present application is used to implement the de-emphasis method. The main tap data logic module 1012 forms the main tap data D_MAIN according to the data to be transmitted D_IN. The balanced tap data logic module forms the balanced tap data according to the data to be transmitted D_IN, the balanced tap data is inverted with the main tap data D_MAIN, and a unit interval is set between the balanced tap data and the main tap data D_MAIN. The drive switch logic module generates a drive switch signal according to the main tap data D_MAIN and the balanced tap data, and the drive switch signal is valid when the tap data and the balanced tap data are the same, and invalid when the tap data and the balanced tap data are opposite. The driving stage includes a main tap driving stage 1032 and a balanced driving stage, the main tap driving stage 1032 is enabled and driven by the main tap data D_MAIN, the balanced driving stage is driven by the balanced tap data, and is controlled to be enabled or closed by the driving switch signal.

[0060] See also Figure 1 and Figure 2 As shown, in one embodiment of the present invention, the equalization path in the de-emphasis device has no function, and only the main path independently drives the channel. At this time, the pre-tap path and / or the post-tap path have no output, and only the main path independently drives the channel. Specifically, in some embodiments, the pre-tap data D_PRE output by the pre-tap data logic module 1011 is opposite to the main tap data D_MAIN output by the main tap data logic module 1012, the pre-tap drive switch logic module 1021 outputs an invalid pre-tap drive switch signal SW_PRE, and the pre-tap drive stage 1031 is turned off. In some embodiments, the post-tap data D_POST output by the post-tap data logic module 1013 is opposite to the main tap data D_MAIN output by the main tap data logic module 1012, the drive switch logic module outputs an invalid post-tap drive switch signal SW_POST, and the post-tap drive stage 1033 is turned off. The main tap driver stage 1032 is driven by the main tap data D_MAIN output by the main tap data logic module 1012, and the channel is driven independently by the main tap driver stage 1032. At this time, the online data output by the de-emphasis device is as follows: Figure 2 As shown in section a.

[0061] See also Figure 1 and Figure 2 As shown, in one embodiment of the present invention, an equalization path is set in the de-emphasis device, and it is a pre-tap path including a pre-tap data logic module 1011, a pre-tap drive switch logic module 1021 and a pre-tap drive stage 1031. At this time, if the pre-tap data D_PRE output by the pre-tap data logic module 1011 is the same as the main tap data D_MAIN output by the main tap data logic module 1012, the pre-tap drive switch logic module 1021 outputs a valid pre-tap drive switch signal SW_PRE, and the pre-tap drive stage 1031 is enabled to drive by the pre-tap data D_PRE output by the pre-tap data logic module 1011. At the same time, the main tap drive stage 1032 is enabled to drive by the main tap data D_MAIN output by the main tap data logic module 1012. The pre-tap driving stage 1031 and the main tap driving stage 1032 have the same driving direction, and the driving capabilities are superimposed. The channel is driven by the pre-tap driving stage 1031 and the main tap driving stage 1032. At this time, the online data output by the de-emphasis device is as follows: Figure 2 As shown in the middle section b. If the pre-tap data D_PRE output by the pre-tap data logic module 1011 is opposite to the main tap data D_MAIN output by the main tap data logic module 1012, the pre-tap drive switch logic module 1021 outputs an invalid pre-tap drive switch signal SW_PRE, and the pre-tap drive stage 1031 is turned off. The main tap drive stage 1032 is enabled and driven by the main tap data D_MAIN output by the main tap data logic module 1012, and the channel is driven independently by the main tap drive stage 1032. At this time, the online data output by the de-emphasis device is as follows Figure 2 As shown in the middle section a. Therefore, the pre-tap path has two working states. In the two working states, the de-emphasis device can provide different driving capabilities, and can generate different signal swings when there is a termination circuit at the receiving end, thereby exerting a balancing effect.

[0062] See also Figure 1 and Figure 2As shown, in one embodiment of the present invention, an equalization path is set in the de-emphasis device, and it is a rear tap path including a rear tap data logic module 1013, a rear tap drive switch logic module 1022 and a rear tap drive stage 1033. At this time, if the rear tap data D_POST output by the rear tap data logic module 1013 is the same as the main tap data D_MAIN output by the main tap data logic module 1012, the rear tap drive switch logic module 1022 outputs a valid rear tap drive switch signal SW_POST, and the rear tap drive stage 1033 is enabled to drive by the rear tap data D_POST output by the rear tap data logic module 1013. At the same time, the main tap drive stage 1032 is enabled to drive by the main tap data D_MAIN output by the main tap data logic module 1012. The driving directions of the rear tap driving stage 1033 and the main tap driving stage 1032 are the same, and the driving capabilities are superimposed. The channel is driven by the rear tap driving stage 1033 and the main tap driving stage 1032. At this time, the online data output by the de-emphasis device is as follows: Figure 2 As shown in the middle section c. If the post-tap data D_POST output by the post-tap data logic module 1013 is opposite to the main tap data D_MAIN output by the main tap data logic module 1012, the post-tap drive switch logic module 1022 outputs an invalid post-tap drive switch signal SW_POST, and the post-tap drive stage 1033 is turned off. The main tap drive stage 1032 is enabled and driven by the main tap data D_MAIN output by the main tap data logic module 1012, and the channel is driven independently by the main tap drive stage 1032. At this time, the online data output by the de-emphasis device is as follows: Figure 2 As shown in the middle section a. Therefore, the post-tap path has two working states. In the two working states, the de-emphasis device can provide different driving capabilities, and can generate different signal swings when there is a termination circuit at the receiving end, thereby exerting a balancing effect.

[0063] See also Figure 1 and Figure 2As shown, in one embodiment of the present invention, two equalization paths are set in the de-emphasis device, and they are a pre-tap path including a pre-tap data logic module 1011, a pre-tap drive switch logic module 1021 and a pre-tap drive stage 1031, and a post-tap path including a post-tap data logic module 1013, a post-tap drive switch logic module 1022 and a post-tap drive stage 1033. At this time, if the pre-tap data D_PRE output by the pre-tap data logic module 1011 is the same as the main tap data D_MAIN output by the main tap data logic module 1012, the pre-tap drive switch logic module 1021 outputs a valid pre-tap drive switch signal SW_PRE, and the pre-tap drive stage 1031 is enabled to be driven by the pre-tap data D_PRE output by the pre-tap data logic module 1011. The rear tap data D_POST output by the rear tap data logic module 1013 is the same as the main tap data D_MAIN output by the main tap data logic module 1012. The driving switch logic module outputs a valid rear tap driving switch signal SW_POST, and the rear tap driving stage 1033 is enabled to be driven by the rear tap data D_POST output by the rear tap data logic module 1013. At the same time, the main tap driving stage 1032 is enabled to be driven by the main tap data D_MAIN output by the main tap data logic module 1012. The pre-tap driving stage 1031, the rear tap driving stage 1033 and the main tap driving stage 1032 have the same driving direction, and the driving capabilities are superimposed. The channel is driven jointly by the pre-tap driving stage 1031, the rear tap driving stage 1033 and the main tap driving stage 1032. At this time, the online data output by the de-emphasis device is as follows: Figure 2 If the pre-tap data D_PRE output by the pre-tap data logic module 1011 is the same as the main tap data D_MAIN output by the main tap data logic module 1012, and the post-tap data D_POST output by the post-tap data logic module 1013 is opposite to the main tap data D_MAIN output by the main tap data logic module 1012, then the online data output by the de-emphasis device is as follows: Figure 2 If the pre-tap data D_PRE output by the pre-tap data logic module 1011 is opposite to the main tap data D_MAIN output by the main tap data logic module 1012, and the post-tap data D_POST output by the post-tap data logic module 1013 is the same as the main tap data D_MAIN output by the main tap data logic module 1012, then the online data output by the de-emphasis device is as follows: Figure 2 If the pre-tap data D_PRE output by the pre-tap data logic module 1011 is opposite to the main tap data D_MAIN output by the main tap data logic module 1012, and the post-tap data D_POST output by the post-tap data logic module 1013 is opposite to the main tap data D_MAIN output by the main tap data logic module 1012, then the online data output by the de-emphasis device is as follows: Figure 2 As shown in the middle a section. Therefore, setting up two equalization paths can provide greater driving capability, thereby generating a larger signal swing. At this time, Figure 2 As shown, the online data waveform output by the transmitter has a de-emphasized equalization effect, and no short-circuit current is generated inside the driving stage under the control of the driving switch signal.

[0064] See also Figure 3 As shown, in one embodiment of the present invention, a trigger is first used between the pre-tap data logic module 1011, the main tap data logic module 1012 and the post-tap data logic module 1013 to realize a phase shift of one unit interval between the data, and the inversion of the pre-tap data D_PRE, the main tap data D_MAIN and the post-tap data D_POST is realized by an inverter. Specifically, the pre-tap data logic module 1011 includes a first inverter N1, the input end of the first inverter N1 inputs the data to be transmitted D_IN, and the output end of the first inverter N1 outputs the pre-tap data D_PRE. The pre-tap data logic module 1011 inverts the data to be transmitted D_IN to form the pre-tap data D_PRE. The main tap data logic module 1012 includes a first trigger D1, the input end of the first trigger D1 inputs the data to be transmitted D_IN, and the output end of the first trigger D1 outputs the main tap data D_MAIN. The main tap data logic module 1012 delays the data to be transmitted D_IN by one unit interval to form the main tap data D_MAIN. The post-tap data logic module 1013 includes a second trigger D2 and a second inverter N2, the input end of the second trigger D2 is electrically connected to the output end of the first trigger D1, the input end of the second inverter N2 is electrically connected to the output end of the second trigger D2, and the output end of the second inverter N2 outputs the post-tap data D_POST. The post-tap data logic module 1013 delays the main tap data D_MAIN by one unit interval and then inverts it to form the post-tap data D_POST.

[0065] See also Figure 3As shown, in one embodiment of the present invention, the pre-tap drive switch logic module 1021 and the post-tap drive switch logic module 1022 are implemented using an XOR gate. In this embodiment, since the pre-tap drive stage 1031 and the post-tap drive stage 1033 require two opposite drive switch signals, an inverter is also included in the pre-tap drive switch logic module 1021 and the post-tap drive switch logic module 1022. Specifically, the pre-tap drive switch logic module 1021 includes a first XOR gate L1 and a third inverter N3. The input end of the first XOR gate L1 is electrically connected to the output end of the pre-tap data logic module 1011 and the output end of the main tap data logic module 1012, and the output end of the first XOR gate L1 outputs the first pre-tap drive switch signal SW_PRE_a. The input end of the third inverter N3 is electrically connected to the output end of the first XOR gate L1, and the output end of the third inverter N3 outputs the second pre-tap drive switch signal SW_PRE_b. The post-tap drive switch logic module 1022 includes a second XOR gate L2 and a fourth inverter N4. The input end of the second XOR gate L2 is electrically connected to the output end of the post-tap data logic module 1013 and the output end of the main tap data logic module 1012, and the output end of the second XOR gate L2 outputs the first post-tap drive switch signal SW_POST_a. The input end of the fourth inverter N4 is electrically connected to the output end of the second XOR gate L2, and the output end of the fourth inverter N4 outputs the second post-tap drive switch signal SW_POST_b.

[0066] See also Figure 3 As shown, in one embodiment of the present invention, the main tap driver stage 1032 includes a source-series-terminated (SST) driver, which is a first source series terminal driver 202. The first source series terminal driver 202 is connected in series between the power supply and the ground terminal, and the control terminal of the control transistor in the first source series terminal driver 202 is controlled by the main tap data D_MAIN.

[0067] See also Figure 3 As shown, in one embodiment of the present invention, the source series terminal driver includes a first control tube M1, a first resistor R1, a second resistor R2, and a second control tube M2 connected in series in sequence. The power supply, the first control tube M1, the first resistor R1, the second resistor R2, the second control tube M2 and the ground terminal are connected in series in sequence, the first control tube M1 and the second control tube M2 are NMOS tubes, and the control ends of the first control tube M1 and the second control tube M2 are controlled by the main tap data D_MAIN. The models of the first control tube M1 and the second control tube M2, and the resistance values ​​of the first resistor R1 and the second resistor R2 are set according to the driving capability of the driving stage.

[0068] See also Figure 3As shown, in one embodiment of the present invention, the pre-tap driver stage 1031 and the post-tap driver stage 1033 include a source series terminal driver and two control switches. Among them, the pre-tap driver stage 1031 includes a first control switch MP1, a second source series terminal driver 201 and a second control switch MN1 connected in series in sequence. Among them, the first control switch MP1 is a PMOS, and the second control switch MN1 is an NMOS. The first control switch MP1, the second source series terminal driver 201 and the second control switch MN1 are connected in series between the power supply and the ground terminal, and the control end of the control tube in the second source series terminal driver 201 is controlled by the main tap data D_MAIN, the control end of the first control switch MP1 is controlled by the first pre-tap drive switch signal SW_PRE_a, and the control end of the second control switch MN1 is controlled by the second pre-tap drive switch signal SW_PRE_b. The post-tap driver stage 1033 includes a third control switch MP2, a third source series terminal driver 203 and a fourth control switch MN2 connected in series in sequence. The third control switch MP2 is a PMOS, and the fourth control switch MN2 is an NMOS. The third control switch MP2, the third source series terminal driver 203, and the fourth control switch MN2 are connected in series between the power supply and the ground terminal, and the control end of the control tube in the third source series terminal driver 203 is controlled by the main tap data D_MAIN, the control end of the third control switch MP2 is controlled by the first post-tap drive switch signal SW_POST_a, and the control end of the fourth control switch MN2 is controlled by the second post-tap drive switch signal SW_POST_b.

[0069] In summary, the present invention provides a de-emphasis device, a de-emphasis method and a core integrated system, and the de-emphasis device includes a main tap data logic module, a balanced tap data logic module, a drive switch logic module, a drive switch logic module, a main tap driving stage and a balanced driving stage. Among them, the main tap data logic module forms the main tap data according to the data to be transmitted. The balanced tap data logic module forms the balanced tap data according to the data to be transmitted, the balanced tap data is inverted with the main tap data, and there is a unit interval between the balanced tap data and the main tap data. The drive switch logic module generates a drive switch signal according to the main tap data and the balanced tap data, and the drive switch signal is valid when the tap data and the balanced tap data are the same, and invalid when the tap data and the balanced tap data are opposite. The main tap driving stage is enabled and driven by the main tap data. The balanced driving stage is driven by the balanced tap data, and is enabled or closed by the drive switch signal.

[0070] The embodiments of the present invention disclosed above are only used to help illustrate the present invention. The embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and changes can be made according to the content of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can understand and use the present invention well. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A de-emphasis device, characterized in that: At least: A main tap data logic module, forming main tap data according to the data to be transmitted; A balanced tap data logic module, which forms balanced tap data according to the data to be transmitted, wherein the balanced tap data is inverted with the main tap data, and there is a unit interval between the balanced tap data and the main tap data; A driving switch logic module generates a driving switch signal according to the main tap data and the balanced tap data, wherein the driving switch signal is valid when the tap data and the balanced tap data are the same, and is invalid when the tap data and the balanced tap data are opposite; A main tap driving stage, driven by the main tap data enable; The balanced driving stage is driven by the balanced tap data and is enabled or disabled by the driving switch signal.

2. A de-emphasis device according to claim 1, characterized in that: The balanced tap data logic module includes a pre-tap data logic module, which forms pre-tap data according to the data to be transmitted. The pre-tap data is inverted with the main tap data and is one unit interval ahead of the main tap data.

3. A de-emphasis device according to claim 2, characterized in that: The driving switch logic module includes a pre-tap driving switch logic module, and the pre-tap driving switch logic module performs a logic operation on the main tap data and the pre-tap data to generate a pre-tap driving switch signal.

4. A de-emphasis device according to claim 3, characterized in that: The balanced driving stage includes a pre-tap driving stage, which is electrically connected to the output end of the pre-tap data logic module and the output end of the pre-tap driving switch logic module, is driven by the pre-tap data, and is enabled or disabled by the pre-tap driving switch signal.

5. A de-emphasis device according to claim 4, characterized in that: If the pre-tap data is the same as the main tap data, the pre-tap drive switch logic module outputs a valid pre-tap drive switch signal, and the pre-tap drive stage is enabled and driven by the pre-tap data output by the pre-tap data logic module.

6. A de-emphasis device according to claim 1, characterized in that: The balanced tap data logic module includes a rear tap data logic module, which forms rear tap data according to the data to be transmitted, the rear tap data is inverted with the main tap data, and the rear tap data is delayed by one unit interval than the main tap data.

7. A de-emphasis device according to claim 6, characterized in that: The driving switch logic module includes a rear-tap driving switch logic module, and the rear-tap driving switch logic module performs a logic operation on the main tap data and the rear tap data to generate a rear-tap driving switch signal.

8. A de-emphasis device according to claim 7, characterized in that: The balanced driving stage includes a rear tap driving stage, which is electrically connected to the output end of the rear tap data logic module and the output end of the rear tap driving switch logic module, is driven by the rear tap data, and is enabled or disabled by the rear tap driving switch signal.

9. A de-emphasis device according to claim 8, characterized in that: If the rear tap data is the same as the main tap data, the rear tap drive switch logic module outputs a valid rear tap drive switch signal, and the rear tap drive stage is enabled and driven by the rear tap data output by the rear tap data logic module.

10. A de-emphasis device according to claim 1, characterized in that: The main tap data logic module comprises a first trigger, the input end of the first trigger inputs the data to be transmitted, and the output end of the first trigger outputs the main tap data; The main tap driving stage includes a first source series terminal driver, which is connected in series between a power supply and a ground terminal, and a control terminal of a control tube in the first source series terminal driver is controlled by the main tap data.

11. A de-emphasis device according to claim 10, characterized in that: The balanced tapped data logic module includes a pre-tapped data logic module, and the pre-tapped data logic module includes a first inverter, the input end of the first inverter inputs the data to be transmitted, and the output end of the first inverter outputs the pre-tapped data.

12. A de-emphasis device according to claim 11, characterized in that: The driving switch logic module includes a pre-tap driving switch logic module, and the pre-tap driving switch logic module includes: a first XOR gate, wherein an input end of the first XOR gate is electrically connected to an output end of the pre-tap data logic module and an output end of the main-tap data logic module, and an output end of the first XOR gate outputs a first pre-tap drive switch signal; and A third inverter, wherein the input end of the third inverter is electrically connected to the output end of the first XOR gate, and the output end of the third inverter outputs a second pre-tap driving switch signal.

13. A de-emphasis device according to claim 12, characterized in that: The balanced driving stage includes a pre-tap driving stage, which includes a first control switch, a second source series terminal driver and a second control switch connected in series in sequence, and the first control switch, the second source series terminal driver and the second control switch are connected in series between a power supply and a ground terminal, the control end of the control tube in the second source series terminal driver is controlled by the main tap data, the first control switch is controlled by the first pre-tap driving switch signal, and the second control switch is controlled by the second pre-tap driving switch signal.

14. A de-emphasis device according to claim 10, characterized in that: The balanced tap data logic module includes a post-tap data logic module, and the post-tap data logic module includes a second trigger and a second inverter, the input end of the second trigger is electrically connected to the output end of the first trigger, the input end of the second inverter is electrically connected to the output end of the second trigger, and the output end of the second inverter outputs the post-tap data.

15. A de-emphasis device according to claim 14, characterized in that: The driving switch logic module includes a rear tap driving switch logic module, and the rear tap driving switch logic module includes: a second XOR gate, wherein an input terminal of the second XOR gate is electrically connected to an output terminal of the post-tap data logic module and an output terminal of the main-tap data logic module, and an output terminal of the second XOR gate outputs a first post-tap driving switch signal; and A fourth inverter, wherein the input end of the fourth inverter is electrically connected to the output end of the second XOR gate, and the output end of the fourth inverter outputs a second rear-tap driving switch signal.

16. A de-emphasis device according to claim 15, characterized in that: The balanced driving stage includes a rear-tap driving stage, and the rear-tap driving stage includes a third control switch, a third source series terminal driver and a fourth control switch connected in series in sequence, and the third control switch, the third source series terminal driver and the fourth control switch are connected in series between a power supply and a ground terminal, the control end of the control tube in the third source series terminal driver is controlled by the main tap data, the third control switch is controlled by the first rear-tap driving switch signal, and the fourth control switch is controlled by the second rear-tap driving switch signal.

17. A de-emphasis method, characterized in that: The following steps are involved: forming main tap data using a main tap data logic module; Using a balanced tap data logic module to form balanced tap data, the balanced tap data is inverted with the main tap data, and there is a unit interval between the balanced tap data and the main tap data; Using a driving switch logic module to generate a driving switch signal, wherein the driving switch signal is valid when the tap data and the balanced tap data are the same, and is invalid when the tap data and the balanced tap data are opposite; Using the main tap data to enable driving the main tap driver stage; as well as The balanced tap data is used to drive the balanced driving stage, and the driving switch signal is used to control enabling or disabling the balanced driving stage.

18. A core particle integration system, characterized in that: The device comprises a plurality of core particles, wherein the de-emphasis device set as claimed in any one of claims 1 to 16 is arranged in a transmitter of the core particles.

Citation Information

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