Low-stray-inductance power component optimization method, device, equipment and medium

Abstract

The invention provides a low-stray-inductance power component optimization method and device, equipment and a medium, and effectively solves the problem that a high switching speed cannot be realized during the operation period of a current power component in the aspect of stray inductance. The method comprises the steps of calculating the number of silicon carbide chips corresponding to an upper bridge arm and a lower bridge arm based on a preset condition, and combining the upper bridge arm and the lower bridge arm of which the number of the silicon carbide chips is determined according to a target topological structure to obtain a target bridge arm combination; controlling the target bridge arm combination and a power input terminal to be welded in a target welding mode to obtain a target welding combination, and connecting the target welding combination with the signal pin to obtain a target connection combination; generating a power component model based on the power component corresponding to the target connection combination so as to test the power component model to obtain test data; and evaluating the test data to obtain an evaluation result, and screening out an optimal power component based on the evaluation result.

Description

Technical Field

[0001] The present application relates to the technical field of power component optimization, and in particular to a method, device, equipment and medium for optimizing a low-inductance power component. Background Art

[0002] As the motor speed gradually increases, the demand for low inductance and low loss performance of power components becomes more and more obvious. Among them, the wide bandgap semiconductor of SiC MOSFET, as the core component of power components, provides the possibility of significantly reducing the total power loss of semiconductors. For example, the switching speed of SiC MOSFET is much faster than that of the currently used Si IGBT, so it can reduce switching losses and thus increase switching frequency. In addition, SiC MOSFET can optimize filter components, and the corresponding filtering losses will also decrease, thereby reducing motor losses in an all-round way.

[0003] However, there are still certain challenges in achieving high switching speeds during the operation of power components. In high-power converters, due to the presence of stray parameters in components and DC busbars, large voltage and current spikes are generated during the opening and closing process, which increases switching losses, generates strong electromagnetic interference, and even causes circuit resonance. The stray parameters in high-power converters include busbar capacitor parasitic inductance, busbar stray inductance and resistance, switching device lead inductance, and connecting bolt stray inductance, which will affect the switching characteristics of power components including switching speed. Among them, the main factor affecting the switching characteristics is the busbar stray inductance, where stray inductance is referred to as stray inductance. Low stray inductance can effectively reduce the overvoltage generated by the device during the switching process, reduce the risk of breakdown, and can also effectively reduce the oscillation generated by the device during the switching operation, reduce the risk of overvoltage, and can also reduce losses and voltage spikes, and improve the efficiency of the motor. Therefore, the market demand for low stray inductance of power components is gradually increasing. Summary of the invention

[0004] In view of this, the purpose of the present application is to provide a low-noise power component optimization method, device, equipment and medium, which effectively solves the problem that the current power components cannot achieve high switching speed during operation due to the noise inductance of the power components.

[0005] In a first aspect, an embodiment of the present application provides a method for optimizing a low-noise power component, wherein the power component includes a silicon carbide chip, a signal pin, an upper bridge arm, a lower bridge arm, and a power input terminal, and the method includes:

[0006] The number of silicon carbide chips corresponding to the upper bridge arm and the lower bridge arm is calculated based on preset conditions, and the upper bridge arm and the lower bridge arm with the determined number of silicon carbide chips are combined according to a target topological structure to obtain a target bridge arm combination;

[0007] Controlling the target bridge arm combination and the power input terminal to be welded in a target welding manner to obtain a target welding combination, and connecting the target welding combination and the signal pin to obtain a target connection combination; the signal pin includes a target packaging manner;

[0008] generating a power component model based on the power component corresponding to the target connection combination, and testing the power component model to obtain test data;

[0009] The test data are evaluated to obtain an evaluation result, so as to select an optimal power component based on the evaluation result.

[0010] In combination with the first aspect, an embodiment of the present application provides a first possible implementation of the first aspect, wherein the upper bridge arm and the lower bridge arm based on the determined number of silicon carbide chips are combined according to the target topology structure to obtain a target bridge arm combination, including:

[0011] Setting a plurality of topological structures based on the current path inductance between the upper bridge arm and the lower bridge arm, and controlling the upper bridge arm and the lower bridge arm to be combined according to the plurality of topological structures to obtain a plurality of bridge arm combinations;

[0012] The plurality of bridge arm combinations are tested to obtain corresponding test data, so as to determine a target bridge arm combination and a corresponding target topological structure based on the test data.

[0013] In combination with the first aspect, an embodiment of the present application provides a second possible implementation of the first aspect, wherein the testing of the multiple groups of bridge arm combinations to obtain corresponding test data, so as to determine a target bridge arm combination and a corresponding target topology structure based on the test data, includes:

[0014] Determining whether the test data meets a preset test range set for the bridge arm combination test;

[0015] If satisfied, the target bridge arm combination is obtained, and the topological structure corresponding to the target bridge arm combination is determined as the target topological structure.

[0016] In combination with the first aspect, the embodiment of the present application provides a third possible implementation of the first aspect, wherein the specific step of determining the target packaging mode by the signal needle includes:

[0017] Comparing multiple packaging methods of the signal pin constructed based on multiple angles to obtain a comparison result;

[0018] The target packaging method of the signal pin is determined according to the comparison result, so as to package the signal pin based on the target packaging method.

[0019] In combination with the first aspect, an embodiment of the present application provides a fourth possible implementation of the first aspect, wherein the calculating the number of silicon carbide chips corresponding to the upper bridge arm and the lower bridge arm respectively based on a preset condition includes:

[0020] Determining preset conditions corresponding to the upper bridge arm and the lower bridge arm respectively based on the power demand of the power component;

[0021] The number of corresponding silicon carbide chips is calculated based on the relationship between the upper bridge arm and the lower bridge arm and the silicon carbide chip.

[0022] In combination with the first aspect, an embodiment of the present application provides a fifth possible implementation of the first aspect, wherein the evaluating the test data to obtain an evaluation result, and selecting an optimal power component based on the evaluation result, includes:

[0023] Evaluate the test data based on multiple dimensions to obtain evaluation results, and screen the evaluation results;

[0024] The screened evaluation results are used to determine that the power component corresponding to the screened evaluation results is the optimal power component.

[0025] In combination with the first aspect, an embodiment of the present application provides a sixth possible implementation of the first aspect, wherein the step of building a power component model based on the power component corresponding to the target connection combination to test the power component model to obtain test data includes:

[0026] The power component corresponding to the target connection combination constructs a power component model corresponding to the power component according to a preset modeling method;

[0027] Simulation tests are respectively carried out on the power component models to obtain test data corresponding to the power components.

[0028] In a second aspect, an embodiment of the present application further provides a low-noise power component optimization device, wherein the power component includes a silicon carbide chip, a signal pin, an upper bridge arm, a lower bridge arm, and a power input terminal, and the device includes:

[0029] A calculation module, used for calculating the number of silicon carbide chips corresponding to the upper bridge arm and the lower bridge arm respectively based on preset conditions, so as to combine the upper bridge arm and the lower bridge arm according to the target topological structure based on the determined number of silicon carbide chips, and obtain a target bridge arm combination;

[0030] A control module, used for controlling the target bridge arm combination and the power input terminal to be welded in a target welding manner to obtain a target welding combination, and connecting the target welding combination with the signal pin to obtain a target connection combination; the signal pin includes a target packaging manner;

[0031] A test module, used for generating a power component model based on the power component corresponding to the target connection combination, so as to test the power component model to obtain test data;

[0032] The evaluation module is used to evaluate the test data to obtain an evaluation result, so as to screen out the optimal power component based on the evaluation result.

[0033] In a third aspect, an embodiment of the present application further provides an electronic device, comprising: a processor, a memory and a bus, wherein the memory stores machine-readable instructions executable by the processor, and when the electronic device is running, the processor and the memory communicate via the bus, and when the machine-readable instructions are executed by the processor, any step of a low-noise power component optimization method is performed.

[0034] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the steps of any one of the methods for optimizing a low-inductance power component are executed.

[0035] The embodiment of the present application provides a method for optimizing a low-noise power component, wherein the power component includes a silicon carbide chip, a signal pin, an upper bridge arm, a lower bridge arm and a power input terminal. The method first calculates the number of silicon carbide chips corresponding to the upper bridge arm and the lower bridge arm respectively based on preset conditions, and combines the upper bridge arm and the lower bridge arm according to the target topology structure based on the determined number of silicon carbide chips to obtain a target bridge arm combination; secondly, controls the target bridge arm combination and the power input terminal to be welded in a target welding manner to obtain a target welding combination, and connects the target welding combination with the signal pin to obtain a target connection combination; the signal pin includes a target packaging manner; then, a power component model is generated based on the power component corresponding to the target connection combination, so as to test the power component model to obtain test data; finally, the test data is evaluated to obtain an evaluation result, so as to screen out the optimal power component based on the evaluation result, thereby achieving a significant effect of the power component in terms of low noise, and also reducing the loop of the total current path, effectively solving the problem that the current power component cannot achieve a high switching speed during operation due to the noisy inductance, and after achieving low noisy inductance, the high switching speed of the power component is guaranteed, and the loss to the motor is further reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0037] Figure 1 A schematic flow chart of a first low-inductance power component optimization method provided by the present invention is shown;

[0038] Figure 2 A schematic diagram of the structure of a power component provided by the present invention is shown;

[0039] Figure 3 A schematic diagram showing the mutual cancellation of current paths provided by the present invention is shown;

[0040] Figure 4 The schematic diagram of the structure of the first low-inductance power component optimization device provided by the present invention is shown;

[0041] Figure 5 A schematic structural diagram of a first electronic device provided by the present invention is shown. DETAILED DESCRIPTION

[0042] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. It should be understood that the drawings in the present application only serve the purpose of explanation and description and are not used to limit the scope of protection of the present application. In addition, it should be understood that the schematic drawings are not drawn in real proportion. The flowchart used in this application shows the operations implemented according to some embodiments of the present application. It should be understood that the operations of the flowchart can be implemented out of sequence, and the steps without logical context can be reversed in order or implemented simultaneously. In addition, those skilled in the art can add one or more other operations to the flowchart under the guidance of the content of the present application, or remove one or more operations from the flowchart.

[0043] In addition, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.

[0044] It should be noted that the term "comprising" will be used in the embodiments of the present application to indicate the existence of the features declared thereafter, but does not exclude the addition of other features.

[0045] There are still some challenges in achieving high switching speeds during the operation of current power components. In high-power converters, due to the presence of stray parameters in components and DC busbars, large voltage and current spikes will be generated during the turn-on and turn-off processes, thereby increasing switching losses, generating strong electromagnetic interference, and even causing circuit resonance. The stray parameters in high-power converters include busbar capacitor parasitic inductance, busbar stray inductance and resistance, switch device lead inductance, and connection bolt stray inductance, which will affect the switching characteristics of power components including switching speed.

[0046] Based on this, the embodiments of the present application provide a method, apparatus, device and medium for optimizing a low-inductance power component, which will be described below through embodiments.

[0047] Example 1

[0048] To facilitate understanding of this embodiment, a low-inductance power component optimization method disclosed in the embodiment of this application is first introduced in detail. Figure 1 A flowchart of a method for optimizing a low-noise power component is shown in the figure. The present application provides a method for optimizing a low-noise power component, wherein the power component includes a silicon carbide chip, a signal pin, an upper bridge arm, a lower bridge arm, and a power input terminal. The method includes:

[0049] S101, calculating the number of silicon carbide chips corresponding to the upper bridge arm and the lower bridge arm respectively based on preset conditions, and combining the upper bridge arm and the lower bridge arm based on the determined number of silicon carbide chips according to a target topological structure to obtain a target bridge arm combination;

[0050] S102, controlling the target bridge arm combination and the power input terminal to be welded in a target welding manner to obtain a target welding combination, and connecting the target welding combination and the signal pin to obtain a target connection combination; the signal pin includes a target packaging manner;

[0051] S103, generating a power component model based on the power component corresponding to the target connection combination, and testing the power component model to obtain test data;

[0052] S104: Evaluate the test data to obtain evaluation results, and screen out optimal power components based on the evaluation results.

[0053] In this application, if Figure 2 As shown, the power component not only includes a silicon carbide chip, a signal pin, an upper bridge arm, a lower bridge arm and a power input terminal, the power input terminal includes a DC-terminal and a DC+terminal, wherein the upper bridge arm is represented by an upper bridge Clip. The power component also includes a plastic package, a power output terminal AC (i.e. Figure 2AC terminal in), copper-clad ceramic board AMB, aluminum wire bonding, the role of the silicon carbide chip in the power component is mainly reflected in improving energy utilization efficiency, reducing equipment size, enhancing motor stability and optimizing motor energy efficiency. All of the above together constitute the power component to realize the corresponding function of the power component. The upper bridge arm is responsible for controlling the opening of the current, usually connected between the positive pole of the power supply and the motor, and is mainly responsible for controlling the forward and reverse rotation of the motor, thereby realizing the start and stop control of the motor. The lower bridge arm is responsible for controlling the closing of the current, usually connected between the motor and the negative pole of the power supply, and mainly controls the braking and stopping of the motor. In this way, precise control of the motor is achieved to ensure the safe operation of the motor under specific conditions.

[0054] In step S101, the upper bridge arm and the lower bridge arm in the power component match each other, wherein the switching characteristics of the power component are reflected in the upper bridge arm and the lower bridge arm, and functionally, the upper bridge arm and the lower bridge arm correspond to each other, one upper bridge arm corresponds to one lower bridge arm, and the upper bridge arm and the lower bridge arm also exist in the form of chips, thereby reducing the volume of the power component, and the upper bridge arm or the lower bridge arm can drive multiple silicon carbide chips at the same time, so the number of silicon carbide chips corresponding to the upper bridge arm and the lower bridge arm respectively is calculated based on the preset conditions, and the upper bridge arm and the lower bridge arm with the determined number of silicon carbide chips are combined according to the target topology structure to obtain a target bridge arm combination, wherein the target topology structure is a topology structure that can ensure the switching characteristics of the power component, that is, the target bridge arm combination is obtained by combining according to the target topology structure.

[0055] In the specific implementation process of step S101, there is an embodiment in which: the number of silicon carbide chips corresponding to the upper bridge arm and the lower bridge arm respectively is calculated based on a preset condition, including:

[0056] S10111. Determine preset conditions corresponding to the upper bridge arm and the lower bridge arm respectively based on the power demand of the power component;

[0057] S10112. Calculate the number of corresponding silicon carbide chips based on the relationship between the upper bridge arm and the lower bridge arm and the silicon carbide chip respectively.

[0058] In steps S10111-S10112, the rated power and other power parameters of the power component are determined by referring to a work manual or related instructions of the power component and other similar documents, so as to determine the power requirement of the power component, and the preset conditions of the upper bridge arm and the preset conditions of the lower bridge arm are determined based on the power requirement. Correspondingly, the preset conditions of the upper bridge arm and the preset conditions of the lower bridge arm are the power requirement of the upper bridge arm and the power requirement of the lower bridge arm respectively. Then, based on the rated power value of the selected silicon carbide chip, the relationship between the upper bridge arm and the silicon carbide chip and the relationship between the lower bridge arm and the silicon carbide chip are determined. The relationship is the power ratio between the upper bridge arm or the lower bridge arm and the silicon carbide chip, so as to determine the number of silicon carbide chips connected to the upper bridge arm and the number of silicon carbide chips connected to the lower bridge arm. On this basis, redundancy can also be considered, and the number of chips on the upper bridge arm or the lower bridge arm is increased accordingly, so as to improve the flexibility of packaging.

[0059] In the specific implementation process of step S101, there is another embodiment: the upper bridge arm and the lower bridge arm based on the determined number of silicon carbide chips are combined according to the target topology structure to obtain the target bridge arm combination, including:

[0060] S10121, setting a plurality of topological structures based on the current path inductance between the upper bridge arm and the lower bridge arm, and controlling the upper bridge arm and the lower bridge arm to be combined according to the plurality of topological structures to obtain a plurality of bridge arm combinations;

[0061] S10122. Test the multiple groups of bridge arm combinations to obtain corresponding test data, so as to determine a target bridge arm combination and a corresponding target topology structure based on the test data.

[0062] In steps S1011-S1012, in order to ensure the switching characteristics of the power component including the switching speed, when designing the topological structure between the upper bridge arm and the lower bridge arm, the current path inductance between the upper bridge arm and the lower bridge arm is used as one of the main influencing factors. The influencing factors may also include the current sharing and balance problems between silicon carbide chips, so as to design a variety of applicable topological structures of the upper bridge arm and the lower bridge arm. The topological structure includes a half-bridge structure and a full-bridge structure of an integrated copper Clip structure. Based on the integrated copper Clip structure, the internal interconnection stacking of the upper and lower bridge arms can be realized, and 8pcs Sic Mosfet of each bridge arm are connected in parallel, so as to offset the inductance between the current paths of the upper and lower bridge arms inside the power component, and also reduce the loop of the total current path and reduce the stray inductance. Figure 3The figure shows a schematic diagram of the mutual cancellation of current paths, wherein the lower bridge arm is represented by the lower bridge copper Clip, the upper bridge arm is represented by the upper bridge copper Clip, and the AC power terminal is the power output terminal AC, which represents that the upper bridge arm and the lower bridge arm are combined according to the designed multiple topological structures, thereby obtaining multiple groups of bridge arm combinations. In order to ensure the feasibility of the bridge arm combination, the multiple groups of bridge arm combinations are subjected to necessary bridge arm combination tests to obtain test data for each group of bridge arm combinations. The bridge arm combination test is an electrical test, which may include static tests such as resistance and insulation resistance tests, and dynamic tests such as switch tests and load tests, etc., and the best data is selected from the test data as the target bridge arm combination, and the selected topological structure is the target topological structure. It can be seen from the test data that the integrated copper Clip structure is the target topological structure, and the upper and lower bridge arms of the integrated copper Clip structure are selected as the target bridge arm combination.

[0063] In the specific implementation process of step S10122, there is an embodiment in which: the testing of the multiple groups of bridge arm combinations to obtain corresponding test data, and determining a target bridge arm combination and a corresponding target topology structure based on the test data, includes:

[0064] S101221. Determine whether the test data meets a preset test range set for the bridge arm combination test;

[0065] S101222. If satisfied, a target bridge arm combination is obtained, and the topological structure corresponding to the target bridge arm combination is determined as the target topological structure.

[0066] In steps S101221-S101222, a bridge arm combination test is set for the multiple groups of bridge arm combinations, and necessary bridge arm combination tests are performed to obtain test data for each group of bridge arm combinations. A preset test range is set for each sub-test in the bridge arm combination test, and the preset test range is specifically set according to actual conditions. When the test data meets the preset test range set for the bridge arm combination test, it indicates that the topological structure corresponding to the test data meets the test requirements and performs significantly. If there is only one group of topological structures, the topological structure is determined to be the target topological structure. If there are multiple groups of topological structures that meet the preset test range set for the bridge arm combination test, the multiple groups of test data are sorted. Taking descending order as an example, the topological structure corresponding to the front group of test data is selected as the target topological structure, and the target topological structure is an integrated copper Clip structure.

[0067] In step S102, after determining the topological structure between the upper bridge arm and the lower bridge arm, it is also necessary to determine that the power input terminal, solder, welding auxiliary materials, etc. are all prepared and of qualified quality. The PCB board selected in this application is a copper-clad ceramic board AMB, so it is determined to control the target bridge arm combination and the power input terminal to be welded in a target welding manner to obtain a target welding combination. The welding method includes spot welding, seam welding, ultrasonic welding, laser welding, etc. In order to consider the welding cost and the contact area of ​​the capacitor busbar and increase the output current of the power component, laser welding is selected as the target welding method, and the target welding combination is connected to the signal pin to obtain a target connection combination, so that the current signal received by the signal pin can be transmitted to the silicon carbide chip on the target bridge arm combination, wherein a target packaging method is set for the signal pin to ensure the output current effect of the power component.

[0068] In the specific implementation process of step S102, there is an embodiment in which the signal needle determines the specific steps of the target packaging method, including:

[0069] S1021, comparing the various packaging methods of the signal pin constructed based on multiple angles to obtain a comparison result;

[0070] S1022 . Determine a target packaging method of the signal pin according to the comparison result, and package the signal pin based on the target packaging method.

[0071] In steps S1021-S1022, there are multiple packaging methods that can be used for the signal pin, mainly including plug-in packaging and surface mount packaging. Therefore, the packaging method used by the signal pin is considered from multiple angles, and the multiple angles include: reducing the package size and receiving the current signal faster. Therefore, the surface mount packaging includes a method of directly protruding the top of the signal pin as the target packaging method, and the signal pin is packaged in a target packaging method based on the method of directly protruding the top of the signal pin, thereby ensuring the speed of receiving the circuit signal and reducing the package size, thereby ensuring the effect of the power component.

[0072] In step S103, a corresponding power component model is constructed and generated based on the target connection combination obtained by the target bridge arm combination and the signal pin and the power component obtained by other configuration components of the power component. The power component model also includes the determined specification parameters, including but not limited to the rated voltage, rated current, rated power, operating temperature range, thermal resistance, etc. According to the characteristics and application scenarios of the power component, a suitable modeling method is selected. Common modeling methods include finite element analysis (FEA), circuit simulation, thermal simulation, etc. For example, for power components involving complex thermal management, such as IGBT modules, the finite element analysis method can be used to construct its thermal model; while for power components with more important circuit characteristics, such as diodes or transistors, it may be necessary to use circuit simulation software to construct its circuit model. In order to ensure the implementation effect of the power component model, the boundary conditions and initial conditions of the model are reasonably set, and the power component model is simulated and tested respectively, and the test data obtained by the power component model during the test is recorded.

[0073] In the specific implementation process of step S103, there is an embodiment in which: the power component model is constructed based on the power component corresponding to the target connection combination to test the power component model to obtain test data, including:

[0074] S1031, the power component corresponding to the target connection combination constructs a power component model corresponding to the power component according to a preset modeling method;

[0075] S1032: Perform simulation tests on the power component models respectively to obtain test data corresponding to the power components.

[0076] In steps S1031-S1032, the power component corresponding to the target connection combination is controlled to construct a power component model corresponding to the power component according to a preset modeling method. Here, the preset modeling method is to model the power component through ANSYS software to obtain a power component model corresponding to the power component, and to perform simulation tests on the power component model corresponding to the power component based on the ANSYS software according to a simulation scheme. The simulation scheme is a reasonable simulation scheme designed according to the characteristics of the power component and the characteristics of the model, and timely record various test data during simulation, including test data corresponding to key parameters such as voltage, current, power, and temperature.

[0077] In step S104, before evaluating the test data, the test data is preprocessed, including removing outliers, filling missing values, data standardization and other processing to ensure the accuracy and consistency of the data. The test data can also be classified and archived according to different evaluation indicators, such as performance indicators (efficiency, power factor) and reliability indicators (life, failure rate) to evaluate the test data to obtain evaluation results, so as to screen out the optimal power component based on the evaluation results, that is, if there are multiple evaluation results, the power component corresponding to the power component model with the best test data is selected as the optimal power component.

[0078] In the specific implementation process of step S104, there is an embodiment in which: evaluating the test data to obtain an evaluation result, and selecting the optimal power component based on the evaluation result, includes:

[0079] S1041. Evaluate the test data based on multiple dimensions to obtain evaluation results, and screen the evaluation results;

[0080] S1042: Determine, through the screened evaluation results, that a power component corresponding to the screened evaluation results is an optimal power component.

[0081] In steps S1041-S1042, the evaluation results are obtained by evaluating the test data from multiple dimensions. The multiple dimensions of the evaluation results include: performance evaluation, reliability evaluation and economic evaluation. The performance evaluation includes efficiency and power factor, dynamic response, temperature management and stray inductance. The reliability evaluation includes life test, failure mode and effect analysis (FMEA), and environmental adaptability. The economic evaluation includes cost and cost performance. The stray inductance can be expressed from two aspects: when the power input terminal has a DC+ / - terminal and when the DC+ / - terminal does not come out. When the DC+ / - terminal comes out, the stray inductance of the power component with the target connection combination can be reduced to less than 4nH, and when the DC+ / - terminal does not come out, the stray inductance of the power component with the target connection combination can be reduced to less than 4nH. When the C+ / - terminals come out, the stray inductance of the power component with the target connection combination can be reduced to below 2.5nH, which is the top level among power components, that is, in terms of stray inductance, the power components with the target connection combination all perform excellently, and the evaluation results are screened, and multiple dimensions of the evaluation results can be weighted to obtain weighted values, and the power component corresponding to the largest weighted value is selected as the optimal power component. Other screening methods can also be used to obtain the optimal power component. For example, the present application is to obtain a power component with low stray inductance, so the power component corresponding to the test data with the lowest stray inductance can be directly selected as the optimal power component, thereby obtaining a power component with the lowest stray inductance, so as to achieve an optimization effect on the power component in terms of stray inductance.

[0082] Example 2

[0083] The present application also provides a low-inductance power component optimization device, such as Figure 4 The block diagram of a low-noise power component optimization device is shown. The function implemented by the low-noise power component optimization device corresponds to the steps of performing a low-noise power component optimization method on the terminal device. The device can be understood as a component of a server including a processor. The power component includes a silicon carbide chip, a signal pin, an upper bridge arm, a lower bridge arm and a power input terminal. The device includes:

[0084] A calculation module 401 is used to calculate the number of silicon carbide chips corresponding to the upper bridge arm and the lower bridge arm respectively based on preset conditions, so as to combine the upper bridge arm and the lower bridge arm according to the target topological structure based on the determined number of silicon carbide chips to obtain a target bridge arm combination;

[0085] The control module 402 is used to control the target bridge arm combination and the power input terminal to be welded in a target welding manner to obtain a target welding combination, and connect the target welding combination with the signal pin to obtain a target connection combination; the signal pin includes a target packaging manner;

[0086] A test module 403 is used to generate a power component model based on the power component corresponding to the target connection combination, so as to test the power component model to obtain test data;

[0087] The evaluation module 404 is used to evaluate the test data to obtain an evaluation result, so as to screen out the optimal power component based on the evaluation result.

[0088] In a feasible implementation manner, the computing module includes:

[0089] A combination module, used for setting a plurality of topological structures based on the current path inductance between the upper bridge arm and the lower bridge arm, and controlling the upper bridge arm and the lower bridge arm to be combined according to the plurality of topological structures to obtain a plurality of bridge arm combinations;

[0090] The testing module is used to test the multiple bridge arm combinations to obtain corresponding test data, so as to determine a target bridge arm combination and a corresponding target topological structure based on the test data.

[0091] In a feasible implementation manner, the calculation module further includes:

[0092] A judgment module, used to judge whether the test data meets a preset test range set for the bridge arm combination test;

[0093] The identification module is used to obtain the target bridge arm combination if the conditions are met, and identify the topology structure corresponding to the target bridge arm combination as the target topology structure.

[0094] In a feasible implementation manner, the control module includes:

[0095] A comparison module, used for comparing various packaging methods of the signal pin constructed based on multiple angles to obtain a comparison result;

[0096] The packaging module is used to determine the target packaging method of the signal pin according to the comparison result, so as to package the signal pin based on the target packaging method.

[0097] In a feasible implementation manner, the calculation module further includes:

[0098] A first determination module, configured to determine preset conditions corresponding to the upper bridge arm and the lower bridge arm respectively based on the power demand of the power component;

[0099] The first calculation module is used to calculate the number of corresponding silicon carbide chips according to the relationship between the upper bridge arm and the lower bridge arm and the silicon carbide chips respectively.

[0100] In a feasible implementation, the evaluation module includes:

[0101] A screening module, used to evaluate the test data based on multiple dimensions to obtain evaluation results, and to screen the evaluation results;

[0102] The second determination module is configured to determine, through the screened evaluation results, that the power component corresponding to the screened evaluation results is the optimal power component.

[0103] In a feasible implementation, the test module includes:

[0104] A construction module, used for the power component corresponding to the target connection combination to construct a power component model corresponding to the power component according to a preset modeling method;

[0105] The simulation module is used to perform simulation tests on the power component models respectively to obtain test data corresponding to the power components.

[0106] Example 3

[0107] The present application also provides an electronic device, such as Figure 5 As shown, it includes: a processor 501, a memory 502 and a bus 503, the memory 502 stores machine-readable instructions executable by the processor 501, when the electronic device is running, the processor 501 and the memory 502 communicate through the bus 503, and when the machine-readable instructions are executed by the processor 501, any step of the low-noise power component optimization method is performed.

[0108] Example 4

[0109] An embodiment of the present application further provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of any one of the methods for optimizing a low-inductance power component are executed.

[0110] Those skilled in the art can clearly understand that, for the convenience and simplicity of description, the specific working process of the system and device described above can refer to the corresponding process in the method embodiment, and will not be repeated in this application. In the several embodiments provided in this application, it should be understood that the disclosed system, device and method can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation. For example, multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0111] The modules described as separate components may or may not be physically separated, and the components shown as modules may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0112] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0113] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a non-volatile computer-readable storage medium that is executable by a processor. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a platform server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard drives, ROM, RAM, magnetic disks, or optical disks.

[0114] The above are only specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A method for optimizing low-inductance power components, characterized in that: The power component includes a silicon carbide chip, a signal pin, an upper bridge arm, a lower bridge arm and a power input terminal, and the method includes: The number of silicon carbide chips corresponding to the upper bridge arm and the lower bridge arm is calculated based on preset conditions, and the upper bridge arm and the lower bridge arm with the determined number of silicon carbide chips are combined according to a target topological structure to obtain a target bridge arm combination; Controlling the target bridge arm combination and the power input terminal to be welded in a target welding manner to obtain a target welding combination, and connecting the target welding combination and the signal pin to obtain a target connection combination; the signal pin includes a target packaging manner; generating a power component model based on the power component corresponding to the target connection combination, and testing the power component model to obtain test data; The test data are evaluated to obtain an evaluation result, so as to select an optimal power component based on the evaluation result.

2. The method according to claim 1, characterized in that The upper bridge arm and the lower bridge arm based on the determined number of silicon carbide chips are combined according to the target topology structure to obtain a target bridge arm combination, including: Setting a plurality of topological structures based on the current path inductance between the upper bridge arm and the lower bridge arm, and controlling the upper bridge arm and the lower bridge arm to be combined according to the plurality of topological structures to obtain a plurality of bridge arm combinations; The plurality of bridge arm combinations are tested to obtain corresponding test data, so as to determine a target bridge arm combination and a corresponding target topological structure based on the test data.

3. The method according to claim 2, characterized in that The testing of the plurality of bridge arm combinations to obtain corresponding test data, so as to determine a target bridge arm combination and a corresponding target topology structure based on the test data, includes: Determining whether the test data meets a preset test range set for the bridge arm combination test; If satisfied, the target bridge arm combination is obtained, and the topological structure corresponding to the target bridge arm combination is determined as the target topological structure.

4. The method according to claim 1, characterized in that: The specific steps of the signal needle determining the target packaging method include: Comparing multiple packaging methods of the signal pin constructed based on multiple angles to obtain a comparison result; The target packaging method of the signal pin is determined according to the comparison result, so as to package the signal pin based on the target packaging method.

5. The method according to claim 1, characterized in that The calculating the number of silicon carbide chips corresponding to the upper bridge arm and the lower bridge arm respectively based on preset conditions includes: Determining preset conditions corresponding to the upper bridge arm and the lower bridge arm respectively based on the power demand of the power component; The number of corresponding silicon carbide chips is calculated based on the relationship between the upper bridge arm and the lower bridge arm and the silicon carbide chip.

6. The method according to claim 1, characterized in that The evaluating the test data to obtain an evaluation result, and selecting an optimal power component based on the evaluation result, includes: Evaluate the test data based on multiple dimensions to obtain evaluation results, and screen the evaluation results; The screened evaluation results are used to determine that the power component corresponding to the screened evaluation results is the optimal power component.

7. The method according to claim 1, characterized in that The step of constructing a power component model based on the power component corresponding to the target connection combination to test the power component model to obtain test data includes: The power component corresponding to the target connection combination constructs a power component model corresponding to the power component according to a preset modeling method; Simulation tests are respectively carried out on the power component models to obtain test data corresponding to the power components.

8. A low-inductance power component optimization device, characterized in that: The power component includes a silicon carbide chip, a signal pin, an upper bridge arm, a lower bridge arm and a power input terminal, and the device includes: A calculation module, used for calculating the number of silicon carbide chips corresponding to the upper bridge arm and the lower bridge arm respectively based on preset conditions, so as to combine the upper bridge arm and the lower bridge arm according to the target topological structure based on the determined number of silicon carbide chips, and obtain a target bridge arm combination; A control module, used for controlling the target bridge arm combination and the power input terminal to be welded in a target welding manner to obtain a target welding combination, and connecting the target welding combination with the signal pin to obtain a target connection combination; the signal pin includes a target packaging manner; A test module, used for generating a power component model based on the power component corresponding to the target connection combination, so as to test the power component model to obtain test data; The evaluation module is used to evaluate the test data to obtain an evaluation result, so as to screen out the optimal power component based on the evaluation result.

9. An electronic device, characterized in that: include: A processor, a memory and a bus, wherein the memory stores machine-readable instructions executable by the processor, and when the electronic device is running, the processor and the memory communicate via the bus, and when the machine-readable instructions are executed by the processor, the steps of a low-noise power component optimization method as described in any one of claims 1 to 7 are performed.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of a low-inductance power component optimization method as claimed in any one of claims 1 to 7 are executed.

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