Method for forming groove and semiconductor process equipment

Abstract

The invention provides a method for forming a groove and semiconductor process equipment, and the method comprises the steps: executing a first etching step, carrying out the downward etching of a to-be-etched film layer of a wafer to a preset depth to form a groove, and enabling the preset depth to be smaller than the target depth of the groove; alternately and circularly executing the first deposition step and the second etching step, and modifying the base angle of the groove into a round angle; wherein in each cycle, the first deposition step is executed to form a passivation layer on the side wall of the groove, the second etching step is executed to etch the groove, and the etching rate of the bottom of the groove is greater than the etching rate of the bottom angle of the groove. According to the scheme, the control difficulty of the groove bottom angle morphology can be reduced, and the control precision can be improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method for forming a groove and a semiconductor process equipment. Background Art

[0002] Silicon carbide (SiC) materials are widely used in the preparation of semiconductor devices, such as field effect transistors, due to their large bandgap, high thermal conductivity, large breakdown electric field strength, large saturated electron drift velocity, and ability to withstand extreme environments. Since silicon carbide materials have large bond energy and very stable chemical properties, dry etching processes are usually used to form grooves in semiconductor devices.

[0003] like Figure 1 As shown, in the process of forming the groove 11a, since the etching rate near the side wall of the groove 11a is greater than the etching rate at the center of the groove 11a, a micro groove 11b will be generated at the bottom corner of the groove 11a. The inherent acute angle of the micro groove 11b will cause the electric field in the film layer 11 to be etched to be concentrated at the bottom corner of the groove 11a, thereby reducing the breakdown voltage of the semiconductor device and affecting the device performance. Therefore, in the preparation process of the semiconductor device, it is usually necessary to etch the bottom corner of the groove 11a into a rounded corner to avoid electric field concentration. However, because the bottom angle morphology of the groove 11a is difficult to control, there is a problem of low control accuracy. Summary of the invention

[0004] The present application provides a method for forming a groove and a semiconductor process equipment to solve the technical problems existing in the related art that the control of the groove bottom angle morphology is difficult and the control accuracy is low.

[0005] The first aspect of the present application provides a method for forming a groove, comprising: performing a first etching step, etching a film layer to be etched of a wafer downward to a predetermined depth to form a groove, wherein the predetermined depth is less than a target depth of the groove; performing a first deposition step and a second etching step in an alternating cycle to modify the bottom angle of the groove to a rounded corner; wherein, in each cycle, the first deposition step is performed to form a passivation layer on the side wall of the groove, and the second etching step is performed to etch the groove, and the etching rate of the bottom of the groove is greater than the etching rate of the bottom angle of the groove.

[0006] In one embodiment, the first deposition step and the second etching step are performed multiple times in an alternating cycle, so that the thickness of the passivation layer on the sidewall of the trench increases gradually with the number of alternating cycles, and the longitudinal etching depth of the bottom of the trench increases gradually with the number of alternating cycles.

[0007] In one embodiment, in each cycle, the increment of the maximum thickness of the passivation layer deposited on the trench sidewalls by the first deposition step is close to the increment of the longitudinal etching depth of the trench bottom by the second etching step.

[0008] In one embodiment, after performing the first deposition step and the second etching step in an alternating cycle, the bottom angle of the groove is modified to a target fillet, and the bottom of the groove is etched down to a target depth, and the target fillet curvature radius is equal to or close to the difference between the target depth and the predetermined depth.

[0009] In one embodiment, the total number of cycles n of alternating the first deposition step and the second etching step is determined by the following formula:

[0010]

[0011] Wherein, n is an integer greater than or equal to 1, r is the curvature radius of the target fillet, u is the single-cycle etching rate at the bottom corner of the groove, and [] indicates rounding calculation.

[0012] In one embodiment, after alternately performing the first deposition step and the second etching step, the method further includes: performing a surface damage repair step to repair lattice damage on the inner surface of the groove.

[0013] In one embodiment, in the surface damage repairing step, the process gas includes a fluorine-containing gas and an oxygen-containing gas; after the fluorine-containing gas and the oxygen-containing gas are ionized, only free radicals react with the inner surface of the trench.

[0014] In one embodiment, in the surface damage repair step, the flow rate of the fluorine-containing gas ranges from 40 sccm to 500 sccm, the flow rate of the oxygen-containing gas ranges from 10 sccm to 100 sccm, and the power of the center upper electrode ranges from 1000W to 3000W.

[0015] In one embodiment, the alternating cycle of performing the first deposition step and the second etching step includes alternating cycle switching deposition gas and etching gas, the deposition gas includes a carbon fluorine gas, and the etching gas includes a fluorine-containing gas.

[0016] In one embodiment, in the first deposition step, the edge upper electrode power ranges from 500W to 3000W, and the lower electrode power ranges from 0W to 30W; and / or, in the second etching step, the edge upper electrode power ranges from 1000W to 3000W, and the lower electrode power ranges from 400W to 800W.

[0017] In one embodiment, in the first deposition step, the process gas further includes an oxygen-containing gas, and the thickness of the passivation layer is controlled by controlling the flow ratio between the fluorocarbon gas and the oxygen-containing gas.

[0018] In one embodiment, in the first etching step, the process gas includes a fluorine-containing gas and an oxygen-containing gas, and the fluorine-containing gas and the oxygen-containing gas react with the film layer to be etched simultaneously.

[0019] In one embodiment, in the first etching step, the flow rate of the fluorine-containing gas is in the range of 5 sccm to 100 sccm, the flow rate of the oxygen-containing gas is in the range of 10 sccm to 100 sccm, and the flow rate ratio of the fluorine-containing gas to the oxygen-containing gas is in the range of 0.3 to 2.

[0020] In one embodiment, after performing the first deposition step and the second etching step in an alternating cycle and before performing the surface damage repair step, the method further includes: performing a byproduct removal step to remove the passivation layer on the sidewalls of the trench and the reaction byproducts on the inner wall surface of the trench, the reaction byproducts including the reaction byproducts generated in the first etching step, the first deposition step, and the second etching step.

[0021] The second aspect of the present application provides a semiconductor process equipment, including: a process chamber, a radio frequency coil and a controller, the process chamber includes a first cylindrical structure, a second cylindrical structure and a reaction chamber which are connected in sequence from top to bottom, a filter plate for filtering charged particles in plasma is arranged between the first cylindrical structure and the second cylindrical structure, the radio frequency coil includes a first coil wound outside the first cylindrical structure and a second coil wound outside the second cylindrical structure, the first coil is used to load the center electrode power, and the second coil is used to load the edge electrode power, the controller includes at least one processor and at least one memory, the memory stores a computer program, and when the computer program is executed by the processor, the method for forming a groove in any of the above-mentioned embodiments is implemented.

[0022] In one embodiment, a plurality of through holes for the free radicals in the plasma to pass through are provided in the middle of the filter plate, and a plurality of mounting holes spaced along the circumference of the filter plate are provided at the edge of the filter plate, and fasteners are provided in each mounting hole to fasten the filter plate to the bottom wall of the first tubular structure or the top wall of the second tubular structure.

[0023] The advantages or beneficial effects of the above technical solution at least include: after forming a groove in the film layer to be etched by the first etching step, a passivation layer can be formed on the side wall of the groove by the first deposition step, and then the groove is etched by the second etching step. Due to the presence of the passivation layer, the etching rate of the bottom of the groove is greater than the etching rate of the bottom angle of the groove, so that the bottom angle of the groove is modified into an arc. In this way, the bottom angle of the groove can be gradually modified into a rounded corner by alternating the first deposition step and the second etching step. Since the modification of the bottom angle of the groove is subdivided into the first deposition step and the second etching step, and the first deposition step and the second etching step are performed alternately and cyclically, the modification process of the bottom angle of the groove is easy to control, which is conducive to reducing the difficulty of controlling the morphology of the bottom angle of the groove and improving the control accuracy of the morphology of the bottom angle of the groove, thereby obtaining the bottom angle of the groove required by the process. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The accompanying drawings herein are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present application, and together with the specification are used to explain the principles of the present application. In addition, these drawings and text descriptions are not intended to limit the scope of the concept of the present application in any way, but to illustrate the concept of the present application for those skilled in the art by referring to specific embodiments.

[0025] Figure 1 Shown is an electron microscope image of microgrooves formed at the bottom corners of the grooves.

[0026] Figure 2 FIG. 1 is a schematic flow chart of a method for forming a trench according to an embodiment of the present application.

[0027] FIG. 3A to FIG. 3H Shown is a schematic cross-sectional structure diagram of each step in an embodiment of the present application.

[0028] Fig. 3I Shown Figure 3H Electron microscope effect diagram.

[0029] Figure 3J Shown Fig. 3I A partial schematic diagram of the bottom of the trench.

[0030] Figure 4A The figure shows a schematic cross-sectional structure diagram of a groove having a bottom angle of 1 / 2 fillet formed in another embodiment of the present application.

[0031] Figure 4B Shown Figure 4A Electron microscope effect diagram.

[0032] Figure 4C Shown Figure 4B A partial schematic diagram of the bottom of the trench.

[0033] Figure 5 FIG. 4 is a schematic diagram showing the cross-sectional effect of forming a groove in the related art.

[0034] Fig. 6A Shown is a schematic structural diagram of a semiconductor process equipment according to an embodiment of the present application.

[0035] Figure 6B Shown Fig. 6A Schematic diagram of the filter plate. DETAILED DESCRIPTION

[0036] In the following, only some exemplary embodiments are briefly described. As those skilled in the art will appreciate, the described embodiments may be modified in various ways without departing from the spirit or scope of the present application. Therefore, the drawings and descriptions are considered to be exemplary and non-restrictive in nature.

[0037] The embodiment of the present application provides a method for forming a groove and a semiconductor process equipment, which can effectively solve the problem of low control accuracy of the groove bottom angle morphology in the related art. The embodiment of the present application is described in detail below in conjunction with the accompanying drawings.

[0038] Figure 2 FIG. 1 is a schematic flow chart of a method for forming a trench according to an embodiment of the present application. FIG. 3A to FIG. 3H Shown is a schematic cross-sectional structure diagram of each step in an embodiment of the present application.

[0039] Please also read Figure 2 , FIG. 3A to FIG. 3F As shown, the method for forming a groove includes the following steps S110 to S120.

[0040] Step S110 , performing a first etching step, etching the to-be-etched film layer 11 of the wafer downward to a predetermined depth to form a groove 11 a , wherein the predetermined depth is smaller than a target depth of the groove 11 a .

[0041] For example, Figure 3A As shown, performing the first etching step includes: forming a mask layer 12 on the film layer 11 to be etched, and the mask layer 12 is formed with a mask opening 12a; etching the film layer 11 to be etched downward along the mask opening 12a to a predetermined depth to form a groove 11a in the film layer 11 to be etched. The predetermined depth is 80% to 90% of the target depth of the groove 11a, and the target depth range of the groove 11a can be 0.5μm to 10μm. For example, the target depth range of the groove 11a is 2μm, and the predetermined depth is 1.8μm. After performing the first etching step, a groove 11a with an etching depth of 1.8μm can be formed in the film layer 11 to be etched. It should be noted that all numerical ranges in the embodiments of the present application include the endpoint values ​​of the numerical values.

[0042] Step S120, alternately and cyclically performing the first deposition step and the second etching step, modifying the bottom corner of the groove 11a to a rounded corner. In each cycle, the first deposition step is performed to form a passivation layer 13 on the sidewall of the groove 11a, and the second etching step is performed to etch the groove 11a, and the etching rate of the bottom of the groove 11a is greater than the etching rate of the bottom corner of the groove 11a.

[0043] For example, see FIG. 3B to FIG. 3C In each cycle, a first deposition step may be performed to form a passivation layer 13 on the sidewall of the groove 11 a ; and then a second etching step may be performed to etch the groove 11 a .

[0044] In the first deposition step, since the groove 11a has a certain etching depth, the flow rate of the process gas in the groove 11a decreases along the etching depth of the groove 11a. After executing the first deposition step, the thickness of the passivation layer 13 formed on the side wall of the groove 11a also decreases along the etching depth of the groove 11a; wherein the thickness of the passivation layer 13 is the lateral dimension of the passivation layer 13.

[0045] In the second etching step, since the passivation layer 13 has a certain thickness, the passivation layer 13 can not only block the process gas from etching the side wall of the groove 11a, and play a protective role on the side wall; it can also block the process gas from longitudinally etching the bottom corner of the groove 11a, so that the etching rate of the bottom of the groove 11a in the second etching step is greater than the etching rate of the bottom corner of the groove 11a, and the bottom angle of the groove 11a can be modified into an arc. Among them, in each cycle, the passivation layer 13 is also formed at the bottom of the groove 11a after the first deposition step is executed. The etching of the bottom of the groove 11a in the second etching step includes first etching downward the passivation layer 13 located at the bottom of the groove 11a, and then etching downward the bottom of the groove 11a.

[0046] It should be noted that the upper edge of the mask opening 12a will be etched to form a slope 12b during the etching process. Figure 3A The shape in.

[0047] In the above scheme, after forming the groove 11a in the film layer 11 to be etched by the first etching step, the passivation layer 13 can be formed on the side wall of the groove 11a by the first deposition step, and then the groove 11a is etched by the second etching step. Due to the presence of the passivation layer 13, the etching rate of the bottom of the groove 11a is greater than the etching rate of the bottom angle of the groove 11a, so that the bottom angle of the groove 11a is modified into an arc. In this way, the bottom angle of the groove 11a can be gradually modified into a rounded corner by alternating the first deposition step and the second etching step. Since the modification of the bottom angle of the groove 11a is subdivided into the first deposition step and the second etching step, and the first deposition step and the second etching step are alternately cycled, the modification process of the bottom angle of the groove 11a is easy to control, which is conducive to reducing the difficulty of controlling the morphology of the bottom angle of the groove 11a and improving the control accuracy of the morphology of the bottom angle of the groove 11a, thereby obtaining the bottom angle of the groove 11a required by the process.

[0048] In one embodiment, see FIG. 3A to FIG. 3F The first deposition step and the second etching step are performed alternately for multiple rounds, so that the thickness of the passivation layer 13 on the sidewall of the groove 11a gradually increases with the number of alternate cycles, and the longitudinal etching depth of the bottom of the groove 11a gradually increases with the number of alternate cycles. The number of rounds can be 20.

[0049] For example, FIG. 3A to FIG. 3EAs shown, the thickness d2 of the passivation layer 13 formed on the side wall of the groove 11a after the first deposition step is performed in the second round is greater than the thickness d1 of the passivation layer 13 formed on the side wall of the groove 11a after the first deposition step is performed in the first round, and the longitudinal etching depth h2 of the bottom of the groove 11a after the second etching step is performed in the second round is greater than the longitudinal etching depth h1 of the bottom of the groove 11a after the second etching step is performed in the first round; and so on, please refer to Figure 3F The thickness of the passivation layer 13 formed on the sidewall of the trench 11a after the first deposition step in the mth round is greater than the thickness of the passivation layer 13 formed on the sidewall of the trench 11a after the first deposition step in the m-1th round, and the longitudinal etching depth h of the bottom of the trench 11a after the second etching step in the mth round is m Greater than the longitudinal etching depth h at the bottom of the groove 11a after the second etching step in the m-1th round m-1 . Wherein, m is an integer greater than 2.

[0050] Based on this, by performing multiple rounds of the first deposition step and the second etching step in an alternating cycle, the thickness of the passivation layer 13 located on the side wall of the groove 11a can be gradually increased with the number of alternating cycles. The passivation layer 13 located on the side wall of the groove 11a will gradually expand the lateral protection range of the bottom angle of the groove 11a, and the longitudinal etching depth of the bottom of the groove 11a will gradually increase with the number of alternating cycles, so as to gradually modify the bottom angle of the groove 11a into a rounded corner.

[0051] In one embodiment, please refer to FIG. 3B to FIG. 3D In each cycle, the increment of the maximum thickness of the passivation layer 13 deposited on the sidewall of the trench 11a in the first deposition step is close to the increment of the longitudinal etching depth of the bottom of the trench 11a in the second etching step.

[0052] Exemplarily, in each cycle, the maximum thickness of the passivation layer 13 deposited on the sidewall of the groove 11a in the first deposition step is the maximum lateral dimension of the passivation layer 13 deposited on the side adjacent to the mask layer 12, and the increment of the maximum thickness of the passivation layer 13 is the change value of the maximum thickness of the passivation layer 13 deposited in the i-th round relative to the maximum thickness of the passivation layer 13 deposited in the i-1th round, where i is an integer greater than or equal to 1. Specifically, in each cycle, the increment of the maximum thickness of the passivation layer 13 deposited on the sidewall of the groove 11a in the first deposition step and the increment of the longitudinal etching depth of the bottom of the groove 11a in the second etching step can both be 5nm to 10nm, for example, 8nm.

[0053] In this way, in each cycle, the lateral protection range of the passivation layer 13 located on the side wall of the groove 11a at the bottom corner of the groove 11a can be made close to the maximum longitudinal etching depth at the bottom corner of the groove 11a; and, in the process of alternatingly executing the first deposition step and the second etching step, the expansion rate of the lateral protection range of the passivation layer 13 located on the side wall of the groove 11a at the bottom corner of the groove 11a can be made close to the maximum longitudinal etching rate at the bottom corner of the groove 11a, for example, both are 8nm / cycle, thereby ensuring that the bottom corner of the groove 11a is gradually modified into a rounded corner.

[0054] In one embodiment, see Figures 3H to 3J After alternating and cyclically executing the first deposition step and the second etching step, the bottom angle of the groove 11a is modified to a target fillet 11d, and the bottom of the groove 11a is etched down to a target depth, and the curvature radius of the target fillet 11d of the groove 11a is equal to or close to the difference between the target depth and the predetermined depth.

[0055] Continuing with the example that the predetermined depth of the groove 11a is 1.8μm and the target depth is 2μm, after alternating the first deposition step and the second etching step, the bottom angle of the groove 11a can be modified to the target fillet 11d, and the groove 11a with the predetermined depth of 1.8μm is further etched to the target depth of 2μm; the curvature radius of the target fillet 11d is equal to or close to 0.2μm.

[0056] Based on this, after the first deposition step and the second etching step are performed alternately and cyclically, not only can the bottom angle of the groove 11a be modified to a target fillet 11d with a certain curvature radius, but the groove 11a can also be etched to a target depth simultaneously.

[0057] In one embodiment, the total number of cycles n of alternating the first deposition step and the second etching step can be calculated by the following formula (1):

[0058]

[0059] Wherein, n is an integer greater than or equal to 1, r is the curvature radius of the target fillet 11d, u is the single-cycle etching rate at the bottom corner of the groove 11a, that is, the longitudinal etching depth at the bottom corner of the groove 11a in each cycle, such as 8nm / cycle in the previous text, and [] indicates rounding calculation.

[0060] In an example, see Figures 3H to 3J , the target fillet 11d at the bottom corner of the groove 11a can be a 1 / 4 fillet. Using the above formula (1), r is made less than 1 / 2 of the lateral dimension of the mask opening 12a, and the corresponding total number of cycles n=m can be calculated. After controlling the total number of cycles m of the alternating cycles of the first deposition step and the second etching step, the bottom corner of the groove 11a can be modified to a 1 / 4 fillet.

[0061] In another example, see FIG. 4A to FIG. 4C , the target fillet 11d at the bottom corner of the groove 11a can be a 1 / 2 fillet. Using the above formula (1), and setting r equal to 1 / 2 of the lateral dimension of the mask opening 12a, the corresponding total number of cycles n=k can be calculated. By controlling the total number of cycles k of the alternating cycles of the first deposition step and the second etching step, the bottom corner of the groove 11a can be modified to a 1 / 2 fillet. k is an integer greater than m.

[0062] Based on this, the morphology of the target fillet 11d at the bottom corner of the trench 11a can be flexibly controlled according to the actual needs of the semiconductor device to meet the different process requirements of the semiconductor device.

[0063] In one embodiment, see Figure 3G and Figure 3H After performing the first deposition step and the second etching step in an alternating cycle, the method further includes: performing a surface damage repair step to repair the lattice damage on the inner surface of the groove 11a.

[0064] During the first etching step or the second etching step, the process gas is electrolyzed to form plasma, and the charged particles in the plasma will strongly bombard the film layer 11 to be etched or the groove 11a under the action of the lower electrode power, so that the surface chemical bonds on the inner surface of the groove 11a are broken, causing lattice damage such as composition or valence change, lattice distortion, etc. on the inner surface of the groove 11a. Such lattice damage will affect the performance of subsequent semiconductor devices.

[0065] The above scheme, by continuing to perform the surface damage repair step after alternating and cyclically executing the first deposition step and the second etching step, can change the composition or valence state of the inner surface of the groove 11a, remove the thin layer 11c with lattice distortion on the inner surface of the groove 11a, and repair the lattice damage on the inner surface of the groove 11a, which is beneficial to improving the performance of the semiconductor device.

[0066] In one embodiment, in the surface damage repairing step, the process gas includes a fluorine-containing gas and an oxygen-containing gas. After the fluorine-containing gas and the oxygen-containing gas are ionized, only free radicals can pass through the filter plate to react with the surface of the groove of the reaction chamber.

[0067] For example, see Figure 3G and Figure 3H The material of the film layer 11 to be etched is silicon carbide (SiC), and the fluorine-containing gas includes carbon tetrafluoride (CF 4 ), oxygen-containing gases include oxygen (O 2In the surface damage repair step, the fluorine-containing gas is electrolyzed to generate first charged particles and fluorine free radicals, and the oxygen-containing gas is electrolyzed to generate second charged particles and oxygen free radicals. Only the fluorine free radicals and oxygen free radicals react with the inner surface of the groove 11a, wherein the fluorine free radicals combine with the silicon radicals on the surface of the groove 11a to form volatile silicon tetrafluoride (SiF 4 ) gas, oxygen free radicals combine with carbon atoms on the surface of the groove 11a to form volatile carbon monoxide (CO) and / or carbon dioxide (CO 2 ) gas, which can change the ratio of carbon and silicon elements on the inner surface of the groove 11a, the element valence state on the inner surface of the groove 11a, and remove the thin layer 11c with lattice damage such as lattice distortion on the inner surface of the groove 11a, so as to repair the lattice damage on the inner surface of the groove 11a. In addition, the thin layer 11c with lattice damage on the inner surface of the groove 11a is not dense and is easy to react with fluorine free radicals and oxygen free radicals, making the process less difficult and easy to implement.

[0068] Furthermore, in the surface damage repair step, the flow rate of the fluorine-containing gas is in the range of 40 sccm to 500 sccm, the flow rate of the oxygen-containing gas is in the range of 10 sccm to 100 sccm, and the power of the center upper electrode is in the range of 1000 W to 3000 W. By setting the fluorine-containing gas, the oxygen-containing gas and the center upper electrode power to be within their respective corresponding numerical ranges, the generation of fluorine free radicals and oxygen free radicals of appropriate density can be controlled to effectively repair the lattice damage on the inner surface of the groove 11a. In addition, since the reaction of the free radicals is mild, there will no longer be a strong bombardment on the inner surface of the groove 11a, which can avoid deformation of the silicon carbide lattice on the inner surface of the groove 11a.

[0069] Furthermore, in the surface damage repairing step, the pressure of the process chamber 20 ranges from 10 mTorr to 200 mTorr.

[0070] In one embodiment, the alternating cycle of performing the first deposition step and the second etching step includes alternating cycle switching to introduce deposition gas and etching gas into the process chamber, the deposition gas includes a carbon fluorine gas, and the etching gas includes a fluorine-containing gas.

[0071] For example, in the first deposition step, the fluorocarbon gas includes octafluorocyclobutane (C 4 F 8 In the second etching step, the fluorine-containing gas includes sulfur hexafluoride (SF 6 ). By alternately and cyclically switching between introducing octafluorocyclobutane and sulfur hexafluoride into the process chamber, the first deposition step and the second etching step can be alternately and cyclically performed.

[0072] In the first deposition step, the plasma generated by the electrolysis of octafluorocyclobutane will be deposited on the inner surface of the groove 11 a to form a fluorinated carbon polymer to form the passivation layer 13 . In the second etching step, the fluorine ions generated by the electrolysis of sulfur hexafluoride physically sputter bombard the bottom of the groove 11a in a vertically downward direction, so that the fluorine ions first react with the fluorinated carbon polymer located at the bottom of the groove 11a to remove the passivation layer 13 located at the bottom of the groove 11a, and then continue to react with the bottom of the groove 11a to etch the bottom of the groove 11a; and, in the second etching step, due to the presence of the passivation layer 13 located on the side wall of the groove 11a, it is possible to prevent the fluorine ions from reacting with the side wall of the groove 11a, thereby protecting the side wall of the groove 11a; further, in the second etching step, the passivation layer 13 located on the side wall of the groove 11a has a certain thickness in the lateral dimension, and can also prevent the fluorine ions from etching the bottom corner of the groove 11a, so that the etching rate of the fluorine ions at the bottom corner of the groove 11a is lower than the etching rate of the exposed area at the bottom of the groove 11a. In this way, by alternately switching the deposition gas and the etching gas, the thickness of the passivation layer 13 on the side wall of the groove 11a can be gradually increased with the number of alternating cycles, and the longitudinal etching depth of the bottom of the groove 11a can be gradually increased with the number of alternating cycles, thereby achieving the modification of the bottom angle of the groove 11a into a rounded corner.

[0073] Optionally, in the first deposition step, the flow rate of the carbon fluorine gas is in the range of 30 sccm to 300 sccm; in the second etching step, the flow rate of the fluorine-containing gas is in the range of 30 sccm to 300 sccm.

[0074] In one embodiment, in the first deposition step, the edge upper electrode power ranges from 500W to 3000W, and the lower electrode power ranges from 0W to 30W; and / or, in the second etching step, the edge upper electrode power ranges from 1000W to 3000W, and the lower electrode power ranges from 400W to 800W.

[0075] In the above scheme, by setting the edge upper electrode power in the range of 500W to 3000W and the lower electrode power in the range of 0W to 30W in the first deposition step, the carbon fluorine gas can be completely dissociated under the action of the relatively high edge upper electrode power, and the dissociated plasma can be fully deposited on the inner surface of the groove 11a with weak directionality under the action of the relatively low lower electrode power, which is conducive to controlling the deposition rate of the plasma; and / or, by setting the edge upper electrode power in the range of 1000W to 3000W and the lower electrode power in the range of 40 0W~800W, can promote the complete dissociation of fluorine-containing gas to produce high fluorine ion density, and cooperate with higher lower electrode power to perform physical sputtering bombardment on groove 11a in the vertical downward direction, and by controlling the above process parameters to be within the corresponding numerical range, the etching rate of groove 11a can be controlled within a suitable range, for example, the longitudinal etching rate of groove 11a can be controlled within 5nm / cycle~8nm / cycle, wherein the process time of the second etching step is 4s, and the longitudinal etching rate of groove 11a is equivalent to 75nm / min~120nm / min.

[0076] In one embodiment, see FIG. 3A to FIG. 3B In the first deposition step, the process gas further includes an oxygen-containing gas, and the thickness of the passivation layer 13 is controlled by controlling the flow ratio between the fluorocarbon gas and the oxygen-containing gas.

[0077] Exemplarily, the fluorocarbon gas includes octafluorocyclobutane (C 4 F 8 ), oxygen-containing gases include oxygen. See FIG. 3A to FIG. 3B The fluorocarbon gas is used to deposit a passivation layer 13 on the sidewall of the groove 11a. The material of the passivation layer 13 is a fluorinated carbon polymer. The oxygen-containing gas can react with the carbon element in the fluorocarbon gas to reduce the deposition, so that the thickness of the passivation layer 13 on the sidewall of the groove 11a can be controlled by controlling the flow ratio between the fluorocarbon gas and the oxygen-containing gas. The thickness of the passivation layer 13 on the sidewall of the groove 11a will affect the morphology of the bottom corner of the groove 11a, so it is more helpful to control the morphology of the bottom corner of the groove 11a.

[0078] Preferably, in the first deposition step, the flow rate of the oxygen-containing gas ranges from 0 sccm to 100 sccm. In addition, in the first deposition step, the pressure of the process chamber ranges from 10 mTorr to 70 mTorr.

[0079] In one embodiment, in the first etching step, the process gas includes a fluorine-containing gas and an oxygen-containing gas, and the fluorine-containing gas and the oxygen-containing gas react with the film layer to be etched simultaneously.

[0080] In related technologies, such as Figure 5As shown, the Bosch process is usually used to etch the film layer 11 to form a groove 11a, wherein the fluorine-containing gas and the oxygen-containing gas react alternately with the film layer 11 to form horizontal lines on the sidewalls of the groove 11a, resulting in increased roughness of the sidewalls of the groove 11a, which will affect the performance of the semiconductor device.

[0081] In this embodiment, if Figure 3A As shown, the material of the film layer 11 to be etched may be silicon carbide, and the fluorine-containing gas may include sulfur hexafluoride (SF 6 ), carbon tetrafluoride and trifluoromethane (CHF 3 ), the oxygen-containing gas includes oxygen, carbon monoxide and nitrogen dioxide (NO 2 ). See FIG. 3B to FIG. 3C In the first etching step, the fluorine-containing gas and the oxygen-containing gas react with the film layer 11 to be etched at the same time, for example, the fluorine-containing gas is electrolyzed to produce fluorine ions, and the oxygen-containing gas is electrolyzed to produce oxygen ions. The fluorine ions react with the silicon element in the film layer 11 to be etched to produce volatile silicon tetrafluoride, and a part of the oxygen ions react with the carbon element in the film layer 11 to be etched to produce volatile carbon monoxide or carbon dioxide, and another part of the oxygen ions react with the silicon element in the film layer 11 to be etched to produce silicon oxide, which constitutes a reaction byproduct and will be deposited on the side wall of the groove 11a to protect the side wall, thereby realizing continuous etching of the film layer 11 to be etched. In this way, a groove 11a with vertical and smooth side walls, a right bottom angle and no micro grooves can be obtained.

[0082] In one embodiment, in the first etching step, the flow rate of the fluorine-containing gas is in the range of 5 sccm to 100 sccm, the flow rate of the oxygen-containing gas is in the range of 10 sccm to 100 sccm, and the flow rate ratio of the fluorine-containing gas to the oxygen-containing gas is in the range of 0.3 to 2.

[0083] See also FIG. 3B to FIG. 3C When the flow rate of the fluorine-containing gas is less than 5 sccm, the etching rate of the film layer 11 to be etched is slow; when the flow rate of the fluorine-containing gas is greater than 100 sccm, the etching rate of the film layer 11 to be etched is fast and the sidewall of the groove 11a is easily etched. When the flow rate of oxygen is less than 10 sccm, the thickness of the silicon dioxide formed on the sidewall of the groove 11a is too thin, and the protection ability of the sidewall of the groove 11a is weak, which easily causes the sidewall of the groove 11a to be etched laterally; when the flow rate of oxygen is greater than 100 sccm, the thickness of the silicon dioxide formed on the sidewall of the groove 11a is too thick, and the protection ability of the sidewall of the groove 11a is too strong, which easily causes the sidewall of the groove 11a to tilt. When the flow rate ratio of the fluorine-containing gas to the oxygen-containing gas is less than 0.3, the etching rate will also be too slow; when the flow rate of the fluorine-containing gas to the oxygen-containing gas is greater than 2, the protection ability of the sidewall of the groove 11a is also too strong.

[0084] In the above scheme, in the first etching step, by controlling the flow range of fluorine-containing gas to be 5sccm-100sccm, the flow range of oxygen-containing gas to be 10sccm-100sccm, and the flow ratio of fluorine-containing gas to oxygen-containing gas to be 0.3-2, the morphology of the groove 11a with vertical side walls and right angles at the bottom angle can be controlled.

[0085] Further, in the first etching step, the process gas also includes an inert gas, and the flow rate of the inert gas ranges from 50 sccm to 500 sccm. Exemplarily, the inert gas can be argon (Ar) or helium (He). The inert gas is used to destroy the Si-C bond in the silicon carbide material in the film layer 11 to be etched, thereby enhancing the effect of physical etching.

[0086] Furthermore, in the first etching step, the power of the upper edge electrode ranges from 1000W to 3000W, and the power of the lower edge electrode ranges from 400W to 800W. FIG. 3A to FIG. 3B In the first etching step, by controlling the above process parameters within the corresponding numerical range, the etching rate of the film layer 11 to be etched can be controlled within a suitable range. For example, the etching rate of the film layer 11 to be etched can be controlled between 300nm / min and 800nm / min.

[0087] In addition, since both the first etching step and the second etching step use non-toxic and harmless fluorine-containing gas, it has the advantages of high safety and low maintenance cost compared to using toxic and harmful silicon tetrachloride.

[0088] In one embodiment, see Figure 3G to Figure 3H After performing the first deposition step and the second etching step in an alternating cycle and before performing the surface damage repair step, the method for forming a groove further includes performing a byproduct removal step to remove the passivation layer 13 on the sidewall of the groove 11a and the reaction byproducts on the inner surface of the groove 11a. The reaction byproducts include the reaction byproducts generated in the first etching step, the first deposition step, and the second etching step. By performing the byproduct removal step before the surface damage repair step, the passivation layer 13 on the sidewall of the groove 11a and the reaction byproducts on the inner surface of the groove 11a can be removed, thereby fully exposing the inner surface of the groove 11a, which is conducive to fully repairing the inner surface of the groove 11a when the surface damage repair step is performed later.

[0089] Exemplarily, the byproduct removal step includes: using a fluorine-containing gas to perform plasma etching on the groove 11a; or, using a wet etching process to wet clean the film layer 11 to be etched. The fluorine-containing gas can be carbon tetrafluoride (CF 4 ).

[0090] Fig. 6AShown is a schematic structural diagram of a semiconductor process equipment according to an embodiment of the present application.

[0091] The semiconductor process equipment 100 includes: a process chamber 20, a radio frequency coil 40 and a controller. The process chamber 20 includes a first cylindrical structure 21, a second cylindrical structure 22 and a reaction chamber 23 which are connected in sequence from top to bottom. A filter plate 30 for filtering charged particles in plasma is arranged between the first cylindrical structure 21 and the second cylindrical structure. The radio frequency coil 40 includes a first coil 41 wound outside the first cylindrical structure 21 and a second coil 42 wound outside the second cylindrical structure 22. The first coil 41 is used to load the center electrode power, and the second coil 42 is used to load the edge electrode power. The controller includes at least one processor and at least one memory. The memory stores a computer program. When the computer program is executed by the processor, the method for forming the groove 11a in any of the above-mentioned embodiments is implemented.

[0092] Exemplarily, the radii of the first tubular structure 21, the second tubular structure 22 and the reaction chamber 23 increase from top to bottom, and a wafer carrier 50 is provided in the reaction chamber 23, and the wafer carrier 50 is used to carry the wafer, and the film layer 11 to be etched according to the embodiment of the present application can be provided on the wafer. Among them, the materials of the first tubular structure 21 and the second tubular structure 22 are both ceramic, and the material of the inner wall of the reaction chamber 23 can be aluminum alloy. The wafer carrier 50 can be an electrostatic chuck, a mechanical chuck, a vacuum adsorption chuck, etc.

[0093] The semiconductor process equipment 100 may also include an air intake component 60 and an air extraction component 70. The controller may be a host computer or a slave computer. The controller may control the valve opening of the air intake component 60 to introduce the corresponding process gas into the interior of the process chamber 20; the controller may also control the opening and closing degree of the valve of the air intake component 60 to control the flow rate of the process gas. The controller may also control the air extraction component 70 to exhaust the interior of the process chamber 20, such as controlling the valve opening degree or the air extraction pump speed of the air extraction component 70, to control the pressure inside the process chamber 20, discharge reaction byproducts, etc.

[0094] The semiconductor process equipment 100 may further include a first upper RF power source 81, a first upper matcher 91, a second upper RF power source 82, and a second upper matcher 92. The controller is further configured to control the first upper RF power source 81 to provide a central electrode power to the first coil 41 in the RF coil 40 through the first upper matcher 91, so that the first coil 41 excites the process gas in the first cylindrical structure 21 to generate plasma. The controller is further configured to control the second upper RF power source 82 to provide an edge electrode power to the second coil 42 in the RF coil 40 through the second upper matcher 92, so that the second coil 42 excites the process gas in the second cylindrical structure 22 to generate plasma.

[0095] The semiconductor process equipment 100 may further include a lower RF power supply 83 and a lower matcher 93. The controller is also used to control the lower RF power supply 83 to provide lower electrode power to the wafer carrier 50 through the lower matcher 93 to provide RF bias.

[0096] The semiconductor process equipment 100 of the embodiment of the present application may be an inductively coupled plasma (ICP) equipment.

[0097] It should be noted that, since the semiconductor process equipment 100 of the embodiment of the present application adopts all the technical solutions of all the above embodiments, it at least has all the beneficial effects brought by the technical solutions of the above embodiments, which will not be repeated here.

[0098] In one embodiment, please refer to Fig. 6A and Figure 6B , a plurality of through holes 31 for free radicals in the plasma to pass through are provided in the middle of the filter plate 30, and a plurality of mounting holes 32 spaced along the circumference of the filter plate are provided at the edge of the filter plate 30. Each mounting hole 32 is used to penetrate a fastener (not shown in the drawings) to fasten the filter plate 30 to the bottom wall of the first cylindrical structure 21 or the top wall of the second cylindrical structure 22. In this way, the filter plate 30 can be installed between the first cylindrical structure 21 and the second cylindrical structure 22. Among them, an aluminum oxide coating is also coated on the surface of the filter plate 30. The aperture and arrangement of the through holes 31 can be selected and adjusted according to actual needs, and the embodiments of the present application are not limited to this.

[0099] The method for forming a trench in the above embodiment is implemented by using the semiconductor process equipment 100 of the present application, including:

[0100] In the first etching step, the first deposition step, and the second etching step, the second upper RF power source 82 applies edge electrode power to the second coil 42 through the second upper matcher 92, and the process gas entering the process chamber 20 through the gas inlet assembly is ionized in the second tubular structure 22 to generate plasma, and the plasma can directly enter the reaction chamber 23 through the second tubular structure 22 to react with the wafer to perform the corresponding steps;

[0101] In the surface damage repair step, the first upper RF power source 81 applies the central upper electrode power to the first coil 41 through the first upper matcher 91, and the process gas entering the process chamber 20 through the gas inlet assembly is ionized in the first tubular structure 21 to generate plasma, and the charged ions in the plasma are filtered by the filter plate 30, while the free radicals in the plasma can pass through the filter plate 30. In this way, only the free radicals can pass through the filter plate 30, enter the reaction chamber 23 through the second tubular structure 22 and interact with the wafer, and the free radicals react with the inner surface of the groove 11a, which can change the composition or valence state of the inner surface of the groove 11a, and remove the thin layer where the lattice is distorted, so as to repair the inner surface of the groove 11a.

[0102] The above scheme, by setting a filter plate 30 between the first tubular structure 21 and the second tubular structure 22, and in the surface damage repair step, loading the center upper electrode power to the first coil 41, and in the first etching step, the first deposition step and the second etching step, loading the edge electrode power to the second coil 42, can achieve the etching of the groove 11a, the modification of the bottom angle of the groove 11a and the repair of the inner surface of the groove 11a in the same process chamber 20, which is beneficial to improving the process efficiency and saving the process cost.

[0103] In addition, in this application, unless otherwise clearly specified and limited, the terms "connected", "connected", "stacked" and the like should be understood in a broad sense, for example, it can be fixedly connected, detachably connected, or integrated; it can be directly connected, or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0104] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method for forming a groove, characterized in that: include: Performing a first etching step to etch the to-be-etched film layer of the wafer downward to a predetermined depth to form a groove, wherein the predetermined depth is less than a target depth of the groove; Alternately and cyclically performing a first deposition step and a second etching step to modify the bottom corner of the groove into a rounded corner; In each cycle, the first deposition step is performed to form a passivation layer on the sidewall of the groove, the second etching step is performed to etch the groove, and the etching rate of the bottom of the groove is greater than the etching rate of the bottom corner of the groove.

2. The method according to claim 1, characterized in that The first deposition step and the second etching step are performed multiple times in an alternating cycle, so that the thickness of the passivation layer on the sidewall of the groove gradually increases with the number of the alternating cycles, and the longitudinal etching depth of the bottom of the groove gradually increases with the number of the alternating cycles.

3. The method according to claim 2, characterized in that In each cycle, the increment of the maximum thickness of the passivation layer deposited on the sidewall of the trench by the first deposition step is close to the increment of the longitudinal etching depth of the bottom of the trench by the second etching step.

4. The method according to claim 1, characterized in that: After performing the first deposition step and the second etching step in an alternating cycle, modifying the bottom angle of the groove to a target rounded angle, and etching the bottom of the groove downward to the target depth; The curvature radius of the target rounded corner is equal to or close to the difference between the target depth and the predetermined depth.

5. The method according to claim 4, characterized in that The total number of cycles n of alternating the first deposition step and the second etching step is determined by the following formula: Wherein, n is an integer greater than or equal to 1, r is the radius of curvature of the target, u is the single-cycle etching rate at the bottom corner of the groove, and [] indicates rounding calculation.

6. The method according to any one of claims 1 to 5, characterized in that After alternately performing the first deposition step and the second etching step, the method further includes: A surface damage repair step is performed to repair the lattice damage on the inner surface of the groove.

7. The method according to claim 6, characterized in that In the surface damage repairing step, the process gas includes a fluorine-containing gas and an oxygen-containing gas; after the fluorine-containing gas and the oxygen-containing gas are ionized, only free radicals can pass through the filter plate to react with the inner surface of the groove.

8. The method according to claim 7, characterized in that In the surface damage repairing step, the flow rate of the fluorine-containing gas is in the range of 40 sccm to 500 sccm, the flow rate of the oxygen-containing gas is in the range of 10 sccm to 100 sccm, and the power of the center upper electrode is in the range of 1000W to 3000W.

9. The method according to claim 2, characterized in that: The alternately cyclically executing the first deposition step and the second etching step includes alternately cyclically switching deposition gas and etching gas, wherein the deposition gas includes a carbon-fluorine gas, and the etching gas includes a fluorine-containing gas.

10. The method according to claim 9, characterized in that In the first deposition step, the power of the edge upper electrode ranges from 500W to 3000W, and the power of the lower electrode ranges from 0W to 30W; in the second etching step, the power of the edge upper electrode ranges from 1000W to 3000W, and the power of the lower electrode ranges from 400W to 800W.

11. The method according to claim 9, characterized in that In the first deposition step, the process gas further includes an oxygen-containing gas, and the thickness of the passivation layer is controlled by controlling the flow ratio between the fluorocarbon gas and the oxygen-containing gas.

12. The method according to claim 1, characterized in that In the first etching step, the process gas includes a fluorine-containing gas and an oxygen-containing gas, and the fluorine-containing gas and the oxygen-containing gas react with the film layer to be etched simultaneously.

13. The method according to claim 11, characterized in that In the first etching step, the flow rate of the fluorine-containing gas is in the range of 5 sccm to 100 sccm, the flow rate of the oxygen-containing gas is in the range of 10 sccm to 100 sccm, and the flow rate ratio of the fluorine-containing gas to the oxygen-containing gas is in the range of 0.3 to 2.

14. The method according to claim 6, characterized in that After performing the first deposition step and the second etching step in an alternating cycle and before performing the surface damage repairing step, the method further includes: A byproduct removal step is performed to remove the passivation layer on the sidewall of the trench and the reaction byproducts on the inner wall of the trench, wherein the reaction byproducts include the reaction byproducts generated in the first etching step, the first deposition step and the second etching step.

15. A semiconductor process equipment, characterized in that: include: A process chamber, a radio frequency coil and a controller, wherein the process chamber comprises a first cylindrical structure, a second cylindrical structure and a reaction chamber which are sequentially connected from top to bottom, a filter plate for filtering charged particles in plasma is arranged between the first cylindrical structure and the second cylindrical structure, the radio frequency coil comprises a first coil wound outside the first cylindrical structure and a second coil wound outside the second cylindrical structure, the first coil is used to load the center electrode power, and the second coil is used to load the edge electrode power, the controller comprises at least one processor and at least one memory, the memory stores a computer program, and when the computer program is executed by the processor, the method for forming a groove according to any one of claims 1 to 14 is implemented.

16. The semiconductor process equipment according to claim 15, characterized in that: The middle part of the filter plate is provided with a plurality of through holes for the free radicals in the plasma to pass through, and the edge of the filter plate is provided with a plurality of mounting holes arranged at intervals along the circumference of the filter plate, and each mounting hole is used to set a fastener to fasten the filter plate to the bottom wall of the first cylindrical structure or the top wall of the second cylindrical structure.

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