Communication equipment power supply circuit, power supply method and system

Abstract

The invention provides a communication equipment power supply circuit, a power supply method and a system, which are used for supplying power to communication equipment, the communication equipment comprises a communication circuit and a processor circuit, and the communication equipment is characterized by comprising an input power supply used for performing power supply input through an external power supply; the equipment power supply circuit is electrically connected with the input power supply and is used for supplying power to the communication circuit and the processor circuit; and the capacitance circuit is electrically connected with the equipment power supply circuit and is used for supplying power to the communication circuit and the processor circuit through the equipment power supply circuit and charging through the equipment power supply circuit. The method has the advantages that boost discharge is started only when the meter end is powered down, voltage competition during charging is avoided, the service life of the super capacitor is prolonged, and the charging efficiency is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of power supply, and in particular to a power supply circuit, a power supply method and a system for communication equipment. Background Art

[0002] At present, the power failure alarm circuit of the public network communication product needs to be powered by the power supply equipment to maintain external communication, especially after the power of the meter is off, the supercapacitor is used to support the public network module to complete the reporting of related events. The power supply circuit of the current communication equipment adopts a three-supercapacitor series scheme charged with 12V~15V. During the power-on period of the meter, the supercapacitor voltage and the 12V at the meter end compete to supply power to the public network communication module. However, it has many defects. Due to the lack of relevant control circuits, the supercapacitor is charged while discharging and competing with the voltage provided by the meter for output. Charging and discharging at the same time seriously affect the utilization rate and service life of the supercapacitor. In this case, the three supercapacitors in series are charged directly from the meter end. Due to the large voltage difference and initial charging current, the current limiting part of the circuit needs to pay special attention to heat dissipation. Summary of the invention

[0003] The purpose of the present invention is to overcome the problem that the current three-capacitor series scheme lacks a relevant control circuit, and the supercapacitor is charged while discharging and competing with the voltage provided by the meter for output, which seriously affects the utilization rate and service life of the supercapacitor while charging and discharging. A power supply circuit, power supply method and system for communication equipment are proposed.

[0004] The present application proposes a communication equipment power supply circuit, which is used to power the communication equipment. The communication equipment includes a communication circuit and a processor circuit, including: an input power supply, which is used to input power through an external power supply; a device power supply circuit, which is electrically connected to the input power supply and is used to power the communication circuit and the processor circuit; a capacitor circuit, which is electrically connected to the device power supply circuit and is used to power the communication circuit and the processor circuit through the device power supply circuit and charge through the device power supply circuit; a charge and discharge control circuit, which is electrically connected to the input power supply and the capacitor circuit, respectively, and is used to power the communication circuit and the processor circuit through a first step-down unit when the input power supply is powered, and to power through the capacitor circuit when the input power supply is not powered.

[0005] The beneficial effects of the present invention through the above scheme are: Through the control circuit, boost discharge is enabled only when the meter end is powered off, avoiding voltage competition during charging, extending the service life of the supercapacitor, and improving the charging efficiency; through step-down charging, the problem of excessive initial charging current is reduced, avoiding the heat and heat dissipation caused by large current, simplifying the PCB design, and requiring no special heat dissipation treatment.

[0006] Preferably, the power supply circuit of the device includes: a first step-down unit, electrically connected to the input power supply, for stepping down the input power supply and supplying power to the communication circuit at the same time; a second step-down unit, electrically connected to the first step-down unit, for stepping down the voltage again after being stepped down by the first step-down unit and supplying power to the processor circuit at the same time. The beneficial effect is that through two-stage step-down, the power supply voltage of different circuit modules can be flexibly adjusted to reduce power consumption and avoid damage caused by directly supplying high voltage to the low-voltage circuit. The communication circuit and the processor circuit are powered respectively, thereby improving the independence and flexibility of the power supply system and being suitable for power supply design in various scenarios.

[0007] Preferably, the capacitor circuit includes: a third step-down unit, electrically connected to the second step-down unit, for stepping down the voltage of the second step-down unit again after stepping down; a capacitor charging and discharging circuit, electrically connected to the charging and discharging control circuit and the third step-down unit respectively, and the capacitor charging and discharging circuit is charged by the third step-down unit; a boost unit, electrically connected to the capacitor charging and discharging circuit, the second step-down unit and the communication circuit respectively, for boosting the voltage when the capacitor charging and discharging circuit is discharged to power the communication circuit and the processor circuit, and the beneficial effect is that when the main power supply is powered off, the capacitor discharges and increases the voltage through the boost unit, and can continue to power the communication circuit and the processor, avoiding the system from stopping operation due to power interruption; through multi-stage step-down and capacitor energy storage, when the capacitor does not need to discharge, the system only needs to be powered from the main power supply, and the capacitor remains in a charged state. When the power is off, the capacitor is discharged. This design improves the energy utilization efficiency of the system.

[0008] Preferably, the first buck unit includes a first buck conversion chip, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, a first inductor, and a first diode; the input pin of the buck conversion chip is electrically connected to one end of the input power supply, the first capacitor, the second capacitor, and the second resistor, respectively; the enable pin of the buck conversion chip is electrically connected to one end of the second resistor and the first resistor, respectively; the other end of the first resistor is electrically connected to the other end of the first capacitor and the second capacitor and is grounded; the soft start pin of the buck conversion chip is grounded through the third capacitor; the bootstrap pin of the buck conversion chip is electrically connected to the switch node pin of the buck conversion chip through the fourth capacitor; the third resistor and the seventh capacitor are connected in series and then connected in parallel with the first inductor; one end of the first inductor is electrically connected to the switch node pin of the buck conversion chip, the other end of the first inductor is electrically connected to the communication circuit, and the connection pin of the buck conversion chip is electrically connected to the switch node pin of the buck conversion chip. The ground pin is electrically connected to the switch node pin of the buck conversion chip through a first diode and is grounded. The sixth capacitor is connected in series with the fourth resistor and the fifth resistor in sequence and then connected in parallel with the fifth capacitor. One end of the fifth capacitor is electrically connected to the compensation pin of the buck conversion chip. The eighth capacitor, the ninth capacitor and the tenth capacitor are respectively connected in parallel with each other. One end of the eighth capacitor is electrically connected to the communication circuit, and the other end of the eighth capacitor is electrically connected to the other end of the fifth capacitor and is grounded at the same time. The voltage detection pin of the buck conversion chip is connected in series with the seventh resistor, the sixth resistor and the communication circuit in sequence, and the voltage detection pin of the buck conversion chip is grounded through the eighth resistor. The beneficial effect is that through the combination of multiple capacitors and resistors, the circuit can effectively reduce the voltage ripple of the input and output and ensure the stability of the output voltage. Through multi-level voltage regulation and feedback control, a flexible and stable voltage output is provided, which effectively improves the efficiency of power management. Through the soft start function and feedback regulation, the safety of the circuit at startup is guaranteed to avoid current overshoot, and the output voltage can be monitored in real time to ensure stable power supply of the system under different load conditions.

[0009] Preferably, the second step-down unit includes a second diode and an eleventh capacitor, and the communication circuit is grounded through the second diode and the eleventh capacitor in turn, and one end of the second diode and the eleventh capacitor to which is connected is electrically connected to the processor circuit. The beneficial effect is that by using the second diode, current interference between the communication circuit and the processor circuit can be effectively prevented, and damage to the circuit caused by current backflow can be avoided, thereby improving the overall reliability of the circuit. The introduction of the eleventh capacitor can reduce ripple and noise in the power supply, thereby providing a smoother and more stable power supply for the communication circuit and the processor circuit, and improving the working stability of the system, especially when the communication circuit and the processor have high requirements on the power supply. Through a simple combination of diodes and capacitors, dual power supply stabilization and protection for the communication circuit and the processor circuit are achieved. Compared with more complex power management circuits, this design effectively simplifies the circuit structure and reduces design and manufacturing costs. The anti-backflow design of the diode and the filtering function of the capacitor enhance the reliability of the entire system under power supply fluctuations and current interference.

[0010] Preferably, the third step-down unit includes a third diode, a ninth resistor, a twelfth capacitor and a tenth resistor, the twelfth capacitor and the tenth resistor are connected in parallel, and the processor circuit is grounded through the third diode, the ninth resistor and the tenth resistor in sequence. The beneficial effect is that the combination of diodes, resistors and capacitors can achieve effective voltage reduction and voltage stabilization, with a simple structure and low cost.

[0011] Preferably, the capacitor charging and discharging circuit includes a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a seventeenth capacitor, an eighteenth capacitor, a nineteenth capacitor, a second inductor, and a fourth diode, and the boost unit includes a boost converter chip, a second inductor, a fourth diode, an eleventh resistor, a twelfth resistor, and a thirteenth resistor; after the thirteenth capacitor and the fourteenth capacitor are connected in parallel, the two ends are electrically connected to the positions where the ninth resistor and the twelfth capacitor are connected respectively and to the ground; the position where the ninth resistor and the twelfth capacitor are connected is electrically connected to the switch node pin of the boost converter chip through the second inductor; the ground pin of the boost converter chip is grounded; The eleventh resistor, the twelfth resistor, and the thirteenth resistor are connected in series in sequence and then connected in parallel with the fifteenth capacitor, the sixteenth capacitor, the seventeenth capacitor, the eighteenth capacitor, and the nineteenth capacitor, respectively, and the two ends after parallel connection are connected to the communication circuit and the ground respectively, wherein the position where the twelfth resistor and the thirteenth resistor are connected is connected to the feedback pin of the boost converter chip, the switch node pin of the boost converter chip is electrically connected to the communication circuit through the fourth diode, and the communication circuit is electrically connected to the compensation pin of the boost converter chip, and the beneficial effect is that the control of the boost converter chip, combined with the filtering and feedback of multiple resistors and capacitors, realizes a stable voltage output. It effectively avoids current reflux, and ensures that the communication circuit and the processor circuit can obtain stable power supply under different working conditions, thereby improving the reliability and power management efficiency of the entire system.

[0012] Preferably, the charge and discharge control circuit includes a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, and a transistor. The input power supply is connected to the ground through the fourteenth resistor and the fifteenth resistor. The position where the fourteenth resistor and the fifteenth resistor are connected is connected to the first pin of the transistor. The second pin of the transistor is grounded. The third pin of the transistor is electrically connected to the enable pin of the boost converter chip. The third pin of the transistor is also electrically connected to the communication circuit through the sixteenth resistor. The beneficial effect is that the enable pin of the boost converter is controlled by the transistor and the resistor network, thereby automatically managing the start and stop of the circuit, improving the safety and stability of the circuit, ensuring the reliable power supply of the communication circuit, and improving the energy efficiency of the system while simplifying the circuit design.

[0013] Preferably, in some embodiments, a power supply method for a power supply circuit of a communication device is also proposed, which is used to use the circuit as described in the above embodiments, including: input power is input through an external power supply; the communication circuit and the processor circuit are powered by the device power supply circuit; the capacitor circuit powers the communication circuit and the processor circuit through the device power supply circuit and charges through the device power supply circuit; through the charge and discharge control circuit, when the input power is powered, the communication circuit and the processor circuit are powered through the first step-down unit, and when the input power is not powered, the capacitor circuit is powered.

[0014] Preferably, in some embodiments, a communication device power supply system is also proposed, wherein the communication device includes a communication circuit and a processor circuit, including an input power supply, a device power supply circuit, a capacitor circuit, and a charge and discharge control circuit; Input power, used for power input through an external power supply; The equipment power supply circuit is electrically connected to the input power supply and is used to supply power to the communication circuit and the processor circuit; a capacitor circuit, electrically connected to the device power supply circuit, for supplying power to the communication circuit and the processor circuit through the device power supply circuit and for charging through the device power supply circuit; The charge and discharge control circuit is electrically connected to the input power supply and the capacitor circuit respectively, and is used to supply power to the communication circuit and the processor circuit through the first step-down unit when the input power supply is powered, and to supply power through the capacitor circuit when the input power supply is not powered. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a schematic diagram of the block diagram structure of the present invention; Figure 2 It is a schematic diagram of the circuit structure of the present invention; Figure 3 It is a schematic diagram of the circuit structure of the first step-down unit of the present invention; Figure 4 It is a circuit structure schematic diagram of a capacitor charging and discharging circuit of the present invention; Figure 5 It is a schematic diagram of the circuit structure of the charge and discharge control circuit of the present invention; Figure 6 is a schematic diagram of the circuit structure of the third step-down unit of the present invention; Figure 7 is a schematic diagram of the circuit structure of the second step-down unit of the present invention; Figure 8 It is a schematic diagram of the circuit structure of the prior art of the present invention; Fig. 9 It is a schematic diagram of the prior art structure of the present invention.

[0016] Reference numerals: 1. Input power supply; 2. Equipment power supply circuit; 21. First step-down unit; 22. Second step-down unit; 3. Capacitor circuit; 31. Boost unit; 32. Capacitor charge and discharge circuit; 33. Third step-down unit; 4. Charge and discharge control circuit; 5. Communication circuit; 6. Processor circuit. DETAILED DESCRIPTION

[0017] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. Unless otherwise defined, the technical terms or scientific terms used herein should be understood by people with general skills in the field to which the present invention belongs. "Including" and similar words used in this article mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0018] Combination Figure 8 and Fig. 9 At present, the power failure alarm circuit of public network communication products needs power supply equipment to maintain external communication, especially after the power of the meter is off, the super capacitor supports the public network module to complete the relevant event reporting. The power supply circuit of the current communication equipment adopts a three-super capacitor series scheme charged with 12V~15V. During the power-on period of the meter, the super capacitor voltage and the meter end 12V compete to supply power to the public network communication module. However, it has many defects: (1) Directly charge the three supercapacitors in series by limiting the voltage / current by 12V / 15V at the meter end. Due to the large voltage difference and initial charging current, the current limiting circuit needs to pay special attention to heat dissipation. (2) In order to avoid leakage and damage caused by uneven charging voltage distribution, the three supercapacitors connected in series need to add an additional voltage equalization circuit, which increases the circuit cost.

[0019] (3) Due to the lack of relevant control circuits, the supercapacitor is charging while discharging and competing with the voltage provided by the meter. Charging and discharging at the same time seriously affects the utilization rate and service life of the supercapacitor.

[0020] Based on the above defects, this application proposes a communication equipment power supply circuit 2, combined with the attached Figure 1 and Figure 2, used for powering a communication device, the communication device includes a communication circuit 5 and a processor circuit 6, including: an input power supply 1, used for power input through an external power supply; a device power supply circuit 2, electrically connected to the input power supply 1, used for powering the communication circuit 5 and the processor circuit 6; a capacitor circuit 3, electrically connected to the device power supply circuit, used to power the communication circuit 5 and the processor circuit 6 through the device power supply circuit 2 and charge through the device power supply circuit 2; a charge and discharge control circuit 4, electrically connected to the input power supply 1 and the capacitor circuit 3, respectively, used to power the communication circuit 5 and the processor circuit 6 through the first step-down unit 21 when the input power supply 1 is powered, and to power through the capacitor circuit 3 when the input power supply 1 is not powered.

[0021] In some specific embodiments, Figure 1 and Figure 2 The device power supply circuit 2 includes: a first step-down unit 21, which is electrically connected to the input power supply 1, and is used to step down the input power supply 1 and power the communication circuit 5 at the same time; a second step-down unit 22, which is electrically connected to the first step-down unit 21, and is used to step down the voltage after the first step-down unit 21 steps down the voltage again, and power the processor circuit 6 at the same time.

[0022] In some specific embodiments, the capacitor circuit 3 includes: a third step-down unit 33, which is electrically connected to the second step-down unit 22, and is used to further step down the voltage after the second step-down unit 22 has stepped down the voltage; a capacitor charging and discharging circuit 32, which is electrically connected to the charging and discharging control circuit 4 and the third step-down unit 33, respectively, and the capacitor charging and discharging circuit is charged through the third step-down unit 33; a boost unit 31, which is electrically connected to the capacitor charging and discharging circuit 32, the second step-down unit 22 and the communication circuit 5, respectively, and is used to boost the voltage when the capacitor charging and discharging circuit 32 is discharged to power the communication circuit 5 and the processor circuit 6.

[0023] Specifically, the working principle is as follows: (1) Input power stage The input power supply 1 supplies power to the system through an external power supply. The input power supply can be 12V-15V or other suitable voltages and is directly electrically connected to the device power supply circuit 2; The input power source provides power to the communication circuit 5 and the processor circuit 6 when power is supplied, and at the same time charges the energy storage capacitor through the capacitor circuit 3 for use after power failure.

[0024] (2) Voltage reduction process of device power supply circuit 2 The first step-down unit 21: When the input power supply is supplied, the first step-down unit reduces the high voltage of the input power supply to a voltage suitable for the communication circuit 5 to work, such as 3.8V-4V. The stepped-down voltage directly supplies power to the communication circuit to ensure its normal operation.

[0025] Second step-down unit 22: The voltage output by the first step-down unit 21 is further stepped down by the second step-down unit 22 and provided to the processor circuit 6. This is because the processor circuit usually requires a lower operating voltage, such as 3.1V-3.3V. The second step-down unit is responsible for this additional step to ensure that the processor obtains the required stable voltage.

[0026] (3) Charging process of capacitor charging and discharging circuit 3 The third step-down unit 33 is connected to the second step-down unit 22, and is used to step down the voltage of the second step-down unit 22 to about 2.5V again when the power supply is normal, and provide it to the capacitor charging and discharging circuit 32, and charge the capacitor through the capacitor charging and discharging circuit 32; Capacitor charging and discharging circuit 32: When the input power supply is working normally, the capacitor charging and discharging circuit 32 is responsible for charging the capacitor and storing the electric energy in the capacitor to prepare for the subsequent possible power outage scenario.

[0027] (4) Capacitor discharge and voltage boost process after power failure When the input power supply 1 is disconnected or fails, the system cannot obtain power from the external power supply and the system enters the capacitor power supply mode.

[0028] Capacitor discharge: The capacitor in the capacitor charge and discharge circuit 32 begins to discharge, and the low voltage (usually about 2.5V) stored in the capacitor is boosted to a voltage level suitable for power supply through the boost unit 31 .

[0029] Boosting unit 31: The boosting unit 31 is connected to the capacitor charging and discharging circuit 32, the second step-down unit 22 and the communication circuit 5. It boosts the low voltage of the capacitor to a working voltage suitable for the communication circuit 5, such as 3.8V-4V, and steps it down to the working voltage of the processor circuit 6, such as 3.1V-3.3V, through the second step-down unit 22. At this time, the boosted voltage is supplied to the communication circuit 5 and the processor circuit 6, ensuring that the system can still operate normally in a short time without input power.

[0030] (5) Charge and discharge control circuit 4 The control circuit is responsible for switching the power source. When the input power source 1 works normally, the charge and discharge control circuit enables the system to be powered by the input power source 1 and charges the capacitor; When the input power source 1 stops supplying power, the charge and discharge control circuit will switch to the capacitor discharge mode, and provide the system with a boosted stable power supply through the boost unit 31; (6) System working logic: When there is an external power supply: the input power supply 1 supplies power to the communication circuit 5 and the processor circuit 6 respectively through the first step-down unit 21 and the second step-down unit 22, and charges the capacitor through the third step-down unit 33 for use when the power is off; When there is no external power supply: When the input power supply 1 is powered off, the charge and discharge control circuit 4 automatically switches to the capacitor discharge mode, and the capacitor boosts the stored energy through the boost unit 31 to continue to power the communication circuit 5 and the processor circuit 6, ensuring the normal operation of the system in a short period of time.

[0031] (7) Beneficial effects: Continuous power supply: Through the design of energy storage capacitors and boost units, even if the input power is cut off, the system can still rely on capacitor discharge to maintain power supply, ensuring uninterrupted operation of critical tasks; Efficient power management: The design uses a multi-stage buck and boost mechanism to provide precise power supply according to the different voltage requirements of the communication circuit and processor circuit, reducing energy waste; Simplified design and protection circuit: Through the charge and discharge control circuit, the system can automatically switch the power source under different power supply conditions, reducing the dependence on complex power management chips while providing good protection and stability.

[0032] In some specific embodiments, Figure 3The first buck unit 21 includes a buck converter chip GU22, a first resistor GR106, a second resistor GR23, a third resistor GR17, a fourth resistor GR108, a fifth resistor GR109, a sixth resistor GR110, a seventh resistor GR111, an eighth resistor GR112, a first capacitor GE3, a second capacitor GC65, a third capacitor GC66, a fourth capacitor GC49, a fifth capacitor GC54, a sixth capacitor GC55, a seventh capacitor GC27, an eighth capacitor GC50, a ninth capacitor GC51, a tenth capacitor GC59, a first inductor GL2, and a first diode GD7; the input pin VIN of the buck converter chip GU22 is divided into The first capacitor GE3 and the second capacitor GC65 are electrically connected to one end of the input power supply 1, the first capacitor GE3, the second capacitor GC65, and the second resistor GR23, respectively; the enable pin EN of the buck converter chip GU22 is electrically connected to one end of the second resistor GR23 and the first resistor GR106, respectively; the other end of the first resistor GR106 is electrically connected to the other end of the first capacitor GE3 and the second capacitor GC65, respectively, and is grounded GND; the soft start pin SS of the buck converter chip GU22 is grounded GND through the third capacitor GC66; the bootstrap pin BOOT of the buck converter chip GU22 is electrically connected to the switch node pin PH of the buck converter chip GU22 through the fourth capacitor GC49. The third resistor GR17 and the seventh capacitor GC27 are connected in series and then connected in parallel with the first inductor GL2. One end of the first inductor GL2 is electrically connected to the switch node pin PH of the buck converter chip GU22. The other end of the first inductor GL2 is electrically connected to the communication circuit 5 (VDD). The ground GND pin GND of the buck converter chip GU22 is electrically connected to the switch node pin PH of the buck converter chip GU22 through the first diode GD7 and the ground pin GND is grounded. The sixth capacitor GC55 is connected in series with the fourth resistor GR108 and the fifth resistor GR109 in sequence and then connected in parallel with the fifth capacitor GC54. The fifth capacitor One end of GC54 is electrically connected to the compensation pin COMP of the buck converter chip GU22, the eighth capacitor GC50, the ninth capacitor GC51 and the tenth capacitor GC59 are respectively connected in parallel to each other, one end of the eighth capacitor GC50 is electrically connected to the communication circuit 5, the other end of the eighth capacitor GC50 is electrically connected to the other end of the fifth capacitor GC54 and is grounded GND at the same time; the voltage detection pin VSNS of the buck converter chip GU22 is connected in series through the seventh resistor GR111, the sixth resistor GR110 and the communication circuit 5 in sequence, and the voltage detection pin VSNS of the buck converter chip GU22 is grounded GND through the eighth resistor GR112.

[0033] Specifically: Buck converter chip GU22: core control unit, executes buck conversion logic, adjusts switching frequency and working mode to ensure output voltage stability; first resistor GR106: connected to the input and enable pins of the buck converter chip, sets the start condition and working state, and affects power consumption and response time; second resistor GR23: used to adjust the enable signal of the buck converter chip to help control the start and stop state; third resistor GR17: connected in series with the inductor to adjust the way current flows through the inductor, affecting the stability of the output current; fourth resistor GR108, fifth resistor GR109: help divide the voltage and set the reference voltage of the buck converter chip, affecting the overall performance of the circuit; eighth resistor GR112: adjust the output feedback signal to ensure that the voltage remains near the set value; seventh resistor GR111, sixth resistor GR110: used for voltage detection path, help monitor and feedback system voltage, and maintain stability; The first capacitor GE3: used for filtering, smoothing the input voltage, and reducing high-frequency noise; the second capacitor GC65 and the third capacitor GC66: store energy and smooth the output to reduce output voltage fluctuations; the fourth capacitor GC49: connected to the bootstrap pin BOOT of the buck converter chip to help start the chip and improve work efficiency; the fifth capacitor GC54: connected to the compensation pin to ensure the stability of the feedback voltage; the sixth capacitor GC55 and the seventh capacitor GC27: participate in filtering to further smooth the output of the circuit; the eighth capacitor GC50, the ninth capacitor GC51, and the tenth capacitor GC59: used for signal coupling and output smoothing to ensure the stability of the communication circuit; the first inductor GL2: as an energy storage element, it stabilizes the output voltage when the current changes and supports the buck process; the first diode GD7: protects the buck converter chip to prevent damage from reverse current and improves the reliability of the circuit. +12V / +15V represents the input power supply.

[0034] In some specific embodiments, Figure 7 The second step-down unit 22 includes a second diode GD8 and an eleventh capacitor GC23. The communication circuit 5 is connected to the ground GND through the second diode GD8 and the eleventh capacitor GC23 in sequence. One end of the second diode GD8 and the eleventh capacitor GC23 is electrically connected to the processor circuit 6 (+3.3V in the figure).

[0035] Specifically: The second diode GD8: This diode ensures that the current flows in one direction, thereby protecting the downstream circuit (such as the processor circuit 6) from the influence of reverse current. It plays an isolation role in the step-down process to prevent the reverse current caused by load changes from damaging the system. The eleventh capacitor GC23: It is used for smoothing and filtering, storing electrical energy and reducing the fluctuation of the output voltage, ensuring the stable power supply to the processor circuit 6 (+3.3V in the figure). It can respond quickly when the load changes and provide additional current.

[0036] In some specific embodiments, Figure 6 The third step-down unit 33 includes a third diode GD10, a ninth resistor GR37, a twelfth capacitor GE4 and a tenth resistor R262. The twelfth capacitor GE4 and the tenth resistor R262 are connected in parallel. The processor circuit 6 is connected to the ground GND through the third diode GD10, the ninth resistor GR37 and the tenth resistor R262 in sequence.

[0037] Specifically, the third diode GD10: similar to the second diode GD8, GD10 ensures unidirectional flow of current and protects subsequent circuits from reverse current, which helps to maintain the safety and stability of the circuit. The ninth resistor GR37: used to limit the current flowing through the processor circuit 6, participate in voltage division, and help control the voltage feedback signal. The tenth resistor R262: connected in parallel with the twelfth capacitor GE4, adjusts the circuit time constant, affects filtering and response speed, and its existence can help improve the stability of the circuit. The twelfth capacitor GE4: used to store electrical energy and filter, smooth power supply output, reduce voltage fluctuations, and ensure stable power supply to the processor circuit 6. When the current changes, it can quickly release or absorb electrical energy to maintain a stable working environment, and then provide the stepped-down voltage to the supercapacitor.

[0038] In some specific embodiments, Figure 4The capacitor charging and discharging circuit 32 includes a thirteenth capacitor CR1, a fourteenth capacitor CR2, a fifteenth capacitor CR3, a sixteenth capacitor CR4, a seventeenth capacitor CR5, an eighteenth capacitor CR6, and a nineteenth capacitor CR7. The boost unit 31 includes a boost converter chip UR1, a second inductor LR1, a fourth diode DR1, an eleventh resistor GR1, a twelfth resistor GR2, and a thirteenth resistor GR3; after the thirteenth capacitor CR1 and the fourteenth capacitor CR2 are connected in parallel, the two ends are electrically connected to the positions where the ninth resistor GR37 and the twelfth capacitor GE4 are connected and to the ground GND respectively; the position where the ninth resistor GR37 and the twelfth capacitor GE4 are connected is electrically connected to the switch node pin SW of the boost converter chip UR1 through the second inductor LR1. ; The ground GND pin GND of the boost converter chip UR1 is connected to the ground GND; the eleventh resistor GR1, the twelfth resistor GR2, and the thirteenth resistor GR3 are connected in series in sequence and are respectively connected in parallel with the fifteenth capacitor CR3, the sixteenth capacitor CR4, the seventeenth capacitor CR5, the eighteenth capacitor CR6, and the nineteenth capacitor CR7, and the two ends after parallel connection are respectively connected to the communication circuit 5 and the ground GND, wherein the position where the twelfth resistor GR2 and the thirteenth resistor GR3 are connected is connected to the feedback pin FB of the boost converter chip UR1, the switch node pin SW of the boost converter chip UR1 is electrically connected to the communication circuit 5 through the fourth diode DR1, and the communication circuit 5 is electrically connected to the voltage detection pin VS of the boost converter chip UR1.

[0039] Specifically, CR1 is a supercapacitor element, which is used to store electrical energy when the circuit loses power and provide power for subsequent boost operations. EN control signal: Through the control circuit (the transistor and other circuits mentioned above), the EN signal determines whether to activate the boost circuit; CR2, CR3, CR4, CR5, CR6, CR8: These capacitors are connected in parallel with the output to filter and stabilize the output voltage. They ensure that the boosted voltage is stable and avoid output fluctuations or noise. VDD output: The final output boost voltage is used to supply the communication module 5 that needs power.

[0040] Boost circuit (UR1, LR1, DR1): UR1 (boost and buck converter chip): This chip is responsible for performing the boost operation; EN pin: determines whether to enable the boost function through the enable signal (EN); SW (switch) pin: together with external components (inductor LR1 and diode DR1) form a boost circuit; FB (Feedback) pin: used to detect the output voltage and ensure that the voltage is stable at the set value by setting the GR1, GR2 and GR3 parameters; Second inductor LR1: During the voltage boost process, the inductor is responsible for storing and releasing energy to achieve voltage boost; The fourth diode DR1: The diode prevents current backflow and ensures that the current in the capacitor only flows to the output and does not flow back to the input part.

[0041] When the meter loses power, the EN signal is enabled, and the UR1 chip starts to work, boosting the energy stored in the supercapacitor CR1 to the required output voltage (VDD) through the inductor LR1 and the diode DR1.

[0042] In some specific embodiments, Figure 5 The charge and discharge control circuit 4 includes a fourteenth resistor R41, a fifteenth resistor R51, a sixteenth resistor R55, and a transistor Q5. The input power supply 1 is connected to the ground GND through the fourteenth resistor R41 and the fifteenth resistor R51. The position where the fourteenth resistor R41 and the fifteenth resistor R51 are connected is connected to the first pin B of the transistor Q5. The second pin E of the transistor Q5 is connected to the ground GND. The third pin of the transistor Q5 is electrically connected to the enable pin EN of the boost converter chip UR1. The third pin C of the transistor Q5 is also electrically connected to the communication circuit 5 through the sixteenth resistor R55.

[0043] Specifically, transistor Q5 is used to control whether the supercapacitor performs boost discharge; The fourteenth resistor R41 and the fifteenth resistor R51 connected to the base of the transistor Q5 form a voltage divider circuit, which determines the switching state of the transistor Q5; EN (enable terminal): controlled by voltage, the voltage at the meter terminal is detected to determine whether to turn on the boost mode. When the meter terminal loses power, transistor Q5 is cut off, EN is enabled, and the supercapacitor boosts and discharges, otherwise it is turned off; The second pin (E) of transistor Q5 is grounded GND: this is the emitter of the transistor, providing a return path for current to ensure normal operation of the circuit.

[0044] In some specific embodiments, a power supply method for a communication device power supply circuit 2 is used for using the circuit as described in the above embodiments, including: input power 1 is input through an external power supply; the communication circuit 5 and the processor circuit 6 are powered through the device power supply circuit 2; the capacitor circuit 3 powers the communication circuit 5 and the processor circuit 6 through the device power supply circuit 2 and charges through the device power supply circuit 2; through the charge and discharge control circuit 4, when the input power supply 1 is powered, the communication circuit 5 and the processor circuit 6 are powered through the first step-down unit 21, and when the input power supply 1 is not powered, the capacitor circuit 3 is used to power them.

[0045] In some specific embodiments, a communication device power supply system, the communication device includes a communication circuit 5 and a processor circuit 6, including an input power supply 1, a device power supply circuit 2, a capacitor circuit 3, and a charge and discharge control circuit 4; Input power 1, used for power input through an external power supply; The device power supply circuit 2 is electrically connected to the input power supply 1 and is used to supply power to the communication circuit 5 and the processor circuit 6; The capacitor circuit 3 is electrically connected to the device power supply circuit, and is used to supply power to the communication circuit 5 and the processor circuit 6 through the device power supply circuit 2 and to charge through the device power supply circuit 2; The charge and discharge control circuit 4 is electrically connected to the input power supply 1 and the capacitor circuit 3 respectively, and is used to power the communication circuit 5 and the processor circuit 6 through the first step-down unit 21 when the input power supply 1 is powered, and to power through the capacitor circuit 3 when the input power supply 1 is not powered.

[0046] Although the embodiments of the present invention are described in detail above, it is obvious to those skilled in the art that various modifications and variations can be made to these embodiments. However, it should be understood that such modifications and variations are within the scope and spirit of the present invention as described in the claims. Moreover, the present invention described herein may have other embodiments and may be implemented or realized in a variety of ways.

Claims

1. A communication equipment power supply circuit, used for powering a communication equipment, the communication equipment comprising a communication circuit and a processor circuit, characterized in that: include: Input power, used for power input through an external power supply; The equipment power supply circuit is electrically connected to the input power supply and is used to supply power to the communication circuit and the processor circuit; a capacitor circuit, electrically connected to the device power supply circuit, for supplying power to the communication circuit and the processor circuit through the device power supply circuit and for charging through the device power supply circuit; The charge and discharge control circuit is electrically connected to the input power supply and the capacitor circuit respectively, and is used to supply power to the communication circuit and the processor circuit through the first step-down unit when the input power supply is powered, and to supply power through the capacitor circuit when the input power supply is not powered.

2. The circuit according to claim 1, characterized in that The equipment power supply circuit comprises: A first step-down unit is electrically connected to the input power supply and is used to step down the input power supply and supply power to the communication circuit at the same time; The second step-down unit is electrically connected to the first step-down unit, and is used to further step down the voltage after being stepped down by the first step-down unit, and to supply power to the processor circuit at the same time.

3. The circuit according to claim 1, characterized in that The capacitor circuit comprises: A third step-down unit is electrically connected to the second step-down unit and is used to further step down the voltage after the voltage is stepped down by the second step-down unit; A capacitor charging and discharging circuit is electrically connected to the charging and discharging control circuit and the third step-down unit respectively, and the capacitor charging and discharging circuit is charged through the third step-down unit; The boost unit is electrically connected to the capacitor charging and discharging circuit, the second buck unit and the communication circuit respectively, and is used to boost the voltage when the capacitor charging and discharging circuit is discharging to supply power to the communication circuit and the processor circuit.

4. The circuit according to claim 2, characterized in that The first step-down unit includes a first step-down conversion chip, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, a first inductor, and a first diode; The input pins of the buck converter chip are electrically connected to the input power supply, the first capacitor, the second capacitor, and one end of the second resistor, respectively; the enable pins of the buck converter chip are electrically connected to one end of the second resistor and the first resistor, respectively; the other end of the first resistor is electrically connected to the other end of the first capacitor and the second capacitor, respectively, and is grounded; The soft start pin of the buck converter chip is grounded via a third capacitor; The bootstrap pin of the buck converter chip is electrically connected to the switch node pin of the buck converter chip through the fourth capacitor, the third resistor and the seventh capacitor are connected in series and then connected in parallel with the first inductor, one end of the first inductor is electrically connected to the switch node pin of the buck converter chip, and the other end of the first inductor is electrically connected to the communication circuit, the ground pin of the buck converter chip is electrically connected to the switch node pin of the buck converter chip through the first diode and the ground pin is grounded, the sixth capacitor is connected in series with the fourth resistor and the fifth resistor in sequence and then connected in parallel with the fifth capacitor, one end of the fifth capacitor is electrically connected to the compensation pin of the buck converter chip, the eighth capacitor, the ninth capacitor and the tenth capacitor are respectively connected in parallel with each other, one end of the eighth capacitor is electrically connected to the communication circuit, and the other end of the eighth capacitor is electrically connected to the other end of the fifth capacitor and grounded at the same time; The voltage detection pin of the buck converter chip is connected in series through the seventh resistor, the sixth resistor and the communication circuit in sequence, and the voltage detection pin of the buck converter chip is grounded through the eighth resistor.

5. The circuit according to claim 2, characterized in that The second step-down unit includes a second diode and an eleventh capacitor. The communication circuit is grounded via the second diode and the eleventh capacitor in sequence. One end where the second diode and the eleventh capacitor are connected is electrically connected to the processor circuit.

6. The circuit according to claim 3, characterized in that The third step-down unit includes a third diode, a ninth resistor, a twelfth capacitor and a tenth resistor. The twelfth capacitor and the tenth resistor are connected in parallel. The processor circuit is grounded through the third diode, the ninth resistor and the tenth resistor in sequence.

7. The circuit according to claim 6, characterized in that The capacitor charging and discharging circuit includes a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a seventeenth capacitor, an eighteenth capacitor, and a nineteenth capacitor, and the boost unit includes a boost converter chip, a second inductor, a fourth diode, an eleventh resistor, a twelfth resistor, and a thirteenth resistor; After the thirteenth capacitor and the fourteenth capacitor are connected in parallel, both ends are electrically connected to the positions where the ninth resistor and the twelfth capacitor are connected and to the ground respectively; The position where the ninth resistor and the twelfth capacitor are connected is electrically connected to the switch node pin of the boost converter chip through the second inductor; The ground pin of the boost converter chip is grounded; The eleventh resistor, the twelfth resistor and the thirteenth resistor are connected in series in sequence and are respectively connected in parallel with the fifteenth capacitor, the sixteenth capacitor, the seventeenth capacitor, the eighteenth capacitor and the nineteenth capacitor, and both ends after parallel connection are respectively connected to the communication circuit and the ground, wherein the position where the twelfth resistor and the thirteenth resistor are connected is connected to the feedback pin of the boost converter chip, the switch node pin of the boost converter chip is electrically connected to the communication circuit through the fourth diode, and the communication circuit is electrically connected to the compensation pin of the boost converter chip.

8. The circuit according to claim 7, characterized in that The charge and discharge control circuit includes a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, and a transistor. The input power supply is connected to the ground through the fourteenth resistor and the fifteenth resistor. The position where the fourteenth resistor and the fifteenth resistor are connected is connected to the first pin of the transistor. The second pin of the transistor is grounded. The third pin of the transistor is electrically connected to the enable pin of the boost converter chip. The third pin of the transistor is also electrically connected to the communication circuit through the sixteenth resistor.

9. A method for powering a power supply circuit of a communication device, used for using the circuit according to any one of claims 1 to 8, characterized in that: include: The input power is input through an external power supply; the communication circuit and the processor circuit are powered by the device power supply circuit; the capacitor circuit powers the communication circuit and the processor circuit through the device power supply circuit and is charged through the device power supply circuit; through the charge and discharge control circuit, when the input power is powered, the communication circuit and the processor circuit are powered through the first step-down unit, and when the input power is not powered, the capacitor circuit is powered.

10. A power supply system for a communication device, the communication device comprising a communication circuit and a processor circuit, characterized in that: Including input power supply, equipment power supply circuit, capacitor circuit, charge and discharge control circuit; Input power, used for power input through an external power supply; The equipment power supply circuit is electrically connected to the input power supply and is used to supply power to the communication circuit and the processor circuit; a capacitor circuit, electrically connected to the device power supply circuit, for supplying power to the communication circuit and the processor circuit through the device power supply circuit and for charging through the device power supply circuit; The charge and discharge control circuit is electrically connected to the input power supply and the capacitor circuit respectively, and is used to supply power to the communication circuit and the processor circuit through the first step-down unit when the input power supply is powered, and to supply power through the capacitor circuit when the input power supply is not powered.

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