LED micro-display module and manufacturing method thereof
By using chip processing technology in Micro LED to realize three-dimensional stacking of red, green and blue chips, the problems of huge transfer efficiency and low pixel density are solved, and more efficient display effects and more flexible module splicing are achieved.
Patent Information
- Application Number
- CN202411340170.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-25
- Publication Date
- 2025-02-11
- Estimated Expiration
- 2044-09-25
AI Technical Summary
Micro LEDs have low mass transfer efficiency and low yield, and the horizontal parallel placement of traditional red, green and blue chips leads to a low display pixel density.
The three-dimensional stacking of red, green and blue chips is realized through the chip processing technology, and the blue, green and red chip arrays are embedded and connected by glass substrates and multi-layer SOG glass layers to form a three-dimensional stacked micro-display module.
The display pixel density is improved, efficiency and yield problems during the huge transfer process are avoided, and can be spliced into suitable sizes as needed.
Smart Images

Figure CN119421583A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of LED display and relates to an LED micro display module and a manufacturing method thereof. Technical Background
[0002] Micro LED is a new display technology, in which each pixel is composed of LEDs with a size of several microns or tens of microns. Compared with traditional LCDs and OLEDs, Micro LED has the characteristics of high photoelectric conversion efficiency, high luminous brightness, and fast response speed. It has broad application prospects in VR / AR displays, smart watches, automotive displays, and wearable electronic products. Although Micro LED technology has many advantages, its production capacity, cost, and display quality are still the main factors restricting its widespread commercial use. At present, the main technical route of Micro LED is to use the method of mass transfer, and transfer the red, green, and blue chips to the target substrate separately through transfer methods such as laser mass transfer and graphic stamp mass transfer. However, this transfer method has problems such as low transfer efficiency, low yield, and high transfer cost. On the one hand, to a large extent, this transfer method restricts the industrialization of Micro LED; on the other hand, during mass transfer, the red, green and blue LED chips are generally placed horizontally and in parallel on the substrate. Usually, a red chip, a green chip and a blue chip are required to form a pixel. In addition, because of the need to consider the driving circuit, when the red, green and blue are placed horizontally and in parallel, a certain gap needs to be left between the three chips. Therefore, this chip arrangement method results in the actual display pixel density being only about 1 / 3 of the chip density, which is not conducive to improving the display pixel density. Based on the above reasons, the present invention proposes a micro display module with red, green and blue three-dimensional stacking that does not require mass transfer. Summary of the invention
[0003] In order to improve the display pixel density and solve the problems of low mass transfer efficiency and low yield, the main body of the present invention is to propose a micro display module and a manufacturing method thereof that realizes three-dimensional stacking of red, green and blue chips through chip processing technology.
[0004] In order to achieve the above object, the present invention adopts the following technical solutions:
[0005] The present invention relates to an LED micro display module, comprising a glass substrate, a first SOG glass layer, a blue chip array, a blue chip embedding layer, a second SOG glass layer, a green chip array, a green chip embedding layer, a third SOG glass layer, a red chip array and a red chip embedding layer; the glass substrate, the first SOG glass layer, the blue chip embedding layer, the second SOG glass layer, the green chip embedding layer, the third SOG glass layer and the red chip embedding layer are arranged in sequence from bottom to top; the blue chip array, the green chip array and the red chip array are respectively embedded in the blue chip embedding layer, the green chip embedding layer and the red chip embedding layer, the blue chip array, the green chip array and the red chip array are all composed of N rows and M columns of corresponding chips, and in the vertical direction, the blue chips in the blue chip array, the green chips in the green chip array and the red chips The red light chips in the chip array overlap; the blue light chip N electrode, the green light chip N electrode and the red light chip N electrode are respectively fixed on the N-type layers of the blue light chip, the green light chip and the red light chip, and the three do not overlap in the vertical direction, the blue light chip N electrode is connected to the bottom of the blue light chip N electrode metal column, the green light chip N electrode is connected to the bottom of the green light chip N electrode metal column, the red light chip N electrode is connected to the bottom of the red light chip N electrode metal column, the top of the blue light chip N electrode metal column, the top of the green light chip N electrode metal column and the top of the red light chip N electrode metal column all extend to the upper surface of the LED micro display module; the blue light chip P electrode, the green light chip P electrode and the red light chip P electrode are respectively fixed on the P-type layers of the blue light chip, the green light chip and the red light chip, and the three are all connected to the P electrode metal column, and the top of the P electrode metal column extends to the upper surface of the LED micro display module.
[0006] The blue light chip of the present invention comprises a blue light chip body, a blue light chip P electrode and a blue light chip N electrode, the blue light chip N electrode is fixed at a corner of an N-type layer on the upper part of the blue light chip body, the N-type layer and the multi-quantum well layer at the corner of the blue light chip body are removed to expose the P-type layer, and the blue light chip P electrode B01 is fixed on the exposed blue light chip P-type layer; the green light chip comprises a green light chip body, a green light chip P electrode, a green light chip N electrode and a green light chip P electrode notch, the green light chip N electrode is fixed at a corner of an N-type layer on the upper part of the green light chip body, the N-type layer and the multi-quantum well layer at the corner of the green light chip body are removed to expose the P-type layer The green chip P electrode is fixed on the exposed green chip P-type layer, and a green chip P electrode gap is formed at the outer corner of the green chip P electrode and the lower green chip P-type layer; the red chip body, the red chip P electrode, the red chip N electrode and the red chip P electrode gap, the red light chip N electrode is fixed at a corner of the upper N-type layer of the red light chip body, the N-type layer and the multi-quantum well layer at a corner of the red light chip body are removed to expose the P-type layer, the red light chip P electrode is fixed on the exposed red light chip P-type layer, and a red light chip P electrode gap is formed at the outer corner of the red light chip P electrode and the lower red light chip P-type layer.
[0007] The blue light chip N-electrode metal column involved in the present invention comprises a blue light chip N-electrode first metal column, a blue light chip N-electrode second metal column and a blue light chip N-electrode third metal column which are sequentially connected from bottom to top, the blue light chip N-electrode is connected to the bottom of the blue light chip N-electrode first metal column, the blue light chip N-electrode first metal column is embedded in the blue light chip embedding layer, and the top of the blue light chip N-electrode first metal column is flush with the top of the blue light chip embedding layer, the blue light chip N-electrode second metal column is embedded in the second SOG glass layer and the green light chip embedding layer, and the bottom of the blue light chip N-electrode second metal column is flush with the bottom of the second SOG glass layer, the top of the blue light chip N-electrode second metal column is flush with the green light chip embedding layer, the blue light chip N-electrode third metal column is embedded in the third SOG glass layer and the red light chip embedding layer, and the bottom of the blue light chip N-electrode third metal column is flush with the third SOG glass layer, and the top of the blue light chip N-electrode third metal column is flush with the top of the red light chip embedding layer.
[0008] Preferably, blue light, green light and red light absorbing materials are doped into the blue light chip embedding layer, the green light chip embedding layer and the red light chip embedding layer respectively.
[0009] The green light chip N-electrode metal column involved in the present invention comprises a green light chip N-electrode first metal column and a green light chip electrode second metal column connected sequentially from bottom to top, the green light chip N-electrode is connected to the bottom of the green light chip N-electrode first metal column, the green light chip N-electrode first metal column is embedded in the green light chip embedding layer, the top of the green light chip N-electrode first metal column is flush with the top of the green light chip embedding layer, the green light chip electrode second metal column is embedded in the third SOG glass layer and the red light chip embedding layer, the bottom of the green light chip electrode second metal column is flush with the bottom of the third SOG glass layer, and the top of the green light chip electrode second metal column is flush with the top of the red light chip embedding layer.
[0010] The red light chip N electrode metal column involved in the present invention is embedded in the red light chip embedding layer, the red light chip N electrode is connected to the bottom of the red light chip N electrode metal column, and the top of the red light chip N electrode metal column is flush with the red light chip embedding layer.
[0011] The P-electrode metal column involved in the present invention comprises a blue light chip P-electrode metal column, a green light chip P-electrode metal column and a red light chip P-electrode metal column which are sequentially connected from bottom to top; the blue light chip P-electrode is connected to the bottom of the blue light chip P-electrode metal column, the blue light chip P-electrode metal column is embedded in the blue light chip embedding layer, and the top of the blue light chip P-electrode metal column is flush with the top of the blue light chip embedding layer; the green light chip P-electrode metal column is embedded in the second SOG glass layer and the green light chip embedding layer, the bottom and top of the green light chip P-electrode metal column are respectively flush with the bottom of the second SOG glass layer and the top of the green light chip embedding layer, and the green light chip P-electrode is embedded in the step-shaped notch at the bottom of the green light chip P-electrode metal column and connected thereto; the red light chip P-electrode metal column is embedded in the third SOG glass layer and the red light chip embedding layer, the bottom and top of the red light chip P-electrode metal column are respectively flush with the bottom of the third SOG glass layer and the top of the red light chip embedding layer, and the red light chip P-electrode is embedded in the step-shaped notch at the bottom of the red light chip P-electrode metal column and connected thereto.
[0012] The method for preparing the LED micro display module of the present invention specifically comprises the following steps:
[0013] A method for preparing an LED micro display module, characterized in that it specifically comprises the following steps:
[0014] (1) Spin coating liquid glass SOG on a glass substrate, and then laminating a blue light epitaxial wafer grown on a sapphire substrate on the liquid glass SOG, so that the blue epitaxial layer surface is in contact with and laminated to the liquid glass SOG. After laminating, the liquid glass SOG is solidified to form a first SOG glass layer. After solidification, the sapphire substrate is peeled off from the blue light epitaxial wafer;
[0015] (2) Next, the blue light chip epitaxial layer is fabricated into a blue light chip array, wherein the blue light chip array is composed of blue light chips in N rows and M columns, where N and M are positive integers greater than or equal to 1, wherein the blue light chip includes a blue light chip body, a blue light chip P electrode, and a blue light chip N electrode, the N-type layer and the multi-quantum well layer at one corner of the blue light chip body are removed to expose the P-type layer, the blue light chip P electrode is fixed on the exposed blue light chip P-type layer, and the blue light chip N electrode is fixed on the N-type layer at one corner of the blue light chip body;
[0016] (3) Liquid glass SOG is uniformly coated on the gaps between the blue light chip arrays and on the surface of the blue light chip, and then the liquid glass SOG is cured to form a blue light chip embedding layer that embeds the blue light chip array, and the thickness of the blue light chip embedding layer is greater than the thickness of the blue light chip array;
[0017] Then, the upper surface of the blue light chip embedding layer is etched by using a photolithography and etching process, and a first opening of the blue light chip embedding layer and a second opening of the blue light chip embedding layer are formed in the blue light chip embedding layer, the first opening of the blue light chip embedding layer is placed directly above the P electrode of the blue light chip, the second opening of the blue light chip embedding layer is placed directly above the N electrode of the blue light chip, and the P electrode of the blue light chip is exposed at the first opening of the blue light chip embedding layer;
[0018] Next, a blue light chip P electrode metal column connected to the blue light chip P electrode is formed in the first opening of the blue light chip embedding layer, and a blue light chip N electrode first metal column B12 connected to the blue light chip N electrode is formed in the second opening of the blue light chip embedding layer, and the sample surface is ground and polished;
[0019] (4) Next, liquid SOG glass is spin-coated on the surface of the blue chip embedding layer, and then the green light epitaxial wafer grown on the emerald substrate is bonded to the liquid SOG glass, and the P-type surface of the green light epitaxial wafer is bonded to the liquid SOG glass. Next, the liquid SOG glass is solidified to form a second SOG glass layer, and then the emerald substrate on the green light epitaxial wafer is peeled off by laser peeling;
[0020] (5) Next, the green light epitaxial wafer is made into a green light chip array. The green light chip array is composed of N rows and M columns of green light chips. Each green light chip in the green light chip array is opposite to a blue light chip in the blue light chip array. The green light chip G includes a green light chip body, a green light chip P electrode, a green light chip N electrode, a green light chip window, and a green light chip P electrode notch.
[0021] A green chip window and a green chip P electrode notch are respectively opened on the periphery of the green chip body, the green chip window and the green chip P electrode notch penetrate the entire green chip body, the green chip N-type layer and the green multi-quantum well layer near the green chip P electrode notch are removed to expose the P-type layer, the green chip P electrode is fixed on the exposed green chip P-type layer, the green chip P electrode notch is placed directly above the blue chip P electrode metal column, the green chip window is located directly above the first metal column of the blue chip N electrode, and the green chip N electrode G02 is fixed on the upper part of the N-type layer of the green chip body;
[0022] (6) Next, liquid glass SOG is evenly coated in the gaps between the green light chip arrays and on the surface of the green light chip, and then the liquid glass SOG is solidified to form a green light chip embedding layer that embeds the green light chip array. The thickness of the green light chip embedding layer is greater than the thickness of the green light chip array. Then, the upper surface of the green light chip embedding layer is photolithographically and etched to form a first opening of the green light chip embedding layer, a second opening of the green light chip embedding layer, and a third opening of the green light chip embedding layer above each green light chip. The first opening of the green light chip embedding layer is placed directly above the green light chip P electrode and the blue light chip P electrode metal column. The green light chip P electrode and the blue light chip P electrode metal column are exposed at the first opening of the green light chip embedding layer. A connection between the green light chip P electrode and the blue light chip is formed in the first opening of the green light chip embedding layer. The green chip P electrode metal column of the chip P electrode metal column, the second opening of the green chip embedding layer is placed directly above the green chip N electrode G02, the green chip N electrode is exposed at the second opening of the green chip embedding layer, and the green chip N electrode first metal column connected to the green chip N electrode is formed in the second opening of the green chip embedding layer, the third opening of the green chip embedding layer is placed directly above the blue chip N electrode first metal column B12, and partially overlaps with the green chip window opening, the blue chip N electrode first metal column is exposed at the third opening of the green chip embedding layer, and the blue chip N electrode second metal column connected to the blue chip N electrode first metal column is formed in the third opening of the green chip embedding layer, the blue chip N electrode second metal column does not contact the green chip, and then the surface of the green chip embedding layer is flattened;
[0023] (7) Next, liquid SOG glass is spin-coated on the surface of the green chip embedding layer, and the red epitaxial wafer grown on the GaAs substrate is bonded to the liquid SOG glass. After spin coating, the P-type part of the red epitaxial wafer is bonded to the liquid SOG glass, and then the liquid SOG glass is solidified to form a third SOG glass layer. Next, the GaAs substrate of the red epitaxial wafer is removed by wet etching;
[0024] (8) Then, a red light chip array is made. The red light chip array is composed of N rows and M columns of red light chips. Each red light chip in the red light chip array is opposite to a green light chip in the green light chip array. The red light chip R includes a red light chip body, a red light chip P electrode, a red light chip N electrode, a first opening window of the red light chip, a second opening window of the red light chip and a red light chip P electrode gap. The red light chip P electrode gap, the first opening window of the red light chip and the second opening window of the red light chip are respectively opened on the periphery of the red light chip body. The first opening window of the red chip and the second opening window of the red chip run through the entire red chip body, the N-type layer and quantum well layer of the red chip near the notch of the P electrode of the red chip are removed to expose the P-type layer, the P electrode of the red chip is fixed on the exposed P-type layer of the red chip, the notch of the P electrode of the red chip is placed directly above the metal column of the P electrode of the green chip, the first opening window of the red chip is located directly above the second metal column of the N electrode of the blue chip, the second opening window of the red chip is located directly above the first metal column of the N electrode of the green chip, and the N electrode of the red chip is fixed to the upper part of the N-type layer of the red chip body;
[0025] (9) Next, liquid glass SOG is evenly coated on the gaps between the red light chip arrays and on the surfaces of the red light chips, and then the liquid glass SOG is solidified to form a red light chip embedding layer that embeds the red light chip array. The thickness of the red light chip embedding layer is greater than the thickness of the red light chip array. The red light chip embedding layer is then photolithographically processed and etched. Through etching, a first opening of the red light chip embedding layer, a second opening of the red light chip embedding layer, a third opening of the red light chip embedding layer, and a fourth opening of the red light chip embedding layer are formed above each red light chip. The first opening of the red light chip embedding layer exposes the red light chip P electrode and the green light chip P electrode metal column. A red light chip P electrode metal column connecting the red light chip P electrode and the green light chip P electrode metal column is sequentially formed at the first opening of the red light chip embedding layer. The second opening of the red light chip embedding layer partially overlaps with the second window of the red light chip. The second opening of the layer exposes the first metal column of the N electrode of the green light chip, and the second metal column of the green light chip electrode connected to the first metal column of the N electrode of the green light chip is formed in sequence in the second opening of the red light chip buried layer, and the second metal column of the green light chip electrode does not contact the red light chip. The third opening of the red light chip buried layer overlaps with the first window opening of the red light chip, and the third opening of the red light chip buried layer exposes the second metal column of the N electrode of the blue light chip, and the third metal column of the N electrode of the blue light chip connected to the second metal column of the N electrode of the blue light chip is formed in the third opening of the red light chip buried layer, and the third metal column of the N electrode of the blue light chip does not contact the red light chip. The fourth opening of the red light chip buried layer is arranged directly above the N electrode of the red light chip to expose the N electrode of the red light chip, and a metal column of the N electrode of the red light chip connected to the N electrode of the red light chip is formed in the fourth opening of the red light chip buried layer, and then the surface of the red light chip buried layer is ground and polished.
[0026] The present invention aims to solve the problems of low efficiency and low yield of Micro-LED mass transfer and to improve the display pixel density, and proposes a three-dimensional stacked Micro-LED production method. Compared with the prior art, the present invention has the following beneficial effects: 1. Each pixel point is directly produced by chip process, avoiding the mass transfer process; 2. The pixel density can be improved by stacking red, green and blue chips; 3. The array module of the micro display can be spliced into a suitable size according to actual needs when it is used later. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] Figure 1-15 The present invention is a process flow chart of the method for preparing the LED micro display module.
[0028] Fig.16 This is a diagram showing the corresponding relationship between the blue light chip, the green light chip and the red light chip in the LED micro display module of the present invention. DETAILED DESCRIPTION
[0029] In order to make the purpose and technical solution of the present invention more clear, the technical solution of the present invention is further described below in conjunction with the drawings in the embodiments, but the description of the present invention is not limited to the following.
[0030] Example 1
[0031] like Figure 1-15As shown, an LED micro display module involved in the present invention comprises a glass substrate 1, a first SOG glass layer 2, a blue chip array, a blue chip embedding layer 5, a second SOG glass layer 6, a green chip array, a green chip embedding layer 7, a third SOG glass layer 8, a red chip array and a red chip embedding layer 9; the glass substrate 1, the first SOG glass layer 2, the blue chip embedding layer 5, the second SOG glass layer 6, the green chip embedding layer 7, the third SOG glass layer 8 and the red chip embedding layer 9 are arranged in sequence from bottom to top; the blue chip array, the green chip array and the red chip array are respectively embedded in the blue chip embedding layer 5, the green chip embedding layer 7 and the red chip embedding layer 9, the blue chip array, the green chip array and the red chip array are all composed of N rows and M columns of corresponding chips, and in the vertical direction (in the orthographic projection view), the blue chips in the blue chip array, the green chips in the green chip embedding layer 7 and the red chip embedding layer 9 are arranged in sequence from bottom to top. The green light chip in the optical chip array overlaps with the red light chip in the red light chip array; the blue light chip N electrode, the green light chip N electrode and the red light chip N electrode are respectively fixed on the N-type layers of the blue light chip, the green light chip and the red light chip, and the three do not overlap in the vertical direction, the blue light chip N electrode is connected to the bottom of the blue light chip N electrode metal column, the green light chip N electrode is connected to the bottom of the green light chip N electrode metal column, the red light chip N electrode is connected to the bottom of the red light chip N electrode metal column, and the top of the blue light chip N electrode metal column, the top of the green light chip N electrode metal column and the top of the red light chip N electrode metal column all extend to the upper surface of the LED micro display module; the blue light chip P electrode, the green light chip P electrode and the red light chip P electrode are respectively fixed on the P-type layers of the blue light chip, the green light chip and the red light chip, and the three are all connected to the P electrode metal column, and the top of the P electrode metal column extends to the upper surface of the LED micro display module.
[0032] The blue light chip B of the present invention comprises a blue light chip body, a blue light chip P electrode B01 and a blue light chip N electrode B02, wherein the blue light chip N electrode B02 is fixed to a corner of an N-type layer on the upper part of the blue light chip body, the N-type layer and the multi-quantum well layer at the corner of the blue light chip body are removed to expose the P-type layer, and the blue light chip P electrode B01 is fixed on the exposed blue light chip P-type layer; the green light chip G comprises a green light chip body, a green light chip P electrode G01, a green light chip N electrode G02 and a green light chip P electrode notch G04, the green light chip N electrode G02 is fixed to a corner of an N-type layer on the upper part of the green light chip body, the N-type layer and the multi-quantum well layer at the corner of the green light chip body are removed to expose the P-type layer, and the green light chip The chip P electrode G01 is fixed on the exposed green light chip P-type layer, and the green light chip P electrode G01 and the outer corner of the lower green light chip P-type layer form a green light chip P electrode notch G04; the red light chip body, the red light chip P electrode R01, the red light chip N electrode R02 and the red light chip P electrode notch R05, the red light chip N electrode R02 is fixed on a corner of the upper N-type layer of the red light chip body, the N-type layer and the multi-quantum well layer at a corner of the red light chip body are removed to expose the P-type layer, the red light chip P electrode R01 is fixed on the exposed red light chip P-type layer, and the red light chip P electrode R01 and the outer corner of the lower red light chip P-type layer form a red light chip P electrode notch R05.
[0033] The blue light chip N-electrode metal column of the present invention comprises a blue light chip N-electrode first metal column B12, a blue light chip N-electrode second metal column B22 and a blue light chip N-electrode third metal column B32 connected in sequence from bottom to top, the blue light chip N-electrode is connected to the bottom of the blue light chip N-electrode first metal column B12, the blue light chip N-electrode first metal column B12 is embedded in the blue light chip embedding layer 5, and the top of the blue light chip N-electrode first metal column B12 is flush with the top of the blue light chip embedding layer 5, and the blue light chip N-electrode second metal column B22 is embedded in The second SOG glass layer 6 and the green chip embedding layer 7, and the bottom of the second metal column B22 of the blue chip N electrode is flush with the bottom of the second SOG glass layer 6, and the top of the second metal column B22 of the blue chip N electrode is flush with the green chip embedding layer 7. The third metal column B32 of the blue chip N electrode is embedded in the third SOG glass layer 8 and the red chip embedding layer 9, and the bottom of the third metal column B32 of the blue chip N electrode is flush with the third SOG glass layer 8, and the top of the third metal column B32 of the blue chip N electrode is flush with the top of the red chip embedding layer 9. The material of the N electrode of the blue chip, green chip and red chip is Ti / Al / Ni / Au, and the material of the P electrode of the blue chip, green chip and red chip is Ni / Au or Ni / Pd / Au.
[0034] Preferably, blue light, green light and red light absorbing materials are doped into the blue light chip embedding layer, the green light chip embedding layer and the red light chip embedding layer respectively.
[0035] Specifically, the cross-sectional sizes of the blue light chip N electrode, the blue light chip N electrode first metal pillar B12, the blue light chip N electrode second metal pillar B22 and the blue light chip N electrode third metal pillar B32 are the same.
[0036] The green light chip N-electrode metal column involved in the present invention includes a green light chip N-electrode first metal column G12 and a green light chip electrode second metal column G22 connected in sequence from bottom to top, the green light chip N-electrode is connected to the bottom of the green light chip N-electrode first metal column G12, the green light chip N-electrode first metal column G12 is embedded in the green light chip embedding layer 7, the top of the green light chip N-electrode first metal column G12 is flush with the top of the green light chip embedding layer 7, the green light chip electrode second metal column G22 is embedded in the third SOG glass layer 8 and the red light chip embedding layer 9, and the bottom of the green light chip electrode second metal column G22 is flush with the bottom of the third SOG glass layer 8, and the top of the green light chip electrode second metal column G22 is flush with the top of the red light chip embedding layer 9.
[0037] Specifically, the cross-sectional sizes of the green chip N-electrode, the green chip N-electrode first metal pillar G12 and the green chip electrode second metal pillar G22 are the same.
[0038] The red light chip N electrode metal column involved in the present invention is embedded in the red light chip embedding layer 9, the red light chip N electrode is connected to the bottom of the red light chip N electrode metal column, and the top of the red light chip N electrode metal column is flush with the red light chip embedding layer 9.
[0039] Specifically, the cross-sectional sizes of the red light chip N-electrode and the red light chip N-electrode metal column are the same.
[0040] The P-electrode metal column involved in this embodiment includes a blue light chip P-electrode metal column, a green light chip P-electrode metal column and a red light chip P-electrode metal column connected in sequence from bottom to top; the blue light chip P-electrode is connected to the bottom of the blue light chip P-electrode metal column, the blue light chip P-electrode metal column is embedded in the blue light chip embedding layer 5, and the top of the blue light chip P-electrode metal column is flush with the top of the blue light chip embedding layer 5; the green light chip P-electrode metal column is embedded in the second SOG glass layer 6 and the green light chip embedding layer 7, and the bottom and top of the green light chip P-electrode metal column are flush with the top of the blue light chip embedding layer 5. The red light chip P electrode metal column is embedded in the third SOG glass layer 8 and the red light chip embedding layer 9, and the bottom and top of the red light chip P electrode metal column are flush with the bottom of the third SOG glass layer 8 and the top of the red light chip embedding layer 9 respectively, and the red light chip P electrode is embedded in the step-shaped notch at the bottom of the red light chip P electrode metal column and connected to it.
[0041] The method for preparing the LED micro display module of the present invention specifically comprises the following steps:
[0042] (1) If Figure 1 and 2 As shown, liquid glass SOG is spin-coated on a glass substrate 1, and then a blue light epitaxial wafer 3 grown on a sapphire substrate 4 is bonded to the liquid glass SOG, and the P-type surface of the blue epitaxial layer is in contact with and bonded to the liquid glass SOG. After bonding, the liquid glass SOG is solidified to form a first SOG glass layer 2. After solidification, the sapphire substrate 4 is peeled off from the blue light epitaxial wafer 3.
[0043] It should be noted that the liquid glass SOG curing method is to place the sample in a vacuum oven to cure the liquid glass SOG to form a SOG glass layer, and the curing temperature is 100°C-800°C.
[0044] It should be noted that the sapphire substrate 4 is peeled off from the blue light epitaxial wafer 3 by laser lift-off.
[0045] It should be noted that: the blue light epitaxial layer 3 includes a blue light epitaxial wafer P-type layer 301, a blue light multi-quantum well layer and a blue light epitaxial wafer N-type layer 302 arranged in sequence from bottom to top, and the surface of the blue epitaxial layer P-type layer 301 is in contact and bonded to the first SOG glass layer 2.
[0046] (2) If Figure 3 and 4 As shown, next, the blue light chip epitaxial layer 3 is made into a blue light chip array through photolithography, dry etching, magnetron sputtering, annealing and other process methods. The blue light chip array consists of blue light chips in N rows and M columns, N and M are positive integers greater than or equal to 1, wherein the blue light chip B includes a blue light chip body, a blue light chip P electrode B01 and a blue light chip N electrode B02, the N-type layer and the multi-quantum well layer at one corner of the blue light chip body are removed to expose the P-type layer, the blue light chip P electrode B01 is fixed on the exposed blue light chip P-type layer, and the blue light chip N electrode B02 is fixed on the N-type layer at one corner of the blue light chip body,
[0047] The blue light chip P electrode B01 and the blue light chip N electrode B02 form ohmic contacts with P-type GaN and N-type GaN respectively. The material of the N electrode is Ti / Al / Ni / Au, and the material of the P electrode is Ni / Au or Ni / Pd / Au.
[0048] It should be noted that the cross-section of the blue light chip is square, rectangular or other geometric shapes, the cross-section length is 5-500 microns, and the distance between two adjacent blue light chips is 5-500 microns.
[0049] After the sapphire substrate is peeled off by laser, a photoresist is applied on the N-type epitaxial layer 302 of the blue chip, and then the photoresist is exposed using a mask with N rows and M columns of openings, where the openings are exposure areas. The sample is then developed, and the non-exposed areas of the photoresist are removed to expose part of the N-type epitaxial layer 302. Next, the exposed epitaxial layer is completely etched until the first SOG glass 2. After etching, all the photoresist is removed, thereby forming an epitaxial layer array with N rows and M columns.
[0050] Next, photoresist is applied on the top and sides of the epitaxial layer array, and then the photoresist is exposed using a mask. After exposure, the photoresist is developed, and a portion of the epitaxial layer is exposed after development. Then, the exposed epitaxial layer is etched until the P-type epitaxial layer 301 is exposed. Next, the N-type epitaxial layer 302 and the side of the multi-quantum well formed after etching are passivated with SiO2 to form a side protective layer, and finally all photoresists are removed. Next, photoresist is applied to the sample again, and it is exposed, developed and etched until the P-type epitaxial layer 301 is exposed, and then Ni / Au or Ni / Pd / Au is sputtered on the P-type epitaxial layer 301 in sequence, and finally all photoresists are removed. After removing the photoresist, the sample is annealed to form a P electrode B01.
[0051] Next, a photoresist is applied on the top and sides of the epitaxial layer array, and then the photoresist is exposed using a mask. After exposure, the photoresist is developed to expose a portion of the N-type epitaxial layer 302, and then Ti / Al / Ti / Au metals are sputtered on the exposed N-type epitaxial layer 302 in sequence, and then all the photoresist is removed. Finally, the sample is annealed to form an N electrode B02.
[0052] (3) If Figure 5 and 6 As shown, liquid glass SOG is evenly coated in the gaps between the blue light chip arrays and on the surface of the blue light chip, and then the liquid glass SOG is solidified to form a blue light chip embedding layer 5 that embeds the blue light chip array, and the thickness of the blue light chip embedding layer 5 is greater than the thickness of the blue light chip array.
[0053] Then, the upper surface of the blue light chip embedding layer 5 is etched by using photolithography and etching processes, and a first opening of the blue light chip embedding layer and a second opening of the blue light chip embedding layer are formed in the blue light chip embedding layer 5. The first opening of the blue light chip embedding layer is placed directly above the blue light chip P electrode B01, and the second opening of the blue light chip embedding layer is placed directly above the blue light chip N electrode B02. The blue light chip P electrode B01 is exposed at the first opening of the blue light chip embedding layer.
[0054] Next, TiN film and metal tungsten are sequentially deposited in the first opening of the blue light chip embedded layer to form a blue light chip P electrode metal column B11 connected to the blue light chip P electrode B01, and TiN film and metal tungsten are deposited in the second opening of the blue light chip embedded layer to form a blue light chip N electrode first metal column B12 connected to the blue light chip N electrode B02. The cross-sectional sizes of the first opening of the blue light chip embedded layer and the blue light chip P electrode metal column B11 are consistent, and the cross-sectional size of the first opening of the blue light chip embedded layer is slightly smaller than that of the blue light chip P electrode B01. The cross-sectional sizes of the second opening of the blue light chip embedded layer, the blue light chip N electrode first metal column B12 and the blue light chip N electrode B02 are consistent. Next, the sample surface is ground and polished to remove the metal tungsten and TiN on the surface of the blue light chip embedded layer 5 to achieve flatness of the sample surface.
[0055] It should be noted that in order to reduce optical crosstalk between pixels, a blue light absorbing material can be doped into the blue light chip embedding layer 5. The blue light absorbing material can absorb blue light and light with a wavelength smaller than blue light, and the blue light absorbing material can allow light with a wavelength larger than blue light to pass through.
[0056] (4) If Figure 7 As shown, next, liquid glass SOG is spin-coated on the surface of the blue chip embedding layer 5, and then the green light epitaxial wafer grown on the emerald substrate is bonded to the liquid glass SOG, and the P-type surface of the green light epitaxial wafer is bonded to the liquid glass SOG. Next, the liquid glass SOG is solidified to form a second SOG glass layer 6, and then the emerald substrate on the green light epitaxial wafer is peeled off by laser peeling.
[0057] It should be noted that the sapphire epitaxial wafer includes a green epitaxial wafer P-type layer, a green multi-quantum well layer and a green epitaxial wafer N-type layer arranged in sequence from bottom to top, and the green epitaxial wafer P-type layer is bonded to the second SOG glass layer 6 .
[0058] (5) If Figure 8 and 9As shown, next, the green light epitaxial wafer is made into a green light chip array by means of photolithography, etching, metal deposition, annealing, etc. The green light chip array is composed of N rows and M columns of green light optical chips. Each green light chip in the green light chip array is opposite to a blue light chip in the blue light chip array, wherein the green light chip G includes a green light chip body, a green light chip P electrode G01, a green light chip N electrode G02, a green light chip opening window G03 and a green light chip P electrode notch G04. The green light chip opening window G03 and the green light chip P electrode notch G04 are respectively opened on the periphery of the green light chip body, and the green light chip opening window G03 and the green light chip P electrode notch G04 run through the entire green light chip body. , remove the green chip N-type layer and green multi-quantum well layer near the green chip P-electrode notch G04 to expose the P-type layer, fix the green chip P-electrode G01 on the exposed green chip P-type layer, the green chip P-electrode notch G04 is placed directly above the blue chip P-electrode metal column B11 and the cross-sectional size of the green chip P-electrode notch G04 is equal to the cross-sectional size of the blue chip P-electrode metal column B11, the green chip opening window G03 is located directly above the blue chip N-electrode first metal column B12, the cross-sectional size of the green chip opening window G03 is larger than the cross-sectional size of the blue chip N-electrode first metal column B12, and the green chip N-electrode G02 is fixed on the upper part of the N-type layer of the green chip body.
[0059] It should be noted that the material of the green light chip N electrode is Ti / Al / Ni / Au, and the material of the green light chip P electrode is Ni / Au or Ni / Pd / Au.
[0060] (6) If Fig.10 and 11 As shown, next, liquid glass SOG is evenly coated on the gaps between the green chip arrays and on the surfaces of the green chips, and then the liquid glass SOG is solidified to form a green chip embedding layer 7 that embeds the green chip array. The thickness of the green chip embedding layer 7 is greater than the thickness of the green chip array.
[0061] Then, the upper surface of the green chip embedding layer 7 is photolithographically processed and etched to form a first opening of the green chip embedding layer, a second opening of the green chip embedding layer, and a third opening of the green chip embedding layer above each green chip. The first opening of the green chip embedding layer is located directly above the green chip P electrode G01 and the blue chip P electrode metal column B11. The green chip P electrode G01 and the blue chip P electrode metal column B11 are exposed at the first opening of the green chip embedding layer. TiN film and metal tungsten are sequentially deposited in the first opening of the green chip embedding layer to form a green chip P electrode metal column G11 connecting the green chip P electrode G01 and the blue chip P electrode metal column B11. The second opening of the green chip embedding layer is located directly above the green chip N electrode G02. The cross-sectional size of the second opening of the green chip embedded layer is equal to the cross-sectional size of the green chip N electrode G02. The green chip N electrode G02 is exposed at the second opening of the green chip embedded layer. TiN film and metal tungsten are sequentially deposited in the second opening of the green chip embedded layer to form the green chip N electrode first metal column G12 connected to the green chip N electrode G02. The third opening of the green chip embedded layer is placed directly above the blue chip N electrode first metal column B12, partially overlapping with the green chip window G03, and the cross-sectional size of the third opening of the green chip embedded layer is equal to the cross-sectional size of the blue chip N electrode first metal column B12. The surface size is smaller than the cross-sectional size of the green chip opening window G03, the first metal column B12 of the blue chip N electrode is exposed at the third opening of the green chip embedding layer, and TiN film and metal tungsten are deposited in sequence in the third opening of the green chip embedding layer to form a second metal column B22 (or G13) of the blue chip N electrode connected to the first metal column B12 of the blue chip N electrode, and the second metal column B22 of the blue chip N electrode does not contact the green chip, and then, the metal tungsten and TiN film on the surface of the green chip embedding layer 7 are removed by grinding and polishing, and the surface of the green chip embedding layer 7 is flattened.
[0062] It should be noted that in order to reduce optical crosstalk between pixels, green light absorbing material can be doped into the green light chip embedding layer 7. The green light absorbing material can absorb green light and light with a wavelength smaller than green light, and the green light absorbing material can allow light with a wavelength larger than green light to pass through.
[0063] (7) Fig.12 As shown, next, liquid glass SOG is spin-coated on the surface of the green light chip embedding layer 7, and the red light epitaxial wafer grown on the GaAs substrate is bonded to the liquid glass SOG. After spin coating, the P-type part of the red light epitaxial wafer is bonded to the liquid glass SOG, and then the liquid glass SOG is solidified to form a third SOG glass layer 8. Next, the GaAs substrate of the red light epitaxial wafer is removed by wet etching. After removing the GaAs substrate, a layer of metal Ag is evaporated on the N-type layer of the red light epitaxial layer to form a metal layer. The metal Ag can reflect the red light emitted by the active area of the red light chip to increase the brightness of the red light.
[0064] It should be noted that the sample was placed in a wet etching solution to remove the GaAs substrate of the red light epitaxial wafer.
[0065] It should be noted that the red light epitaxial wafer includes a red light epitaxial wafer P-type layer, a red light multi-quantum well layer and a red light epitaxial wafer N-type layer arranged in sequence from bottom to top, and the surface of the red light epitaxial wafer P-type layer is in contact with and bonded to the third SOG glass layer 8 .
[0066] (8) Fig.12 and 13 As shown, a red light chip array is manufactured by photolithography, etching, metal deposition and annealing. The red light chip array consists of N rows and M columns of red light chips. Each red light chip in the red light chip array is opposite to a green light chip in the green light chip array. The red light chip R includes a red light chip body, a red light chip P electrode R01, a red light chip N electrode R02, a red light chip first window R03, a red light chip second window R04 and a red light chip P electrode gap R05. The red light chip P electrode gap R05, the red light chip first window R03 and the red light chip second window R04 are respectively opened on the periphery of the red light chip body. The red light chip P electrode gap R05, the red light chip first window R03 and the red light chip second window R04 run through the entire red light chip body, and the red light near the red light chip P electrode gap R05 is removed. The chip N-type layer and quantum well layer expose the P-type layer, and the red light chip P electrode R01 is fixed on the exposed red light chip P-type layer. The red light chip P electrode notch R05 is placed directly above the green light chip P electrode metal column G11, and the cross-sectional size of the red light chip P electrode notch R05 is equal to the cross-sectional size of the green light chip P electrode metal column G11. The red light chip first opening window R03 is located directly above the blue light chip N electrode second metal column B22, and the cross-sectional size of the red light chip first opening window R03 is larger than the cross-sectional size of the blue light chip N electrode second metal column B22. The red light chip second opening window R04 is located directly above the green light chip N electrode first metal column G12, and the cross-sectional size of the red light chip second opening window R04 is larger than the cross-sectional size of the green light chip N electrode first metal column G12. The red light chip N electrode R02 is fixed on the upper part of the N-type layer of the red light chip body.
[0067] (9) Fig.14 and 15 As shown, next, liquid glass SOG is evenly coated on the gaps between the red light chip arrays and on the surfaces of the red light chips, and then the liquid glass SOG is solidified to form a red light chip embedding layer 9 that embeds the red light chip array, and the thickness of the red light chip embedding layer 9 is greater than the thickness of the red light chip array.
[0068] The red light chip embedding layer 9 is then photolithographically processed and etched. Through etching, a first opening of the red light chip embedding layer, a second opening of the red light chip embedding layer, a third opening of the red light chip embedding layer, and a fourth opening of the red light chip embedding layer are formed above each red light chip. The first opening of the red light chip embedding layer exposes the red light chip P electrode R01 and the green light chip P electrode metal column G11. TiN film and metal tungsten are sequentially deposited at the first opening of the red light chip embedding layer to form a red light chip connecting the red light chip P electrode R01 and the green light chip P electrode metal column G11. The P-electrode metal column R11, the second opening of the red light chip buried layer partially overlaps with the second opening window R04 of the red light chip, and the cross-sectional size of the second opening of the red light chip buried layer is equal to the cross-sectional size of the green light chip N-electrode first metal column G12 but smaller than the cross-sectional size of the second opening window R04, the second opening of the red light chip buried layer exposes the green light chip N-electrode first metal column G12, and TiN film and metal tungsten are sequentially deposited in the second opening of the red light chip buried layer to form the green light chip electrode second metal column G22 connected to the green light chip N-electrode first metal column G12 (or R14), the second metal column G22 of the green chip electrode does not contact the red chip, the third opening of the red chip buried layer partially overlaps with the first window R03 of the red chip, and the cross-sectional size of the third opening of the red chip buried layer is equal to the cross-sectional size of the second metal column B22 of the N electrode of the blue chip but smaller than the cross-sectional size of the first window R03, the third opening of the red chip buried layer exposes the second metal column B22 of the N electrode of the blue chip, and TiN film and metal tungsten are sequentially deposited in the third opening of the red chip buried layer to form a connection with the second metal column B22 of the N electrode of the blue chip The blue light chip N electrode third metal pillar B32 (or R13) of the metal pillar B22, the blue light chip N electrode third metal pillar B32 does not contact the red light chip, the red light chip embedding layer fourth opening is set directly above the red light chip N electrode R02, and the cross-sectional size of the fourth opening of the red light chip embedding layer is equal to the cross-sectional size of the red light chip N electrode R02, exposing the red light chip N electrode R02, and TiN film and metal tungsten are sequentially deposited in the fourth opening of the red light chip embedding layer to form the red light chip N electrode metal pillar R12 connected to the red light chip N electrode R02;
[0069] Next, the surface of the red light chip embedding layer 9 is ground and polished to remove the metal W and TiN film on the sample surface and to achieve the planarization of the sample surface. Finally, metal Sn is deposited on the metal W.
Claims
1. An LED micro display module, characterized in that: The invention comprises a glass substrate, a first SOG glass layer, a blue chip array, a blue chip embedding layer, a second SOG glass layer, a green chip array, a green chip embedding layer, a third SOG glass layer, a red chip array and a red chip embedding layer; the glass substrate, the first SOG glass layer, the blue chip embedding layer, the second SOG glass layer, the green chip embedding layer, the third SOG glass layer and the red chip embedding layer are arranged in sequence from bottom to top; the blue chip array, the green chip array and the red chip array are respectively embedded in the blue chip embedding layer, the green chip embedding layer and the red chip embedding layer, the blue chip array, the green chip array and the red chip array are all composed of N rows and M columns of corresponding chips, and in the vertical direction, the blue chips in the blue chip array, the green chips in the green chip array and the red chips in the red chip array overlap; the blue light chip N electrode, the green light chip N electrode and the red light chip N electrode are respectively fixed on the N-type layers of the blue light chip, the green light chip and the red light chip, and the three do not overlap in the vertical direction, the blue light chip N electrode is connected to the bottom of the blue light chip N electrode metal column, the green light chip N electrode is connected to the bottom of the green light chip N electrode metal column, the red light chip N electrode is connected to the bottom of the red light chip N electrode metal column, the top of the blue light chip N electrode metal column, the top of the green light chip N electrode metal column and the top of the red light chip N electrode metal column all extend to the upper surface of the LED micro display module; the blue light chip P electrode, the green light chip P electrode and the red light chip P electrode are respectively fixed on the P-type layers of the blue light chip, the green light chip and the red light chip, and the three are all connected to the P electrode metal column, and the top of the P electrode metal column extends to the upper surface of the LED micro display module.
2. The LED micro display module according to claim 1, characterized in that: The blue light chip embedding layer, the green light chip embedding layer and the red light chip embedding layer are doped with blue light, green light and red light absorbing materials respectively.
3. The LED micro display module according to claim 1, characterized in that: The blue light chip includes a blue light chip body, a blue light chip P electrode and a blue light chip N electrode. The blue light chip N electrode is fixed to a corner of the N-type layer on the upper part of the blue light chip body. The N-type layer and the multi-quantum well layer at a corner of the blue light chip body are removed to expose the P-type layer. The blue light chip P electrode B01 is fixed on the exposed blue light chip P-type layer. The green light chip includes a green light chip body, a green light chip P electrode, a green light chip N electrode and a green light chip P electrode gap. The green light chip N electrode is fixed to a corner of the N-type layer on the upper part of the green light chip body. The N-type layer and the multi-quantum well layer at a corner of the green light chip body are removed to expose the P-type layer. The chip P electrode is fixed on the exposed green light chip P type layer, and the green light chip P electrode and the lower green light chip P type layer form a green light chip P electrode gap at the outer corner; the red light chip body, the red light chip P electrode, the red light chip N electrode and the red light chip P electrode gap, the red light chip N electrode is fixed at a corner of the upper N type layer of the red light chip body, the N type layer and the multi-quantum well layer at a corner of the red light chip body are removed to expose the P type layer, the red light chip P electrode is fixed on the exposed red light chip P type layer, and the red light chip P electrode and the lower red light chip P type layer form a red light chip P electrode gap.
4. The LED micro display module according to claim 3, characterized in that: The blue light chip N-electrode metal column includes a blue light chip N-electrode first metal column, a blue light chip N-electrode second metal column and a blue light chip N-electrode third metal column which are connected in sequence from bottom to top, the blue light chip N-electrode is connected to the bottom of the blue light chip N-electrode first metal column, the blue light chip N-electrode first metal column is embedded in the blue light chip embedding layer, and the top of the blue light chip N-electrode first metal column is flush with the top of the blue light chip embedding layer, the blue light chip N-electrode second metal column is embedded in the second SOG glass layer and the green light chip embedding layer, and the bottom of the blue light chip N-electrode second metal column is flush with the bottom of the second SOG glass layer, the top of the blue light chip N-electrode second metal column is flush with the green light chip embedding layer, the blue light chip N-electrode third metal column is embedded in the third SOG glass layer and the red light chip embedding layer, and the bottom of the blue light chip N-electrode third metal column is flush with the third SOG glass layer, and the top of the blue light chip N-electrode third metal column is flush with the top of the red light chip embedding layer.
5. The LED micro display module according to claim 3, characterized in that: The green chip N-electrode metal column includes a green chip N-electrode first metal column and a green chip electrode second metal column connected sequentially from bottom to top, the green chip N-electrode is connected to the bottom of the green chip N-electrode first metal column, the green chip N-electrode first metal column is embedded in the green chip embedding layer, the top of the green chip N-electrode first metal column is flush with the top of the green chip embedding layer, the green chip electrode second metal column is embedded in the third SOG glass layer and the red chip embedding layer, and the bottom of the green chip electrode second metal column is flush with the bottom of the third SOG glass layer, and the top of the green chip electrode second metal column is flush with the top of the red chip embedding layer.
6. The LED micro display module according to claim 3, characterized in that: The red light chip N-electrode metal column is embedded in the red light chip embedding layer, the red light chip N-electrode is connected to the bottom of the red light chip N-electrode metal column, and the top of the red light chip N-electrode metal column is flush with the red light chip embedding layer.
7. The LED micro display module according to claim 3, characterized in that: The P-electrode metal column includes a blue light chip P-electrode metal column, a green light chip P-electrode metal column and a red light chip P-electrode metal column which are sequentially connected from bottom to top; the blue light chip P-electrode is connected to the bottom of the blue light chip P-electrode metal column, the blue light chip P-electrode metal column is embedded in the blue light chip embedding layer, and the top of the blue light chip P-electrode metal column is flush with the top of the blue light chip embedding layer; the green light chip P-electrode metal column is embedded in the second SOG glass layer and the green light chip embedding layer, the bottom and top of the green light chip P-electrode metal column are flush with the bottom of the second SOG glass layer and the top of the green light chip embedding layer respectively, and the green light chip P-electrode is embedded in the step-shaped notch at the bottom of the green light chip P-electrode metal column and connected thereto; the red light chip P-electrode metal column is embedded in the third SOG glass layer and the red light chip embedding layer, the bottom and top of the red light chip P-electrode metal column are flush with the bottom of the third SOG glass layer and the top of the red light chip embedding layer respectively, and the red light chip P-electrode is embedded in the step-shaped notch at the bottom of the red light chip P-electrode metal column and connected thereto.
8. A method for preparing an LED micro display module, characterized in that: The specific steps include: (1) Spin-coating liquid glass SOG on a glass substrate, and then laminating a blue light epitaxial wafer grown on a sapphire substrate on the liquid glass SOG, so that the blue epitaxial layer surface is in contact with and laminated to the liquid glass SOG. After laminating, the liquid glass SOG is solidified to form a first SOG glass layer. After solidification, the sapphire substrate is peeled off from the blue light epitaxial wafer; (2) Next, the blue light chip epitaxial layer is fabricated into a blue light chip array, wherein the blue light chip array is composed of blue light chips in N rows and M columns, where N and M are positive integers greater than or equal to 1, wherein the blue light chip includes a blue light chip body, a blue light chip P electrode, and a blue light chip N electrode, the N-type layer and the multi-quantum well layer at one corner of the blue light chip body are removed to expose the P-type layer, the blue light chip P electrode is fixed on the exposed blue light chip P-type layer, and the blue light chip N electrode is fixed on the N-type layer at one corner of the blue light chip body, (3) Liquid glass SOG is uniformly coated on the gaps between the blue light chip arrays and on the surface of the blue light chip, and then the liquid glass SOG is cured to form a blue light chip embedding layer that embeds the blue light chip array, and the thickness of the blue light chip embedding layer is greater than the thickness of the blue light chip array; Then, the upper surface of the blue light chip embedding layer is etched by using a photolithography and etching process, and a first opening of the blue light chip embedding layer and a second opening of the blue light chip embedding layer are formed in the blue light chip embedding layer, the first opening of the blue light chip embedding layer is placed directly above the P electrode of the blue light chip, the second opening of the blue light chip embedding layer is placed directly above the N electrode of the blue light chip, and the P electrode of the blue light chip is exposed at the first opening of the blue light chip embedding layer; Next, a blue light chip P electrode metal column connected to the blue light chip P electrode is formed in the first opening of the blue light chip embedding layer, and a blue light chip N electrode first metal column B12 connected to the blue light chip N electrode is formed in the second opening of the blue light chip embedding layer, and the sample surface is ground and polished; (4) Next, liquid SOG glass is spin-coated on the surface of the blue chip embedding layer, and then the green light epitaxial wafer grown on the emerald substrate is bonded to the liquid SOG glass, and the P-type surface of the green light epitaxial wafer is bonded to the liquid SOG glass. Next, the liquid SOG glass is solidified to form a second SOG glass layer, and then the emerald substrate on the green light epitaxial wafer is peeled off by laser peeling; (5) Next, the green light epitaxial wafer is made into a green light chip array. The green light chip array is composed of N rows and M columns of green light chips. Each green light chip in the green light chip array is opposite to a blue light chip in the blue light chip array. The green light chip G includes a green light chip body, a green light chip P electrode, a green light chip N electrode, a green light chip window, and a green light chip P electrode notch. A green chip window and a green chip P electrode notch are respectively opened on the periphery of the green chip body, the green chip window and the green chip P electrode notch penetrate the entire green chip body, the green chip N-type layer and the green multi-quantum well layer near the green chip P electrode notch are removed to expose the P-type layer, the green chip P electrode is fixed on the exposed green chip P-type layer, the green chip P electrode notch is placed directly above the blue chip P electrode metal column, the green chip window is located directly above the first metal column of the blue chip N electrode, and the green chip N electrode G02 is fixed on the upper part of the N-type layer of the green chip body; (6) Next, liquid glass SOG is evenly coated in the gaps between the green light chip arrays and on the surface of the green light chip, and then the liquid glass SOG is solidified to form a green light chip embedding layer that embeds the green light chip array. The thickness of the green light chip embedding layer is greater than the thickness of the green light chip array. Then, the upper surface of the green light chip embedding layer is photolithographically etched to form a first opening of the green light chip embedding layer, a second opening of the green light chip embedding layer, and a third opening of the green light chip embedding layer above each green light chip. The first opening of the green chip embedding layer is placed directly above the green chip P electrode and the blue chip P electrode metal pillars, the green chip P electrode and the blue chip P electrode metal pillars are exposed at the first opening of the green chip embedding layer, a green chip P electrode metal pillar connecting the green chip P electrode and the blue chip P electrode metal pillar is formed in the first opening of the green chip embedding layer, the second opening of the green chip embedding layer is placed directly above the green chip N electrode G02, the green chip N electrode is exposed at the second opening of the green chip embedding layer, and the green chip embedding layer is formed in the second opening of the green chip embedding layer. A first metal column of the N electrode of the green chip connected to the N electrode of the green chip is formed, the third opening of the green chip embedding layer is placed directly above the first metal column B12 of the N electrode of the blue chip, partially overlapping with the window opening of the green chip, the first metal column of the N electrode of the blue chip is exposed at the third opening of the green chip embedding layer, a second metal column of the N electrode of the blue chip connected to the first metal column of the N electrode of the blue chip is formed in the third opening of the green chip embedding layer, the second metal column of the N electrode of the blue chip does not contact the green chip, and then the surface of the green chip embedding layer is flattened; (7) Next, liquid SOG glass is spin-coated on the surface of the green chip embedding layer, and the red epitaxial wafer grown on the GaAs substrate is bonded to the liquid SOG glass. After spin coating, the P-type part of the red epitaxial wafer is bonded to the liquid SOG glass, and then the liquid SOG glass is solidified to form a third SOG glass layer. Next, the GaAs substrate of the red epitaxial wafer is removed by wet etching; (8) Then, a red light chip array is made. The red light chip array is composed of N rows and M columns of red light chips. Each red light chip in the red light chip array is opposite to a green light chip in the green light chip array. The red light chip R includes a red light chip body, a red light chip P electrode, a red light chip N electrode, a first opening window of the red light chip, a second opening window of the red light chip and a red light chip P electrode gap. The red light chip P electrode gap, the first opening window of the red light chip and the second opening window of the red light chip are respectively opened on the periphery of the red light chip body. The first opening window of the red chip and the second opening window of the red chip run through the entire red chip body, the N-type layer and quantum well layer of the red chip near the notch of the P electrode of the red chip are removed to expose the P-type layer, the P electrode of the red chip is fixed on the exposed P-type layer of the red chip, the notch of the P electrode of the red chip is placed directly above the metal column of the P electrode of the green chip, the first opening window of the red chip is located directly above the second metal column of the N electrode of the blue chip, the second opening window of the red chip is located directly above the first metal column of the N electrode of the green chip, and the N electrode of the red chip is fixed to the upper part of the N-type layer of the red chip body; (9) Next, liquid glass SOG is evenly coated on the gaps between the red light chip arrays and on the surfaces of the red light chips, and then the liquid glass SOG is solidified to form a red light chip embedding layer that embeds the red light chip array. The thickness of the red light chip embedding layer is greater than the thickness of the red light chip array. The red light chip embedding layer is then photolithographically processed and etched. Through etching, a first opening of the red light chip embedding layer, a second opening of the red light chip embedding layer, a third opening of the red light chip embedding layer, and a fourth opening of the red light chip embedding layer are formed above each red light chip. The first opening of the red light chip embedding layer exposes the red light chip P electrode and the green light chip P electrode metal column. A red light chip P electrode metal column connecting the red light chip P electrode and the green light chip P electrode metal column is sequentially formed at the first opening of the red light chip embedding layer. The second opening of the red light chip embedding layer partially overlaps with the second window of the red light chip. The second opening of the layer exposes the first metal column of the N electrode of the green light chip, and the second metal column of the green light chip electrode connected to the first metal column of the N electrode of the green light chip is formed in sequence in the second opening of the red light chip buried layer, and the second metal column of the green light chip electrode does not contact the red light chip. The third opening of the red light chip buried layer overlaps with the first window opening of the red light chip, and the third opening of the red light chip buried layer exposes the second metal column of the N electrode of the blue light chip, and the third metal column of the N electrode of the blue light chip connected to the second metal column of the N electrode of the blue light chip is formed in the third opening of the red light chip buried layer, and the third metal column of the N electrode of the blue light chip does not contact the red light chip. The fourth opening of the red light chip buried layer is arranged directly above the N electrode of the red light chip to expose the N electrode of the red light chip, and a metal column of the N electrode of the red light chip connected to the N electrode of the red light chip is formed in the fourth opening of the red light chip buried layer, and then the surface of the red light chip buried layer is ground and polished.
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