3D via hole simulation optimization method suitable for high-frequency long via hole
By dividing the long vias into unit vias and optimizing the reverse pad parameters, the problem that the return loss in high-frequency or long vias cannot reach the target is solved, and more efficient via performance optimization is achieved, and for printed circuit boards, it is possible to Design provides more advanced solutions.
Patent Information
- Application Number
- CN202411849641.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-13
- Publication Date
- 2025-02-14
AI Technical Summary
In the case of high frequency or long vias, the best reverse pad parameters that meet performance requirements cannot be found, resulting in return loss not reaching the predetermined target.
Parameter scanning and simulation optimization are performed to find the best to meet the high-frequency performance requirements by dividing the long vias in the three-dimensional via model into several unit vias and setting the reverse pad size of each unit via as a variable. Excellent parameter combination.
It realizes that in the case of high frequency or long vias, the optimal reverse pad parameter combination that meets the performance requirements is found, the performance of vias is improved, the limitations of existing methods are overcome, and the design of printed circuit boards is provided. More advanced and efficient solutions.
Smart Images
Figure CN119443021A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of electronic technology, and in particular to a 3D via simulation optimization method suitable for high-frequency long vias. Background Art
[0002] Printed Circuit Board (PCB), also known as printed circuit board, is an important component of the physical support and signal transmission of electronic products. The optimization of high-speed vias is generally completed through 3D simulation software. When the signal transmission rate is low and the via length is short, the usual practice is to set a unified default value for the via anti-pads of all layers. With the help of 3D simulation software (such as HFSS), this anti-pad parameter can be defined as a variable parameter, the optimization target can be set, and the software can be started to scan automatically to calculate and simulate the best optimization solution. However, when it comes to high frequencies (such as 20GHz) or longer vias, conventional methods may not be able to find the best parameters that meet performance requirements.
[0003] For example, for a 3D model containing a long via, the optimization method is used. First, the anti-pad size of all layers is set to the variable R, and the return loss of the via at a frequency of 20GHz is used as the optimization target, and an effort is made to find an ideal parameter value that makes the return loss less than -25dB. Specifically, R is set as a variable that can vary within a certain range, and then the optimization result is obtained by automatically scanning the simulation through the software. However, in the case of this long via, due to the high optimization frequency (reaching 20GHz), after a comprehensive scan, the best one is selected from multiple simulation results. This simulation result also fails to meet the predetermined target requirements. Figure 3 , which is only -17.45dB, far from the target requirement of -25dB.
[0004] Therefore, the traditional method usually sets a unified default value for the via anti-pad of all layers. This method ignores the changes in electrical characteristics (such as capacitance or inductance) caused by position differences between different layers and cannot balance the electrical characteristics of vias at different positions, especially in the case of high frequency or long vias. For high frequency applications or long vias, it is urgent to explore a more effective via simulation optimization method to obtain better via performance results. Summary of the invention
[0005] In order to overcome the problem that the existing simulation optimization method cannot handle high-frequency or long via models, the present invention provides a 3D via simulation optimization method suitable for high-frequency long vias.
[0006] The technical solution of the present invention is as follows:
[0007] A 3D via simulation optimization method suitable for high-frequency long vias, comprising the following steps: establishing a three-dimensional via model, setting the size of an anti-pad in the three-dimensional via model as a variable, setting an optimization target, performing parameter scanning according to the set variables, and analyzing simulation results. Setting the size of the anti-pad in the three-dimensional via model as a variable specifically comprises the following steps: dividing the long via in the three-dimensional via model into a plurality of unit vias; and setting the size of the anti-pad of each unit via as a variable value.
[0008] As a preferred solution of the present invention, the step of dividing the long via in the three-dimensional via model into a plurality of unit vias is specifically as follows: dividing the long via into a plurality of unit vias according to a division length of 1 mm.
[0009] As a preferred solution of the present invention, setting the anti-pad size of each of the unit vias as a variable value specifically includes the following steps: defining several ground plane layers passed by the same unit via as a group, and each group of ground plane layers has an anti-pad size value; setting the anti-pad size value as a variable variable, so that the long via has several anti-pad size variables.
[0010] As a preferred solution of the present invention, the parameter scanning according to the set variables specifically includes the following steps: setting the starting scanning value, scanning range and scanning step value of the anti-pad size variable; within the scanning range, traversing a plurality of anti-pad size combinations of the unit vias to obtain return loss curves under different anti-pad size combinations.
[0011] Furthermore, the scanning range, the starting scanning value and the scanning step value of the anti-pad size variables of different unit vias are all the same.
[0012] Furthermore, the scanning range is 12mil to 22mil, and the scanning step value is 1×10 -5 mil, 1×10 - 8 mil or 1×10 -10 mil.
[0013] As a preferred solution of the present invention, the setting of the optimization target specifically includes the following steps: selecting signal return loss as the optimization criterion, selecting a frequency value in the high frequency band as the target frequency, and setting the target value of the return loss at the target frequency according to the signal quality requirements.
[0014] Furthermore, the target frequency is 20 GHz, and the target value is -25 dB.
[0015] As a preferred solution of the present invention, the analysis and simulation results specifically include the following steps: the system automatically screens out the return loss curves whose decibel values are better than the target value at the target frequency; from the screened return loss curves, the return loss curves that meet more preferential conditions are selected to obtain the anti-pad size combination corresponding to the preferential return loss curve.
[0016] Furthermore, the selection conditions include:
[0017] a. The return loss curve is smoother in the entire operating frequency band, without sharp fluctuations or peaks;
[0018] b. The average decibel value near the target frequency is lower, that is, it has a stable low return loss in a wider frequency band;
[0019] c. It has a lower decibel value within the key frequency band.
[0020] As a preferred solution of the present invention, the size of the anti-pad is defined as: from the center of the long via to the edge of the anti-pad.
[0021] The present invention according to the above scheme has the following beneficial effects:
[0022] For the case of long vias, the present invention no longer adopts the method of using the same anti-pad parameters for each layer, but takes into account the difference in capacitance or inductance at different positions of the vias, and applies different anti-pad parameters to several ground planes respectively. Specifically, the long via is divided into several sections of unit vias to correspond to different plane layers, thereby dividing several plane layers into a group, and each group is configured with an anti-pad size, and multiple anti-pad sizes are all set as variable parameters that can be optimized for scanning, and high-performance vias that meet performance requirements and have the best parameter combination are obtained through 3D scanning simulation; the present invention successfully overcomes the limitations of existing optimization methods in the case of high-frequency long vias, provides a more advanced and efficient solution for the design of printed circuit boards, and has important practical application value. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 is a flow chart of the method of the present invention;
[0024] Figure 2 is a plan view of a via model of the present invention;
[0025] Figure 3 is a return loss curve diagram of the existing method;
[0026] Figure 4 The figure is a comparison diagram of return loss curves of the present invention and the prior art method.
[0027] In the figure,
[0028] 1. Circuit board; 2. Long via; 3. Anti-pad; 4. Surface routing; 5. Inner fan-out routing. DETAILED DESCRIPTION
[0029] In order to better understand the purpose, technical scheme and technical effect of the present invention, the present invention is further explained in conjunction with the accompanying drawings and embodiments. It should be noted that similar numbers and letters represent similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings. At the same time, it is stated that the embodiments described below are only used to explain the present invention and are not used to limit the present invention.
[0030] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it may be directly on the other element or there may be an intermediate element, and when an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be an intermediate element at the same time. The term "several" means two or more, unless otherwise clearly and specifically defined.
[0031] like Figure 1 and Figure 2 As shown, a 3D via simulation optimization method suitable for high-frequency long vias includes the following steps:
[0032] Step 1: Establish a three-dimensional via model;
[0033] The circuit board 1 of the model is a multi-layer board, such as a 12-layer board, a 14-layer board, a 16-layer board or other layer board, and the multi-layer board has a pair of differential vias, the top of which is connected to the surface trace 4, which penetrates from the surface board and fan-outs the traces in the inner layer board adjacent to the bottom board, for example, the 14th layer of the 16-layer board has an inner fan-out trace 5. Therefore, the differential via is a long via 2, which has a long physical length, increasing the complexity of simulation and optimization. Several reference plane layers of the long via 2 are provided with anti-pads 3, which play a role in reducing signal reflection and improving impedance matching.
[0034] In this embodiment, the size of the anti-pad 3 is defined as: from the center of the long via 2 to the edge of the anti-pad 3, that is, R. In other optional embodiments, the distance from the edge of the via to the edge of the anti-pad can be used as the size of the anti-pad.
[0035] Step 2, setting the size of the anti-pad in the three-dimensional via model as a variable;
[0036] One of the key improvements of the present invention is the improvement of step 2. Several reference layers (ground plane layers) no longer use the same anti-pad parameter structure. Instead, different anti-pad parameters are applied to several ground plane layers respectively in consideration of the capacitive or inductive differences at different positions of the vias. Specifically, the following steps are included:
[0037] Step 201, divide the long via in the three-dimensional via model into several unit vias; this step adopts segmentation processing to divide the long via into several unit vias, allowing each unit via to have an independent anti-pad size parameter. This approach takes into account the differences in electrical characteristics at different positions and improves the authenticity and accuracy of the simulation.
[0038] Step 202, setting the anti-pad size of each unit via as a variable value, specifically includes the following steps:
[0039] Step 2021, determine the ground plane layer group:
[0040] Define several ground plane layers passed by the same unit via as a group, and each group of ground plane layers has an anti-pad size value; for example, if a unit via passes through four ground plane layers, then every four ground plane layers are a group, and the four ground plane layers share one anti-pad size value.
[0041] Step 2022, set the anti-pad size variable:
[0042] The anti-pad size value of each group of ground plane layers is set as a variable variable, so that the long via has several anti-pad size variables (such as R1, R2, R3, R4), allowing the anti-pad size variables of different unit vias to be adjusted independently to adapt to the differences in electrical characteristics at various positions, thereby improving the authenticity and accuracy of the simulation.
[0043] In a specific embodiment, the long via is subdivided into several unit vias according to the division length of each 1 mm. For example, a long via with a length of 4 mm will be divided into 4 unit vias; the ground plane layer passed by each unit via is a group and shares one anti-pad size variable value. In this way, the long via has 4 anti-pad size variable values, which can take into account both simulation accuracy and simulation efficiency.
[0044] Step 3: Set an optimization target. The optimization target may be return loss, insertion loss, or crosstalk suppression. In this embodiment, return loss is used as the optimization target. Return loss is an important parameter for measuring the degree of signal reflection, which is particularly critical for high-frequency applications because it directly affects the integrity and transmission efficiency of the signal. Specifically, the following steps are included:
[0045] Select signal return loss as the optimization criterion, select a frequency value in the high frequency band as the target frequency, and set the target value of return loss at the target frequency according to the signal quality requirements. In this embodiment, the target frequency is 20 GHz, and the target value is -25 dB, that is, at a frequency of 20 GHz, the expected return loss should not exceed -25 dB to ensure that signal reflection is minimized, thereby improving the quality and efficiency of signal transmission.
[0046] In other optional embodiments, different high frequency bands (such as 18 GHz, 22 GHz, etc.) can be selected as target frequencies according to different application fields or working environments; according to specific signal quality and system requirements, the target value of return loss (such as -20dB, -30dB, etc.) can be adjusted to adapt to different design standards and performance indicators.
[0047] Step 4: Perform a detailed parameter scan based on the set anti-pad size variables to find the optimal anti-pad size combination, specifically including the following steps:
[0048] Step 401, setting scanning parameters;
[0049] Determine the starting scan value for each anti-pad size variable, define the scan range for each anti-pad size variable, and set the step increment for each scan. In this embodiment, the scan range is 12mil to 22mil; this range covers common anti-pad sizes and ensures that the optimization process can cover a wide enough range of possibilities. The scan step value is 1×10 -5 mil, 1×10 -8 mil or 1×10 -10 mil; The appropriate step value depends on the specific optimization requirements and the availability of computing resources. Smaller step values can provide higher accuracy but increase simulation time and computational complexity.
[0050] Step 402, traverse different combinations;
[0051] In the scanning range, multiple anti-pad size combinations of the unit vias are traversed to obtain return loss curves under different anti-pad size combinations. The scanning range, the starting scanning value and the scanning step value of the anti-pad size variable of each unit via are the same.
[0052] Step 403: Obtain a return loss curve;
[0053] Each anti-pad size combination is simulated by 3D simulation software (such as HFSS) to obtain a series of return loss curves under different anti-pad size combinations, and all meet the optimization goals set in the previous steps, such as the target value of -25dB at 20GHz.
[0054] This step sets detailed scanning parameters (including scanning start value, scanning range and scanning step value), which can systematically explore various possible anti-pad size combinations, thereby improving the optimization accuracy. In particular, using a smaller scanning step value, the parameters can be adjusted on a very fine scale to find the best solution.
[0055] Step 5: Analyze the simulation results, which specifically includes the following steps:
[0056] The system automatically selects multiple return loss curves whose decibel values are better than the target value (such as -25dB) at the set target frequency (such as 20GHz);
[0057] From the initially screened return loss curves, further select a return loss curve that meets more optimal conditions, the optimal conditions including:
[0058] a. The entire working frequency band is smoother, without sharp fluctuations or peaks;
[0059] It is preferred to select a return loss curve that is smoother and has no sharp fluctuations or spikes throughout the entire operating frequency band; such a curve indicates that the signal reflection is more stable, reduces unnecessary interference and distortion, and improves the overall reliability of the system.
[0060] b. The average decibel value near the target frequency is lower, that is, it has a stable low return loss in a wider frequency band;
[0061] Selecting a return loss curve with a lower average decibel value near the target frequency (e.g., around 20 GHz) shows that this parameter combination not only performs well at a single point frequency, but also maintains a lower return loss over a wider frequency band, thereby improving the stability of the system.
[0062] c. In the key frequency range, it has a lower decibel value;
[0063] For some application scenarios, there may be specific critical frequency bands. Selecting a return loss curve with a lower decibel value in the critical frequency band ensures that the system performance in the important frequency range is best optimized.
[0064] In a specific embodiment, according to the optimal selection conditions, the optimal return loss curve with a return loss of -28.76dB at 20GHz is selected from many return loss curves that meet the optimization target, and the corresponding anti-pad size combination is: R1=16.32mil, R2=21.12mil, R3=20.06mil, R4=21.12mil.
[0065] Finally, a 3D via simulation optimization method suitable for high-frequency long vias also includes the following steps: a verification step. Specifically, the results obtained by the present invention are compared with the results obtained by the existing optimization method (all reference layers have only a single variable), and the reference Figure 4 The solid line curve in the figure is the return loss curve of the present invention, and the dotted line curve is the return loss curve of the existing method. By comparison, it is found that the method of the present invention can more effectively improve the via performance, especially in the case of high frequency or long via.
[0066] In summary, for long vias, the present invention no longer uses the method of using the same anti-pad parameters for each layer, but takes into account the differences in capacitance or inductance at different positions of the vias, applies different anti-pad parameters to several ground planes, and sets multiple anti-pad sizes as variable parameters that can be optimized for scanning. Through 3D scanning simulation, high-performance vias with optimal parameters that meet performance requirements are obtained. The present invention successfully overcomes the limitations of existing optimization methods in high-frequency long vias, provides a more advanced and efficient solution for the design of printed circuit boards, and has very good promotion significance.
[0067] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0068] The above embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for those of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.
Claims
1. A 3D via simulation optimization method suitable for high-frequency long vias, comprising the following steps: A three-dimensional via model is established, the size of the anti-pad in the three-dimensional via model is set as a variable, an optimization target is set, a parameter scan is performed according to the set variable, and the simulation results are analyzed, wherein the characteristics are as follows: The step of setting the size of the anti-pad in the three-dimensional via model as a variable specifically comprises the following steps: Dividing the long via in the three-dimensional via model into a plurality of unit vias; The anti-pad size of each of the unit vias is set to a variable value.
2. The 3D via simulation optimization method applicable to high-frequency long vias according to claim 1, characterized in that: The step of dividing the long via in the three-dimensional via model into a plurality of unit vias is specifically as follows: dividing the long via into a plurality of unit vias according to a division length of 1 mm.
3. The 3D via simulation optimization method applicable to high-frequency long vias according to claim 1, characterized in that: The step of setting the anti-pad size of each unit via hole to a variable value specifically includes the following steps: Define a plurality of ground plane layers passed by the same unit via as a group, and each group of ground plane layers has an anti-pad size value; The anti-pad size value is set as a variable variable, so that the long via has several anti-pad size variables.
4. The 3D via simulation optimization method applicable to high-frequency long vias according to claim 1, characterized in that: The parameter scanning according to the set variables specifically includes the following steps: Set the start scan value, scan range and scan step value of the anti-pad size variable; In the scanning range, multiple anti-pad size combinations of the unit vias are traversed to obtain return loss curves under different anti-pad size combinations.
5. The 3D via simulation optimization method applicable to high-frequency long vias according to claim 4, characterized in that: The scanning range, the starting scanning value and the scanning step value of the anti-pad size variables of different unit vias are all the same.
6. The 3D via simulation optimization method applicable to high-frequency long vias according to claim 4, characterized in that: The scanning range is 12mil to 22mil, and the scanning step value is 1×10 -5 mil, 1×10 -8 mil or 1×10 -10 mil.
7. The 3D via simulation optimization method applicable to high-frequency long vias according to claim 1, characterized in that: The setting of the optimization target specifically includes the following steps: Select signal return loss as the optimization criterion, select a frequency value in the high frequency band as the target frequency, and set the target value of return loss at the target frequency according to the signal quality requirements.
8. The 3D via simulation optimization method applicable to high-frequency long vias according to claim 7, characterized in that: The target frequency is 20 GHz, and the target value is -25 dB.
9. The 3D via simulation optimization method applicable to high-frequency long vias according to claim 7, characterized in that: The analysis of the simulation results specifically includes the following steps: The system automatically selects the return loss curve whose decibel value is better than the target value at the target frequency; From the screened return loss curves, select a return loss curve that meets more optimal conditions; The anti-pad size combination corresponding to the optimal return loss curve is obtained.
10. The 3D via simulation optimization method applicable to high-frequency long vias according to claim 9, characterized in that: The selection criteria include: a. The return loss curve is smoother in the entire operating frequency band, without sharp fluctuations or peaks; b. The average decibel value near the target frequency is lower, that is, it has a stable low return loss in a wider frequency band; c. It has a lower decibel value within the key frequency band.