Array substrate, preparation method of array substrate and display panel
By designing an inner groove in the base layer of the array substrate and setting arc-shaped concave surfaces on the anode and cathode layers, light is reflected to the light-emitting surface and emitted, thus solving the problem of low light extraction efficiency of OLED display panels and achieving higher light extraction efficiency.
Patent Information
- Application Number
- CN202411038598.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-30
- Publication Date
- 2026-08-25
- Estimated Expiration
- 2044-07-30
AI Technical Summary
The low light emission efficiency of existing OLED display panels is mainly due to the severe light loss in the high refractive and reflective regions in waveguide mode.
The base layer of the array substrate is designed with multiple recesses, the anode and cathode layers of the light-emitting unit are spaced apart, and the anode and/or cathode layers have arc-shaped concave surfaces on the side facing the light-emitting layer to reflect light to the light-emitting surface and reduce light loss in the high refractive reflection area.
By reducing light loss in the high refractive index region, the light extraction efficiency of the OLED display panel is improved.
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Figure CN119451423B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technology, specifically to an array substrate, a method for fabricating the array substrate, and a display panel. Background Technology
[0002] Organic Light Emitting Diode (OLED) has gradually become the mainstream technology for display devices due to its advantages such as wide viewing angle, uniform image quality, fast response speed, and low power consumption. However, current technologies are generally limited by the luminous efficiency of the emissive layer, the differences in refractive indices of various film layers, and film reflection. As a result, most light is lost in waveguide mode in the high refractive index and reflection region (ITO / organic film layer), leading to low light extraction efficiency in OLEDs. Therefore, improving the light extraction efficiency of display panels has become a key technical problem that needs to be solved. Summary of the Invention
[0003] This application provides an array substrate for improving light extraction efficiency, a method for fabricating the array substrate, and a display panel.
[0004] In a first aspect, an array substrate provided in an embodiment of this application includes:
[0005] substrate;
[0006] A base layer, disposed on the substrate, the base layer having a plurality of internal grooves; and
[0007] Multiple light-emitting units are provided, each light-emitting unit comprising an anode layer, a cathode layer, and a light-emitting layer. The anode layer is disposed on the wall of the inner groove, and at least a portion of the cathode layer is disposed on the wall of the inner groove. The anode layer and the cathode layer are spaced apart. A portion of the light-emitting layer is disposed on the anode layer, and another portion of the light-emitting layer is disposed on the cathode layer. The anode layer has an arc-shaped concave surface on the side facing the light-emitting layer; and / or, the cathode layer has an arc-shaped concave surface on the side facing the light-emitting layer, the arc-shaped concave surface being used to reflect at least a portion of the light emitted by the light-emitting layer to the light-emitting surface of the light-emitting layer for emission.
[0008] The array substrate provided in this application embodiment has multiple recesses in its base layer; the light-emitting unit includes an anode layer, a cathode layer, and a light-emitting layer. The anode layer is disposed on the wall of the recess, and at least a portion of the cathode layer is disposed on the wall of the recess. The anode layer and the cathode layer are spaced apart. A portion of the light-emitting layer is disposed on the anode layer, and another portion of the light-emitting layer is disposed on the cathode layer. The anode layer has an arc-shaped concave surface on the side facing the light-emitting layer; and / or, the cathode layer has an arc-shaped concave surface on the side facing the light-emitting layer. The arc-shaped concave surface is used to reflect at least a portion of the light emitted by the light-emitting layer to the light-emitting surface of the light-emitting layer for emission. The light-emitting layer is located on the side where both the anode and cathode layers are away from the substrate, reducing the number of film layers that the light-emitting layer needs to pass through before it can be emitted. This reduces the loss of light in the high refractive index region film layer in waveguide mode. On the other hand, the anode layer has an arc-shaped concave surface on the side facing the light-emitting layer; and / or, the cathode layer has an arc-shaped concave surface on the side facing the light-emitting layer. The arc-shaped concave surface is used to reflect at least a portion of the light emitted by the light-emitting layer to the light-emitting surface of the light-emitting layer for emission, further reducing the light emission towards the substrate side and the base layer, so that the light from the light-emitting layer is emitted from the light-emitting side, further increasing the light emission efficiency.
[0009] In one optional embodiment, the groove wall of the inner groove includes a first arc-shaped wall and a second arc-shaped wall, the anode layer is disposed on the first arc-shaped wall, and the cathode layer is disposed on the second arc-shaped wall.
[0010] In one optional embodiment, the light-emitting unit further includes an electron transport layer and a hole transport layer. The electron transport layer is disposed on the cathode layer, and the hole transport layer is disposed on the anode layer. The electron transport layer and the hole transport layer are spaced apart. A portion of the light-emitting layer is disposed on the electron transport layer, and another portion of the light-emitting layer is disposed on the hole transport layer.
[0011] In one optional embodiment, the groove wall of the inner groove is a complete surface, and at least a portion of the light-emitting layer contacts the bottom of the groove wall of the inner groove; or, the bottom of the groove wall of the inner groove has a gap, and at least a portion of the light-emitting layer contacts the substrate.
[0012] In one optional embodiment, the substrate layer further includes a protrusion disposed within the inner groove, the protrusion being disposed between the first arc-shaped wall and the second arc-shaped wall, the protrusion being spaced apart between the anode layer and the cathode layer, and the protrusion being spaced apart between the electron transport layer and the hole transport layer.
[0013] In one optional embodiment, the cathode layers of at least two light-emitting units are spaced apart, the anode layers of at least two light-emitting units are spaced apart, and the array substrate further includes a plurality of cathode driving units and a plurality of anode driving units, each of the cathode driving units being electrically connected to the cathode layer of one of the light-emitting units; each of the anode driving units being electrically connected to the anode layer of one of the light-emitting units.
[0014] In one optional embodiment, the array substrate further includes at least one cathode driving unit and a plurality of anode driving units, and the surface of the substrate layer facing away from the substrate further includes electrical connection traces, the electrical connection traces being electrically connected to the cathode layers of at least two of the light-emitting units, and the cathode driving units being electrically connected to the electrical connection traces.
[0015] The anode layers of at least two of the light-emitting units are spaced apart, and each anode driving unit is electrically connected to the anode layer of one of the light-emitting units.
[0016] In one optional embodiment, the array substrate further includes a plurality of TFT units and a passivation layer. The plurality of TFT units are disposed on the substrate, the passivation layer covers the plurality of TFT units, the base layer is disposed on the passivation layer, the source of the TFT unit is disposed corresponding to the anode layer of the light-emitting unit, and the passivation layer includes conductive vias that electrically connect the anode layer of the light-emitting unit to the drain of the TFT unit.
[0017] Secondly, an embodiment of this application provides a method for fabricating an array substrate, the method comprising:
[0018] A substrate layer is formed on the substrate;
[0019] Multiple internal grooves are formed on the base layer;
[0020] A cathode layer and an anode layer are formed on the groove wall within the inner groove, the cathode layer and the anode layer being spaced apart, the anode layer having an arc-shaped concave surface on the side facing away from the substrate; and / or, the cathode layer having an arc-shaped concave surface on the side facing away from the substrate;
[0021] A light-emitting layer is formed within the space enclosed by the cathode layer and the anode layer.
[0022] The method for fabricating an array substrate provided in this application involves designing a substrate layer to be formed on the substrate; forming multiple recesses on the substrate layer; forming a cathode layer and an anode layer on the groove walls within the recesses, with the cathode layer and the anode layer spaced apart; the anode layer having an arc-shaped concave surface on the side facing away from the substrate; and / or, the cathode layer having an arc-shaped concave surface on the side facing away from the substrate; and forming a light-emitting layer within the space enclosed by the cathode layer and the anode layer. On one hand, the light-emitting layer is located on the side where both the anode layer and the cathode layer face away from the substrate, reducing the number of film layers that the light-emitting layer needs to pass through before emitting light, thereby reducing the loss of light in the high refractive index film layer in waveguide mode. On the other hand, the anode layer has an arc-shaped concave surface on the side facing the light-emitting layer; and / or, the cathode layer has an arc-shaped concave surface on the side facing the light-emitting layer. The arc-shaped concave surface is used to reflect at least a portion of the light emitted by the light-emitting layer to the light-emitting surface of the light-emitting layer for emission, further reducing the light emission towards the substrate side and the substrate layer, allowing the light from the light-emitting layer to be emitted from the light-emitting side, further increasing the light emission efficiency.
[0023] Thirdly, an embodiment of this application provides a display panel including the aforementioned array substrate. Attached Figure Description
[0024] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly described below.
[0025] Figure 1 This is a schematic diagram of the structure of the display panel provided in an embodiment of this application;
[0026] Figure 2 yes Figure 1 A partial schematic diagram of the array substrate;
[0027] Figure 3 for Figure 2 The diagram shows the light-emitting principle of the array substrate.
[0028] Figure 4 This is a partial schematic diagram of the first type of array substrate provided in the embodiments of this application;
[0029] Figure 5 This is a partial schematic diagram of the second type of array substrate provided in the embodiments of this application;
[0030] Figure 6 This is a partial top view of the first type of array substrate provided in the embodiments of this application;
[0031] Figure 7 This is a partial top view of the second type of array substrate provided in the embodiments of this application;
[0032] Figure 8This is a partial top view of the third type of array substrate provided in the embodiments of this application;
[0033] Figure 9 This is a partial top view of the fourth type of array substrate provided in the embodiments of this application;
[0034] Figure 10 This is a partial top view of the fifth type of array substrate provided in the embodiments of this application;
[0035] Figure 11 This is a partial cross-sectional schematic diagram of the array substrate provided in the embodiments of this application. Figure 1 ;
[0036] Figure 12 This is a partial cross-sectional schematic diagram of the array substrate provided in the embodiments of this application. Figure 2 ;
[0037] Figure 13 This is a flowchart of the method for fabricating an array substrate provided in an embodiment of this application;
[0038] Figure 14 This is a process diagram of one fabrication of an array substrate provided in an embodiment of this application;
[0039] Figure 15 This is another fabrication process diagram of the array substrate provided in the embodiments of this application.
[0040] Explanation of icon numbers:
[0041] Display panel 100; array substrate 11; substrate 12; base layer 13; multiple light-emitting units 14; recess 14a; anode layer 15; cathode layer 16; light-emitting layer 17; first arc-shaped wall 18; second arc-shaped wall 19; electron transport layer 20; hole transport layer 21; gap 22; protrusion 23; anode driving unit 24; cathode driving unit 25; electrical connection trace 26; TFT unit 27; passivation layer 28; gate 29; insulating layer 30; active layer 31; source electrode 32; drain electrode 33; conductive via 34. Detailed Implementation
[0042] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. In addition, the reference to "embodiment" or "implementation method" in this application means that a specific feature, structure or characteristic described in connection with the embodiment or implementation method can be included in at least one embodiment of this application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described in this application can be combined with other embodiments.
[0043] In describing some embodiments, the term "electrical connection" and its derivative expressions may be used. For example, the term "connection" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. As another example, the term "electrical connection" may be used in describing some embodiments to indicate that two or more components have physical contact or an electrical signal path, such as two components being connected by a signal line, or other electrical components or circuits existing between the two components, but a signal path exists between them through these other electrical components. However, the term "electrical connection" may also refer to two or more components that do not have direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the content of this document.
[0044] Please see Figure 1 This application provides a display panel 100 with improved light extraction efficiency. The display panel 100 includes, but is not limited to, a panel with self-emissive units such as an OLED. The display panel 100 includes an array substrate 11. The array substrate 11 includes, but is not limited to, a pixel unit array substrate 11. The array substrate 11 is provided with a plurality of pixel units arranged in an array. Each pixel unit includes at least one light-emitting unit and a TFT unit.
[0045] Please see Figure 2 The array substrate 11 includes a substrate 12, a base layer 13, and a plurality of light-emitting units 14.
[0046] A base layer 13 is disposed on the substrate 12. The base layer 13 includes, but is not limited to, a pixel definition layer.
[0047] Please see Figure 2The base layer 13 has a plurality of recesses 14a. Optionally, the number of recesses 14a may be less than the number of pixel units in the display panel 100; in other words, some of the light-emitting units 14 of the display panel 100 improve their light emission efficiency. Alternatively, the number of recesses 14a may be equal to the number of pixel units in the display panel 100; in other words, all the light-emitting units 14 of the display panel 100 improve their light emission efficiency.
[0048] Please see Figure 2 The light-emitting unit 14 includes an anode layer 15, a cathode layer 16, and a light-emitting layer 17.
[0049] The anode layer 15 is laid on the groove wall of the inner groove 14a. At least a portion of the cathode layer 16 is laid on the groove wall of the inner groove 14a. The anode layer 15 and the cathode layer 16 are spaced apart. In other words, the anode layer 15 and the cathode layer 16 are not electrically connected.
[0050] A portion of the light-emitting layer 17 is disposed on the anode layer 15. Another portion of the light-emitting layer 17 is disposed on the cathode layer 16. The light-emitting layer 17 may include, but is not limited to, an organic light-emitting material. The anode layer 15 and the cathode layer 16 are used to provide a driving voltage for the light-emitting layer 17 to drive the light-emitting layer 17 to emit light.
[0051] The side of the light-emitting layer 17 facing away from the substrate 12 is the light-emitting side. During the light emission process, it does not need to pass through the cathode layer 16, etc., which reduces the number of film layers that the light-emitting layer 17 needs to pass through, thereby reducing the loss of light in the high refractive index film layer in waveguide mode, and thus increasing the light emission efficiency.
[0052] Further, the anode layer 15 has an arcuate concave surface on the side facing the light-emitting layer 17, and / or the cathode layer 16 has an arcuate concave surface on the side facing the light-emitting layer 17. Optionally, the anode layer 15 has an arcuate concave surface on the side facing the light-emitting layer 17, the arcuate concave surface being used to reflect at least a portion of the light emitted by the light-emitting layer 17 to the light-emitting surface of the light-emitting layer 17 for emission. The light-emitting surface of the light-emitting layer 17 faces the light-emitting surface of the display panel 100. Even more optionally, the cathode layer 16 has an arcuate concave surface on the side facing the light-emitting layer 17, the arcuate concave surface being used to reflect at least a portion of the light emitted by the light-emitting layer 17 to the light-emitting surface of the light-emitting layer 17 for emission. Even more optionally, the anode layer 15 has a first arcuate concave surface on the side facing the light-emitting layer 17, and the cathode layer 16 has a second arcuate concave surface on the side facing the light-emitting layer 17. Both the first and second arc-shaped concave surfaces are used to reflect at least a portion of the light emitted by the light-emitting layer 17 to the light-emitting surface of the light-emitting layer 17 for emission. In general technology, the light emitted by the light-emitting layer 17 is emitted along the periphery, while the arc-shaped concave surface design allows the light emitted by the light-emitting layer 17 along the periphery to be reflected to the light-emitting surface of the light-emitting layer 17 for emission, thereby improving the light extraction efficiency.
[0053] The array substrate 11 provided in this embodiment of the application is designed with a base layer 13 having multiple recesses 14a. The light-emitting unit 14 includes an anode layer 15, a cathode layer 16, and a light-emitting layer 17. The anode layer 15 is disposed on the wall of the recess 14a, and at least a portion of the cathode layer 16 is disposed on the wall of the recess 14a. The anode layer 15 and the cathode layer 16 are spaced apart. A portion of the light-emitting layer 17 is disposed on the anode layer 15, and another portion of the light-emitting layer 17 is disposed on the cathode layer 16. The anode layer 15 has an arc-shaped concave surface on the side facing the light-emitting layer 17, and / or the cathode layer 16 has an arc-shaped concave surface on the side facing the light-emitting layer 17. The arc-shaped concave surface is used to reflect at least a portion of the light emitted by the light-emitting layer 17 back to the light-emitting layer 17. The light is emitted from the light-emitting surface. On the one hand, the light-emitting layer 17 is located on the side where both the anode layer 15 and the cathode layer 16 are away from the substrate 12, which reduces the number of film layers that the light-emitting layer 17 needs to pass through before it is emitted, thereby reducing the loss of light in the high refractive index film layer in waveguide mode. On the other hand, the anode layer 15 has an arc-shaped concave surface on the side facing the light-emitting layer 17, and / or the cathode layer 16 has an arc-shaped concave surface on the side facing the light-emitting layer 17. The arc-shaped concave surface is used to reflect at least part of the light emitted by the light-emitting layer 17 to the light-emitting surface of the light-emitting layer 17 for emission, so as to further reduce the light emitted towards the side where the substrate 12 is located and the base layer 13, so that the light of the light-emitting layer 17 is emitted from the light-emitting side, further increasing the light emission efficiency.
[0054] Optional, please refer to Figure 3The anode layer 15 is made of a material with high reflectivity, such as silver or aluminum. The anode layer 15 is disposed on a portion of the periphery of the light-emitting layer 17. The anode layer 15 has a first arc-shaped concave surface, which in turn forms a first arc-shaped reflective concave surface. In this way, the anode layer 15 can both conduct electricity and reflect the light emitted by the light-emitting layer 17 to the light-emitting surface of the light-emitting layer 17.
[0055] Optional, please refer to Figure 3 The cathode layer 16 is made of a material with high reflectivity, such as silver or aluminum. The cathode layer 16 is disposed on another part of the periphery of the light-emitting layer 17. The cathode layer 16 has a second arc-shaped concave surface, which in turn forms a second arc-shaped reflective concave surface. In this way, the cathode layer 16 can both conduct electricity and reflect the light emitted by the light-emitting layer 17 to the light-emitting surface of the light-emitting layer 17.
[0056] Specifically, the cathode layer 16 and the anode layer 15 together cover almost the entire groove wall of the inner groove 14a. To prevent the cathode layer 16 and the anode layer 15 from being electrically connected, the cathode layer 16 and the anode layer 15 can be physically spaced apart, or an isolation strip can be provided between the cathode layer 16 and the anode layer 15.
[0057] Optionally, the opening shape of the inner groove 14a may include, but is not limited to, a circle, a square, or an ellipse. Further, the inner groove 14a may be hemispherical, cylindrical, or ellipsoidal.
[0058] Optional, please refer to Figure 2 The groove wall of the inner groove 14a includes a first arc-shaped wall 18 and a second arc-shaped wall 19. The anode layer 15 is disposed on the first arc-shaped wall 18. The cathode layer 16 is disposed on the second arc-shaped wall 19.
[0059] Optionally, the first arc-shaped wall 18 and the second arc-shaped wall 19 can be continuous surfaces or spaced surfaces. For example, the first arc-shaped wall 18 and the second arc-shaped wall 19 form a gap at the bottom of the groove. For example, the inner groove 14a is semi-cylindrical, and the strip gap extends along the length direction to achieve the spaced arrangement of the anode layer 15 and the cathode layer 16.
[0060] The groove wall of the inner groove 14a is designed to include a first arc-shaped wall 18 and a second arc-shaped wall 19. Both the anode layer 15 and the cathode layer 16 are thin film layers. In other words, the anode layer 15 is arc-shaped and the cathode layer 16 is arc-shaped, which is conducive to realizing that the side of the anode layer 15 facing away from the substrate 12 is a first arc-shaped reflective concave surface, and the side of the cathode layer 16 facing away from the substrate 12 is a first arc-shaped reflective concave surface.
[0061] For example, the inner groove 14a is semi-circular, the first arc-shaped wall 18 is approximately 1 / 4 spherical, and the second arc-shaped wall 19 is approximately 1 / 4 spherical. Thus, the shape of the cathode layer 16 is similar to a 1 / 4 spherical surface, and the shape of the anode layer 15 is also similar to a 1 / 4 spherical surface. The cathode layer 16 forms a first arc-shaped reflective concave surface approximately 1 / 4 spherical, and the anode layer 15 forms a second arc-shaped reflective concave surface approximately 1 / 4 spherical. The light-emitting layer 17 is disposed in the space surrounded by the cathode layer 16 and the anode layer 15. The light emitted by the light-emitting layer 17 is directed towards the light-emitting surface, the anode layer 15, and the cathode layer 16. The anode layer 15 reflects the light towards the light-emitting surface, and the cathode layer 16 reflects the light towards the light-emitting surface. Therefore, the light emitted by the light-emitting layer 17 is almost entirely directed towards the light-emitting surface, increasing the light extraction efficiency of the light-emitting layer 17 from the light-emitting surface.
[0062] Please see Figure 3 When the light-emitting layer 17 emits light, it emits light not only towards the opening side but also in all directions, resulting in low light utilization and increased energy consumption. Both the cathode layer 16 and the anode layer 15 are made of highly reflective and highly conductive Ag metal, coated on the inner side of the pixel definition layer forming the concave-transparent shape. When the light-emitting layer 17 emits light in all directions, the concave lens-shaped cathode layer 16 and anode layer 15 (Ag metal) reflect the light towards the opening side. That is, the cathode layer 16 and anode layer 15 effectively reflect the light emitted from the light-emitting layer 17 towards the side, causing the light emitted towards the side to exit towards the light-emitting surface (top surface) of the light-emitting layer 17, improving light utilization and the light extraction efficiency of the display device. Furthermore, there is no need to place transparent electrodes (such as the cathode layer 16 and electron transport layer) on the opening side of the light-emitting layer 17, reducing light loss caused by different refractive indices between film layers and film reflection.
[0063] Optional, please refer to Figure 4 The light-emitting unit 14 further includes an electron transport layer 20 and a hole transport layer 21.
[0064] The electron transport layer 20 is disposed on the cathode layer 16. In other words, the electron transport layer 20 is sandwiched between the light-emitting layer 17 and the cathode layer 16. The hole transport layer 21 is disposed on the anode layer 15. In other words, the hole transport layer 21 is sandwiched between the light-emitting layer 17 and the anode layer 15. The electron transport layer 20 and the hole transport layer 21 are spaced apart. A portion of the light-emitting layer 17 is disposed on the electron transport layer 20. Another portion of the light-emitting layer 17 is disposed on the hole transport layer 21. The anode layer 15, the hole transport layer 21, the light-emitting layer 17, the electron transport layer 20, and the cathode layer 16 form the basic structure of the light-emitting unit 14.
[0065] Specifically, both the electron transport layer 20 and the hole transport layer 21 are thin layers. The surface of the electron transport layer 20 facing away from the cathode layer 16 is a concave arc. The surface of the hole transport layer 21 facing away from the anode layer 15 is a concave arc. Thus, the electron transport layer 20 and the hole transport layer 21 enclose a containing space. For example, the shape of the electron transport layer 20 is close to a quarter sphere. The shape of the hole transport layer 21 is close to a quarter sphere. The electron transport layer 20 and the hole transport layer 21 enclose a space that is close to a half hemisphere, and the light-emitting unit 14 is formed in a shape that is close to a half hemisphere.
[0066] The end of each layer closest to the opening of the inner groove 14a is defined as the opening end, and the end closest to the groove wall of the inner groove 14a is defined as the bottom end.
[0067] In one alternative embodiment, please refer to Figure 2 and Figure 4 The bottom of the groove wall of the inner groove 14a has a gap 22. The bottom ends of the cathode layer 16 and the anode layer 15 are both located in the gap 22 at the bottom of the groove wall and are spaced apart, i.e., they are disposed on the substrate 12. The bottom ends of the electron transport layer 20 and the hole transport layer 21 are both located in the gap 22 between the bottom ends of the cathode layer 16 and the bottom ends of the anode layer 15 and are spaced apart, i.e., they are disposed on the substrate 12. At least a portion (bottom end) of the light-emitting layer 17 contacts the substrate 12, thus, the electron transport layer 20 and the hole transport layer 21 are spaced apart, and the cathode layer 16 and the anode layer 15 are spaced apart, through the light-emitting unit 14.
[0068] If the base layer 13 is a passivation layer, then the bottom ends of the cathode layer 16 and the anode layer 15 are both located on the passivation layer, the bottom ends of the electron transport layer 20 and the hole transport layer 21 are located on the passivation layer, and the bottom end of the light-emitting layer 17 contacts the passivation layer.
[0069] In another optional embodiment, the groove wall of the inner groove 14a is a complete surface. The bottom ends of the cathode layer 16 and the anode layer 15 are both located on the groove wall of the inner groove 14a and are spaced apart. The bottom ends of the electron transport layer 20 and the hole transport layer 21 are both located in the gap between the bottom ends of the cathode layer 16 and the anode layer 15 and are spaced apart. At least a portion (bottom end) of the light-emitting layer 17 contacts the bottom of the groove wall of the inner groove 14a. Thus, the electron transport layer 20 and the hole transport layer 21 are spaced apart, and the cathode layer 16 and the anode layer 15 are spaced apart, through the light-emitting unit 14.
[0070] In another alternative embodiment, please refer to Figure 4 The opening ends of the cathode layer 16 and the anode layer 15 are both located at the opening of the inner groove 14a, thus increasing the effective area of the cathode layer 16 and the anode layer 15.
[0071] In other alternative embodiments, please refer to Figure 5 The opening ends of the cathode layer 16 and the anode layer 15 are both located on the groove wall of the inner groove 14a near the opening. The opening ends of the electron transport layer 20 and the hole transport layer 21 are both located on the groove wall of the inner groove 14a near the opening. The opening side of the light-emitting layer 17 is the same size as the opening of the inner groove 14a, thus the opening side of the light-emitting layer 17 is larger.
[0072] Optional, please refer to Figures 6 to 8 The base layer 13 further includes protrusions 23 disposed within the inner groove 14a. The protrusions 23 are located between the first arcuate wall 18 and the second arcuate wall 19. The protrusions 23 are arranged along the length of the inner groove 14a. The protrusions 23 are spaced apart between the anode layer 15 and the cathode layer 16. The protrusions 23 are also spaced apart between the electron transport layer 20 and the hole transport layer 21. The protrusions 23 are provided to prevent direct contact between the anode layer 15 and the cathode layer 16, and to prevent direct contact between the electron transport layer 20 and the hole transport layer 21.
[0073] For example, please see Figure 6 Taking the inner groove 14a as a semi-ellipsoidal shape as an example, the protrusion 23 extends from one end of the opening of the inner groove 14a, along the length of the inner groove 14a and along the groove wall of the inner groove 14a to the other end of the opening of the inner groove 14a.
[0074] For example, please see Figure 7 Taking the inner groove 14a as a hemispherical shape as an example, the protrusion 23 extends from one end of the opening of the inner groove 14a along the groove wall of the inner groove 14a to the other end of the opening of the inner groove 14a.
[0075] For example, please see Figure 8 Taking the inner groove 14a as a semi-cylindrical shape as an example, the protrusion 23 extends from one end of the opening of the inner groove 14a, along the length of the inner groove 14a and along the groove wall of the inner groove 14a to the other end of the opening of the inner groove 14a.
[0076] Optional, please refer to Figure 9 The array substrate 11 further includes a plurality of anode driving units 24. Anode layers 15 of at least two of the light-emitting units 14 are spaced apart. Each anode driving unit 24 is electrically connected to the anode layer 15 of one of the light-emitting units 14. The anode driving unit 24 is used to provide an anode voltage to the anode layer 15 of each light-emitting unit 14.
[0077] Optional, please refer to Figure 9The array substrate 11 also includes multiple cathode driving units 25. The cathode layers 16 of at least two of the light-emitting units 14 are spaced apart, i.e., not directly connected. For independently arranged cathode layers 16, each cathode driving unit 25 is electrically connected to the cathode layer 16 of one light-emitting unit 14. This is a cathode-driven design. In this configuration, the cathode layer 16 and anode layer 15 in each light-emitting unit 14 are driven by independent driving devices.
[0078] Alternatively, please refer to Figure 10 and Figure 11 The array substrate 11 further includes at least one cathode driving unit 25. The surface of the base layer 13 facing away from the substrate 12 also includes electrical connection traces 26. The electrical connection traces 26 are located outside the opening region of the pixel unit, reducing the impact of the electrical connection traces 26 on the aperture ratio of the pixel unit. The electrical connection traces 26 electrically connect to the cathode layers 16 of at least two of the light-emitting units 14. The cathode driving unit 25 is electrically connected to the electrical connection traces 26. One cathode driving unit 25 drives the cathode layers 16 of multiple light-emitting units 14 through the electrical connection traces 26, reducing the number of cathode driving units 25 required. Optionally, the cathode layers 16 of all light-emitting units 14 are connected through the electrical connection traces 26, and all the cathode layers 16 of the light-emitting units 14 are driven by one cathode driving unit 25. This is a common cathode driving method. Further, the cathode layers 16 can also extend above the pixel definition layer, and the electrical connection traces 26 connect the cathode layers 16 in each pixel unit to achieve a common cathode effect.
[0079] In this embodiment, please refer to Figure 10 At least two of the light-emitting units 14 have their anode layers 15 spaced apart. Each anode driving unit 24 is electrically connected to the anode layer 15 of one of the light-emitting units 14. The anode driving unit 24 is used to provide an anode voltage to the anode layer 15 of each light-emitting unit 14.
[0080] In an embodiment of the cathode-driven design, each light-emitting unit 14 has its own driving device for its cathode layer 16 and anode layer 15, which can supply current to the cathode layer 16 and anode layer 15 of each light-emitting unit 14 individually.
[0081] In the common cathode driving design implementation, the anode layer 15 is a separate driving device. The cathode layer 16 is driven together. In the common cathode method, the anode is inside the pixel aperture, while part of the cathode is inside the pixel aperture and part is above the pixel definition layer, avoiding the aperture area, thereby reducing the number of film layers in the aperture area.
[0082] Optional, please refer to Figure 12The array substrate 11 further includes a plurality of TFT units 27 and a passivation layer 28. The plurality of TFT units 27 are disposed on the substrate 12. Optionally, the TFT unit 27 is the aforementioned anode driving unit 24. Specifically, the substrate 12 has a gate 29, an insulating layer 30 covering the gate 29, an active layer 31 disposed on the insulating layer 30, a source 32 connected to the active layer 31, and a drain 33 connected to the active layer 31, the active layer 31 corresponding to the gate 29. The passivation layer 28 covers the source 32, drain 33, and active layer 31 of the plurality of TFT units 27. The base layer 13 is disposed on the passivation layer 28. The drain 33 of the TFT unit 27 corresponds to the anode layer 15 of the light-emitting unit 14. The passivation layer 28 includes a conductive via 34. The conductive via 34 electrically connects the anode layer 15 of the light-emitting unit 14 and the drain 33 of the TFT unit 27.
[0083] Please see Figure 13 Combined with reference Figure 14 This embodiment also provides a method S100 for fabricating an array substrate 11. The method S100 includes, but is not limited to, the following steps.
[0084] Step S110: Refer to Figure 14 a and Figure 14 In step b, a base layer 13 is formed on substrate 12.
[0085] Optionally, a pixel definition layer (base layer 13) is first coated on the substrate 12.
[0086] Step S120: Reference Figure 14 In section b, a plurality of internal grooves 14a are formed on the base layer 13.
[0087] Optionally, after exposure and development, a recessed groove 14a with an inward shape is formed on the pixel definition layer (base layer 13) near the light-emitting side. In other words, the pixel definition layer (base layer 13) is exposed to form a recessed groove 14a with a certain arc structure.
[0088] Step S130: Reference Figure 14 In section c, a cathode layer 16 and an anode layer 15 are formed on the groove wall within the inner groove 14a. The cathode layer 16 and the anode layer 15 are spaced apart. The anode layer 15 has an arcuate concave surface on the side opposite to the substrate 12, and / or the cathode layer 16 has an arcuate concave surface on the side opposite to the substrate 12.
[0089] Optionally, a cathode layer 16 and an anode layer 15 are deposited within the recess 14a of the pixel definition layer. The cathode layer 16 and the anode layer 15 are spaced apart. The anode layer 15 has an arc-shaped concave surface on the side facing away from the substrate 12, and the cathode layer 16 also has an arc-shaped concave surface on the side facing away from the substrate 12. Because the cathode layer 16 and the anode layer 15 are on the same side of the light-emitting layer 17, the number of film layers on the light-emitting side is reduced, which can reduce light loss due to refraction and reflection. On the other hand, because the cathode layer 16 and the anode layer 15 have a certain curvature, they have a certain light-gathering effect, improving light utilization.
[0090] Optionally, both the anode layer 15 and the cathode layer 16 may be made of conductive materials with high reflectivity, such as silver or aluminum.
[0091] Optional, see reference Figure 14 d and Figure 14 In step e, an electron transport layer 20 is coated in the recess 14a of the pixel definition layer. After exposure and development, an electron transport layer 20 with a cross-section close to 1 / 4 circle is formed on the cathode layer 16.
[0092] Optional, see reference Figure 14 f and Figure 14 In step g, a hole transport layer 21 is coated within the recess 14a of the pixel definition layer. After exposure and development, a hole transport layer 21 with a cross-section close to a quarter circle is formed on the anode layer 15. The hole transport layer 21 and the electron transport layer 20 are spaced apart.
[0093] Step S140: A light-emitting layer 17 is formed within the space enclosed by the cathode layer 16 and the anode layer 15.
[0094] Optional, see reference Figure 14 In the middle h, a light-emitting layer 17 is coated within the space enclosed by the hole transport layer 21 and the electron transport layer 20. The surface of the light-emitting layer 17 is flush with the surface of the pixel definition layer.
[0095] In the embodiment where a protrusion 23 is provided within the inner groove 14a, in conjunction with reference to the reference... Figure 15 The preparation methods include:
[0096] Reference Figure 15 In step a, a base layer 13 is formed on substrate 12.
[0097] Reference Figure 15 In step b, step S120 also includes forming a protrusion 23 in the middle of the inner groove 14a. At the same time, a conductive via 34 connecting the anode layer 15 and the drain 33 of the TFT unit 27 is formed in the passivation layer 28.
[0098] Reference Figure 15In section c, a cathode layer 16 and an anode layer 15 are formed on both sides of the protrusion 23, respectively. The protrusion 23 prevents the cathode layer 16 and the anode layer 15 from conducting.
[0099] Reference Figure 15 In the middle d, a light-emitting layer 17 is formed within the space surrounded by the cathode layer 16 and the anode layer 15.
[0100] The method for fabricating the array substrate 11 provided in this application embodiment involves designing a base layer 13 to be formed on a substrate 12, forming a plurality of inner grooves 14a on the base layer 13, and forming a cathode layer 16 and an anode layer 15 on the groove walls within the inner grooves 14a. The cathode layer 16 and the anode layer 15 are spaced apart. The anode layer 15 has an arc-shaped concave surface on the side facing away from the substrate 12, and / or the cathode layer 16 has an arc-shaped concave surface on the side facing away from the substrate 12. A light-emitting layer 17 is formed within the space surrounded by the cathode layer 16 and the anode layer 15. On the one hand, the light-emitting layer 17 is located where both the anode layer 15 and the cathode layer 16 face away from the substrate 12. On one side, namely the cathode layer 16 and the anode layer 15 are on the same side of the light-emitting layer 17, the number of film layers that the light-emitting layer 17 needs to pass through is reduced, thereby reducing the loss of light in the high refractive index film layer in waveguide mode. On the other hand, the anode layer 15 has an arc-shaped concave surface on the side facing the light-emitting layer 17, and / or the cathode layer 16 has an arc-shaped concave surface on the side facing the light-emitting layer 17. The arc-shaped concave surface is used to reflect at least part of the light emitted by the light-emitting layer 17 to the light-emitting surface of the light-emitting layer 17 for emission, so as to further reduce the light emission towards the side where the substrate 12 is located and the base layer 13, so that the light of the light-emitting layer 17 is emitted from the light-emitting side, further increasing the light emission efficiency.
[0101] Generally, to improve the light extraction efficiency of OLED panels, the thickness of the anode layer 15 (Indium Tin Oxide, or ITO) is typically reduced to increase anode reflectivity, thereby improving light output brightness. However, thinning the ITO layer may impair hole injection efficiency. Alternatively, a light-transmitting hole is formed on the transparent electrode, allowing light to escape through it, thus reducing the waveguide mode between the transparent electrode and the light-emitting layer 17 and improving light extraction efficiency.
[0102] The array substrate 11 and display panel 100 provided in this application embodiment reduce the number of film layers that the light-emitting layer 17 needs to pass through when emitting light by placing the cathode layer 16 and anode layer 15 on the same side of the light-emitting layer 17. This reduces the loss of light in the high refractive index and reflectivity region film layer in waveguide mode, improves the light extraction efficiency of the OLED display panel 100, and improves the light utilization rate by designing the cathode layer 16 and anode layer 15 as concave arc-shaped reflective structures to reflect the light around the light-emitting layer 17, thereby reducing the light loss caused by different refractive indices and film layer reflections.
[0103] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application, and such improvements and refinements are also considered to be within the protection scope of this application.
Claims
1. An array substrate, characterized in that, include: substrate; A base layer is disposed on the substrate, the base layer having a plurality of inner grooves, the groove walls of the inner grooves including a first arc-shaped wall and a second arc-shaped wall; and Multiple light-emitting units are provided, each including an anode layer, a cathode layer, a light-emitting layer, an electron transport layer, and a hole transport layer. The anode layer is disposed on a first arc-shaped wall, and at least a portion of the cathode layer is disposed on a second arc-shaped wall. The anode layer and the cathode layer are spaced apart. A portion of the light-emitting layer is disposed on the anode layer, and another portion of the light-emitting layer is disposed on the cathode layer. The anode layer is arc-shaped and has a first arc-shaped reflective concave surface on the side facing the light-emitting layer. The cathode layer is arc-shaped and has a second arc-shaped reflective concave surface on the side facing the light-emitting layer. The electron transport layer is disposed only on the surfaces of the cathode layer and the light-emitting layer, and the hole transport layer is disposed only on the surfaces of the anode layer and the light-emitting layer. The electron transport layer and the hole transport layer are spaced apart and not adjacent. A portion of the light-emitting layer is disposed on the surface of the electron transport layer, and another portion of the light-emitting layer is disposed on the surface of the hole transport layer. The cathode layer and the anode layer are made of highly reflective and highly conductive metal. The first arc-shaped reflective concave surface and the second arc-shaped reflective concave surface are used to reflect at least a portion of the light emitted by the light-emitting layer to the light-emitting surface of the light-emitting layer for emission. The opening ends of the cathode layer and the anode layer are located on the side of the groove wall of the inner groove near the opening. The opening ends of the electron transport layer and the hole transport layer are both located on the side of the groove wall of the inner groove near the opening. The opening size of the light-emitting layer is the same as the opening size of the inner groove.
2. The array substrate according to claim 1, characterized in that, The groove wall of the inner groove is a complete surface, and at least a portion of the light-emitting layer contacts the bottom of the groove wall of the inner groove; or, the bottom of the groove wall of the inner groove has a gap, and at least a portion of the light-emitting layer contacts the substrate.
3. The array substrate according to claim 1, characterized in that, The base layer also includes protrusions disposed within the inner groove, the protrusions being disposed between the first arc-shaped wall and the second arc-shaped wall, the protrusions being spaced apart between the anode layer and the cathode layer, and the protrusions being spaced apart between the electron transport layer and the hole transport layer.
4. The array substrate according to claim 1, characterized in that, The cathode layers of at least two light-emitting units are spaced apart, and the anode layers of at least two light-emitting units are spaced apart. The array substrate further includes a plurality of cathode driving units and a plurality of anode driving units. Each cathode driving unit is electrically connected to the cathode layer of one light-emitting unit, and each anode driving unit is electrically connected to the anode layer of one light-emitting unit.
5. The array substrate according to claim 1, characterized in that, The array substrate further includes at least one cathode driving unit and multiple anode driving units. The surface of the substrate layer facing away from the substrate also includes electrical connection traces. The electrical connection traces are electrically connected to the cathode layers of at least two of the light-emitting units, and the cathode driving units are electrically connected to the electrical connection traces. The anode layers of at least two of the light-emitting units are spaced apart, and each anode driving unit is electrically connected to the anode layer of one of the light-emitting units.
6. The array substrate according to any one of claims 1-5, characterized in that, The array substrate further includes multiple TFT units and a passivation layer. The multiple TFT units are disposed on the substrate, and the passivation layer covers the multiple TFT units. The base layer is disposed on the passivation layer. The source of the TFT unit is disposed corresponding to the anode layer of the light-emitting unit. The passivation layer includes conductive vias, and the conductive vias electrically connect the anode layer of the light-emitting unit and the drain of the TFT unit.
7. A method for fabricating an array substrate as described in any one of claims 1-6, characterized in that, The method includes: A substrate layer is formed on the substrate; Multiple inner grooves are formed on the base layer, and the groove walls of the inner grooves include a first arc-shaped wall and a second arc-shaped wall; A cathode layer is formed on the first arc-shaped wall, and an anode layer is formed on the second arc-shaped wall. The cathode layer and the anode layer are spaced apart. The anode layer is arc-shaped and has a first arc-shaped reflective concave surface on the side of the anode layer away from the substrate. The cathode layer is arc-shaped and has a second arc-shaped reflective concave surface on the side of the cathode layer away from the substrate. A light-emitting layer is formed within the space enclosed by the cathode layer and the anode layer. The cathode layer and the anode layer are made of highly reflective and highly conductive metal. The first arc-shaped reflective concave surface and the second arc-shaped reflective concave surface are used to reflect at least a portion of the light emitted by the light-emitting layer to the light-emitting surface of the light-emitting layer for emission.
8. A display panel, characterized in that, Includes the array substrate as described in any one of claims 1 to 6.
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