FPGA (Field Programmable Gate Array) online configuration method and equipment, medium and program product

Abstract

The invention provides an FPGA online configuration method and device, a medium and a program product. The method comprises the steps that a main control chip downloads an encrypted FPGA programming file from an upper computer and stores the encrypted FPGA programming file to a specified directory; in response to equipment upgrading or power-off restarting operation, the main control chip searches a target version in a specified directory, and reads configured FPGA version information from the FPGA chip; in response to the fact that the configured FPGA version information is not matched with the target version, the main control chip erases a configuration memory corresponding to the FPGA chip and writes an FPGA programming file of the target version into the configuration memory; and in response to equipment power-on operation, the FPGA chip reads the FPGA programming file from the configuration memory for configuration in the AS mode. The invention provides a set of universal remote online configuration operation method, the operation is simple and feasible, the FPGA programming file does not need to be analyzed, and the influence of FPGA platform difference is greatly reduced.

Description

Technical Field

[0001] This disclosure relates to the field of FPGA application technology, and in particular to an FPGA online configuration method, device, medium and program product. Background Technology

[0002] FPGA (Field Programmable Gate Array) is a semi-custom programmable integrated circuit. Designers can design circuit structures according to their needs. Its near-infinite reprogrammability, parallel processing, and high-speed performance give it unparalleled advantages, making it widely used in communications, industrial control, aerospace, image processing, and other fields. In industrial control, FPGAs are widely used for expanding devices and parallel I / O processing. Industrial control systems typically operate 24 / 7, and software upgrades can usually only be performed remotely during maintenance. Redundant equipment may even require in-line upgrades without downtime. Upgrading FPGA devices is far more complex than upgrading CPUs.

[0003] Upgrading FPGA configuration files remotely online is quite difficult. Either it requires a second startup, which is not efficient and reliable enough, or the FPGA actively loads the configuration file from a dedicated storage device every time the system restarts. However, the configuration control of FPGAs from different manufacturers is different, so it is difficult to find a universal remote online upgrade method that is applicable to different platforms. Summary of the Invention

[0004] The technical problem to be solved by this disclosure is to overcome the shortcomings of the prior art in that remote online upgrade of FPGA configuration files is relatively difficult, and to provide an FPGA online configuration method, device, medium and program product.

[0005] This disclosure solves the above-mentioned technical problems through the following technical solution:

[0006] This disclosure provides an online configuration method for an FPGA, which is applied to a device including an FPGA chip and a main control chip. The online configuration method includes:

[0007] The main control chip downloads and saves the encrypted FPGA programming file from the host computer to a designated directory; wherein the FPGA programming file is a configuration file of at least one version of the FPGA chip;

[0008] In response to the device upgrade or power failure restart operation, the main control chip searches for the target version of the FPGA programming file in the specified directory, and the main control chip reads the configured FPGA version information from the FPGA chip;

[0009] In response to the mismatch between the configured FPGA version information and the target version, the main control chip erases the configuration memory corresponding to the FPGA chip and writes the FPGA programming file of the target version into the configuration memory;

[0010] In response to the power-on operation of the device, the FPGA chip reads the FPGA programming file from the configuration memory and performs configuration in AS (Active Serial Configuration Mode).

[0011] Optionally, the target version is the latest version in the specified directory;

[0012] The response to the mismatch between the configured FPGA version information and the target version includes:

[0013] The latest version is updated in response to the fact that the configured FPGA version information is newer.

[0014] Optionally, writing the target version of the FPGA programming file into the configuration memory includes:

[0015] The main control chip decrypts and verifies the target version of the FPGA programming file and then writes it into the configuration memory.

[0016] The main control chip reads the target version of the FPGA programming file stored in the configuration memory and verifies it. If the verification is successful, it indicates that the FPGA programming file has been successfully stored in the configuration memory; if the verification fails, it jumps to the previous step.

[0017] Optionally, the FPGA programming file upgrade is performed concurrently with the software upgrade of the main control chip;

[0018] The FPGA online configuration method also includes:

[0019] After the main control chip's software is upgraded, the device is reset.

[0020] Optionally, the FPGA online configuration method further includes:

[0021] Set the configuration mode of the FPGA chip to AS mode.

[0022] Optionally, the configuration memory is located inside or outside the FPGA chip.

[0023] Optionally, the main control chip is one of CPU (Central Processing Unit), MCU (Microcontroller Unit), and DSP (Digital Signal Processor).

[0024] This disclosure also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and used to run on the processor, wherein the processor executes the computer program to implement the aforementioned FPGA online configuration method.

[0025] This disclosure also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the aforementioned FPGA online configuration method.

[0026] This disclosure also provides a computer program product, including a computer program that, when executed by a processor, implements the FPGA online configuration method as described above.

[0027] Based on common knowledge in the field, the above-mentioned preferred conditions can be combined arbitrarily to obtain various preferred embodiments of this disclosure.

[0028] The positive advancements of this disclosure are as follows: By downloading and saving the FPGA programming file through the main control chip and writing the encrypted target version of the FPGA programming file into the configuration memory corresponding to the FPGA chip, the FPGA chip automatically loads the target version of the FPGA programming file from the configuration memory and runs it when the device is powered on in AS mode. This provides a universal method for remote online configuration (update, upgrade) of FPGA chips, which is simple and easy to operate, does not require parsing the FPGA programming file, and greatly reduces the impact of FPGA platform differences. Simultaneously, during the transmission and writing of the FPGA programming file, encryption, decryption, and verification enhance security, ensuring the correctness and reliability of the data written to the configuration memory. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 A flowchart of an FPGA online configuration method provided in Embodiment 1 of this disclosure;

[0030] Figure 2 A flowchart illustrating a specific implementation of step S13 of an FPGA online configuration method provided in Embodiment 1 of this disclosure;

[0031] Figure 3 This is a schematic diagram of the structure of an electronic device provided in Embodiment 2 of this disclosure. Detailed Implementation

[0032] The present disclosure is further illustrated below by way of embodiments, but the present disclosure is not limited to the scope of the embodiments described herein.

[0033] The prefixes such as "first" and "second" used in this disclosure are merely for distinguishing different descriptive objects and do not limit the position, order, priority, quantity, or content of the described objects. The use of ordinal numbers and other prefixes used to distinguish descriptive objects in this disclosure does not constitute a limitation on the described objects. The description of the described objects is given in the claims or the context of the embodiments, and should not be construed as an unnecessary limitation. Furthermore, in the description of this embodiment, unless otherwise stated, "multiple" means two or more.

[0034] Example 1

[0035] Figure 1 A flowchart of an exemplary embodiment of this disclosure provides an FPGA online configuration method. The FPGA online configuration method is applied to a device including an FPGA chip and a main control chip. The FPGA online configuration method includes:

[0036] S11. The main control chip downloads and saves the encrypted FPGA programming file from the host computer to the designated directory. The FPGA programming file is a configuration file of at least one version of the FPGA chip.

[0037] S12. In response to device upgrade or power failure restart operation, the main control chip searches for the target version of the FPGA programming file in the specified directory, and the main control chip reads the configured FPGA version information from the FPGA chip.

[0038] S13. In response to the mismatch between the configured FPGA version information and the target version, the main control chip erases the configuration memory corresponding to the FPGA chip and writes the FPGA programming file of the target version into the configuration memory.

[0039] S14. In response to the device power-on operation, the FPGA chip reads the FPGA programming file from the configuration memory and performs configuration in AS mode.

[0040] FPGA configuration file loading typically employs two modes: AS (Active Serial Configuration) and PS (Passive Serial Configuration). In AS mode, loading is usually performed by the CPU (main control chip), and the upgrade process is relatively simple, requiring only an update to the FPGA configuration file stored in the software and subsequent FPGA reconfiguration. However, the biggest drawback of PS configuration mode is that if the CPU or other devices require the FPGA for loading, a second boot is needed: the first to program the FPGA configuration, and the second to scan and initialize the FPGA device, resulting in a longer boot time. Secondly, PS loading mode is less efficient and reliable than AS mode. In AS mode, the FPGA automatically loads the configuration file from a dedicated storage device each time the system restarts. AS mode is not without its disadvantages; its biggest drawback is the difficulty of remote online FPGA configuration file upgrades, and the lack of a universal method for online upgrades due to variations in FPGA configuration control between different manufacturers.

[0041] In this embodiment, the designated directory is the internal directory of the main control chip, where one or more versions of FPGA programming files (i.e., FPGA configuration files) can be stored.

[0042] Configuration memory is a dedicated memory for storing configuration files. It can be located externally or internally to the FPGA chip. Once the FPGA design (configuration) is finalized, it rarely needs frequent updates or upgrades. Using dedicated configuration memory ensures that the configuration files are not lost even when power is off, which is beneficial for the long-term reliable storage of FPGA programming files. It is preferable to locate the configuration memory externally to the FPGA chip.

[0043] After the FPGA programming file is written to the configuration memory, it does not take effect immediately and needs to be loaded onto the FPGA chip. In AS mode, when the device is powered on, the FPGA chip actively reads the FPGA programming file from the configuration memory for configuration. Flexible FPGA reset operations are also supported; as long as the FPGA chip is powered on, it can trigger the reading of the FPGA programming file from the configuration memory for configuration. For example, loading can be achieved through a complete device restart, a partial reset of the FPGA chip's power supply, or by controlling the FPGA chip's configuration pins.

[0044] FPGA programming files are encrypted and their naming must follow certain rules. They can include version information of the FPGA programming file, making it convenient for the main control chip to retrieve the file version information by file name when querying the FPGA programming file.

[0045] In step S12, the main control chip can only read the configured FPGA version information from the FPGA chip if the FPGA chip is already running, that is, if the FPGA chip has loaded a certain version of the FPGA programming file and completed the configuration. For AS mode, this means that the FPGA chip has already loaded the current version of the FPGA programming file from the configuration memory.

[0046] In this embodiment, the main control chip downloads and saves the FPGA programming file, and writes the encrypted target version of the FPGA programming file into the configuration memory corresponding to the FPGA chip. When the device is powered on in AS mode, the FPGA chip automatically loads the target version of the FPGA programming file from the configuration memory and runs it. This provides a universal method for remote online configuration (update, upgrade) of the FPGA chip, which is simple and easy to operate, does not require parsing the FPGA programming file, and greatly reduces the impact of FPGA platform differences. Simultaneously, during the transmission and writing of the FPGA programming file, encryption, decryption, and verification enhance security, ensuring the correctness and reliability of the data written to the configuration memory.

[0047] In one embodiment, the target version is the latest version in the specified directory.

[0048] Step S13, "responding to a mismatch between the configured FPGA version information and the target version," includes:

[0049] The latest version is updated in response to information that is newer than the configured FPGA version.

[0050] In cases where an upgrade to a newer version is required, simply compare the configured FPGA programming file with the latest version to determine which version is newer.

[0051] In one embodiment, refer to Figure 2 Step S13, "Write the target version of the FPGA programming file to the configuration memory," includes:

[0052] S131. The main control chip decrypts and verifies the target version of the FPGA programming file and writes it into the configuration memory.

[0053] S132. The main control chip reads the target version of the FPGA programming file from the configuration memory and verifies it. If the verification is successful, it indicates that the FPGA programming file has been successfully stored in the configuration memory. If the verification fails, it jumps to the previous step (i.e., step S131).

[0054] The additional file encryption verification provides more protection. When upgrading the FPGA programming file, the main control chip first decrypts and verifies the file. Only files that pass the verification are written to the FPGA chip's dedicated configuration memory. After writing, the files are read from the configuration memory for verification to ensure that the written data is correct and reliable.

[0055] In one embodiment, the FPGA programming file upgrade is performed concurrently with the main control chip software upgrade.

[0056] FPGA online configuration methods also include:

[0057] After the main control chip's software is upgraded, the device is reset.

[0058] When the device is reset, it will be powered on again, and the FPGA chip will read the FPGA programming file from the configuration memory in AS mode for configuration.

[0059] In one embodiment, the FPGA online configuration method further includes:

[0060] Configure the FPGA chip in AS mode.

[0061] Only in AS mode will the FPGA chip automatically read the FPGA programming file from the configuration memory for configuration.

[0062] In one embodiment, the configuration memory is located either inside or outside the FPGA chip.

[0063] Preferably, the configuration memory is located outside the FPGA chip, independent of the FPGA chip, to avoid the FPGA chip becoming unusable due to memory failure.

[0064] In one embodiment, the main control chip is one of a CPU, MCU, and DSP.

[0065] Depending on the actual situation, a CPU, MCU, or DSP can be used as the main control chip.

[0066] Example 2

[0067] Figure 3 This is a schematic diagram of the structure of an electronic device according to an example embodiment of the present disclosure. The electronic device includes a memory, a processor, and a computer program stored in the memory and used to run on the processor. When the processor executes the computer program, it implements the FPGA online configuration method described in any of the above embodiments. Figure 3 The electronic device 90 shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments disclosed herein.

[0068] like Figure 3As shown, the electronic device 90 can be manifested as a general-purpose computing device, such as a server device. The components of the electronic device 90 may include, but are not limited to: at least one processor 91, at least one memory 92, and a bus 93 connecting different system components (including memory 92 and processor 91).

[0069] Bus 93 includes a data bus, an address bus, and a control bus.

[0070] The memory 92 may include volatile memory, such as random access memory (RAM) 921 and / or cache memory 922, and may further include read-only memory (ROM) 923.

[0071] The memory 92 may also include a program tool 925 (or utility) having a set (at least one) program module 924, such program module 924 including but not limited to: an operating system, one or more application programs, other program modules, and program data, each or some combination of these examples may include an implementation of a network environment.

[0072] The processor 91 executes various functional applications and data processing by running computer programs stored in the memory 92, such as the FPGA online configuration method provided in any of the above embodiments.

[0073] Electronic device 90 can also communicate with one or more external devices 94 (e.g., keyboard, pointing device, etc.). This communication can be performed through input / output (I / O) interface 95. Furthermore, electronic device 90 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public network, such as the Internet) via network adapter 96. As shown, network adapter 96 communicates with other modules of electronic device 90 via bus 93. It should be understood that, although not shown in the figure, other hardware and / or software modules can be used in conjunction with electronic device 90, including but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID (disk array) systems, tape drives, and data backup storage systems.

[0074] It should be noted that although several units / modules or sub-units / modules of the electronic device have been mentioned in the detailed description above, this division is merely exemplary and not mandatory. In fact, according to embodiments of this disclosure, the features and functions of two or more units / modules described above can be embodied in one unit / module. Conversely, the features and functions of one unit / module described above can be further divided and embodied by multiple units / modules.

[0075] Example 3

[0076] This disclosure also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the FPGA online configuration method provided in any of the above embodiments.

[0077] The readable storage medium may be more specifically adopted, including but not limited to: portable disk, hard disk, random access memory, read-only memory, erasable programmable read-only memory, optical storage device, magnetic storage device, or any suitable combination thereof.

[0078] Example 4

[0079] This disclosure also provides a computer program product, including a computer program that, when executed by a processor, implements the FPGA online configuration method described in any of the above embodiments.

[0080] The program code for executing the computer program product of this disclosure can be written in any combination of one or more programming languages, and the program code can be executed entirely on a user device, partially on a user device, as a stand-alone software package, partially on a user device and partially on a remote device, or entirely on a remote device.

[0081] While specific embodiments of this disclosure have been described above, those skilled in the art should understand that these are merely illustrative examples, and the scope of protection of this disclosure is defined by the appended claims. Those skilled in the art can make various changes or modifications to these embodiments without departing from the principles and essence of this disclosure, but all such changes and modifications fall within the scope of protection of this disclosure.

Claims

1. An FPGA online configuration method, characterized in that: The FPGA online configuration method is applied to a device including an FPGA chip and a main control chip, and the FPGA online configuration method includes: The master control chip downloads and saves the encrypted FPGA programming file from the host computer to a specified directory; wherein the FPGA programming file is a configuration file of at least one version of the FPGA chip; In response to the device upgrade or power-off restart operation, the main control chip searches for the FPGA programming file of the target version in the specified directory, and the main control chip reads the configured FPGA version information from the FPGA chip; In response to the configured FPGA version information not matching the target version, the main control chip erases the configuration memory corresponding to the FPGA chip, and writes the FPGA programming file of the target version into the configuration memory; In response to the device power-on operation, the FPGA chip reads the FPGA programming file from the configuration memory in AS mode for configuration.

2. The FPGA online configuration method according to claim 1, characterized in that: The target version is the latest version in the specified directory; The step of responding that the configured FPGA version information does not match the target version includes: In response to the latest version being newer than the configured FPGA version information.

3. The FPGA online configuration method according to claim 1, characterized in that: Writing the target version of the FPGA programming file into the configuration memory comprises: The main control chip decrypts and verifies the FPGA programming file of the target version and writes it into the configuration memory; The main control chip reads the stored FPGA programming file of the target version from the configuration memory and performs verification. If the verification succeeds, it indicates that the FPGA programming file is successfully stored in the configuration memory; if the verification fails, it jumps to the previous step.

4. The FPGA online configuration method according to claim 1, characterized in that: The FPGA programming file upgrade is performed along with the software upgrade of the main control chip; The FPGA online configuration method also includes: After the software of the main control chip is upgraded, the device is reset.

5. The FPGA online configuration method according to claim 1, characterized in that: The FPGA online configuration method also includes: The configuration mode of the FPGA chip is set to AS mode.

6. The FPGA online configuration method according to claim 1, characterized in that: The configuration memory is arranged inside or outside the FPGA chip.

7. The FPGA online configuration method according to claim 1, characterized in that: The main control chip is one of CPU, MCU and DSP.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and used to run on the processor, characterized in that: When the processor executes the computer program, the FPGA online configuration method according to any one of claims 1 to 7 is implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the FPGA online configuration method according to any one of claims 1 to 7 is implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the FPGA online configuration method according to any one of claims 1 to 7 is implemented.

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