Manufacturing method of semiconductor structure and device for preparing semiconductor structure

Abstract

The invention provides a manufacturing method of a semiconductor structure and a device for preparing the semiconductor structure. The manufacturing method of the semiconductor structure comprises the following steps: providing a to-be-packaged structure and a carrier plate; the to-be-packaged structure comprises at least one electrical element; the carrier plate is provided with an accommodating cavity; a bonding layer is arranged on one side of the containing cavity, and the bonding layer is bonded with the carrier plate; placing the to-be-packaged structure in the accommodating cavity, and bonding the to-be-packaged structure with the bonding layer to obtain a semiconductor intermediate structure; fixing the semiconductor intermediate structure on a first mold, wherein the bonding layer is located on one side, facing the first mold, of the to-be-packaged structure; a cavity of the second mold is filled with a molding compound, and a release film is arranged on the inner surface of the cavity; the first mold and the second mold are closed, the second mold extrudes the plastic packaging material to enable the plastic packaging material to enter the containing cavity, and a plastic packaging layer wrapping the to-be-packaged structure is formed; and removing the carrier plate, the bonding layer, the first mold and the second mold.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method for manufacturing a semiconductor structure and a device for manufacturing a semiconductor structure. Background Art

[0002] In common semiconductor packaging technology, especially in packaging technology of large-size board-level semiconductor structures, a plastic sealing layer is usually formed by compression molding. The process of forming the plastic sealing layer requires the use of a compression molding mold including a first sub-mold and a second sub-mold. The process of forming the plastic sealing layer is as follows: first, the structure to be packaged is mounted on a carrier, and the carrier is fixed on the first sub-module; the plastic sealing material is filled in the cavity of the second sub-mold, and the inner surface of the cavity is covered with a release film, which facilitates the subsequent separation of the second sub-mold from the plastic sealing material; the second sub-mold is combined with the first sub-mold so that the plastic sealing material covers the structure to be packaged to form a plastic sealing layer; finally, the first sub-mold, the second sub-mold and the carrier are removed.

[0003] In the above-mentioned packaging technology, the thickness of the plastic sealing layer is limited by the stretching amplitude of the release film. When the depth of the cavity of the second sub-mold is too large, the release film has a poor fit with the inner surface of the cavity. After the second sub-mold and the first sub-mold are combined, the extrusion of the release film will cause the release film to wrinkle or crack, affecting the quality of the formed plastic sealing layer and thus affecting the quality of the product. Therefore, the compression plastic sealing molding method cannot be used to form a plastic sealing layer with a larger thickness. Summary of the invention

[0004] The embodiments of the present application provide a method for manufacturing a semiconductor structure and an apparatus for manufacturing a semiconductor structure.

[0005] A first aspect of an embodiment of the present application provides a method for manufacturing a semiconductor structure, the method for manufacturing a semiconductor structure comprising:

[0006] Providing a structure to be packaged and a carrier; the structure to be packaged includes at least one electrical component; the carrier is provided with a receiving cavity;

[0007] A bonding layer is provided on one side of the accommodating cavity, and the bonding layer is bonded to the carrier plate;

[0008] Placing the structure to be packaged in the accommodating cavity and bonding it to the bonding layer to obtain a semiconductor intermediate structure;

[0009] Fixing the semiconductor intermediate structure to a first mold, wherein the bonding layer is located on a side of the structure to be packaged facing the first mold;

[0010] Filling the cavity of the second mold with a molding compound, and providing a release film on the inner surface of the cavity;

[0011] The first mold and the second mold are molded together, and the second mold extrude the molding compound so that the molding compound enters the containing cavity to form a molding layer covering the structure to be packaged;

[0012] The carrier board, the adhesive layer, the first mold and the second mold are removed.

[0013] In one embodiment, the accommodating cavity penetrates the carrier plate; or, in the thickness direction of the carrier plate, the size of the accommodating cavity is smaller than the size of the carrier plate.

[0014] In one embodiment, the plastic encapsulation layer includes a cutting area; and the removing of the carrier board, the bonding layer, the first mold and the second mold includes:

[0015] removing the first mold, the second mold and the bonding layer;

[0016] The plastic encapsulation layer is cut along the cutting area in the thickness direction of the plastic encapsulation layer to separate the plastic encapsulation layer from the carrier board.

[0017] In one embodiment, the plastic encapsulation layer includes a cutting area and a reserved area outside the cutting area, and the cutting area and the reserved area are both annular; when the accommodating cavity passes through the carrier, the plastic encapsulation layer is cut along the cutting area in the thickness direction of the plastic encapsulation layer to separate the plastic encapsulation layer from the carrier, including:

[0018] The plastic sealing layer is cut along the cutting area in the thickness direction of the plastic sealing layer, so that the portion of the plastic sealing layer surrounded by the cutting area is separated from the carrier, and the portion of the plastic sealing layer located in the reserved area is connected to the carrier.

[0019] In one embodiment, fixing the semiconductor intermediate structure to the first mold includes:

[0020] The bonding layer is adsorbed on the first mold by vacuum adsorption.

[0021] In one embodiment, the accommodating cavity penetrates the carrier board; and the adhesive layer is provided on one side of the accommodating cavity, comprising:

[0022] An adhesive layer is arranged on one side surface of the carrier plate, and the adhesive layer covers the opening of the accommodating cavity located on the same side.

[0023] In one embodiment, removing the carrier board, the bonding layer, the first mold and the second mold includes:

[0024] The first mold and the second mold are removed, so that the surface of the plastic sealing layer facing away from the bonding layer exceeds the carrier board in the obtained structure;

[0025] Performing a thinning process on the surface of the plastic sealing layer facing away from the bonding layer so that the thickness of the plastic sealing layer is the same as the thickness of the carrier board;

[0026] The adhesive layer and the carrier are removed.

[0027] In one embodiment, the second mold includes an abutment portion located at a peripheral side of the cavity; and the step of closing the first mold with the second mold includes:

[0028] The second mold is moved closer to the first mold so that the abutting portion abuts against the carrier plate.

[0029] In one embodiment, the electrical component includes at least one of a chip and a passive device.

[0030] In one embodiment, after removing the carrier, the bonding layer, the first mold and the second mold, the method for preparing the semiconductor structure further includes:

[0031] A rewiring layer electrically connected to the electrical element is formed on the plastic packaging layer.

[0032] A second aspect of an embodiment of the present application provides a device for preparing a semiconductor structure, which is used in the above-mentioned manufacturing method. The device for preparing a semiconductor structure includes:

[0033] A plastic encapsulation mold assembly, the plastic encapsulation mold assembly comprising a first mold and a second mold, the second mold being provided with a cavity for accommodating the plastic encapsulation material;

[0034] A carrier plate is detachably fixed on the first mold, and a receiving cavity is provided on a side facing the second mold for receiving part of the plastic packaging material.

[0035] In one embodiment, the carrier plate is made of metal.

[0036] In one embodiment, the accommodating cavity penetrates the carrier plate; or, in the thickness direction of the carrier plate, the size of the accommodating cavity is smaller than the size of the carrier plate.

[0037] The manufacturing method of the semiconductor structure and the device for preparing the semiconductor structure provided by the embodiments of the present application have a accommodating cavity provided on the carrier plate. After the first mold and the second mold are molded together, part of the plastic encapsulation material will enter the accommodating cavity of the carrier plate, and the amount of the plastic encapsulation material in the cavity of the second mold is reduced. When the second mold extrude the plastic encapsulation material, the extrusion effect of the plastic encapsulation material on the release film is smaller, which can reduce the stretching amplitude of the release film, avoid wrinkles or ruptures of the release film and affect the quality of the plastic encapsulation layer, and improve the quality of the semiconductor structure under the premise of ensuring a large thickness of the plastic encapsulation layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 is a flow chart of a method for manufacturing a semiconductor structure provided by an exemplary embodiment of the present application;

[0039] Figure 2 is a cross-sectional view of a first structure to be packaged provided by an exemplary embodiment of the present application;

[0040] Figure 3 is a cross-sectional view of a carrier provided by an exemplary embodiment of the present application;

[0041] Figure 4 is a cross-sectional view of a first intermediate structure provided by an exemplary embodiment of the present application;

[0042] Figure 5 yes Figure 4 A schematic diagram of the three-dimensional structure of the first intermediate structure shown;

[0043] Figure 6 is a cross-sectional view of a second intermediate structure provided by an exemplary embodiment of the present application;

[0044] Figure 7 yes Figure 6 A schematic diagram of the three-dimensional structure of the second intermediate structure shown;

[0045] Figure 8 is a cross-sectional view of a third intermediate structure provided by an exemplary embodiment of the present application;

[0046] Fig. 9 is a cross-sectional view of a fourth intermediate structure provided by an exemplary embodiment of the present application;

[0047] Fig.10 is a cross-sectional view of a fifth intermediate structure provided by an exemplary embodiment of the present application;

[0048] Fig.11 is a cross-sectional view of a sixth intermediate structure provided by an exemplary embodiment of the present application;

[0049] Fig.12 is a cross-sectional view of a seventh intermediate structure provided by an exemplary embodiment of the present application;

[0050] Fig.13 is a cross-sectional view of an eighth intermediate structure provided by an exemplary embodiment of the present application;

[0051] Fig.14 is a cross-sectional view of a ninth intermediate structure provided by an exemplary embodiment of the present application;

[0052] Fig.15 yes Fig.14 A top view of a ninth intermediate structure shown;

[0053] Fig.16 is a cross-sectional view of a tenth intermediate structure provided by an exemplary embodiment of the present application;

[0054] Fig.17 is a cross-sectional view of a carrier provided by another exemplary embodiment of the present application;

[0055] Fig.18 is a cross-sectional view of an eleventh intermediate structure provided by an exemplary embodiment of the present application;

[0056] Fig.19 is a cross-sectional view of a semiconductor structure provided by an exemplary embodiment of the present application;

[0057] Fig. 20 is a cross-sectional view of a semiconductor structure provided by another exemplary embodiment of the present application. Specific embodiments

[0058] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0059] The terms used in this application are for the purpose of describing specific embodiments only and are not intended to limit this application. The singular forms of "a", "said" and "the" used in this application and the appended claims are also intended to include plural forms unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items.

[0060] It should be understood that although the terms first, second, third, etc. may be used in the present application to describe various information, these information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0061] Some embodiments of the present application are described in detail below in conjunction with the accompanying drawings. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0062] The present application provides a method for manufacturing a semiconductor structure. Figure 1As shown, the method for manufacturing the semiconductor structure includes the following steps 110 to 170 .

[0063] In step 110, a structure to be packaged and a carrier are provided; the structure to be packaged includes at least one electrical component; and the carrier is provided with a receiving cavity.

[0064] In step 120, a bonding layer is provided on one side of the accommodating cavity, and the bonding layer is bonded to the carrier board.

[0065] In step 130, the structure to be packaged is placed in the receiving cavity and bonded to the bonding layer to obtain a semiconductor intermediate structure.

[0066] In step 140 , the semiconductor intermediate structure is fixed to a first mold, and the adhesive layer is located on a side of the structure to be packaged facing the first mold.

[0067] In step 150 , a molding compound is filled into the cavity of the second mold, and a release film is provided on the inner surface of the cavity.

[0068] In step 160, the first mold and the second mold are molded together, and the second mold squeezes the molding compound so that the molding compound enters the containing cavity to form a molding layer covering the structure to be packaged.

[0069] In step 170 , the carrier, the adhesive layer, the first mold, and the second mold are removed.

[0070] In the manufacturing method of the semiconductor structure provided in the embodiment of the present application, since the carrier is provided with a accommodating cavity, part of the encapsulating material will enter the accommodating cavity of the carrier after the first mold and the second mold are molded together, and the amount of the encapsulating material in the cavity of the second mold is reduced. When the second mold extrude the encapsulating material, the extrusion effect of the encapsulating material on the release film is smaller, which can reduce the stretching amplitude of the release film, avoid wrinkles or ruptures of the release film and affect the quality of the encapsulating layer, and improve the quality of the semiconductor structure under the premise of ensuring a large thickness of the encapsulating layer.

[0071] Each step is described in detail below.

[0072] In step 110, a structure to be packaged and a carrier are provided; the structure to be packaged includes at least one electrical component; and the carrier is provided with a receiving cavity.

[0073] In one embodiment, the electrical component includes at least one of a chip and a passive device. The passive device may include at least one of a capacitor, an inductor and a resistor. In some embodiments, the structure to be packaged may include only electrical components, and in other embodiments, the structure to be packaged may include electrical components and electrical connectors, and the electrical connectors may be, for example, a circuit board or a lead frame.

[0074] In one embodiment, Figure 2 As shown, the structure to be packaged 10 includes a circuit board 11, a first chip 12, a second chip 13, a third chip 14, a first passive device 15, and a second passive device 16. The first chip 12 and the second chip 13 are mounted on the circuit board 11, respectively, and the pads of the first chip 12 and the second chip 13 face the circuit board 11. The circuit board 11 may include a plurality of rewiring layers and a plurality of conductive protrusions 111 located on the side of the plurality of rewiring layers away from the first chip 12. In the illustrated embodiment, the circuit board 11 includes a rewiring layer 114 electrically connected to the first chip 12 and the second chip 13, a rewiring layer 113 located on the side of the rewiring layer 114 away from the first chip 12 and electrically connected to the rewiring layer 114, and a rewiring layer 112 located on the side of the rewiring layer 113 away from the first chip 12 and electrically connected to the rewiring layer 113, and a plurality of conductive protrusions 111 are respectively located on the side of the rewiring layer 112 away from the first chip 12 and electrically connected to the rewiring layer 112. The structure to be packaged 10 further includes a first insulating layer 17 covering the circuit board 11, an encapsulation layer 18 encapsulating the first chip 12 and the second chip 13, a rewiring layer 191 located on the side of the encapsulation layer 18 away from the circuit board 11, a rewiring layer 192 located on the side of the rewiring layer 191 away from the circuit board 11, and a second insulating layer 19 covering the rewiring layer 191. The surface of the conductive protrusion 111 away from the first chip 12 exposes the first insulating layer 17. The encapsulation layer 18 is provided with a plurality of through holes, each of which is provided with a conductive portion 16, and the rewiring layer 191 is electrically connected to the circuit board 11 through the conductive portion 16. The rewiring layer 192 is located on the side of the second insulating layer 19 away from the circuit board 11. The third chip 14, the first passive device 15, and the second passive device 16 are respectively located on the side of the rewiring layer 192 away from the circuit board 11, and are respectively electrically connected to the rewiring layer 192. The structure to be packaged 10 described above can make the third chip 14, the first passive device 15 and the second passive device 16 electrically connected to the pads of the first chip 12 or the pads of the second chip 13 through the rewiring layer 192, the rewiring layer 191, the conductive part 16 and the rewiring layer 114 respectively; the pads of the first chip 12 and the second chip 13 are finally led out through the conductive protrusion 111. In the package structure 10 described above, the electrical components are stacked and the thickness of the package structure 10 is relatively large.

[0075] In one embodiment, Figure 3 As shown, the accommodating cavity 21 penetrates the carrier 20. That is, in the thickness direction of the carrier 20, the size of the accommodating cavity 21 is equal to the size of the carrier 20. At this time, the carrier 20 is annular, and the space enclosed by the annular carrier 20 is the accommodating cavity 21.

[0076] In another embodiment, in the thickness direction of the carrier plate 20 , the size of the accommodating cavity 21 is smaller than the size of the carrier plate 20 . That is, the carrier plate 20 is provided with a groove, and the groove is the accommodating cavity 21 .

[0077] In one embodiment, the material of the carrier plate 20 may be a hard material such as metal or stainless steel, so that the carrier plate 20 is not easily deformed.

[0078] In step 120, a bonding layer is provided on one side of the accommodating cavity, and the bonding layer is bonded to the carrier board.

[0079] In one embodiment, when the accommodating cavity 21 passes through the carrier 20, the step of providing an adhesive layer on one side of the accommodating cavity includes the following process: providing an adhesive layer on a surface of one side of the carrier, and the adhesive layer covers the opening of the accommodating cavity on the same side.

[0080] Through this step, we can obtain Figure 4 and Figure 5 The first intermediate structure shown. Figure 4 and Figure 5 As shown, the adhesive layer 30 is located on one side surface of the carrier 20 , and the area of ​​the adhesive layer 30 is larger than the area of ​​the opening of the accommodating cavity 21 . The adhesive layer 30 covers the accommodating cavity 21 and the opening of the adhesive layer on the same side.

[0081] In another embodiment, when the size of the accommodating cavity 21 is smaller than the size of the carrier 20 in the thickness direction of the carrier 20, the step of providing an adhesive layer on one side of the accommodating cavity includes the following process: providing an adhesive layer on the bottom surface of the accommodating cavity 21. The bottom surface of the accommodating cavity 21 refers to the surface of the accommodating cavity 21 opposite to the opening.

[0082] In step 130, the structure to be packaged is placed in the receiving cavity and bonded to the bonding layer to obtain a semiconductor intermediate structure.

[0083] Through this step, we can obtain Figure 6 and Figure 7 The second intermediate structure shown is a semiconductor intermediate structure. Figure 6 and Figure 7 As shown, the accommodating cavity 21 can accommodate multiple structures 10 to be packaged, and one side surface of each structure 10 to be packaged is respectively bonded to the adhesive layer 30. The thickness of the structure 10 to be packaged is less than the depth of the accommodating cavity 21, and the structures 10 to be packaged are all located in the accommodating cavity 21, and the surface of the carrier 20 away from the adhesive layer 30 exceeds the surface of the structure 10 to be packaged away from the adhesive layer 30. In other embodiments, the accommodating cavity 21 can accommodate only one structure 10 to be packaged.

[0084] In one embodiment, the adhesive layer 30 may be made of an easily peelable material so as to be separated from the structure to be packaged 10 later. For example, the adhesive layer 30 may be made of a thermally releasable material that can lose its viscosity by heating. The adhesive layer 30 is only viscous on the surface facing the carrier 10 so as to be bonded to the carrier 20 and the structure to be packaged 10. The surface of the adhesive layer 30 facing away from the carrier 10 is not viscous so as to prevent the adhesive layer from adhering to other structures.

[0085] In step 140 , the semiconductor intermediate structure is fixed to a first mold, and the adhesive layer is located on a side of the structure to be packaged facing the first mold.

[0086] In an embodiment of the present application, a compression molding mold assembly is required in the process of preparing a semiconductor structure. The compression molding mold assembly includes a first mold and a second mold. The first mold and the second mold are combined to form a molding layer.

[0087] Through this step, we can obtain Figure 8 The third intermediate structure shown. Figure 8 As shown, after the second intermediate structure is fixed on the first mold 41 , the adhesive layer 30 is located between the carrier plate 20 and the first mold 41 .

[0088] In one embodiment, the step of fixing the semiconductor intermediate structure to the first mold includes the following process: using vacuum adsorption to adsorb the bonding layer to the first mold. Using vacuum adsorption to adsorb the bonding layer 30 and the first mold 41 together can make the bonding layer 30 relatively flat, and avoid wrinkles in the bonding layer 30 that affect the quality of the final semiconductor structure.

[0089] In one embodiment, the step of fixing the semiconductor intermediate structure to the first mold may further include the following process: using a fixing part to connect the carrier 20 to the first mold 41. The fixing part may be, for example, a mechanical claw. The carrier 20 has a large mass, and using a fixing part to connect the carrier 20 to the first mold 41 can prevent the carrier 20 from driving the adhesive layer 30 to separate from the first mold 41.

[0090] In step 150 , a molding compound is filled into the cavity of the second mold, and a release film is provided on the inner surface of the cavity.

[0091] Through step 140, the following can be obtained: Fig. 9 The fourth intermediate structure shown. Fig. 9As shown, the second mold 42 is provided with a cavity 423 facing the first mold 41, and the cavity 423 is filled with a molding compound 51. The release film 424 covers the bottom surface and the side surface of the cavity 423, and is partially located outside the cavity 423. The second mold 42 includes an annular abutment portion 422 and a baffle 421 located inside the abutment portion 422. The side surfaces of the baffle 421 are all in abutment with the abutment portion 422. The space enclosed by the abutment portion 422 and located on the side of the baffle 421 facing the first mold 41 is the cavity 423. The baffle 421 can move in the length direction of the abutment portion 422 to change the size of the cavity 423.

[0092] In one embodiment, the amount of the molding compound can be determined according to the size of the accommodating cavity 21 of the carrier 20 and the size of the structure to be packaged, so as to ensure that the thickness of the subsequently formed molding layer is large enough so that the molding layer can encapsulate the structure to be packaged.

[0093] In one embodiment, the molding compound may be a polymer resin, a resin composite material, a polymer composite material, etc. For example, the molding compound may be a resin with a filler, wherein the filler may be an inorganic particle.

[0094] In step 160, the first mold and the second mold are molded together, and the second mold squeezes the molding compound so that the molding compound enters the containing cavity to form a molding layer covering the structure to be packaged.

[0095] Through step 160, the following can be obtained: Fig.10 During the closing process of the first mold 41 and the second mold 42 , the baffle 421 moves toward the first mold 41 and pushes the molding compound 51 in the cavity 423 so that part of the molding compound 51 enters the accommodating cavity 21 of the carrier 20 .

[0096] In one embodiment, the step of closing the first mold with the second mold includes the following process: moving the second mold closer to the first mold so that the abutting portion abuts against the carrier plate.

[0097] like Fig.10 As shown, after the first mold 41 and the second mold 42 are molded together, the abutment portion 422 of the second mold 42 abuts against the carrier 20, so that the entire encapsulation material 51 is located in the accommodating cavity 21 and the cavity 423, preventing the encapsulation material 51 from moving to the outside of the carrier 20 and reducing the amount of the encapsulation material located in the accommodating cavity 21 and the cavity 423, which would result in defects such as voids in the finally formed encapsulation layer.

[0098] In step 170 , the carrier, the adhesive layer, the first mold, and the second mold are removed.

[0099] In one embodiment, the step 170 of removing the carrier, the adhesive layer, the first mold and the second mold includes the following process:

[0100] First, the first mold and the second mold are removed, and in the obtained structure, the surface of the plastic encapsulation layer facing away from the bonding layer exceeds the carrier board.

[0101] Through this step, we can obtain Fig.11 The sixth intermediate structure shown. Fig.11 As shown, the surface of the plastic encapsulation layer 60 facing away from the bonding layer 30 exceeds the carrier 20. In this way, after the first mold 41 and the second mold 42 are molded together, during the process of the baffle 421 of the second mold 42 squeezing the plastic encapsulation material to form the plastic encapsulation layer 60, there is a certain distance between the baffle 421 and the carrier 20, so that the plastic encapsulation material can be squeezed more densely by the baffle 421, thereby preventing the formed plastic encapsulation layer 60 from having voids and affecting the quality of the semiconductor structure.

[0102] In this step, the adhesive layer 30 can be separated from the first mold 41 by reducing the vacuum degree between the adhesive layer 30 and the first mold 41; there is no adhesion between the release film 424 and the plastic sealing layer 60 and the carrier 20, and the second mold 42 is easier to separate from the plastic sealing layer 60 and the carrier 20.

[0103] Subsequently, a surface of the plastic sealing layer facing away from the bonding layer is thinned so that the thickness of the plastic sealing layer is the same as the thickness of the carrier board.

[0104] Through this step, we can obtain Fig.12 The seventh intermediate structure shown. Fig.12 As shown, after the plastic encapsulation layer 60 is thinned, its two opposite surfaces are flush with the surfaces of the carrier board 20 on the same side.

[0105] In one embodiment, the thickness of the carrier 20 can be set to be the same as the thickness of the plastic layer required in the semiconductor structure. During the thinning process of the plastic layer 60, the thinning degree of the plastic layer can be controlled according to the thickness of the carrier 20, which is convenient for operators to operate.

[0106] In one embodiment, the plastic encapsulation layer 60 may be thinned by a grinding process.

[0107] Then, the adhesive layer and the carrier are removed.

[0108] In one embodiment, when the adhesive layer is a thermal separation material, it can be heated to lose its viscosity, thereby separating the adhesive layer from the plastic encapsulation layer and the structure to be packaged. The plastic encapsulation layer can be cut to separate the plastic encapsulation layer from the carrier, thereby removing the carrier.

[0109] In one embodiment, the accommodating cavity penetrates the carrier; the plastic encapsulation layer includes a cutting area. The step 170 of removing the carrier, the adhesive layer, the first mold and the second mold includes the following process:

[0110] First, the first mold, the second mold and the bonding layer are removed.

[0111] Through this step, we can obtain Fig.13 The eighth intermediate structure shown. Fig.13 As shown, the eighth intermediate structure includes a plastic encapsulation layer 60, a carrier board 20 and a structure to be packaged 10. The plastic encapsulation layer 60 includes a reserved area 62 and two cutting areas 61, both of which are annular and located inside the reserved area 62.

[0112] Subsequently, the plastic encapsulation layer is cut along the cutting area in the thickness direction of the plastic encapsulation layer to separate the plastic encapsulation layer from the carrier board.

[0113] Through this step, we can obtain Fig.14 and Fig.15 The ninth intermediate structure shown. Fig.14 and Fig.15 As shown, the portion of the plastic encapsulation layer 60 located in the two cutting areas 61 is cut off, and the plastic encapsulation layer 60 is divided into three parts: a portion located in the reserved area 62 , a portion located between the two cutting areas 61 , and a portion encapsulating the structure 10 to be packaged.

[0114] In one embodiment, the step of cutting the plastic sealing layer along the cutting area in the thickness direction of the plastic sealing layer to separate the plastic sealing layer from the carrier comprises the following process: cutting the plastic sealing layer along the cutting area in the thickness direction of the plastic sealing layer to separate the portion of the plastic sealing layer surrounded by the cutting area from the carrier, and the portion of the plastic sealing layer located in the reserved area is connected to the carrier.

[0115] Through this step, we can obtain Fig.16 The tenth intermediate structure shown and Fig.17 As shown in the carrier board. Fig.17 As shown, the portion of the plastic encapsulation layer 60 located in the reserved area 62 is connected to the inner side of the carrier 10. This arrangement can avoid cutting the carrier and causing damage to the carrier during the cutting of the plastic encapsulation layer. By setting the accommodating cavity 21 of the carrier 20 to penetrate the carrier 20, the carrier 20 will not be cut during the cutting of the plastic encapsulation layer, and the carrier 20 can be reused, which helps to reduce the manufacturing cost of the semiconductor structure.

[0116] In one embodiment, Fig.17When the carrier 20 shown is used to manufacture a semiconductor structure, the manufacturing process can refer to the above steps 110 to 170. After step 130, the following can be obtained: Fig.18 The eleventh intermediate structure shown.

[0117] In one embodiment, after the step 170 of removing the carrier, the adhesive layer, the first mold and the second mold, that is, after obtaining the Fig.16 After the semiconductor structure shown in the figure, the method for preparing the semiconductor structure further comprises the following steps: cutting the plastic encapsulation layer to obtain a plurality of semiconductor structures, each of which comprises at least one structure to be encapsulated. Fig.19 The semiconductor structure shown. Fig.19 As shown, the semiconductor structure includes one structure to be packaged 10. In other embodiments, the semiconductor structure may include two or more structures to be packaged 10.

[0118] In one embodiment, before the step of cutting the plastic encapsulation layer to obtain multiple semiconductor structures, each of which includes at least one structure to be packaged, the method for manufacturing the semiconductor structure also includes: using a ball planting process to form multiple conductive balls on the exposed surface of the structure to be packaged, or using a tin plating process to form a conductive structure on the exposed surface of the structure to be packaged. Fig.19 In the illustrated embodiment, a plurality of conductive balls 70 are formed on the exposed surface of the structure 10 to be packaged.

[0119] In one embodiment, after the step 170 of removing the carrier, the adhesive layer, the first mold and the second mold, that is, after obtaining the Fig.16 After the semiconductor structure shown in the figure is formed, the method for preparing the semiconductor structure further comprises the following step: forming a rewiring layer electrically connected to the electrical element on the plastic packaging layer.

[0120] After forming the redistribution layer, the following can be obtained: Fig. 20 The semiconductor structure shown. Fig. 20 As shown, the rewiring layer 80 is located on the surface of the structure to be packaged 10 and is electrically connected to the structure to be packaged 10. The rewiring layer 80 includes a plurality of trace structures 81 and a conductive column 82 located on the side of the trace structure 81 away from the plastic encapsulation layer 60. A plurality of conductive columns 82 may be provided on the side of each trace structure 81 away from the plastic encapsulation layer 60. The semiconductor structure further includes a third insulating layer 90, which covers the rewiring layer 80, and the surface of the conductive column 82 away from the plastic encapsulation layer 60 exposes the third insulating layer 90. The third insulating layer 90 can protect the rewiring layer 80.

[0121] The manufacturing method of the semiconductor structure provided in the embodiment of the present application, compared with the solution of forming the plastic sealing layer by the injection molding process, can form a larger panel-level structure, which is convenient for subsequent other process steps on the panel-level structure; and the utilization rate of the plastic sealing material is higher, which helps to reduce the manufacturing cost of the semiconductor structure.

[0122] The present application also provides a device for preparing a semiconductor structure, and the device for preparing a semiconductor structure is used in the manufacturing method described in any of the above embodiments. Fig. 9 As shown, the device for preparing a semiconductor structure includes a carrier 20 and a plastic encapsulation mold assembly, wherein the carrier 20 is provided with a receiving cavity 21, and the plastic encapsulation mold assembly includes a first mold 41 and a second mold 42, wherein the second mold 42 is provided with a cavity 423 for receiving a plastic encapsulation material. The plastic encapsulation mold assembly is a compression plastic encapsulation mold assembly.

[0123] In one embodiment, Figure 3 As shown, the accommodating cavity 21 penetrates the carrier 20. In another embodiment, in the thickness direction of the carrier 20, the size of the accommodating cavity 21 is smaller than the size of the carrier 20. That is, the carrier 20 is provided with a groove, and the groove is the accommodating cavity 21.

[0124] In one embodiment, the carrier plate is made of metal, so that the carrier plate can be easily separated from the first mold and the carrier plate is not easily deformed.

[0125] The device for preparing a semiconductor structure and the method for manufacturing a semiconductor structure provided in the embodiment of the present application belong to the same inventive concept, and the description of relevant details and beneficial effects can be referred to each other, and will not be repeated here.

[0126] It should be noted that in the accompanying drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. It is also understood that when an element or layer is referred to as being "on" another element or layer, it may be directly on the other element, or there may be an intermediate layer. In addition, it is understood that when an element or layer is referred to as being "under" another element or layer, it may be directly under the other element, or there may be more than one intermediate layer or element. In addition, it is also understood that when a layer or element is referred to as being "between" two layers or two elements, it may be the only layer between the two layers or two elements, or there may also be more than one intermediate layer or element. Similar reference numerals throughout the text indicate similar elements.

[0127] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the disclosure disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0128] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A method for manufacturing a semiconductor structure, characterized in that: include: Provide the structure to be packaged and the carrier board; The structure to be packaged includes at least one electrical component; the carrier is provided with a receiving cavity; A bonding layer is provided on one side of the accommodating cavity, and the bonding layer is bonded to the carrier plate; Placing the structure to be packaged in the accommodating cavity and bonding it to the bonding layer to obtain a semiconductor intermediate structure; Fixing the semiconductor intermediate structure to a first mold, wherein the bonding layer is located on a side of the structure to be packaged facing the first mold; Filling the cavity of the second mold with a molding compound, and providing a release film on the inner surface of the cavity; The first mold and the second mold are molded together, and the second mold extrude the molding compound so that the molding compound enters the accommodating cavity to form a molding layer covering the structure to be packaged; The carrier board, the adhesive layer, the first mold and the second mold are removed.

2. The method for manufacturing a semiconductor structure according to claim 1, characterized in that: The accommodating cavity penetrates the carrier plate; or, in the thickness direction of the carrier plate, the size of the accommodating cavity is smaller than the size of the carrier plate.

3. The method for manufacturing a semiconductor structure according to claim 2, characterized in that: The plastic sealing layer includes a cutting area; The removing of the carrier plate, the bonding layer, the first mold and the second mold comprises: removing the first mold, the second mold and the bonding layer; The plastic encapsulation layer is cut along the cutting area in the thickness direction of the plastic encapsulation layer to separate the plastic encapsulation layer from the carrier board.

4. The method for manufacturing a semiconductor structure according to claim 3, characterized in that: The plastic sealing layer comprises a cutting area and a reserved area outside the cutting area, wherein the cutting area and the reserved area are both annular; when the accommodating cavity passes through the carrier, the plastic sealing layer is cut along the cutting area in the thickness direction of the plastic sealing layer to separate the plastic sealing layer from the carrier, including: The plastic sealing layer is cut along the cutting area in the thickness direction of the plastic sealing layer, so that the portion of the plastic sealing layer surrounded by the cutting area is separated from the carrier, and the portion of the plastic sealing layer located in the reserved area is connected to the carrier.

5. The method for manufacturing a semiconductor structure according to claim 1, characterized in that: The step of fixing the semiconductor intermediate structure to the first mold includes: The bonding layer is adsorbed on the first mold by vacuum adsorption.

6. The method for manufacturing a semiconductor structure according to claim 1, characterized in that: The accommodating cavity penetrates the carrier plate; and the adhesive layer is provided on one side of the accommodating cavity, comprising: An adhesive layer is arranged on one side surface of the carrier plate, and the adhesive layer covers the opening of the accommodating cavity located on the same side.

7. The method for manufacturing a semiconductor structure according to claim 1, characterized in that: The removing of the carrier plate, the bonding layer, the first mold and the second mold comprises: The first mold and the second mold are removed, so that the surface of the plastic sealing layer facing away from the bonding layer exceeds the carrier board in the obtained structure; Performing a thinning process on the surface of the plastic sealing layer facing away from the bonding layer so that the thickness of the plastic sealing layer is the same as the thickness of the carrier board; The adhesive layer and the carrier are removed.

8. The method for manufacturing a semiconductor structure according to claim 1, wherein: The second mold includes an abutment portion located at a peripheral side of the cavity; and the first mold and the second mold are molded together, comprising: The second mold is moved closer to the first mold so that the abutting portion abuts against the carrier plate.

9. The method for manufacturing a semiconductor structure according to claim 1, characterized in that: The electrical component includes at least one of a chip and a passive device.

10. The method for manufacturing a semiconductor structure according to claim 1, characterized in that: After removing the carrier, the bonding layer, the first mold and the second mold, the method for preparing the semiconductor structure further includes: A rewiring layer electrically connected to the electrical element is formed on the plastic packaging layer.

11. A device for preparing a semiconductor structure, characterized in that: For use in the manufacturing method according to any one of claims 1 to 10, the device for preparing the semiconductor structure comprises: A plastic encapsulation mold assembly, the plastic encapsulation mold assembly comprising a first mold and a second mold, the second mold being provided with a cavity for accommodating the plastic encapsulation material; A carrier plate is detachably fixed on the first mold, and a receiving cavity is provided on a side facing the second mold for receiving part of the plastic packaging material.

12. The device for preparing a semiconductor structure according to claim 11, characterized in that: The carrier plate is made of metal.

13. The device for preparing a semiconductor structure according to claim 11 or 12, characterized in that: The accommodating cavity penetrates the carrier plate; or, in the thickness direction of the carrier plate, the size of the accommodating cavity is smaller than the size of the carrier plate.

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