Component layout system of DC-DC power supply module

Abstract

The invention relates to the technical field of circuit component layout, in particular to a component layout system of a DC-DC power module, which obtains a candidate position range according to a first preset position range and a second preset position range, and obtains a reference distance according to an initial value set, a target value, a preset wiring width and a preset dielectric constant. According to the method, a series of possible candidate positions are generated by comprehensively considering different distance and angle combinations, so that the layout possibility of a target element on a target printed circuit board can be comprehensively explored, and an output voltage sequence and response delay time corresponding to each candidate position are obtained respectively; according to the method, performance of stability, accuracy, reliability, timeliness and the like of a circuit under different candidate positions is represented through the characteristic of the candidate positions, then the target priority corresponding to each candidate position is obtained, the candidate position corresponding to the maximum target priority is determined as the target position of the target element, the layout reasonability of the target element is improved, and the reliability of the circuit is improved. And the performance and the reliability of the whole circuit are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit element layout, and in particular to a component layout system of a DC-DC power supply module. Background Art

[0002] A DC-DC switching power supply is a power supply device that can convert a DC input voltage into different DC output voltages. It is widely used in many fields such as electronic equipment, communication equipment, industrial control and new energy.

[0003] During operation, a DC-DC switching power supply may radiate electromagnetic interference due to various reasons. For example, the switching devices in the DC-DC switching power supply will produce instantaneous high voltage and large current changes during high-speed conduction and shutdown. The inductor and capacitor in the power supply may also cause interference during operation. There are also heat dissipation problems during operation and layout problems of components in the peripheral circuit. These problems may cause the DC-DC switching power supply to generate electromagnetic interference during operation, causing interference to other equipment or systems, resulting in unstable operation, malfunction, etc.

[0004] In order to solve the above problems, in the current design of DC-DC switching power supplies, the voltage and current at the switching moment are reduced by selecting a suitable switching frequency and using soft switching technology; the conduction of interference is suppressed by shielding and filtering the power supply; the temperature of the power supply during operation is reduced by selecting a suitable heat dissipation method; and the layout of components in the peripheral circuit of the DC-DC switching power supply is carried out based on the experience of the designer to reduce electromagnetic interference.

[0005] However, since designers’ experience is often based on past projects, and each DC-DC switching power supply application scenario may be different, relying solely on experience may not fully consider all requirements and potential problems in new scenarios, and the experience-driven layout method is difficult to form a unified, followable standard process, resulting in differences in experience among different designers, increasing the difficulty of project handover, subsequent maintenance, and mass production. At the same time, experience is a relatively vague basis for judgment. Compared with precise circuit analysis, simulation and other means, relying solely on experience for component layout lacks scientific methods and precise calculations. It is difficult to accurately grasp the exact position of components and the impact of the relationship between components on circuit performance, resulting in a less than optimized layout. Signal interference, voltage instability and other problems may also occur, affecting the performance and reliability of electronic equipment.

[0006] Therefore, how to reasonably layout the DC-DC power supply module and its peripheral components to reduce electromagnetic interference in the circuit and improve the stability of the output voltage has become an urgent problem to be solved. Summary of the invention

[0007] In view of the above technical problems, the technical solution adopted by the present invention is a component layout system for a DC-DC power module, the component layout system for the DC-DC power module includes a target printed circuit board, a target component, an initial component set, a DC-DC power chip, a target pin on the DC-DC power chip, preset simulation software, a processor and a memory storing a computer program, wherein the memory also stores a target value of the target component, a first preset position range of the DC-DC power chip on the target printed circuit board, a second preset position of the target pin on the target printed circuit board and an initial value set corresponding to the initial component set. When the computer program is executed by the processor, the following steps are implemented:

[0008] S1, acquiring a candidate position range of a target component on a target printed circuit board according to a first preset position range and a second preset position.

[0009] S2, based on the initial value set, the target value, the preset trace width and the preset dielectric constant, obtain the reference distance D between the target component and the target pin 0 .

[0010] S3, according to the reference distance D 0 , candidate position range and preset distance step d, and obtain the candidate distance set D between the target component and the target pin = {D 1 , D 2 , ..., D i , ..., D N}, where D i =D 0 +i×d, and D i In the candidate position range, i=1, 2, ..., N, where N refers to the total number of candidate distances.

[0011] S4, acquiring a candidate position set according to the candidate distance set D, the second preset position and the preset offset angle step θ, wherein the candidate position set includes a plurality of candidate positions within the candidate position range.

[0012] S5, performing simulation in a preset simulation software according to the target printed circuit board, the target component, the initial component set, the DC-DC power supply chip and the candidate position set, and obtaining the output voltage sequence and response delay time corresponding to each candidate position respectively.

[0013] S6, obtaining the target priority corresponding to each candidate position according to the output voltage sequence and response delay time corresponding to each candidate position.

[0014] S7, determining the candidate position corresponding to the maximum target priority as the target position of the target component, wherein the target position is used to layout the target component on the target printed circuit board.

[0015] The present invention has at least the following beneficial effects: according to the first preset position range and the second preset position, the candidate position range of the target component on the target printed circuit board is obtained, and according to the initial value set, the target value, the preset trace width and the preset dielectric constant, the reference distance D between the target component and the target pin is obtained. 0 , which provides a reference for further determining the specific position of the target element. 0 , a candidate position range and a preset distance step d are used to obtain a candidate distance set D between the target component and the target pin. According to the candidate distance set D, the second preset position and the preset offset angle step θ, a candidate position set is obtained. By considering different distance and angle combinations, a series of possible candidate positions are generated, which can comprehensively explore the layout possibilities of the target component on the target printed circuit board, and can more accurately determine the candidate positions, which is helpful to find the optimal layout position. According to the target printed circuit board, the target component, the initial component set, the DC-DC power supply chip and the candidate position set, simulation is performed in a preset simulation software, and the output voltage sequence and response delay time corresponding to each candidate position are respectively obtained to characterize the stability, accuracy, reliability and timeliness of the circuit under different candidate positions, and then the target priority corresponding to each candidate position is obtained, and the candidate position corresponding to the largest target priority is determined as the target position of the target component, which improves the layout rationality of the target component, and then improves the performance and reliability of the entire circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0017] Figure 1 A structural block diagram of a component layout system for a DC-DC power supply module provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0018] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0019] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It is understood that, where appropriate, the above-mentioned terms used to distinguish similar objects can be interchanged so that the present invention can also implement other embodiments other than the above-mentioned illustrated embodiments or described embodiments. In addition, the terms "including" and "having" and any variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or server that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0020] The present embodiment provides a component layout system for a DC-DC power module, the component layout system for the DC-DC power module comprising a target printed circuit board, a target component, an initial component set, a DC-DC power chip, a target pin on the DC-DC power chip, preset simulation software, a processor and a memory storing a computer program, wherein the memory also stores a target value of the target component, a first preset position range of the DC-DC power chip on the target printed circuit board, a second preset position of the target pin on the target printed circuit board and an initial value set corresponding to the initial component set. When the computer program is executed by the processor, Figure 1 As shown, implement the following steps:

[0021] S1, acquiring a candidate position range of a target component on a target printed circuit board according to a first preset position range and a second preset position.

[0022] Among them, the printed circuit board is a substrate that carries electronic components and connects electronic components to realize specific circuit functions. By setting the DC-DC power supply chip, the target component and the initial component layout in the initial component set on the target printed circuit board, the relevant functions of the DC-DC switching power supply can be realized.

[0023] There are target pins on the DC-DC power chip. When the distance between the target pins and the target components is close, electromagnetic interference will be generated on the signal in the circuit, reducing the voltage stability. When the distance between the target pins and the target components is far, the signal delay in the circuit will increase. Therefore, it is necessary to reasonably set the distance between the target pins and the target components to improve the performance and reliability of the circuit.

[0024] For example, the target pin on the DC-DC power chip may refer to the FB pin, the target component corresponding to the DC-DC power chip may refer to the inductor, the target value may refer to the inductor value, and the initial component set may include several resistors and several capacitors. Since the inductor will generate an alternating magnetic field in the surrounding area during operation, when the distance between the inductor and the FB pin is too close, the alternating magnetic field is more likely to couple to the FB pin, thereby introducing additional electromagnetic interference components in the feedback signal, causing the feedback signal to be distorted, causing the power chip to receive inaccurate voltage feedback information, thereby affecting its accurate regulation of the output voltage, and causing the circuit to radiate more electromagnetic noise outward, which may interfere with the normal operation of other electronic devices around; when the distance between the inductor and the FB pin is too far, the signal will be attenuated to a certain extent when it is transmitted between the FB pin and the inductor, and will bring a certain amount of transmission delay, which may cause the power chip to fail to make the correct adjustment action according to the actual output voltage in time, thereby affecting the stability of the output voltage, for example, it may cause the output voltage to have unstable phenomena such as overshoot or undershoot.

[0025] Therefore, in this embodiment, a DC-DC power supply chip, an inductor, a resistor and a capacitor are arranged on a target printed circuit board to form a DC-DC switching power supply and its peripheral circuits. By reasonably setting the distance between the inductor and the FB pin in the DC-DC power supply chip, the electromagnetic interference and signal delay problems of the circuit signal can be comprehensively optimized, thereby improving the performance and reliability of the DC-DC switching power supply.

[0026] In a specific implementation, the first preset position range is a rectangular range corresponding to the outer edge of the DC-DC power chip, and S1 includes the following steps:

[0027] S11, according to the first preset position range and the second preset position, obtaining a target line segment range corresponding to the target pin within the first preset position range, wherein the target line segment range refers to a line segment range corresponding to the outer edge corresponding to the target pin.

[0028] S12, dividing the target printed circuit board into a first sub-area and a second sub-area by extending the target line segment range.

[0029] S13, determining a sub-region of the first sub-region and the second sub-region that does not include the second preset position as a candidate position range of the target component on the target printed circuit board.

[0030] The preset coordinate system O is acquired by taking the lower left corner of the target printed circuit board as the origin, the lower edge of the target printed circuit board as the horizontal axis, and the left edge of the target printed circuit board as the vertical axis.

[0031] According to the line segment range corresponding to each outer edge in the first preset position range, the coordinate range corresponding to each line segment range can be obtained. By comparing and searching with the coordinate range corresponding to the second preset position, the line segment range where the second preset range is located can be determined, thereby obtaining the target line segment range.

[0032] By extending the target line segment, the intersection point of the target line segment and the peripheral edge can be obtained, and then the target printed circuit board is divided into a first sub-area and a second sub-area based on the intersection point, wherein the second preset position falls in the first sub-area or the second sub-area.

[0033] In order to reduce the electromagnetic interference impact caused by the distance between the target component and the target pin, a sub-area that does not include the second preset position is determined as a candidate position range of the target component on the target printed circuit board, which is used to set the specific position of the target component to improve the performance and reliability of the circuit.

[0034] S2, based on the initial value set, the target value, the preset trace width and the preset dielectric constant, obtain the reference distance D between the target component and the target pin 0 .

[0035] In a specific implementation, the initial value set corresponding to the initial component set includes an initial value list C corresponding to the preset components = {C 1 , C 2 , ..., C j , ..., C M}, where C j It refers to the initial value corresponding to the jth preset component, j = 1, 2, ..., M, M refers to the total number of preset components, and the reference distance D between the target component and the target pin 0 Meet the following conditions:

[0036] D 0 =W / (2×∏ M j＝1 (L×C j ×ε r ), where W is the preset trace width, ε r Refers to the preset dielectric constant, C jrefers to the initial value corresponding to the jth preset element, and L refers to the target value.

[0037] The width of the trace determines the current that can be safely carried. When performing electronic component layout, the trace width needs to be considered. Therefore, the present embodiment obtains a preset trace width for determining a reference distance between a target component and a target pin. Correspondingly, the preset trace width is positively correlated with the reference distance, so that sufficient layout space is provided between the target component and the target pin when the preset trace width is large.

[0038] The specific value of the preset routing width can be set by the implementer according to actual conditions.

[0039] In the above, according to the initial value set, the target value, the preset trace width and the preset dielectric constant, the reference distance D between the target component and the target pin is obtained. 0 , which provides a benchmark for further determining the specific position of the target element, thereby improving the efficiency and accuracy of obtaining the specific position of the target element.

[0040] S3, according to the reference distance D 0 , candidate position range and preset distance step d, and obtain the candidate distance set D between the target component and the target pin = {D 1 , D 2 , ..., D i , ..., D N}, where D i =D 0 +i×d, and D i In the candidate position range, i=1, 2, ..., N, where N refers to the total number of candidate distances.

[0041] In actual circuit design, different circuit components and chips may have different requirements for distance. By adjusting the distance step d and the reference distance D 0 , can adapt to different design scenarios and needs.

[0042] By setting the distance step d, the reference distance D 0 The distance is gradually increased on the basis of , so as to cover various possible distance values ​​within a certain range, so as to comprehensively explore the relationship between the target component and the target pin at different distances, so as to find the optimal layout position.

[0043] The specific value of the preset distance step d can be set by the implementer according to the actual situation. For example, for some circuits that are sensitive to signal interference, a smaller distance step may be required to more finely adjust the distance to find the layout with minimum interference. For some circuits with higher heat dissipation requirements, a larger distance step may be required to quickly determine the appropriate heat dissipation distance.

[0044] In a specific embodiment, d=L / 10, wherein L refers to the maximum value of the peripheral edge of the target printed circuit board.

[0045] As described above, the generation of the candidate distance set enables subsequent analysis and comparison of layout situations at multiple different distances, thereby increasing the possibility of finding the best layout solution.

[0046] S4, acquiring a candidate position set according to the candidate distance set D, the second preset position and the preset offset angle step θ, wherein the candidate position set includes a plurality of candidate positions within the candidate position range.

[0047] In one embodiment, the second preset position Z={x 0 ,y 0}, where x 0 Refers to the horizontal coordinate of the target pin in the preset coordinate system O, y 0 It refers to the ordinate of the target pin in the preset coordinate system O. The preset coordinate system O refers to a coordinate system with the lower left corner of the target printed circuit board as the origin, the lower edge of the target printed circuit board as the horizontal axis, and the left edge of the target printed circuit board as the vertical axis. The candidate position set is obtained by the following steps:

[0048] S41, according to D i and θ, we get D i The corresponding candidate position list W i = {W i1 , W i2 , ..., W ik , ..., W iP(i)}, where W ik =(x ik ,y ik ), x ik =x 0 +α×D i ×sin(k×θ),y ik =y 0 +D i ×cos(k×θ), k×θ refers to the direction from the target pin to the candidate position W ik The angle between the direction of the candidate position and the positive direction of the vertical axis in the preset coordinate system O, α refers to the reference coefficient. 0 α = 1, when the horizontal coordinate within the candidate position range is less than x 0 , α=-1.

[0049] S42, traverse D 1 , D 2 , ..., D i , ..., DN , and obtain the candidate position set W = {W 1 , W 2 , ..., W i , ..., W N}.

[0050] Among them, the candidate distance determines the spatial relationship between the target component and the target pin, the second preset position of the target pin is a key reference point in the circuit, and the offset angle can adjust the direction and relative position of the target component. Based on the given candidate distance set D, the second preset position and the preset offset angle step θ, a series of possible candidate positions are generated by considering different distance and angle combinations, which can comprehensively explore the layout possibilities of the target component on the target printed circuit board, thereby more accurately determining the candidate position and improving the rationality and effectiveness of the layout.

[0051] In this embodiment, a preset coordinate system O is established with the lower left corner of the target printed circuit board as the origin, the lower edge of the target printed circuit board as the horizontal axis, and the left edge of the target printed circuit board as the vertical axis, providing a unified reference frame for determining the position of the target pin and the candidate position of the target component.

[0052] The reference coefficient α is calculated based on the horizontal coordinate and x 0 The size relationship is determined when the horizontal coordinate within the candidate position range is greater than x 0 When α=1. When the horizontal coordinate within the candidate position range is less than x 0 , α=-1.

[0053] The specific value of the preset offset angle step θ can be set by the implementer according to actual conditions.

[0054] In one embodiment, y ik <y 1 ,y 1 Refers to the maximum vertical coordinate corresponding to the target printed circuit board.

[0055] In one embodiment, when α=1, x 0 <x ik <x 1 , x 1 Refers to the maximum horizontal coordinate corresponding to the target printed circuit board.

[0056] In one embodiment, when α=-1, 0<x ik <x 0 .

[0057] As described above, based on the given candidate distance set D, the second preset position and the preset offset angle step θ, a series of possible candidate positions are generated by considering different distance and angle combinations, which can comprehensively explore the layout possibilities of the target component on the target printed circuit board, and can more accurately determine the candidate position, which is helpful to find the optimal layout position and improve the rationality and effectiveness of the layout to meet the requirements of circuit performance, signal integrity and electromagnetic compatibility.

[0058] S5, performing simulation in a preset simulation software according to the target printed circuit board, the target component, the initial component set, the DC-DC power supply chip and the candidate position set, and respectively obtaining the output voltage sequence and the response delay time corresponding to each candidate position.

[0059] In a specific implementation, S5 includes the following steps:

[0060] S31, setting a target printed circuit board in a preset simulation software, and acquiring a first simulated printed circuit board.

[0061] S32, according to the first preset position range of the DC-DC power chip on the target printed circuit board and the second preset position of the target pin on the target printed circuit board, the DC-DC power chip is set on the simulated printed circuit board to obtain a second simulated printed circuit board.

[0062] S33, respectively setting a target component corresponding to each candidate position in the second simulated printed circuit board, and acquiring a third simulated printed circuit board corresponding to each candidate position.

[0063] S34, setting the initial component in the initial component set in the third simulated printed circuit board corresponding to each candidate position, and acquiring the fourth simulated printed circuit board corresponding to each candidate position.

[0064] S35, obtaining the output voltage sequence and response delay time of the fourth simulated printed circuit board corresponding to each candidate position within a preset time period.

[0065] The target printed circuit board is set in the preset simulation software, for example, the design file of the target printed circuit board is imported, the size, number of layers, material and other parameters of the circuit board are set, and the first simulated printed circuit board is obtained.

[0066] According to the first preset position range of the DC-DC power chip on the target printed circuit board and the second preset position of the target pin on the target printed circuit board, the placement position of the DC-DC power chip is clarified to set the DC-DC power chip on the first simulated printed circuit board and obtain the second simulated printed circuit board.

[0067] The target components corresponding to each candidate position are respectively set in the second simulated printed circuit board, and the third simulated printed circuit board corresponding to each candidate position is obtained to simulate the influence of the target components at different candidate positions on the circuit performance.

[0068] The initial components in the initial component set, such as resistors and capacitors, are set in the third simulated printed circuit board corresponding to each candidate position, and the fourth simulated printed circuit board corresponding to each candidate position is obtained to form a complete circuit. The position of each initial component on the target printed circuit board can be determined based on the connection relationship between the initial components and the connection relationship between the initial components and the target components and the DC-DC power chip to form a DC-DC power chip and its complete peripheral circuit. The connection relationship includes series connection, parallel connection, mixed connection, and no connection.

[0069] By running circuit simulation in simulation software and recording the output voltage values ​​of each node within a preset time period, an output voltage sequence is obtained. The output voltage sequence can reflect the stability, accuracy, reliability and timeliness of the circuit at different candidate locations, so as to provide a basis for selecting the optimal layout position of the target component by comparing the performance of the circuit at each candidate location.

[0070] As described above, the target printed circuit board, the target components corresponding to each candidate position, the initial component set and the DC-DC power supply chip are set in the simulation software, the circuit simulation is run and the output voltage value of each node in a preset time period is recorded, so as to obtain the output voltage sequence to characterize the stability, accuracy, reliability and timeliness of the circuit under different candidate positions, and provide a basis for selecting the best layout position of the target component, thereby improving the rationality of the layout of the target component.

[0071] S6, obtaining the target priority corresponding to each candidate position according to the output voltage sequence and response delay time corresponding to each candidate position.

[0072] In a specific implementation, S6 includes the following steps:

[0073] S61, acquiring a first priority corresponding to each candidate position according to an output voltage sequence corresponding to each candidate position.

[0074] S62: Acquire a second priority corresponding to each candidate position according to the response delay time corresponding to each candidate position, wherein the second priority is negatively correlated with the response delay time.

[0075] S63, obtaining a target priority corresponding to each candidate position according to the first priority, the second priority, the first preset weight corresponding to the first priority, and the second preset weight corresponding to the second priority corresponding to each candidate position.

[0076] The first priority corresponding to each candidate position is obtained by analyzing factors such as the stability of the output voltage, the ripple size, whether it is within the specified voltage range, etc. For example, the candidate position with more stable output voltage, smaller ripple, and closer to the ideal voltage value may have a higher corresponding first priority.

[0077] The response delay time refers to the time interval from the change of the input signal to the corresponding change of the output signal. The second priority is negatively correlated with the response delay time, that is, the shorter the response delay time, the higher the timeliness of the circuit, and the higher the second priority.

[0078] A weighted summation method may be used, for example, target priority = first priority × first preset weight + second priority × second preset weight. The specific values ​​of the first preset weight and the second preset weight may be set by the implementer according to actual conditions. By setting the first preset weight and the second preset weight, the weight of the output voltage sequence and the response delay time in the target priority calculation may be adjusted according to actual needs, so that designers can flexibly weigh different performance indicators according to specific application scenarios and circuit requirements to achieve the best layout effect.

[0079] In a specific implementation, S61 includes the following steps:

[0080] S611, calculating the voltage variance between all output voltages in each output voltage sequence.

[0081] S612: Obtain a first priority corresponding to each candidate position according to a voltage variance corresponding to each output voltage sequence, wherein the first priority is negatively correlated with the voltage variance.

[0082] The larger the voltage variance is, the lower the stability of the output voltage is. Correspondingly, the first priority is negatively correlated with the voltage variance.

[0083] As described above, the target priority of each candidate position is determined by comprehensively considering the output voltage sequence and the response delay time, and the influence of each candidate position on the overall performance of the circuit is more comprehensively judged, which helps to make more targeted selections among multiple candidate positions and improve the layout rationality of the target components.

[0084] S7, determining the candidate position corresponding to the maximum target priority as the target position of the target component, wherein the target position is used to layout the target component on the target printed circuit board.

[0085] Among them, by selecting the position with the maximum target priority to place the target component, it can be ensured that the circuit can provide stable voltage output in time during operation, reduce the impact of voltage fluctuations on other electronic components, and improve the performance and reliability of the entire circuit.

[0086] In the above, according to the first preset position range and the second preset position, the candidate position range of the target component on the target printed circuit board is obtained, and according to the initial value set, the target value, the preset trace width and the preset dielectric constant, the reference distance D between the target component and the target pin is obtained. 0 , which provides a reference for further determining the specific position of the target element. 0 , a candidate position range and a preset distance step d are used to obtain a candidate distance set D between the target component and the target pin. According to the candidate distance set D, the second preset position and the preset offset angle step θ, a candidate position set is obtained. By considering different distance and angle combinations, a series of possible candidate positions are generated, which can comprehensively explore the layout possibilities of the target component on the target printed circuit board, and can more accurately determine the candidate positions, which is helpful to find the optimal layout position. According to the target printed circuit board, the target component, the initial component set, the DC-DC power supply chip and the candidate position set, simulation is performed in a preset simulation software, and the output voltage sequence and response delay time corresponding to each candidate position are respectively obtained to characterize the stability, accuracy, reliability and timeliness of the circuit under different candidate positions, and then the target priority corresponding to each candidate position is obtained, and the candidate position corresponding to the largest target priority is determined as the target position of the target component, which improves the layout rationality of the target component, and then improves the performance and reliability of the entire circuit.

[0087] Although some specific embodiments of the present invention have been described in detail by way of example, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It should also be understood by those skilled in the art that various modifications may be made to the embodiments without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A component layout system for a DC-DC power module, characterized in that: The component layout system of the DC-DC power module includes a target printed circuit board, a target component, an initial component set, a DC-DC power chip, a target pin on the DC-DC power chip, preset simulation software, a processor, and a memory storing a computer program, wherein the memory also stores a target value of the target component, a first preset position range of the DC-DC power chip on the target printed circuit board, a second preset position of the target pin on the target printed circuit board, and an initial value set corresponding to the initial component set. When the computer program is executed by the processor, the following steps are implemented: S1, acquiring a candidate position range of the target component on the target printed circuit board according to the first preset position range and the second preset position; S2, acquiring a reference distance D0 between the target component and the target pin according to the initial value set, the target value, a preset trace width, and a preset dielectric constant; S3, according to the reference distance D0, the candidate position range and the preset distance step d, obtain a candidate distance set D between the target component and the target pin = {D1, D2, ..., D i , ..., D N }, where D i =D0+i×d, and D i In the candidate position range, i=1, 2, ..., N, where N refers to the total number of candidate distances; S4, acquiring a candidate position set according to the candidate distance set D, the second preset position and the preset offset angle step θ, wherein the candidate position set includes a plurality of candidate positions within the candidate position range; S5, performing simulation in the preset simulation software according to the target printed circuit board, the target component, the initial component set, the DC-DC power supply chip and the candidate position set, and respectively obtaining an output voltage sequence and a response delay time corresponding to each candidate position; S6, obtaining the target priority corresponding to each candidate position according to the output voltage sequence and response delay time corresponding to each candidate position; S7, determining the candidate position corresponding to the maximum target priority as the target position of the target component, wherein the target position is used to layout the target component on the target printed circuit board.

2. The component layout system of the DC-DC power module according to claim 1, characterized in that: The first preset position range is a rectangular range corresponding to the outer edge of the DC-DC power chip, and S1 includes the following steps: S11, acquiring a target line segment range corresponding to the target pin within the first preset position range according to the first preset position range and the second preset position, wherein the target line segment range refers to a line segment range corresponding to an outer edge corresponding to the target pin; S12, dividing the target printed circuit board into a first sub-area and a second sub-area by extending the target line segment range; S13: Determine a sub-region of the first sub-region and the second sub-region that does not include the second preset position as a candidate position range of the target component on the target printed circuit board.

3. The component layout system of the DC-DC power module according to claim 1, characterized in that: The initial value set corresponding to the initial component set includes an initial value list C corresponding to the preset components = {C1, C2, . . . , C j , ..., C M }, where C j It refers to the initial value corresponding to the jth preset component, j=1, 2, ..., M, M refers to the total number of preset components, and the reference distance D0 between the target component and the target pin meets the following conditions: D0=W / (2×∏ M j＝1 (L×C j ×ε r ), where W refers to the preset trace width, ε r refers to the preset dielectric constant, C j refers to the initial value corresponding to the jth preset element, and L refers to the target value.

4. The component layout system of the DC-DC power module according to claim 1, characterized in that: The second preset position Z={x0, y0}, wherein x0 refers to the horizontal coordinate of the target pin in the preset coordinate system O, y0 refers to the vertical coordinate of the target pin in the preset coordinate system O, and the preset coordinate system O refers to a coordinate system with the lower left corner of the target printed circuit board as the origin, the lower edge of the target printed circuit board as the horizontal axis, and the left edge of the target printed circuit board as the vertical axis. The candidate position set is obtained by the following steps: S41, according to D i and θ, we get D i The corresponding candidate position list W i = {W i1 , W i2 , ..., W ik , ..., W iP(i) }, where W ik =(x ik ,y ik ), x ik =x0+α×D i ×sin(k×θ),y ik =y0+D i ×cos(k×θ), k×θ refers to the direction from the target pin to the candidate position W ik The angle between the direction of and the positive direction of the longitudinal axis in the preset coordinate system O, α refers to the reference coefficient, when the horizontal coordinate within the candidate position range is greater than x0, α=1, when the horizontal coordinate within the candidate position range is less than x0, α=-1; S42, traverse D1, D2, ..., D i , ..., D N , and obtain the candidate position set W = {W1, W2, ..., W i , ..., W N }.

5. The component layout system of the DC-DC power supply module according to claim 4, characterized in that: y ik <y 1 ,y 1 It refers to the maximum vertical coordinate corresponding to the target printed circuit board.

6. The component layout system of the DC-DC power supply module according to claim 4, characterized in that: When α=1, x0<x ik <x 1 , x 1 It refers to the maximum horizontal coordinate corresponding to the target printed circuit board.

7. The component layout system of the DC-DC power supply module according to claim 4, characterized in that: When α=-1, 0<x ik <x0.

8. The component layout system of the DC-DC power module according to claim 1, characterized in that: S5 includes the following steps: S31, setting the target printed circuit board in the preset simulation software to obtain a first simulated printed circuit board; S32, according to the first preset position range of the DC-DC power chip on the target printed circuit board and the second preset position of the target pin on the target printed circuit board, the DC-DC power chip is arranged on the simulated printed circuit board to obtain a second simulated printed circuit board; S33, respectively setting a target component corresponding to each candidate position in the second simulated printed circuit board, and acquiring a third simulated printed circuit board corresponding to each candidate position; S34, setting the initial component in the initial component set in the third simulated printed circuit board corresponding to each candidate position, and obtaining the fourth simulated printed circuit board corresponding to each candidate position; S35, obtaining the output voltage sequence and response delay time of the fourth simulated printed circuit board corresponding to each candidate position within a preset time period.

9. The component layout system of the DC-DC power module according to claim 1, characterized in that: S6 includes the following steps: S61, acquiring a first priority corresponding to each candidate position according to an output voltage sequence corresponding to each candidate position; S62, acquiring a second priority corresponding to each candidate position according to the response delay time corresponding to each candidate position, wherein the second priority and the response delay time are negatively correlated; S63, obtaining a target priority corresponding to each candidate position according to the first priority, the second priority, the first preset weight corresponding to the first priority, and the second preset weight corresponding to the second priority corresponding to each candidate position.

10. The component layout system of the DC-DC power module according to claim 1, characterized in that: S61 includes the following steps: S611, calculating the voltage variance between all output voltages in each output voltage sequence; S612: Obtain a first priority corresponding to each candidate position according to a voltage variance corresponding to each output voltage sequence, wherein the first priority is negatively correlated with the voltage variance.

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