Low-power-consumption three-gear shift switch input circuit

Abstract

The invention discloses a low-power-consumption three-gear shift switch input circuit which comprises a resistor group, an MOS tube group and an operational amplifier group, an input end Keyin is connected with the resistor group and the MOS tube group, the MOS tube group is connected with the input end of the operational amplifier group, the operational amplifier group is connected with an output end Keyfloat, an output end Keyoff and an output end Keyon, a three-gear shift switch is in a floating gear, the input end Keyin is in a floating state, and the output end Keyon is in a floating state. The voltage is clamped to half of the power supply voltage by the resistor group and the MOS tube group; when the three-gear shifting switch is in an OFF gear, the input end Keyin is pulled up to power supply voltage and is in a high potential; the three-gear shifting switch is in an ON gear, the input end Keyin is pulled down to the grounding end and is in a low potential, the state of the input end is detected through the operational amplifier group, the states of the floating gear, the OFF gear or the ON gear are output respectively, the floating gear can be recognized, and meanwhile the overall power consumption is reduced.

Description

Technical Field

[0001] The invention relates to the field of integrated circuits, and in particular to a low-power three-speed shift switch input circuit. Background Art

[0002] Conventional shift switch input circuit is as follows Figure 6 As shown, it is composed of a complementary common source amplifier consisting of a pair of PMOS tubes M1 and NMOS tubes M2, and a current limiting resistor R1. When the toggle switch is turned to VDD, the NMOS tube M2 is turned on and outputs a low level; when the toggle switch is turned to GND, the PMOS tube M1 is turned on and outputs a high level. Resistor R1 can protect the gate of the MOS tube from being broken down by external charge surges. The input and output of the conventional toggle switch input circuit only have two states: high and low. When the toggle switch is in a floating state, the conventional toggle switch input circuit cannot detect this state due to the uncertainty of the amount of charge remaining in the circuit, and it will also cause an increase in power consumption. Summary of the invention

[0003] In view of the above-mentioned deficiencies in the current integrated circuit field, the present invention provides a low-power three-speed shift switch input circuit, through a MOS tube group connected to a resistor group and an operational amplifier group, the MOS tube group is used as a switch or equivalent to a diode, when the three-speed shift switch is in a floating neutral position, the input terminal Key_in is in a floating state, and its voltage is biased to half of the power supply voltage by the resistor group; when the three-speed shift switch is in an OFF position, the input terminal Key_in is pulled up to the power supply voltage, and its voltage is at a high potential; when the three-speed shift switch is in an ON position, the input terminal Key_in is pulled down to the ground terminal, and its voltage is at a low potential, the state of the input terminal Key_in is detected by the operational amplifier group, and the states of the floating neutral position, the OFF position or the ON position of the three-speed shift switch are output respectively, so that the floating state of the shift switch can be detected, and the overall power consumption can be reduced.

[0004] To achieve the above object, the embodiments of the present invention adopt the following technical solutions: A three-speed shift switch input circuit includes a resistor group and an operational amplifier group, and is provided with a power supply voltage, a ground terminal, an input terminal Key_in, an output terminal Key_float, an output terminal Key_off and an output terminal Key_on. The input terminal Key_in inputs a signal of the three-speed shift switch. The three-speed shift switch includes a floating neutral position, an OFF position or an ON position. The resistor group is connected to the power supply voltage and the input terminal Key_in, and is connected to the operational amplifier group and the ground terminal. The operational amplifier group is respectively connected to the output terminal Key_float, the output terminal Key_off and the output terminal Key_on. When the three-speed shift switch is in the floating neutral position, the signal input by the input terminal Key_in is in a floating state. , its voltage is biased to half of the power supply voltage by the resistor group, the state of the input terminal Key_in is detected by the operational amplifier group, and the floating neutral state is output at the output terminal Key_float; when the three-speed shift switch is in the OFF gear, the signal input by the input terminal Key_in is pulled up to the power supply voltage, and its voltage is at a high potential. The state of the input terminal Key_in is detected by the operational amplifier group, and the OFF gear state is output at the output terminal Key_off; when the three-speed shift switch is in the ON gear, the signal input by the input terminal Key_in is pulled down to the ground terminal, and its voltage is at a low potential. The state of the input terminal Key_in is detected by the operational amplifier group, and the ON gear state is output.

[0005] According to one aspect of the present invention, the operational amplifier group includes a first Schmitt trigger, a second Schmitt trigger, a first inverter, a second inverter, a first NOR gate, a second NOR gate and a third NOR gate, the input end of the first Schmitt trigger is connected to the resistor group, the output end is connected to the input end of the first inverter and the input end of the second NOR gate, the output end of the first inverter is connected to the input end of the first NOR gate and the input end of the third NOR gate, the output end of the first NOR gate is connected to the output end Key_float, the input end of the second Schmitt trigger is connected to the resistor group, the output end is connected to the input end of the second inverter and the input end of the second NOR gate, the output end of the second inverter is connected to the input end of the third NOR gate, the output end of the second NOR gate is connected to the output end Key_off, and the output end of the third NOR gate is connected to the output end Key_on.

[0006] According to one aspect of the present invention, the first Schmitt trigger is a high-threshold Schmitt trigger, which is used to distinguish whether the signal input at the input terminal Key_in is in a floating state or pulled up to the power supply voltage; the second Schmitt trigger is a low-threshold Schmitt trigger, which is used to distinguish whether the signal input at the input terminal Key_in is in a floating state or pulled down to the ground terminal.

[0007] According to one aspect of the present invention, the resistor group includes a first resistor, a second resistor, a third resistor and a fourth resistor, one end of the second resistor is connected to a power supply voltage, the other end is connected in series with the third resistor, the other end of the third resistor is grounded, one end of the first resistor is connected to an input terminal Key_in, and the other end is connected to a connection point between the second resistor and the third resistor, one end of the fourth resistor is respectively connected to the input ends of the first Schmitt trigger and the second Schmitt trigger, and the other end is connected to a connection point between the second resistor and the third resistor; the resistance values ​​of the second resistor and the third resistor are large and equal, and the first resistor and the fourth resistor serve as current limiting resistors.

[0008] A low-power three-speed shift switch input circuit is used to output the state of the three-speed shift switch, including a resistor group and an operational amplifier group, and is provided with a power supply voltage, a ground terminal, an input terminal Key_in, an output terminal Key_float, an output terminal Key_off and an output terminal Key_on, the input terminal Key_in inputs a signal of the three-speed shift switch, the three-speed shift switch includes a floating neutral gear, an OFF gear or an ON gear, the resistor group is connected to the power supply voltage and the input terminal Key_in, and is connected to the operational amplifier group and the ground terminal, the operational amplifier group is respectively connected to the output terminal Key_float, the output terminal Key_off and the output terminal Key_on, and also includes a MOS tube group connected to the resistor group and the operational amplifier group, the MOS tube group is used as a switch or equivalent to a diode, when the three-speed shift switch is in the floating neutral gear When the three-speed shift switch is in the OFF gear, the signal inputted by the input terminal Key_in is in a floating state, and its voltage is biased to half of the power supply voltage by the resistor group. The state of the input terminal Key_in is detected by the operational amplifier group, and the floating gear state is output at the output terminal Key_float; when the three-speed shift switch is in the OFF gear, the signal inputted by the input terminal Key_in is pulled up to the power supply voltage, and its voltage is at a high potential. The state of the input terminal Key_in is detected by the operational amplifier group, and the OFF gear state is output at the output terminal Key_off; when the three-speed shift switch is in the ON gear, the signal inputted by the input terminal Key_in is pulled down to the ground terminal, and its voltage is at a low potential. The state of the input terminal Key_in is detected by the operational amplifier group, and the ON gear state is output at the output terminal Key_on.

[0009] According to one aspect of the present invention, the operational amplifier group includes a first Schmitt trigger, a second Schmitt trigger, a first inverter, a second inverter, a third inverter, a fourth inverter, a first NOR gate, a second NOR gate and a third NOR gate, the input end of the first Schmitt trigger is connected to the resistor group and the MOS tube group, the output end is connected to the input end of the first inverter and the input end of the second NOR gate, the output end of the first inverter is connected to the input end of the first NOR gate and the input end of the third NOR gate, the output end of the first NOR gate is connected to the output end Key_float, the second The input end of the Schmitt trigger is connected to the resistor group and the MOS tube group, the output end is connected to the input end of the second inverter and the input end of the second NOR gate, the output end of the second inverter is connected to the input end of the third NOR gate, the output end of the second NOR gate is connected to the output end Key_off and the input end of the third inverter, the output end of the third NOR gate is connected to the output end Key_on, the output end of the third inverter is connected to the switch MOS tube in the MOS tube group and the input end of the fourth inverter, and the output end of the fourth inverter is connected to the switch MOS tube in the MOS tube group.

[0010] According to one aspect of the present invention, the first Schmitt trigger is a high-threshold Schmitt trigger, which is used to distinguish whether the signal input at the input terminal Key_in is in a floating state or pulled up to the power supply voltage; the second Schmitt trigger is a low-threshold Schmitt trigger, which is used to distinguish whether the signal input at the input terminal Key_in is in a floating state or pulled down to the ground terminal.

[0011] According to one aspect of the present invention, the MOS tube group includes a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a seventh MOS tube and an eighth MOS tube, wherein the source of the first MOS tube is connected to a power supply voltage, the gate is connected to the output end of the fourth inverter, and the drain is connected to one end of the second resistor; the source of the second MOS tube is grounded, the gate is connected to the output end of the third inverter, and the drain is connected to one end of the third resistor; the source of the third MOS tube is connected to a power supply voltage, the gate and the drain are connected to each other, and the drain is connected to the source of the fourth MOS tube; the gate and the drain of the fourth MOS tube are connected to each other, and the drain is connected to the source of the fifth MOS tube; the gate and the drain of the fifth MOS tube are connected to each other, and the drain is the connection point of the first resistor and the fourth resistor; the gate and the drain of the sixth MOS tube are connected to each other, the drain is the connection point of the first resistor and the fourth resistor, and the source is connected to the drain of the seventh MOS tube; the gate and the drain of the seventh MOS tube are connected to each other, and the source is connected to the drain of the eighth MOS tube; the gate and the drain of the eighth MOS tube are connected to each other, and the source is grounded.

[0012] According to one aspect of the present invention, the first MOS tube, the third MOS tube, the fourth MOS tube and the fifth MOS tube are PMOS tubes, and the second MOS tube, the sixth MOS tube, the seventh MOS tube and the eighth MOS tube are NMOS tubes.

[0013] According to one aspect of the present invention, the sixth MOS tube, the seventh MOS tube and the eighth MOS tube provide a weak pull-down path for the NMOS tube to release the residual charge of the port; the third MOS tube, the fourth MOS tube and the fifth MOS tube form a weak pull-up path to bias the port voltage to half of the power supply voltage and provide a certain anti-electromagnetic interference capability.

[0014] Advantages of the implementation of the present invention: through the MOS tube group connected to the resistor group and the operational amplifier group, the MOS tube group is used as a switch or equivalent to a diode. When the three-speed shift switch is in the floating neutral position, the signal input by the input terminal Key_in is in a floating state, and its voltage is biased to half of the power supply voltage by the resistor group. The state of the input terminal Key_in is detected by the operational amplifier group, and the floating neutral state is output at the output terminal Key_float; when the three-speed shift switch is in the OFF position, the signal input by the input terminal Key_in is pulled up to the power supply voltage, and its voltage is at a high potential. The state of the input terminal Key_in is detected by the operational amplifier group, and the OFF position state is output at the output terminal Key_off; when the three-speed shift switch is in the ON position, the signal input by the input terminal Key_in is pulled down to the ground terminal, and its voltage is at a low potential. The state of the signal input by the input terminal Key_in is detected by the operational amplifier group, and the ON position state is output at the output terminal Key_on, so that the floating state of the shift switch can be detected, and the overall power consumption can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0016] Figure 1 This is a circuit structure diagram of a three-speed shift switch input circuit according to the present invention; Figure 2 This is a circuit structure diagram of a second embodiment of a low-power three-speed shift switch input circuit according to the present invention; Figure 3 This is a waveform diagram of the second embodiment of a low-power three-speed shift switch input circuit according to the present invention; Figure 4The circuit structure diagram of the third embodiment of a low-power three-speed shift switch input circuit according to the present invention; Figure 5 This is a waveform diagram of the third embodiment of a low-power three-speed shift switch input circuit according to the present invention; Figure 6 It is a circuit structure diagram of the prior art of a three-speed shift switch input circuit described in the present invention; Figure 7 It is a circuit structure diagram of a first Schmitt trigger in a low-power three-speed shift switch input circuit of the present invention; Figure 8 The circuit structure diagram of the second Schmitt trigger in the input circuit of a low-power three-speed shift switch described in the present invention. DETAILED DESCRIPTION

[0017] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0018] Embodiment 1: like Figure 1As shown, a three-speed shift switch input circuit is used to output the state of the three-speed shift switch, including a resistor group and an op amp group, and is provided with a power supply voltage VDD, a ground terminal GND, an input terminal Key_in, an output terminal Key_float, an output terminal Key_off and an output terminal Key_on, the input terminal Key_in inputs a signal of the three-speed shift switch, the three-speed shift switch includes a floating neutral gear, an OFF gear or an ON gear, the resistor group is connected to the power supply voltage VDD and the input terminal Key_in, and is connected to the op amp group and the ground terminal, the op amp group is respectively connected to the output terminal Key_float, the output terminal Key_off and the output terminal Key_on, when the three-speed shift switch is in the floating neutral gear, the signal input by the input terminal Key_in is in a floating state, Its voltage is biased to half of the power supply voltage VDD by the resistor group, and the state of the input terminal Key_in is detected by the operational amplifier group, and the floating neutral state is output at the output terminal Key_float; when the three-speed shift switch is in the OFF gear, the signal input by the input terminal Key_in is pulled up to the power supply voltage VDD, and its voltage is at a high potential. The state of the signal input by the input terminal Key_in is detected by the operational amplifier group, and the OFF gear state is output at the output terminal Key_off; when the three-speed shift switch is in the ON gear, the signal input by the input terminal Key_in is pulled down to the ground terminal GND, and its voltage is at a low potential. The state of the signal input by the input terminal Key_in is detected by the operational amplifier group, and the ON gear state is output at the output terminal Key_on.

[0019] The operational amplifier group includes a first Schmitt trigger , the second Schmitt trigger , Inverter , Inverter , NOR Gate , NOR Gate AND-OR-NOT gate , the first Schmitt trigger The input end is connected to the resistor group, and the output end is connected to the inverter The input terminal and the NOR gate The input of the inverter The output terminal is connected to a NOR gate The input terminal and the NOR gate The input terminal of the NOR gate The output terminal is connected to the output terminal Key_float, and the second Schmitt trigger The input end is connected to the resistor group, and the output end is connected to the inverter The input of the NOR gate , inverter The output terminal is connected to a NOR gate The input terminal of the NOR gate The output terminal of the gate is connected to the output terminal Key_off, or the The output terminal of the first Schmitt trigger is connected to the output terminal Key_on. is a high threshold Schmitt trigger, used to distinguish whether the input terminal Key_in is in a floating state or pulled up to the power supply voltage VDD; the second Schmitt trigger It is a low threshold Schmitt trigger, which is used to distinguish whether the input terminal Key_in is in a floating state or pulled down to the ground terminal GND. The present invention uses two Schmitt triggers to detect the input voltage. The triggering thresholds of the two Schmitt triggers are quite different. The detection results of the two Schmitt triggers are transmitted to the subsequent combinational logic circuit, and finally the state of the three-gear switch is output.

[0020] The resistor group includes resistors ,resistance ,resistance and resistor ,resistance One end is connected to the power supply voltage VDD, and the other end is connected to the resistor Series, resistor The other end of the resistor is grounded. One end is connected to the input terminal Key_in, and the other end is connected to the resistor and resistor The connection point of the resistor One end of each of the first Schmitt trigger and the second Schmitt trigger The other end is connected to the input terminal of and resistor The resistor and resistor The resistance value is large and equal. In order to avoid a large current when the gear is switched, the present invention sets a resistor at the input stage and resistor As a current limiting resistor.

[0021] like Figure 7 , Figure 8 As shown in the figure, compared with the conventional Schmitt trigger, these two Schmitt triggers only have unilateral hysteresis, which is more suitable for this design requirement. The high threshold Schmitt trigger includes the input end SMT_in, the output end SMT_out, and the PMOS tube 、NMOS tube 、NMOS tube 、NMOS tube and resistor The input terminal SMT_in is respectively connected to , and The gate of The source is connected to the power supply voltage VDD, and the drain is connected to The drain and The gate and output terminal SMT_out, The source terminal The source and The drain, The source is grounded, Drain resistor One end of the resistor The other end is connected to the power supply voltage VDD. In order to make the trigger threshold voltage of the high-threshold Schmitt trigger higher, that is, closer to the VDD voltage, the PMOS tube Set wider, NMOS tube It can be set longer, or multiple NMOS tubes can be connected in series. Control the hysteresis size. The Schmitt trigger used in this design does not need too much hysteresis. Its channel length is short, and the NMOS tube The positive feedback loop is formed by the gate and source to accelerate the triggering and hysteresis process. As a current limiting resistor, avoid NMOS tube Direct connection with VDD is damaged. The low threshold Schmitt trigger includes input terminal SMT_in, output terminal SMT_out, PMOS tube 、PMOS tube 、PMOS tube 、NMOS tube and resistor The input terminal SMT_in is respectively connected to , and The gate of The source is connected to the power supply voltage VDD, and the drain is connected to The source and The source of The drain of the The drain and The gate, The source is grounded, Drain resistor One end of the resistor The other end of the NMOS tube is grounded. In order to make the trigger threshold voltage of the low-threshold Schmitt trigger lower, that is, closer to the GND voltage, Set wider, PMOS tube Set it longer, or use multiple NMOS tubes in series, PMOS tube Control the hysteresis size. The Schmitt trigger used in this design does not need too much hysteresis. Its channel length is short, and the PMOS tube The positive feedback loop is formed by the gate and source to accelerate the triggering and hysteresis process. As a current limiting resistor, avoid PMOS tube Direct connection to GND is damaged.

[0022] When the three-position switch is turned to the on position, the switch is connected to GND, and neither the high threshold Schmitt trigger nor the low threshold Schmitt trigger is triggered. Both Schmitt triggers output high potential, and the NOR gate Both inputs are 0, output 1, output Key_on=1, Key_off=0, Key_float=0; when the three-position switch is turned to the floating neutral position, the port voltage is biased to 1 / 2VDD, the high threshold Schmitt trigger is not triggered, the output is high level, the low threshold Schmitt trigger is triggered, the output is low level, or the NOT gate When both input terminals are 0, the output is 1, and the output terminal Key_float=1, Key_off=0, and Key_on=0; when the three-position switch is turned to the off position, the switch is connected to VDD, the high threshold Schmitt trigger and the low threshold Schmitt trigger are both triggered, and both Schmitt triggers output low potential, and the two input terminals of the NOR gate U6 are 0, the output is 1, and the output terminal Key_off=1, Key_float=0, and Key_on=0.

[0023] Advantages of the implementation of the present invention: through the cooperation of the resistor group and the operational amplifier group, when the three-speed shift switch is in the floating neutral position, the signal input by the input terminal Key_in is in a floating state, and its voltage is biased to half of the power supply voltage by the resistor group; when the three-speed shift switch is in the OFF position, the signal input by the input terminal Key_in is pulled up to the power supply voltage, and its voltage is at a high potential; when the three-speed shift switch is in the ON position, the signal input by the input terminal Key_in is pulled down to the ground terminal, and its voltage is at a low potential. The state of the signal input by the input terminal Key_in is detected by the operational amplifier group, and the state of the floating neutral position, OFF position or ON position of the three-speed shift switch is output respectively, so that the specific state of the three-speed shift switch can be detected.

[0024] Embodiment 2: like Figure 2As shown, a low-power three-speed shift switch input circuit is used to output the state of the three-speed shift switch, including a resistor group, a switch group and an op amp group, and is provided with a power supply voltage VDD, a ground terminal GND, an input terminal Key_in, an output terminal Key_float, an output terminal Key_off and an output terminal Key_on, the input terminal Key_in inputs the floating neutral position, the OFF position or the ON position of the three-speed shift switch, the resistor group is connected to the power supply voltage VDD and the input terminal Key_in, and is connected to the op amp group and the ground terminal, and the op amp group is respectively connected to the output terminal K ey_float, the output terminal Key_off and the output terminal Key_on are connected. When the three-speed shift switch is in the OFF gear, the signal inputted by the input terminal Key_in is pulled up to the power supply voltage VDD, and its voltage is at a high potential. When the three-speed shift switch is in the ON gear, the signal inputted by the input terminal Key_in is pulled down to the ground terminal GND, and its voltage is at a low potential. The state of the signal inputted by the input terminal Key_in is detected by the operational amplifier group, and the states of the floating gear, the OFF gear or the ON gear of the three-speed shift switch are outputted respectively.

[0025] The operational amplifier group includes a first Schmitt trigger , the second Schmitt trigger , Inverter , Inverter , NOR Gate , NOR Gate AND-OR-NOT gate , the first Schmitt trigger The input end is connected to the resistor group, and the output end is connected to the inverter The input terminal and the NOR gate The input of the inverter The output terminal is connected to a NOR gate The input terminal and the NOR gate The input terminal of the NOR gate The output terminal is connected to the output terminal Key_float, and the second Schmitt trigger The input end is connected to the resistor group, and the output end is connected to the inverter The input of the NOR gate , inverter The output terminal is connected to a NOR gate The input terminal of the NOR gate The output terminal of the gate is connected to the output terminal Key_off, or the The output terminal of the first Schmitt trigger is connected to the output terminal Key_on. is a high threshold Schmitt trigger, used to distinguish whether the input terminal Key_in is in a floating state or pulled up to the power supply voltage VDD; the second Schmitt trigger It is a low threshold Schmitt trigger, which is used to distinguish whether the input terminal Key_in is in a floating state or pulled down to the ground terminal GND. The present invention uses two Schmitt triggers to detect the input voltage. The triggering thresholds of the two Schmitt triggers are quite different. The detection results of the two Schmitt triggers are transmitted to the subsequent combinational logic circuit, and finally the state of the three-gear switch is output.

[0026] The resistor group includes resistors ,resistance ,resistance and resistor ,resistance One end is connected to the power supply voltage VDD, and the other end is connected to the resistor Series, resistor The other end of the resistor is grounded. One end is connected to the input terminal Key_in, and the other end is connected to the resistor and resistor The connection point of the resistor One end of each of the first Schmitt trigger and the second Schmitt trigger The other end is connected to the input terminal of and resistor The resistor and resistor The resistance value is large and equal. In order to avoid a large current when the gear is switched, the present invention sets a resistor at the input stage and resistor As a current limiting resistor.

[0027] This embodiment adds an inverter and inverter , the switch group includes PMOS tube and NMOS tube , inverter The input terminal is connected to the NOR gate The output terminal is connected to The gate and inverter The input of the inverter Output termination The gate, The source is connected to the power supply voltage VDD, and the drain is connected to the resistor One end of Drain resistor The Key_off signal passes through two inverters to control the switch. and , switch to power supply voltage VDD, Key_off = 1, and Close, the resistor string stops consuming power.

[0028] like Figure 7 , Figure 8 As shown in the figure, compared with the conventional Schmitt trigger, these two Schmitt triggers only have unilateral hysteresis, which is more suitable for this design requirement. The high threshold Schmitt trigger includes the input end SMT_in, the output end SMT_out, and the PMOS tube 、NMOS tube 、NMOS tube 、NMOS tube and resistor The input terminal SMT_in is respectively connected to , and The gate of The source is connected to the power supply voltage VDD, and the drain is connected to The drain and The gate and output terminal SMT_out, The source terminal The source and The drain, The source is grounded, Drain resistor One end of the resistor The other end is connected to the power supply voltage VDD. In order to make the trigger threshold voltage of the high-threshold Schmitt trigger higher, that is, closer to the VDD voltage, the PMOS tube Set wider, NMOS tube It can be set longer, or multiple NMOS tubes can be connected in series. Control the hysteresis size. The Schmitt trigger used in this design does not need too much hysteresis. Its channel length is short, and the NMOS tube The positive feedback loop is formed by the gate and source to accelerate the triggering and hysteresis process. As a current limiting resistor, avoid NMOS tube Direct connection with VDD is damaged. The low threshold Schmitt trigger includes input terminal SMT_in, output terminal SMT_out, PMOS tube 、PMOS tube 、PMOS tube 、NMOS tube and resistor The input terminal SMT_in is respectively connected to , and The gate of The source is connected to the power supply voltage VDD, and the drain is connected to The source and The source of The drain of the The drain and The gate, The source is grounded, Drain resistor One end of the resistor The other end of the NMOS tube is grounded. In order to make the trigger threshold voltage of the low-threshold Schmitt trigger lower, that is, closer to the GND voltage, Set wider, PMOS tube Set it longer, or use multiple NMOS tubes in series, PMOS tube Control the hysteresis size. The Schmitt trigger used in this design does not need too much hysteresis. Its channel length is short, and the PMOS tube The positive feedback loop is formed by the gate and source to accelerate the triggering and hysteresis process. As a current limiting resistor, avoid PMOS tube Direct connection to GND is damaged.

[0029] When the toggle switch is moved from the closed position to the floating position, the port is disconnected from VDD. Since the resistor string is in the closed state, the residual charge in the circuit will cause the voltage of the port to be unable to drop after it is floating, and the floating position of the switch cannot be identified. The specific waveform is as follows Figure 3 When the three-position switch is turned to the on position, the switch is connected to GND, the high threshold Schmitt trigger and the low threshold Schmitt trigger are not triggered, and both Schmitt triggers output high potential, and the NOR gate When both input terminals are 0, the output is 1, and the output terminal Key_on=1, Key_off=0, and Key_float=0; when the three-position switch is turned to the floating position, the port voltage cannot drop to 1 / 2VDD, Key_off=1, Key_float=0, and Key_on=0; when the three-position switch is turned to the closed position, the switch is connected to VDD, the high threshold Schmitt trigger and the low threshold Schmitt trigger are both triggered, and both Schmitt triggers output low potential, and the two input terminals of the NOR gate U6 are 0, the output is 1, and the output terminal Key_off=1, Key_float=0, and Key_on=0.

[0030] Advantages of the present invention: Through the cooperation of the switch group and the operational amplifier group, the Key_off signal controls the switch tube through two inverters. and , switch to VDD, Key_off = 1, and When turned off, the resistor string stops consuming power, thereby reducing the overall power consumption of the chip.

[0031] Embodiment three: like Figure 4 As shown, a low-power three-speed shift switch input circuit is used to output the state of the three-speed shift switch, including a resistor group, a MOS tube group and an operational amplifier group, and is provided with a power supply voltage VDD, a ground terminal GND, an input terminal Key_in, an output terminal Key_float, an output terminal Key_off and an output terminal Key_on, the input terminal Key_in inputs the floating neutral gear, the OFF gear or the ON gear of the three-speed shift switch, the resistor group is connected to the power supply voltage VDD and the input terminal Key_in, and is connected to the operational amplifier group and the ground terminal, the operational amplifier group is respectively connected to the output terminal Key_float, the output terminal Key_off and the output terminal Key_on, the MOS tube group is used as a switch or is equivalent to a diode, when the three-speed shift switch is in the floating neutral gear, the input terminal Key_in inputs The signal is in a floating state, and its voltage is biased to half of the power supply voltage VDD by the resistor group and the MOS tube group. The state of the input terminal Key_in is detected by the operational amplifier group, and the floating state is output at the output terminal Key_float; when the three-speed shift switch is in the OFF gear, the signal input by the input terminal Key_in is pulled up to the power supply voltage VDD, and its voltage is at a high potential. The state of the input terminal Key_in is detected by the operational amplifier group, and the OFF gear state is output at the output terminal Key_off; when the three-speed shift switch is in the ON gear, the signal input by the input terminal Key_in is pulled down to the ground terminal GND, and its voltage is at a low potential. The state of the input terminal Key_in is detected by the operational amplifier group, and the ON gear state is output at the output terminal Key_on.

[0032] The operational amplifier group includes a first Schmitt trigger , the second Schmitt trigger , Inverter , Inverter , NOR Gate , NOR Gate AND-OR-NOT gate , the first Schmitt trigger The input end is connected to the resistor group and the MOS tube group, and the output end is connected to the inverter The input terminal and the NOR gate The input of the inverter The output terminal is connected to a NOR gate The input terminal and the NOR gate The input terminal of the NOR gate The output terminal is connected to the output terminal Key_float, and the second Schmitt trigger The input end is connected to the resistor group and the MOS tube group, and the output end is connected to the inverter The input of the NOR gate , inverter The output terminal is connected to a NOR gate The input terminal of the NOR gate The output terminal of the gate is connected to the output terminal Key_off, or the The output terminal of the first Schmitt trigger is connected to the output terminal Key_on. is a high threshold Schmitt trigger, used to distinguish whether the input terminal Key_in is in a floating state or pulled up to the power supply voltage VDD; the second Schmitt trigger It is a low threshold Schmitt trigger, which is used to distinguish whether the input terminal Key_in is in a floating state or pulled down to the ground terminal GND. The present invention uses two Schmitt triggers to detect the input voltage. The triggering thresholds of the two Schmitt triggers are quite different. The detection results of the two Schmitt triggers are transmitted to the subsequent combinational logic circuit, and finally the state of the three-gear switch is output.

[0033] The resistor group includes resistors ,resistance ,resistance and resistor ,resistance One end is connected to the power supply voltage VDD, and the other end is connected to the resistor Series, resistor The other end of the resistor is grounded. One end is connected to the input terminal Key_in, and the other end is connected to the resistor and resistor The connection point of the resistor One end of each of the first Schmitt trigger and the second Schmitt trigger The other end is connected to the input terminal of and resistor The resistor and resistor The resistance value is large and equal. In order to avoid a large current when the gear is switched, the present invention sets a resistor at the input stage and resistor As a current limiting resistor.

[0034] The operational amplifier group in this embodiment also includes an inverter and inverter MOS tube group includes PMOS tube and NMOS tube , and As switch tube, inverter The input terminal is connected to the NOR gate The output terminal is connected to The gate and inverter The input of the inverter Output termination The gate, The source is connected to the power supply voltage VDD, and the drain is connected to the resistor One end of Drain resistor The Key_off signal passes through two inverters to control the switch. and , switch to power supply voltage VDD, Key_off = 1, and Close, the resistor string stops consuming power.

[0035] like Figure 7 , Figure 8 As shown in the figure, compared with the conventional Schmitt trigger, these two Schmitt triggers only have unilateral hysteresis, which is more suitable for this design requirement. The high threshold Schmitt trigger includes the input end SMT_in, the output end SMT_out, and the PMOS tube 、NMOS tube 、NMOS tube 、NMOS tube and resistor The input terminal SMT_in is respectively connected to , and The gate of The source is connected to the power supply voltage VDD, and the drain is connected to The drain and The gate and output terminal SMT_out, The source terminal The source and The drain, The source is grounded, Drain resistor One end of the resistor The other end is connected to the power supply voltage VDD. In order to make the trigger threshold voltage of the high-threshold Schmitt trigger higher, that is, closer to the VDD voltage, the PMOS tube Set wider, NMOS tube It can be set longer, or multiple NMOS tubes can be connected in series. Control the hysteresis size. The Schmitt trigger used in this design does not need too much hysteresis. Its channel length is short, and the NMOS tube The positive feedback loop is formed by the gate and source to accelerate the triggering and hysteresis process. As a current limiting resistor, avoid NMOS tube Direct connection with VDD is damaged. The low threshold Schmitt trigger includes input terminal SMT_in, output terminal SMT_out, PMOS tube 、PMOS tube 、PMOS tube 、NMOS tube and resistor The input terminal SMT_in is respectively connected to , and The gate of The source is connected to the power supply voltage VDD, and the drain is connected to The source and The source of The drain of the The drain and The gate, The source is grounded, Drain resistor One end of the resistor The other end of the NMOS tube is grounded. In order to make the trigger threshold voltage of the low-threshold Schmitt trigger lower, that is, closer to the GND voltage, Set wider, PMOS tube Set it longer, or use multiple NMOS tubes in series, PMOS tube Control the hysteresis size. The Schmitt trigger used in this design does not need too much hysteresis. Its channel length is short, and the PMOS tube The positive feedback loop is formed by the gate and source to accelerate the triggering and hysteresis process. As a current limiting resistor, avoid PMOS tube Direct connection to GND is damaged.

[0036] In this embodiment, the MOS tube group also includes a PMOS tube 、PMOS tube and PMOS tube , and NMOS tube 、NMOS tube and NMOS tube The added MOS tube is equivalent to multiple diodes in series in the circuit. The source is connected to the power supply voltage VDD, the gate and drain are connected to each other, and the drain is connected to The source of The gate and drain are connected , drain connected The source of The gate and drain are connected to each other, and the drain is connected to a resistor and resistor The connection point; The gate and drain are connected to each other, and the drain is connected to a resistor and resistor The connection point of the source The drain; The gate and drain are connected to each other, and the source is connected to The drain; The gate and drain are connected to each other, and the source is grounded. , and A weak pull-up path is formed to bias the port voltage to half of the power supply voltage and provide a certain degree of anti-electromagnetic interference capability; , and Provide a weak pull-down path to release the residual charge on the port. After the low-power three-position shift switch input circuit is optimized, when the position is shifted from VDD to floating position, the circuit can normally detect the floating state due to the weak path provided by the diode. The input and output characteristics of the optimized circuit are as follows Figure 5 As shown, when the toggle switch is OFF, the port voltage is VDD, Key_off=1, Key_float=0, Key_on=0; when the toggle switch is Float, the port voltage is 1 / 2VDD, Key_off=0, Key_float=1, Key_on=0; when the toggle switch is ON, the port voltage is GND, Key_off=0, Key_float=0, Key_on=1; in addition, when the chip power supply voltage is not too high, the MOS diode cannot be fully turned on, so only a small current flows through the series diode, which is much smaller than the current in the voltage divider resistor string. This structure achieves the purpose of reducing power consumption.

[0037] Advantages of the implementation of the present invention: through the MOS tube group connected to the resistor group and the operational amplifier group, the MOS tube group is used as a switch or equivalent to a diode. When the three-speed shift switch is in the floating neutral position, the signal input by the input terminal Key_in is in a floating state, and its voltage is biased to half of the power supply voltage by the resistor group. The state of the input terminal Key_in is detected by the operational amplifier group, and the floating neutral state is output at the output terminal Key_float; when the three-speed shift switch is in the OFF position, the signal input by the input terminal Key_in is pulled up to the power supply voltage, and its voltage is at a high potential. The state of the input terminal Key_in is detected by the operational amplifier group, and the OFF position state is output at the output terminal Key_off; when the three-speed shift switch is in the ON position, the signal input by the input terminal Key_in is pulled down to the ground terminal, and its voltage is at a low potential. The state of the signal input by the input terminal Key_in is detected by the operational amplifier group, and the ON position state is output at the output terminal Key_on, so that the floating state of the shift switch can be detected, and the overall power consumption can be reduced.

[0038] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by any technician familiar with the art within the technical scope disclosed in the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. A three-position shift switch input circuit, characterized in that: The invention comprises a resistor group and an operational amplifier group, and is provided with a power supply voltage, a ground terminal, an input terminal Key_in, an output terminal Key_float, an output terminal Key_off and an output terminal Key_on. The input terminal Key_in inputs a signal of a three-speed shift switch, and the three-speed shift switch includes a floating neutral gear, an OFF gear or an ON gear. The resistor group is connected to the power supply voltage and the input terminal Key_in, and is connected to the operational amplifier group and the ground terminal. The operational amplifier group is respectively connected to the output terminal Key_float, the output terminal Key_off and the output terminal Key_on. When the three-speed shift switch is in the floating neutral gear, the signal inputted by the input terminal Key_in is in a floating state, and its voltage is biased by the resistor group. to half of the power supply voltage, the state of the input terminal Key_in is detected by the operational amplifier group, and the floating neutral state is output at the output terminal Key_float; when the three-speed shift switch is in the OFF gear, the signal input by the input terminal Key_in is pulled up to the power supply voltage, and its voltage is at a high potential. The state of the input terminal Key_in is detected by the operational amplifier group, and the OFF gear state is output at the output terminal Key_off; when the three-speed shift switch is in the ON gear, the signal input by the input terminal Key_in is pulled down to the ground terminal, and its voltage is at a low potential. The state of the input terminal Key_in is detected by the operational amplifier group, and the ON gear state is output at the output terminal Key_on.

2. A three-speed shift switch input circuit according to claim 1, characterized in that: The operational amplifier group includes a first Schmitt trigger, a second Schmitt trigger, a first inverter, a second inverter, a first NOR gate, a second NOR gate and a third NOR gate. The input end of the first Schmitt trigger is connected to the resistor group, and the output end is connected to the input end of the first inverter and the input end of the second NOR gate. The output end of the first inverter is connected to the input end of the first NOR gate and the input end of the third NOR gate. The output end of the first NOR gate is connected to the output end Key_float. The input end of the second Schmitt trigger is connected to the resistor group, and the output end is connected to the input end of the second inverter and the input end of the second NOR gate. The output end of the second inverter is connected to the input end of the third NOR gate. The output end of the second NOR gate is connected to the output end Key_off. The output end of the third NOR gate is connected to the output end Key_on.

3. A three-position shift switch input circuit according to claim 2, characterized in that: The first Schmitt trigger is a high-threshold Schmitt trigger, which is used to distinguish whether the signal input at the input terminal Key_in is in a floating state or pulled up to the power supply voltage; the second Schmitt trigger is a low-threshold Schmitt trigger, which is used to distinguish whether the signal input at the input terminal Key_in is in a floating state or pulled down to the ground terminal.

4. A three-speed shift switch input circuit according to claim 2, characterized in that: The resistor group includes a first resistor, a second resistor, a third resistor and a fourth resistor, one end of the second resistor is connected to a power supply voltage, and the other end is connected in series with the third resistor, the other end of the third resistor is grounded, one end of the first resistor is connected to an input end Key_in, and the other end is connected to a connection point between the second resistor and the third resistor, one end of the fourth resistor is respectively connected to the input ends of the first Schmitt trigger and the second Schmitt trigger, and the other end is connected to a connection point between the second resistor and the third resistor; the resistance values ​​of the second resistor and the third resistor are large and equal, and the first resistor and the fourth resistor serve as current limiting resistors.

5. A low-power three-speed shift switch input circuit, used for outputting the state of the three-speed shift switch, including a resistor group and an operational amplifier group, and provided with a power supply voltage, a ground terminal, an input terminal Key_in, an output terminal Key_float, an output terminal Key_off and an output terminal Key_on, the input terminal Key_in inputs the signal of the three-speed shift switch, the three-speed shift switch includes a floating neutral gear, an OFF gear or an ON gear, the resistor group is connected to the power supply voltage and the input terminal Key_in, and is connected to the operational amplifier group and the ground terminal, the operational amplifier group is respectively connected to the output terminal Key_float, the output terminal Key_off and the output terminal Key_on, characterized in that, It also includes a MOS tube group connected to the resistor group and the operational amplifier group, the MOS tube group is used as a switch or is equivalent to a diode. When the three-speed shift switch is in the floating neutral position, the signal input by the input terminal Key_in is in a floating state, and its voltage is biased to half of the power supply voltage by the resistor group and the MOS tube group. The state of the input terminal Key_in is detected by the operational amplifier group, and the floating neutral state is output at the output terminal Key_float; when the three-speed shift switch is in the OFF position, the signal input by the input terminal Key_in is pulled up to the power supply voltage, and its voltage is at a high potential. The state of the input terminal Key_in is detected by the operational amplifier group, and the OFF position state is output at the output terminal Key_off; when the three-speed shift switch is in the ON position, the signal input by the input terminal Key_in is pulled down to the ground terminal, and its voltage is at a low potential. The state of the input terminal Key_in is detected by the operational amplifier group, and the ON position state is output at the output terminal Key_on.

6. A low-power three-position shift switch input circuit according to claim 5, characterized in that: The operational amplifier group includes a first Schmitt trigger, a second Schmitt trigger, a first inverter, a second inverter, a third inverter, a fourth inverter, a first NOR gate, a second NOR gate and a third NOR gate. The input end of the first Schmitt trigger is connected to the resistor group and the MOS tube group, and the output end is connected to the input end of the first inverter and the input end of the second NOR gate. The output end of the first inverter is connected to the input end of the first NOR gate and the input end of the third NOR gate. The output end of the first NOR gate is connected to the output end Key_float. The second Schmitt trigger The input end of the inverter is connected to the resistor group and the MOS tube group, the output end is connected to the input end of the second inverter and the input end of the second NOR gate, the output end of the second inverter is connected to the input end of the third NOR gate, the output end of the second NOR gate is connected to the output end Key_off and the input end of the third inverter, the output end of the third NOR gate is connected to the output end Key_on, the output end of the third inverter is connected to the switch MOS tube in the MOS tube group and the input end of the fourth inverter, and the output end of the fourth inverter is connected to the switch MOS tube in the MOS tube group.

7. A low-power three-position shift switch input circuit according to claim 6, characterized in that: The first Schmitt trigger is a high-threshold Schmitt trigger, which is used to distinguish whether the signal input at the input terminal Key_in is in a floating state or pulled up to the power supply voltage; the second Schmitt trigger is a low-threshold Schmitt trigger, which is used to distinguish whether the signal input at the input terminal Key_in is in a floating state or pulled down to the ground terminal.

8. A low-power three-position shift switch input circuit according to claim 6, characterized in that: The MOS tube group includes a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a seventh MOS tube and an eighth MOS tube, and the resistor group includes a first resistor, a second resistor, a third resistor and a fourth resistor. The source of the first MOS tube is connected to the power supply voltage, the gate is connected to the output end of the fourth inverter, and the drain is connected to one end of the second resistor; the source of the second MOS tube is grounded, the gate is connected to the output end of the third inverter, and the drain is connected to one end of the third resistor; the source of the third MOS tube is connected to the power supply voltage, The gate and the drain are connected to each other, and the drain is connected to the source of the fourth MOS tube; the gate and the drain of the fourth MOS tube are connected to each other, and the drain is connected to the source of the fifth MOS tube; the gate and the drain of the fifth MOS tube are connected to each other, and the drain is connected to the connection point of the first resistor and the fourth resistor; the gate and the drain of the sixth MOS tube are connected to each other, the drain is connected to the connection point of the first resistor and the fourth resistor, and the source is connected to the drain of the seventh MOS tube; the gate and the drain of the seventh MOS tube are connected to each other, and the source is connected to the drain of the eighth MOS tube; the gate and the drain of the eighth MOS tube are connected to each other, and the source is grounded.

9. A low-power three-position shift switch input circuit according to claim 8, characterized in that: The first MOS tube, the third MOS tube, the fourth MOS tube and the fifth MOS tube are PMOS tubes, and the second MOS tube, the sixth MOS tube, the seventh MOS tube and the eighth MOS tube are NMOS tubes.

10. A low power consumption three-position shift switch input circuit according to any one of claims 8 to 9, characterized in that: The sixth MOS tube, the seventh MOS tube and the eighth MOS tube provide a weak pull-down path for the NMOS tube to release the residual charge of the port; the third MOS tube, the fourth MOS tube and the fifth MOS tube form a weak pull-up path to bias the port voltage to half of the power supply voltage and provide a certain anti-electromagnetic interference capability.

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