Synchronous transmission module STM service splitting and recombining method and device

Abstract

The embodiment of the invention provides a synchronous transmission module STM service splitting and recombining method and device, and the method comprises the steps: constructing a splitting and recombining matrix according to the service parameters of an STM service, and enabling the splitting and recombining matrix to comprise a read address matrix, a selection matrix and a write address matrix which have the same specification; and splitting and recombining the STM service according to the splitting and recombining matrix. Through the method and the device, the problems of storage space waste and low working efficiency during STM service splitting and recombination in related technologies are solved, and the effects of saving the storage space and improving the working efficiency are achieved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of communications, and in particular to a synchronous transmission module (STM) service splitting and reorganization method and device. Background Art

[0002] The information structure level used by the Synchronous Digital Hierarchy (SDH) protocol is called Synchronous Transport Mode (STM-N, N = 1, 4, 16, 64). The most basic module is STM-1. Four STM-1s are synchronously multiplexed to form STM-4. 16 STM-1s or four STM-4s are synchronously multiplexed to form STM-16. Four STM-16s are synchronously multiplexed to form STM-64. One problem that needs to be solved in the application of SDH technology in communication chips is to split STM1 from STM1; split STM1 or STM4 from STM4; split STM1, STM4 or STM16 from STM16; split STM1, STM4, STM16 or STM64 from STM64.

[0003] In the related art, two matrices can be used to split and reorganize STM services, that is, one matrix is ​​used to represent the rows of the matrix after the splitting, and another matrix is ​​used to represent the columns of the matrix after the splitting, so as to meet the one-to-one correspondence between the elements of the matrix before and after the splitting. However, this solution has the problems of wasting storage space and low work efficiency. Summary of the invention

[0004] The embodiment of the present invention provides a synchronous transmission module (STM) service splitting and reorganizing method and device, so as to at least solve the problems of wasting storage space and low working efficiency when performing STM service splitting and reorganizing in the related art.

[0005] According to one embodiment of the present invention, a method for splitting and reorganizing a synchronous transmission module STM service is provided, comprising: constructing a splitting and reorganizing matrix according to the service parameters of the STM service, wherein the splitting and reorganizing matrix comprises a read address matrix, a selection matrix, and a write address matrix with the same specifications; and splitting and reorganizing the STM service according to the splitting and reorganizing matrix.

[0006] According to another embodiment of the present invention, a synchronous transmission module STM service splitting and reorganization device is provided, comprising: a matrix acquisition module, used to construct a splitting and reorganization matrix according to the service parameters of the STM service, wherein the splitting and reorganization matrix includes a read address matrix, a selection matrix, and a write address matrix with the same specifications; a splitting and reorganization module, used to split and reorganize the STM service according to the splitting and reorganization matrix.

[0007] According to yet another embodiment of the present invention, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any one of the above method embodiments when run.

[0008] According to another embodiment of the present invention, a wavelength division transmission device is provided, including a micro control unit MCU and an optical transmission network OTN chip, wherein the MCU sends a control instruction to the OTN chip to instruct the OTN chip to execute the steps in any one of the above method embodiments.

[0009] The present invention provides a synchronous transmission module STM service splitting and reorganization method, by constructing a splitting and reorganization matrix according to the service parameters of the STM service, wherein the splitting and reorganization matrix includes a read address matrix, a selection matrix, and a write address matrix with the same specifications; the STM service is split and reorganized according to the splitting and reorganization matrix. The problem of wasting storage space and low work efficiency in the related art when performing STM service splitting and reorganization is solved, and the effect of saving storage space and improving work efficiency is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 It is a schematic diagram of the STM splitting principle in the related art;

[0011] Figure 2 It is a schematic diagram of the principle of splitting STM1 into STM1 in the related art;

[0012] Figure 3 It is a schematic diagram of the principle of splitting STM4 into STM1 in the related art;

[0013] Figure 4 It is a schematic diagram of the principle of splitting STM4 into STM4 in the related art;

[0014] Figure 5 It is a hardware structure block diagram of a computer terminal of an STM service splitting and reorganization method according to an embodiment of the present invention;

[0015] Figure 6 is a flow chart of a method for splitting and reorganizing an STM service according to an embodiment of the present invention;

[0016] Figure 7 is a structural block diagram of an STM service splitting and reorganizing device according to an embodiment of the present invention;

[0017] Figure 8 is a structural block diagram of a wavelength division transmission device according to an embodiment of the present invention;

[0018] Fig. 9It is a schematic diagram of the principle of splitting STM16 into STM1 according to a scenario embodiment of the present invention;

[0019] Fig.10 It is a schematic diagram of the principle of splitting STM16 into STM1 according to a scenario embodiment of the present invention;

[0020] Fig.11 It is a schematic diagram of the principle of splitting STM4 into STM1 according to a scenario embodiment of the present invention;

[0021] Fig.12 This is a schematic diagram of the STM service splitting structure of a scenario embodiment of the present invention;

[0022] Fig.13 Schematic diagram of the STM business splitting software architecture of the scenario embodiment of the present invention;

[0023] Fig.14 This is a schematic diagram of a write address matrix creation process in a scenario embodiment of the present invention;

[0024] Fig.15 It is a schematic diagram of the selection matrix and the read address matrix creation process of the scenario embodiment of the present invention;

[0025] Fig.16 It is a schematic diagram of the process of generating STM16 splitting parent matrix by patch covering method in the scenario embodiment of the present invention;

[0026] Fig.17 It is a schematic diagram of the selection matrix and write address matrix creation process of the STM service reorganization in the scenario embodiment of the present invention. DETAILED DESCRIPTION

[0027] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings and in combination with the embodiments.

[0028] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0029] With the development of communication, the information required to be transmitted is not only voice, but also text, data, images and videos. Among various broadband optical fiber access network technologies, the access network system using SDH technology is the most commonly used. The birth of SDH solves the problem of access "bottleneck" between users and core networks due to the bandwidth limitation of home media that cannot keep up with the development of backbone networks and user business needs, and at the same time improves the utilization rate of a large amount of bandwidth on the transmission network. Since the introduction of SDH technology in the 1990s, it has become a mature and standard technology and is widely used in backbone networks.

[0030] In the related technology, the hardware solution of the project uses 128-bit bit width to process the STM frame structure. Figure 1 This is a schematic diagram of the STM splitting principle in the related technology, such as Figure 1 As shown, a total of 16 random access memories (RAM) are used. The 128-bit data input in each beat is sequentially written into the 16 11-bit RAMs on the left. The data of the same beat is written at the same address of the 16 RAMs. Through the cross rule, the data on the left will be written to the same 16 11-bit RAMs on the right.

[0031] The relationship between the hardware design of this project and the multiplexing of the STM frame structure. The splitting of various STM services has different corresponding relationships. The matrix on the left of each picture represents the RAM before the service splitting, with a total of 16 rows (16 RAM blocks), and each column of the left matrix is ​​the data arriving at each clock beat; the matrix on the right represents the RAM after the service splitting, which is also 16 rows (16 RAM blocks), and the same color indicates the write operation at the same clock beat; for cross-reading and writing, the same clock beat cannot read the same RAM for reading on the left side, and similarly, the same clock beat is also required for the RAM on the right side. The data cannot be written to the same RAM, that is, reading and writing RAM are required to be evenly distributed on the 16 RAM blocks.

[0032] Figure 2 It is a schematic diagram of the principle of splitting STM1 into STM1 in the related art, such as Figure 2 As shown, the STM1 service is split into STM1. Since the STM frame structures before and after the split (left and right RAMs) are consistent, it is only necessary to move the data in the left RAM to the right RAM intact.

[0033] Figure 3 This is a schematic diagram of the principle of splitting STM4 into STM1 in the related art, such as Figure 3 As shown, the 4 STM1s reused in the STM4 in the left RAM are split into the right RAM according to Figure 3 According to the rule shown, the actions completed in four clock beats are distinguished by four colors of different depths.

[0034] Figure 4 This is a schematic diagram of the principle of splitting STM4 into STM4 in the related art, such as Figure 4 As shown, for the STM4 business split into STM4, the splitting rules are as follows Figure 4 As shown, Figure 2 STM1 is split into STM1.

[0035] The splitting of STM16 includes the splitting of STM16 into STM1, STM4, and STM16. The process of splitting STM16 into STM16 is consistent with the principle and rule of splitting STM1 into STM1 and STM4 into STM4. When splitting STM16 into STM4, the number of rows of STM16 is 16, and every 4 rows from top to bottom is a position. There are 4 positions in STM16, that is, 4 positions of multiplexing STM4, so there are a total of 15 combinations corresponding to the generation.

[0036] The splitting of the STM64 service is not described in detail with a diagram. The service is composed of 4 STM16 multiplexing and interleaving. Other situations are not involved for the time being. The splitting of the STM16 has 17 situations mentioned above. Based on this, there are 17*17*17*17 situations for the splitting of the STM64 service.

[0037] As mentioned above, STM1 has 1 split situation, STM4 has 2 split situations, STM16 has 17 split situations, and STM64 has 17*17*17*17 situations. The details are shown in Table 1 below.

[0038] Table 1 Number of STM service splitting scenarios

[0039]

[0040] To solve this splitting and reorganization problem, a two-matrix solution can be used, that is, one matrix represents the rows of the matrix after the splitting, and another matrix represents the columns of the matrix after the splitting, so as to satisfy the one-to-one correspondence between the elements of the matrix before and after the splitting. However, this solution has two fatal disadvantages: ① The two matrices in all splitting situations must be enumerated and saved, which will inevitably cause a lot of space waste. The fourth column of Table 1 lists the space occupied by the two-matrix solution to save all the split matrices of each business. ②: The hardware can only read and write the same RAM once in the same clock beat, and the same clock beat cannot guarantee that all the RAM on the left and right sides can be accessed, which greatly reduces the efficiency and flexibility of the hardware work.

[0041] Therefore, the splitting scheme using three matrices (read address matrix, selection matrix, write address matrix) proposed in the embodiment of the present invention can solve the problem of low hardware efficiency and ensure that each clock cycle can complete reading one element from each of the 16 RAMs before splitting and writing one element to each of the 16 RAMs after splitting. Table 2 lists the comparison of the number of clock beats required for the hardware of the two schemes to complete various business splitting.

[0042] For the comparison of the number of hardware working clock beats between the two-matrix solution and the three-matrix solution, please refer to Table 2:

[0043] Table 2 Comparison of the number of hardware working clock beats between the two-matrix solution and the three-matrix solution

[0044]

[0045] Although the three-matrix splitting scheme solves the problem of low hardware efficiency, if the storage space of the exhaustive split matrix is ​​1.5 times that required by the two-matrix splitting scheme, the present invention proposes to use a splitting and reorganization algorithm to solve the problem of excessive memory usage of the three-matrix scheme, and use a matrix regeneration algorithm to generate three split matrices under different splitting scenarios, without the need to open up memory space to save the split matrices.

[0046] As for reorganization, reorganization is the reverse process of splitting, and the principle is the same as splitting, which will not be repeated here. Different from the prior art, the present invention designs a matrix splitting algorithm, which uses three matrices for splitting to ensure the correct splitting and reorganization of various services (STM1, STM4, STM16, STM64).

[0047] The method embodiments provided in the embodiments of the present application can be executed in a mobile terminal, a computer terminal or a similar computing device. Taking running on a computer terminal as an example, Figure 5 FIG. 1 is a hardware structure block diagram of a computer terminal of an STM service splitting and reorganization method according to an embodiment of the present invention. Figure 5 As shown, the computer terminal may include one or more ( Figure 5 Only one is shown in the figure) a processor 502 (the processor 502 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 504 for storing data, wherein the above-mentioned computer terminal may also include a transmission device 506 and an input and output device 508 for communication functions. It can be understood by those skilled in the art that Figure 5 The structure shown is only for illustration and does not limit the structure of the above-mentioned computer terminal. Figure 5 More or fewer components as shown, or with Figure 5 Different configurations are shown.

[0048] The memory 504 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the STM service splitting and reorganization method in the embodiment of the present invention. The processor 502 executes various functional applications and data processing by running the computer program stored in the memory 504, that is, to implement the above method. The memory 504 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 504 may further include a memory remotely arranged relative to the processor 502, and these remote memories may be connected to the computer terminal via a network. Examples of the above network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0049] The transmission device 506 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of a computer terminal. In one example, the transmission device 506 includes a network adapter (Network Interface Controller, NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 506 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0050] In this embodiment, a method for splitting and reorganizing an STM service running on the above-mentioned computer terminal is provided. Figure 6 is a flow chart of a method for splitting and reorganizing an STM service according to an embodiment of the present invention. Figure 6 As shown, the process includes the following steps:

[0051] Step S602, constructing a splitting and reorganizing matrix according to the service parameters of the STM service, wherein the splitting and reorganizing matrix includes a read address matrix, a selection matrix, and a write address matrix having the same specifications;

[0052] In an exemplary embodiment, the type of STM service, the type of internal STM service, and the time slot position of the internal STM service, wherein the internal STM service is obtained by splitting the STM service.

[0053] In the actual implementation process, the internal STM service is also an STM service, which is mapped in the high-order STM service. Only one STM1 can be mapped in the STM1 service, 4 STM1s or 1 STM4 can be mapped in the STM4 service, 16 STM1s or 4 STM4s, or 1 STM16 can be mapped in the STM16 service, and 64 STM1s or 16 STM4s, or 4 STM16s, or 1 STM64 can be mapped in the STM64 service. The service mapped in the STM16 can also be a mixture of STM1 and STM4, and the STM64 service can also be mapped with a mixture of services other than STM64.

[0054] In an exemplary embodiment, constructing the splitting and reorganizing matrix according to the service parameters includes: when the type of the STM service is the same as the type of the internal STM service, constructing a read address matrix, a selection matrix, and a write address matrix of the same specifications according to the specifications of the first RAM.

[0055] In the actual implementation process, the situation where the type of STM business is the same as the type of internal STM business can at least include: splitting STM1 into STM1, splitting STM4 into STM4, splitting STM16 into STM16, etc. In this case, the read address matrix, selection matrix, and write address matrix of the same specifications can be directly constructed according to the specifications of the first RAM, and then split and reorganized.

[0056] In an exemplary embodiment, the splitting and reorganization matrix is ​​constructed according to the service parameters, including: when the type of the STM service is different from the type of the internal STM service, a row order matrix is ​​constructed according to the type of the internal STM service, wherein the element value of the row order matrix is ​​an integer multiple of the number of rows where the element is located and the sum of the number of columns where the element is located; the row order matrix is ​​patched according to the time slot position of the internal STM service to obtain a parent matrix; and a read address matrix and a selection matrix are obtained according to the parent matrix.

[0057] In the actual implementation process, the situation where the type of STM service is different from the type of internal STM service at least includes: splitting STM4 into STM1, splitting STM16 into STM4 or STM1, etc., among which, for the case of splitting STM4 into STM1, the element value of the row order matrix is ​​an integer multiple of the number of rows where the element is located and the sum of the number of columns where the element is located, specifically, the element value of the row order matrix is ​​4 times the number of rows where the element is located and the sum of the number of columns where the element is located.

[0058] In the actual implementation process, for a 16*16 matrix (the parent matrix when 16 STM1s are split) covering another 16*16 matrix (the parent matrix when 4 STM4s are split). Let the parent matrix generated by the rule of STM16 splitting 16 STM1s be matrix_1, and let the parent matrix generated by the rule of STM16 splitting 4 STM4s be matrix_2. Since the number of STM4 services mapped in STM16 is unknown, vc4_4c_ts_mask is used instead. When vc4_4c_ts_mask==0, it means that all the mapped STM16 services are STM1, then the parent matrix matrix_1 can be generated according to the rule of STM16 splitting STM1; vc4_4c_ts_mask! =0, it means that STM4 is mapped in the STM16 service. If an STM4 is mapped in the time slot position 1, the 0-3 columns of matrix_2 are covered to the 0-3 columns of matrix_1 to deal with this split scenario; by analogy, if an STM4 is mapped in the time slot position 2, the 4-7 columns of matrix_2 are covered to the 4-7 columns of matrix_1 to deal with this split scenario; similarly, if an STM4 is mapped in the time slot positions 1, 2, 3, and 4, matrix_2 is completely covered to matrix_1 to deal with this split scenario. That is, the meaning of patch coverage is: for the case where the high-order STM is not split into the lowest-order STM, i.e., STM1, the parent matrix split into the high-order STM is used to cover the parent matrix split into the low-order STM.

[0059] In the above embodiment, the actual implementation is only to replace matrix_1 by 4 columns (the elements in the 4 columns corresponding to each STM4 are positionally transformed). In the actual implementation process, matrix_2 is not generated first, but matrix_1 is generated in advance, and the position of the elements in the patch time slot is transformed based on matrix_1, which is equivalent to patching matrix_1 with matrix_2.

[0060] In an exemplary embodiment, a read address matrix and a selection matrix are obtained according to a parent matrix, including: performing a rounding operation on each element of the parent matrix, and assigning the obtained integer value as a new element to the read address matrix, wherein the row value in the read address matrix is ​​the remainder value of the modulo operation on each element of the parent matrix, and the column value is the column value of each element in the parent matrix; performing a modulo operation on each element of the parent matrix, and filling the obtained remainder into the corresponding element in the new matrix corresponding to the position of the parent matrix, so as to obtain a selection matrix.

[0061] In the actual implementation process, a selection matrix can be obtained by taking the modulo 16 value of each element of the parent matrix; taking the modulo 16 value of each element of the parent matrix and using the value as the row of the read address matrix; then the value of the parent matrix is ​​rounded to 16 and assigned to the read address matrix.

[0062] In an exemplary embodiment, a splitting and reorganization matrix is ​​constructed according to service parameters, including: when the type of STM service is different from the type of internal STM service, a column matrix is ​​constructed according to the type of STM service, wherein the number of columns of the column matrix is ​​determined according to the type of STM service, and the element value of the column matrix is ​​equal to the column number where the element is located; and each row of the column matrix is ​​circularly shifted left according to the type of internal STM service to obtain a write address matrix.

[0063] In the actual implementation process, the above-mentioned circular left shift situations at least include: ① The scenarios of STM1 splitting STM1, STM4 splitting STM4, STM16 splitting STM16, and STM64 splitting STM64 do not require circular left shift. ② The number of rows 0-15 that need to be circularly shifted to the left in the scenarios of STM16 splitting STM1 and STM16 splitting STM4 is 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15. ③ The number of rows 0-15 that need to be circularly shifted to the left in the scenarios of STM4 splitting STM1 is 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3. That is, in units of N, for the split STM, when a high-order STM is split into a low-order STM, a cyclic left shift is required. If STM-N is split into STM-n, N and n are both positive integers, and the left shift amount starts from 0. For the scenarios of STM16 splitting into STM1 and STM16 splitting into STM4, each row increases by 1; for the scenario of STM4 splitting into STM1, each N / n row increases by 1 until the left shift amount is equal to N-1.

[0064] In an exemplary embodiment, a splitting and reorganization matrix is ​​constructed according to service parameters, including: when the type of STM service is different from the type of internal STM service and the type of STM service is STM64, STM64 is split into 4 STM16s, and then a splitting and reorganization matrix is ​​constructed for STM16; and the obtained 4 groups of splitting and reorganization matrices are merged respectively to obtain a splitting and reorganization matrix of STM64.

[0065] Step S604: split and reassemble the STM service according to the split and reassemble matrix.

[0066] In an exemplary embodiment, splitting and reorganizing the STM service according to the splitting and reorganizing matrix includes: reading elements from the first RAM according to the read address matrix; performing row transformation on the elements according to the selection matrix; and writing the elements after the row transformation into the second RAM according to the write address matrix.

[0067] Through the above steps, a method for splitting and reorganizing an STM service is provided, wherein a splitting and reorganizing matrix is ​​constructed according to the service parameters of the STM service, wherein the splitting and reorganizing matrix includes a read address matrix, a selection matrix, and a write address matrix with the same specifications; and the STM service is split and reorganized according to the splitting and reorganizing matrix. The problem of wasting storage space and low work efficiency in the related art when performing the splitting and reorganization of the STM service is solved, and the effect of saving storage space and improving work efficiency is achieved.

[0068] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for enabling a terminal device (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present invention.

[0069] In this embodiment, a STM service splitting and reorganization device is also provided, which is used to implement the above-mentioned embodiments and preferred implementation modes, and the descriptions that have been made are not repeated here. As used below, the term "module" can be a combination of software and / or hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceivable.

[0070] Figure 7 is a structural block diagram of an STM service splitting and reorganizing device according to an embodiment of the present invention, such as Figure 7 As shown, the splitting and reorganization device 70 includes: a matrix acquisition module 710, which is used to construct a splitting and reorganization matrix according to the business parameters of the STM business, wherein the splitting and reorganization matrix includes a read address matrix, a selection matrix, and a write address matrix with the same specifications; a splitting and reorganization module 720, which is used to split and reorganize the STM business according to the splitting and reorganization matrix.

[0071] In an exemplary embodiment, the splitting and reorganization module 720 may further include: a reading unit, a transformation unit, and a writing unit, wherein the reading unit is used to read elements from the first RAM according to the read address matrix, the transformation unit is used to perform row transformation on the elements according to the selection matrix, and the writing unit is used to write the elements that have completed the row transformation into the second RAM according to the write address matrix.

[0072] In an exemplary embodiment, the matrix acquisition module 710 includes a first acquisition unit, wherein the first acquisition unit is used to construct a read address matrix, a selection matrix, and a write address matrix of the same specifications according to the specifications of the first RAM when the type of the STM service is the same as the type of the internal STM service.

[0073] In an exemplary embodiment, the matrix acquisition module 710 includes a parent matrix acquisition unit, which is used to construct a row order matrix according to the type of the internal STM service when the type of the STM service is different from the type of the internal STM service, wherein the element value of the row order matrix is ​​an integer multiple of the number of rows where the element is located and the sum of the number of columns where the element is located; and the row order matrix is ​​patched according to the time slot position of the internal STM service to obtain the parent matrix.

[0074] In an exemplary embodiment, the matrix acquisition module 710 includes a read address matrix acquisition unit, which is used to perform a rounding operation on each element of the parent matrix, and assign the obtained integer value as a new element to the read address matrix, wherein the row value in the read address matrix is ​​the remainder value of the modulo operation on each element of the parent matrix, and the column value is the column value of each element in the parent matrix.

[0075] In an exemplary embodiment, the matrix acquisition module 710 includes a selection matrix acquisition unit for performing a modulo operation on each element of the parent matrix, and filling the obtained remainder corresponding to the position of the parent matrix into the corresponding element in the new matrix to obtain the selection matrix.

[0076] In an exemplary embodiment, the matrix acquisition module 710 includes a write address matrix acquisition unit, which is used to construct a column matrix according to the type of STM business when the type of STM business is different from the type of internal STM business, wherein the number of columns of the column matrix is ​​determined according to the type of STM business, and the element value of the column matrix is ​​equal to the column number where the element is located; and each row of the column matrix is ​​circularly shifted left according to the type of internal STM business to obtain a write address matrix.

[0077] In the above embodiments, the implementation methods and specific processes of the functions in the specific different modules and units can refer to the implementation methods and specific processes in the above method embodiments, which will not be repeated here.

[0078] It should be noted that the above modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0079] An embodiment of the present invention further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0080] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0081] An embodiment of the present invention further provides a wavelength division transmission device, comprising a microcontroller unit (MCU) and an optical transport network (OTN) chip, wherein the MCU sends a control instruction to the OTN chip to instruct the OTN chip to execute the steps in any one of the above method embodiments. Figure 8 is a structural block diagram of a wavelength division transmission device according to an embodiment of the present invention. Figure 8 As shown, the wavelength division transmission device 80 includes a micro control unit MCU810 and an OTN chip 820 .

[0082] In actual implementation, the OTN chip 820 may execute a computer program to implement the steps in any of the above method embodiments. The computer program may be stored in other processing devices such as an MCU or a programmable logic device FPGA.

[0083] In an exemplary embodiment, the wavelength division transmission device may be an integrated wavelength division transmission device. Alternatively, the STM service splitting and reorganization method may also be implemented by an integrated intelligent optical transmission platform or other types of electronic communication devices. For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementations, and this embodiment will not be repeated here.

[0084] Obviously, those skilled in the art should understand that the above modules or steps of the present invention can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order than here, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present invention is not limited to any specific combination of hardware and software.

[0085] In order to enable those skilled in the art to better understand the technical solution of the present invention, it is described below in conjunction with specific scenario embodiments.

[0086] Scenario Example 1

[0087] According to the above embodiment, whether two matrices are used to solve the splitting problem or three matrices are used to solve the splitting problem, the existing technical solution of exhaustively splitting the matrix will occupy a large amount of memory space, and the two-matrix solution will also reduce the flexibility and efficiency of the hardware work. At the same time, the software reset process also requires corresponding storage space to save these matrices, resulting in an increase in product cost. The process of saving and restoring these matrices also requires a lot of time to process, affecting the performance index of the product soft reset. Therefore, an effective solution is urgently needed to reduce the memory occupation of business splitting and reorganization. The new algorithm proposed in the embodiment of the present invention solves these defects of the existing solution by regenerating three matrices through the matrix, and no longer retains these redundant splitting and reorganization matrices. Only part of the memory space needs to be opened up to save a few intermediate matrices (intermediate data generated by the algorithm process). The splitting and reorganization matrix is ​​regenerated by the algorithm to meet the needs of various business splitting. At the same time, the software reset no longer needs to save and restore any matrix of this process, which greatly saves the consumption of memory for splitting and reorganization, reduces the cost of the product, and also reduces the time consumed by software reset, improves the soft reset performance index of the product, and highlights the competitiveness of the product. At the same time, the three matrix schemes allow the splitting and reorganization process to be completed in batches in N (N = 1, 4, 16, 64) clock beats, which greatly enhances the working efficiency of the hardware and makes the product's business processing performance indicators more outstanding. At the same time, the algorithm has a certain degree of scalability. After the equipment is upgraded, the algorithm can still be applied to the splitting and reorganization of STM256 services or larger granularity services. Since reorganization is the reverse process of splitting, we can take splitting as an example to discuss in detail the technical solution implementation of the scenario embodiment of the present invention.

[0088] Fig. 9 Schematic diagram of the principle of splitting STM16 into STM1 according to the scenario embodiment of the present invention, as shown in FIG. Fig. 9As shown, the RAM before and after the split is regarded as two matrices, and the splitting and reorganization can be simply understood as the transformation relationship between the two matrices. Since the RAM on both sides of the read and write are evenly distributed on 16 RAMs in the same clock cycle, the present invention uses three matrices of the same specification (read address matrix, write address matrix, selection matrix). To complete this correspondence, the number of columns of these three matrices represents the action that needs to be completed in which clock beat. The dark grid data in the left RAM is read and written to the dark grid of the right RAM. The read address matrix is ​​used to provide the number of columns of the left matrix where the read element is located. After the selection matrix performs row transformation, the number of columns of the right matrix provided by the write address matrix is ​​used to write the read elements into the right matrix. The entire read and write process is strictly written from top to bottom according to the number of rows of the left and right matrices.

[0089] Fig.10 Schematic diagram of the principle of splitting STM16 into STM1 according to the scenario embodiment of the present invention, as shown in FIG. Fig.10 As shown, the hardware follows the instructions in the third column of the read address matrix, and the element read in the third clock beat is [1 15 , 2 16 ,31,42,53,64,75,86,97,108,119,12 10 , 13 11 , 14 12 , 15 13 , 16 14 ], after selecting the transformation rule provided by the third column of the matrix [2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1], the read elements are transformed into [31, 42, 53, 64, 75, 86, 97, 108, 119, 12 10 , 13 11 , 14 12 , 15 13 , 16 14 , 1 15 , 2 16 Then, according to the third column of the write address matrix, the elements [31, 42, 53, 64, 75, 86, 97, 108, 119, 12 10 , 13 11 , 14 12 , 15 13 , 16 14 , 1 15 , 2 16 ] is written into the matrix (RAM) on the right. It takes 16 clock cycles to split STM16 into STM1, and 16 1*16 matrices are needed to support the splitting, that is, the read address matrix, write address matrix, and selection matrix are all 16*16 in size.

[0090] In the actual implementation process, for the splitting of STM1 into STM1, there is only one case, and three splitting matrices can be directly generated.

[0091] Fig.11 Schematic diagram of the principle of splitting STM4 into STM1 according to the scenario embodiment of the present invention, as shown in FIG. Fig.11 As shown, after the split RAM is cyclically shifted left by the number of rows / 4 units every four rows, the value of each column element is consistent. Therefore, after establishing a row order matrix, a parent matrix can be obtained by cyclically shifting left by the number of rows / 4 units every four rows, and then the selection matrix and the read address matrix can be obtained; as for the write address matrix, a column matrix is ​​first created, and then the write address matrix in this scenario can be obtained by cyclically shifting left by the number of rows / 4 units every four rows.

[0092] For STM4 split into STM4, it can be clearly observed that each row of the read address matrix and the write address matrix is ​​data starting from 0 and increasing by 1, and the selection matrix is ​​a matrix from 0 to 15 in the column direction. Based on this, the split matrices for these two split scenarios can be easily generated. The same is true for STM16 split into STM16.

[0093] In particular, when the STM16 is split into STM1 or STM4, it can be clearly observed that the split RAM shifts one element to the left in each row, and the elements of the same depth color are just moved to one column. It can be confirmed that the first row of the write address matrix during the split in this scenario is 0 to 15, and each of the remaining rows is arranged according to the rule of shifting the elements to the left in a circular manner and increasing by one unit. This also easily solves the generation of the write address matrix in this scenario.

[0094] For the scenario of splitting STM16 into STM1, for the selection matrix and the read address matrix, the two matrices are obtained by using a parent matrix. When STM16 is split into STM1, the initial state of the parent matrix is ​​a row-order matrix (a z-shaped sequential increasing matrix). After each row of the row-order matrix is ​​cyclically shifted left by a number of elements, a parent matrix can be obtained. If the subscript of the value of the element in the split RAM is regarded as a row, the value of the matrix is ​​consistent with the value of the transformed parent matrix. A selection matrix can be obtained by taking the modulo 16 of each element value of the parent matrix; taking the modulo 16 of each element value of the parent matrix, and using the value as the row of the read address matrix, and then assigning the value of the parent matrix to the read address matrix after taking the integer of 16, the column coordinates of the two matrices in this step are consistent, which involves a row coordinate transformation, that is, the inverse process of row exchange of the corresponding selection matrix. The above process of generating the selection matrix and the read address matrix through the parent matrix is ​​applicable to any business of STM splitting. Therefore, another core content of the algorithm is how to generate the parent matrix.

[0095] As for the generation method of the parent matrix when STM16 is split into STM4, as mentioned above, the RAM after splitting increments and circularly shifts one element to the left once per row, just moving the elements of the same depth color to one column. The matrix before circularly shifting to the left has a strong correspondence with the time slot position of STM4 in STM1. If STM4 is in the #1 time slot position of STM16 (the first four rows), the parent matrix corresponding to columns 1 to 4 is inconsistent with the parent matrix when STM16 is split into STM1. If STM4 is in the #2 time slot position of STM16, the parent matrix corresponding to columns 5 to 8 is inconsistent with the parent matrix when STM16 is split into STM1. The next two STM4 time slot positions have 4 inconsistent columns in turn. Based on this rule, it is easy to solve the 15 combinations when STM16 is split into STM4 by patch coverage.

[0096] The parent matrix when STM16 is split into STM16 is simpler, because the color depth of each column of the right RAM is the same, there is no need to perform a circular left shift transformation, and a column order matrix (an increasing order matrix arranged in an N-shaped pattern) can be directly generated.

[0097] The reorganization process is the inverse process of the entire splitting algorithm. The split write address matrix is ​​the reorganized read address matrix, and the split read address matrix is ​​the reorganized write address matrix. Relatively speaking, the reorganized selection matrix also comes from a parent matrix. The reorganized parent matrix is ​​used to generate the reorganized selection matrix and the write address matrix. There is a slight difference between the generation of the reorganization selection matrix by the parent matrix and the generation of the split selection matrix by the split parent matrix, which is specifically described in the scenario embodiment 2.

[0098] Scenario Example 2

[0099] The application scenarios of the scenario embodiments of the present invention can meet the scenarios of STM1 being split into STM1, STM4 being split into STM1, STM4 being split into STM4, STM16 being split into STM1, STM16 being split into STM4, STM16 being split into STM16, STM64 being split into STM1, STM64 being split into STM4, STM64 being split into STM16, and STM64 being split into STM64.

[0100] Fig.12 Schematic diagram of the STM service splitting structure of the scenario embodiment of the present invention, such as Fig.12 As shown, stm_type refers to the service type before splitting (STM-N, N = 1, 4, 16, 64), vc_type refers to the STM type mapped multiplexed in STM before splitting, that is, the service type STM after splitting, and vc4_4c_ts_mask is the time slot position mark of STM4 in STM16 service.

[0101] Fig.13 Schematic diagram of the STM service splitting software architecture of the scenario embodiment of the present invention, such as Fig.13 As shown, the present invention adopts the idea of ​​divide and conquer for different scenarios of various services, and classifies and processes them according to the service type STM, wherein the split matrix of the STM64 service is decomposed into 4 STM16 services, and then interleaved into a split matrix of 16*64; the different selection read address matrices and selection matrix generators of the vc service types multiplexed internally for the STM4 service evidence: when the STM16 service is split, if the internally multiplexed service type is not STM16 and vc4_4c_ts_mask is not equal to 0, it means that the internally multiplexed service type is STM4, or a mixture of STM4 and STM1, and each bit of vc4_4c_ts_mask represents a time slot number of STM4, and a total of 4 bits represent 4 time slot numbers. According to the valid state of the 4 bits (the bit value is 1, which means it is valid), it is decided to patch the 4 time slot positions of the parent matrix.

[0102] Fig.14 : is a schematic diagram of the write address matrix creation process of the scenario embodiment of the present invention, such as Fig.14 As shown in the figure, the generation of the split write address matrix is ​​also divided and conquered according to the business type. The first step is to create a column matrix. The difference is that the number of columns of the matrix created when the business type is different is inconsistent. Among them, the STM4 business and the STM16 business will choose whether to perform a certain regular circular left shift on the initial matrix based on the internally reused business type; similarly, the generation of the split write address matrix of the STM64 business is also split into 4 STM16s for processing and then restored in an interleaved manner.

[0103] Fig.15 : is a schematic diagram of the selection matrix and the read address matrix creation process of the scenario embodiment of the present invention, such as Fig.15 As shown in the figure, except for the direct generation of the selection matrix and the read address matrix when the STM1 service is split, the generation of the two matrices of the other service splits is generated by a parent matrix, and then the selection matrix and the read address matrix are obtained by a unified algorithm processing of the parent matrix:

[0104] Split selection matrix:

[0105] Take the modulo 16 value of each element of the parent matrix;

[0106] sel_mtrx[row][col]=parent_mtrx[row][col]%16.

[0107] Split read address matrix:

[0108] Take the modulo 16 value of each element of the parent matrix and use the value as the row of the read address matrix. Then, round the value of the parent matrix to 16 and assign it to the read address matrix.

[0109] row_temp=parent_mtrx[row][col]%16,

[0110] rd_addr_mtrx[row_temp][col]=p_parent_mtrx[row][col] / 16.

[0111] Among them, row represents the row of the matrix, col represents the column of the matrix, sel_mtrx represents the selection matrix, parent_mtrx represents the parent matrix, sel_mtrx represents the selection matrix, and row_temp is a temporary variable.

[0112] like Fig.15 As shown in the figure, the generation rules of the parent matrix are different. In particular, the generation of the STM16 parent matrix is ​​different from that of other services. When the internal multiplexing service is not STM16, the generation of the parent matrix will select the row sequence matrix for patch coverage according to the time slot number mark of vc4_4c_ts_mask. Similarly, the generation of the selection matrix and read address matrix of the STM64 service split still depends on the STM16 service, which is decomposed into 4 STM16s and then interleaved.

[0113] Fig.16 This is a schematic diagram of the process of generating STM16 split parent matrix by patch coverage method in the scenario embodiment of the present invention, such as Fig.16 As shown, when STM16 is split into STM1, the parent matrix is ​​a row order matrix. When vc4_4c_ts_mask is not equal to 0, it means that the service after STM16 split is STM4. The 4 columns of the flight order matrix are covered according to the time slot number position indicated by vc4_4c_ts_mask. The specific covering method is parent matrix [row][col+i*4]=col*64+((row / 4)*16)+(row%4)+i*4. Where row represents row and col represents column.

[0114] Fig.17 : is a schematic diagram of the selection matrix and write address matrix creation process of the STM service reorganization in the scenario embodiment of the present invention, such as Fig.17 As shown, the reorganized write address matrix is ​​obtained by Fig.15 The split read address matrix shown in the figure has the same process of obtaining the selection matrix as the split selection matrix. The only difference is that the assignment of the reorganized selection matrix is ​​different from that of the split selection matrix:

[0115] Recombination selection matrix:

[0116] row_temp=parent_mtrx[row][col]%16

[0117] sel_mtrx[row_temp][col] = row

[0118] Among them, row represents the row of the matrix, clo represents the column of the matrix, sel_mtrx represents the selection matrix, parent_mtrx represents the parent matrix, sel_mtrx represents the selection matrix, and row_temp is a temporary variable.

[0119] The value assigned is the row number of the element in the original parent matrix.

[0120] In summary, the STM service splitting and reorganization method provided by the embodiment of the present invention can improve the working efficiency of the hardware: support three matrix splitting schemes, so that the hardware can run with higher efficiency, speed up the speed of service splitting and reorganization, and obtain better performance indicators for the product. It can solve the large memory occupation: a new splitting and reorganization method through matrix regeneration is proposed to solve the defect of large memory occupation of the existing scheme, and only part of the memory space needs to be opened up to save a few intermediate matrices (intermediate data generated by the algorithm process), and no longer save redundant split matrices. It can improve the software reset performance index: by regenerating the split matrix through the algorithm, while meeting various service splitting requirements, the storage and recovery time performance of the software reset is also significantly improved, and the software reset no longer needs to save and restore any matrix of this process. It has a certain general extensibility: the algorithm scheme of the present invention is also applicable to higher-order matrix splitting and reorganization, such as the upgraded STM256 service, and the algorithm is expanded to generate three 16*256 split matrices to deal with the splitting of the STM256 service, while meeting a variety of splitting scenarios and saving more memory consumption.

[0121] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A synchronous transmission module STM service splitting and reorganization method, characterized in that: include: Constructing a splitting and reorganizing matrix according to the service parameters of the STM service, wherein the splitting and reorganizing matrix includes a read address matrix, a selection matrix, and a write address matrix having the same specifications; The STM service is split and reorganized according to the split and reorganization matrix.

2. The method according to claim 1, characterized in that The service parameters include: The type of STM service, the type of internal STM service, and the time slot position of the internal STM service, wherein the internal STM service is obtained by splitting the STM service.

3. The method according to claim 1, characterized in that Splitting and reorganizing the STM service according to the splitting and reorganizing matrix includes: Reading elements from a first random access memory RAM according to the read address matrix; Performing row transformation on the elements according to the selection matrix; The elements for which the row transformation is completed are written into the second RAM according to the write address matrix.

4. The method according to claim 2, characterized in that: Constructing the splitting and reorganizing matrix according to the service parameters includes: In the case that the type of the STM service is the same as the type of the internal STM service, the read address matrix, the selection matrix, and the write address matrix of the same specifications are constructed according to the specifications of the first RAM.

5. The method according to claim 2, characterized in that: Constructing the splitting and reorganizing matrix according to the service parameters includes: In the case where the type of the STM service is different from the type of the internal STM service, constructing a row order matrix according to the type of the internal STM service, wherein an element value of the row order matrix is ​​a sum of an integer multiple of the number of rows where the element is located and the number of columns where the element is located; Performing patch coverage on the row order matrix according to the time slot position of the internal STM service to obtain a parent matrix; The read address matrix and the selection matrix are obtained according to the parent matrix.

6. The method according to claim 5, characterized in that Obtaining the read address matrix and the selection matrix according to the parent matrix includes: Performing a rounding operation on each element of the parent matrix, and assigning the obtained integer value as a new element to the read address matrix, wherein the row value in the read address matrix is ​​the remainder value of the modulo operation on each element of the parent matrix, and the column value is the column value of each element in the parent matrix; A modulo operation is performed on each element of the parent matrix, and the obtained remainders are filled into corresponding elements in the new matrix at positions corresponding to the parent matrix, so as to obtain the selection matrix.

7. The method according to claim 2, characterized in that Constructing the splitting and reorganizing matrix according to the service parameters includes: In the case where the type of the STM service is different from the type of the internal STM service, constructing a column matrix according to the type of the STM service, wherein the number of columns of the column matrix is ​​determined according to the type of the STM service, and the value of an element of the column matrix is ​​equal to the number of the column where the element is located; The write address matrix is ​​obtained by circularly shifting the elements of each row of the column matrix to the left according to the type of the internal STM service.

8. The method according to claim 2, characterized in that: Constructing the splitting and reorganizing matrix according to the service parameters includes: When the type of the STM service is different from the type of the internal STM service and the type of the STM service is STM64, the STM64 is split into four STM16s, and then the splitting and reorganization matrix is ​​constructed for the STM16; The obtained 4 groups of splitting and recombination matrices are merged respectively to obtain the splitting and recombination matrix of the STM64.

9. A synchronous transmission module STM service splitting and reorganization device, characterized in that: include: A matrix acquisition module, used for constructing a splitting and reorganizing matrix according to the service parameters of the STM service, wherein the splitting and reorganizing matrix includes a read address matrix, a selection matrix, and a write address matrix with the same specifications; A splitting and reorganizing module is used to split and reorganize the STM service according to the splitting and reorganizing matrix.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program implements the method described in any one of claims 1 to 8 when executed by a processor.

11. A wavelength division transmission device, comprising a micro control unit MCU and an optical transmission network OTN chip, characterized in that: The MCU sends a control instruction to the OTN chip, instructing the OTN chip to execute the method described in any one of claims 1 to 8.

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