Time frequency device, local clock source control method and storage medium

Abstract

The invention is suitable for the technical field of communication, and provides a time frequency device, a local clock source control method and a storage medium, the time frequency device comprises a processor, a satellite receiver and a local clock source, and the processor is connected with the satellite receiver and the local clock source. The processor is configured to: receive an external clock signal from a satellite receiver and a local clock signal from a local clock source; comparing the external clock signal with the local clock signal to obtain a deviation value; calculating a calibration control quantity according to the deviation value; and outputting the calibration control quantity to the local clock source to control the local clock signal to follow the external clock signal.

Description

Technical Field

[0001] The present application belongs to the field of communications, and in particular, relates to a local clock source control method and device, a time and frequency device, and a computer-readable storage medium. Background Art

[0002] In the related art, the time-frequency device can refer to the external clock signal (also called the external clock signal) to calibrate the local clock signal during operation, and this process can also be called clock training. After the clock training is completed, the time-frequency device enters the locked state and controls the local clock signal to continue to follow the external clock signal.

[0003] To achieve the above functions, Figure 1 As shown, in the related art, the time and frequency equipment generally includes a processor, a logic gate circuit, a satellite receiver and a local clock source, wherein the logic gate circuit is generally a field programmable gate array (Field Programmable Gate Array), which is used to compare the external clock signal from the satellite receiver and the local clock signal generated by the local clock source to obtain a deviation value, and output it to the processor. The processor is used to calculate the calibration control amount according to the deviation value, and output the calibration control amount to the local clock source to control the local clock signal to follow the external clock signal. The time and frequency equipment also includes a plurality of power supply modules, which are used to convert AC mains power into DC power to power the corresponding components. Generally speaking, the processor, logic gate circuit and satellite receiver all have their own power supply modules, which results in a large size and power consumption of the circuit board. The packaged chassis is generally 19 inches (483mm*44mm*depth), and its appearance is as follows Figure 2 shown.

[0004] It can be seen that the time and frequency equipment in the related technology is large in size and power consumption, and is only suitable for large downstream equipment, but not for small downstream equipment, such as handheld ones. The disadvantage of the existing equipment is that it is large in size and power consumption, and is not suitable for small downstream equipment. Summary of the invention

[0005] The embodiments of the present application provide a local clock source control method and apparatus, a time and frequency device, and a computer-readable storage medium, which can solve the problem in the related art that the local clock source control of the time and frequency device affects the test efficiency.

[0006] In the first aspect, an embodiment of the present application provides a time and frequency device, including a processor, a satellite receiver and a local clock source, wherein the processor is connected to the satellite receiver and the local clock source, respectively, and the processor is used to: receive an external clock signal from the satellite receiver and a local clock signal from the local clock source; compare the external clock signal and the local clock signal to obtain a deviation value; calculate a calibration control amount according to the deviation value; and output the calibration control amount to the local clock source to control the local clock signal to follow the external clock signal.

[0007] In the second aspect, an embodiment of the present application provides a local clock source control method, which is applied to a time and frequency device, the time and frequency device includes a processor, a satellite receiver and a local clock source, the processor is connected to the satellite receiver and the local clock source, respectively, the method includes: receiving an external clock signal from the satellite receiver and a local clock signal from the local clock source; comparing the external clock signal and the local clock signal to obtain a deviation value; calculating a calibration control amount according to the deviation value; outputting the calibration control amount to the local clock source to control the local clock signal to follow the external clock signal.

[0008] In a third aspect, an embodiment of the present application provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the local clock source control method described in the second aspect above.

[0009] In a fourth aspect, an embodiment of the present application provides a computer program product. When the computer program product runs on a time and frequency device, the time and frequency device executes the local clock source control method described in the second aspect above.

[0010] Compared with the prior art, the embodiment of the present application has the following beneficial effects: the time-frequency device includes a processor, a satellite receiver and a local clock source, the processor is connected to the satellite receiver and the local clock source respectively, and the processor is used to: receive an external clock signal from the satellite receiver and a local clock signal from the local clock source; compare the external clock signal and the local clock signal to obtain a deviation value; calculate a calibration control amount according to the deviation value; output the calibration control amount to the local clock source to control the local clock signal to follow the external clock signal. The processor can complete the comparison between the local and external clock signals without the need for a logic gate circuit, thereby eliminating the need for a logic gate circuit and its power supply, thereby reducing the size of the time-frequency device and reducing power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0012] Figure 1 It is a structural diagram of a time-frequency device in the related art;

[0013] Figure 2 It is a schematic diagram of the appearance of a time-frequency device in the related art;

[0014] Figure 3 It is a structural diagram of a time-frequency device provided in an embodiment of the present application;

[0015] Figure 4 It is a schematic diagram of the appearance of a time-frequency device provided in a specific example of the present application;

[0016] Figure 5 It is a flowchart of a local clock source control method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0017] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0018] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.

[0019] It should also be understood that the term “and / or” used in the specification and appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0020] As used in the specification and appended claims of this application, the term "if" can be interpreted as "when" or "uponce" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "uponce it is determined" or "in response to determining" or "uponce [described condition or event] is detected" or "in response to detecting [described condition or event]", depending on the context.

[0021] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0022] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0023] Figure 3 FIG. 1 is a block diagram showing a partial structure of a time-frequency device provided in an embodiment of the present application. Figure 3 The time-frequency device includes: a processor 10, a memory 20, a satellite receiver 30 and a local clock source 40. The processor 10 is connected to the memory 20, the satellite receiver 30 and the local clock source 40. Those skilled in the art can understand that Figure 3 The structure of the time-frequency device shown in the figure does not constitute a limitation on the time-frequency device, and may include more or less components than shown in the figure, or combine certain components, or arrange the components differently.

[0024] Combine the following Figure 3 A detailed introduction to the various components of the time-frequency equipment:

[0025] The processor 10 is the control center of the time-frequency device, and can run the program stored in the memory 20 to perform various functions and process data. The processor 10 can be a central processing unit (CPU), and the processor 10 can also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), microcontroller units (MCU) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc.

[0026] The memory 20 is used to store an operating system, an application program, a boot loader, data, and other programs, such as program code of a computer program. The memory 20 can also be used to temporarily store data required and generated by executing the program. The memory 20 can include a high-speed random access memory, and can also include a non-volatile memory, such as a flash memory, a hard disk, a multimedia card, a card-type memory, etc.

[0027] In some embodiments, the processor 10 and the memory 20 may be integrated together.

[0028] The satellite receiver 30 is used to receive satellite signals. The satellite receiver 30 can directly output the satellite signal to the processor 10, and the processor 10 is responsible for decoding the satellite signal to obtain the message information and the second pulse signal therein. Alternatively, the satellite receiver 30 can decode the satellite signal by itself to obtain the message information and the second pulse signal therein, and then output the message information and the second pulse signal to the processor 10. The second pulse signal obtained by the processor 10 directly or indirectly from the satellite receiver 30 can be called an external clock signal, and can also be called a reference source.

[0029] The local clock source 40 generally includes a crystal oscillator for generating a local clock signal. In addition to the crystal oscillator, the local clock source 40 may also include a control circuit for the crystal oscillator.

[0030] The processor 10 can compare the external clock signal and the local clock signal through a counter to obtain a deviation value. For details, please refer to the description of the subsequent embodiments. The counter can be implemented in hardware, such as a peripheral in the processor 10, and the external clock signal and the local clock signal are input into the counter through the pins of the processor 10. Alternatively, the counter can be implemented in software.

[0031] Optionally, the satellite receiver 30 in the time and frequency device may only have basic functions, that is, 1PPS output and basic navigation signal output. Under this condition, a satellite receiver 30 with smaller size, lower power consumption and sufficient functions can be selected. Here, a satellite receiver 30 with a size of 10mm*9mm*2mm is selected, and the antenna interface uses the smallest connector. This satellite receiver 30 has low power consumption, 3.3V power supply, and continuous operation <25mA.

[0032] In addition, when selecting the package of the processor 10, if the functions meet the requirements, the smallest package can be selected to reduce the size of the time-frequency device.

[0033] In addition, when designing the structure of the time-frequency device, the satellite receiver 30 can be integrated into the circuit board of the time-frequency device and arranged in a shielding shell, so that the time-frequency device including the satellite receiver 30 forms a whole. The power supply of the satellite receiver 30 can share the voltage-stabilized power supply of the processor 10, eliminating a power module, and further reducing the volume and power consumption of the time-frequency device.

[0034] Optionally, since the required power is very small and the size is small, the time-frequency device can be directly soldered to the motherboard of the downstream user equipment, and the motherboard of the user equipment must have a power supply. Therefore, the time-frequency device may not be equipped with an AC-to-DC power supply module, and only the power interface for connecting to an external DC power supply is retained, thereby further reducing the size and power consumption.

[0035] In a specific example of the present application, the appearance of the obtained time-frequency device is as follows: Figure 4 As shown, the size of the time-frequency device is only 25mm*25mm*20mm, which is equivalent to the size of a traditional crystal oscillator. Compared with the 19-inch time-frequency device in the related art, the volume is significantly reduced. The power consumption of the time-frequency device is only 0.5 watts, which is also significantly reduced.

[0036] The local clock source control method provided in the embodiment of the present application can be implemented as a computer software program. For example, the embodiment of the present application provides a computer program product, which includes a computer program carried on a computer readable medium, and the computer program includes a program code for executing the method shown in the flowchart. When the computer program is executed by the processor 10, various functions defined in the local clock source control method provided in the embodiment of the present application are implemented.

[0037] Figure 5 A schematic flowchart of a local clock source control method provided in an embodiment of the present application is shown. As an example but not a limitation, the method can be applied to the above-mentioned time and frequency device.

[0038] S1: Receives an external clock signal from a satellite receiver and a local clock signal from a local clock source.

[0039] During the clock taming process and locked state of the time-frequency device, the local clock source control method provided in this embodiment may be executed cyclically, for example, cyclically with the period (eg, 1 second) of the local / external clock signal as a period.

[0040] The external clock signal and the local clock signal are both pulse signals, for example, pulse-per-second signals.

[0041] S2: Compare the external clock signal and the local clock signal to obtain a deviation value.

[0042] Ideally, the rising and falling edges of the external clock signal and the local clock signal are synchronized in each cycle. In practice, there may be a deviation between the external clock signal and the local clock signal. The deviation may be reflected in the period, that is, the external clock signal and the local clock signal are different; the deviation may be reflected in the phase, that is, the rising / falling edges of the external clock signal and the local clock signal are not synchronized. Correspondingly, the deviation value may include a period deviation value and / or a phase deviation value. The processor can compare the external clock signal and the local clock signal through a counter to obtain a deviation value.

[0043] The counter can be implemented by software and / or hardware, and is not limited here. The clock source of the counter can be the clock source of the processor, and the unit of the period of the clock source is generally microseconds or nanoseconds, which is much smaller than the period of the local / external clock signal.

[0044] For the period deviation value, the processor may obtain the first period of the local clock signal through the first counter, and obtain the second period of the external clock signal through the second counter; and calculate the difference between the first period and the second period to obtain the period deviation value.

[0045] The trigger signal of the first counter can be the rising edge or falling edge of the local clock signal. When the first counter detects the rising edge / falling edge of the local clock signal, the first counter stops counting, outputs the current counting result, and then resets the first counter to the initial value and starts counting again. The product of the counting result and the period of the clock source of the counter is the first period.

[0046] The trigger signal of the second counter can be the rising edge or falling edge of the external clock signal. When the second counter detects the rising edge / falling edge of the external clock signal, the second counter stops counting, outputs the current counting result, and then resets the second counter to the initial value and starts counting again. The product of the counting result and the period of the clock source of the counter is the second period.

[0047] If the first counter is implemented by hardware, the output of the local clock source is connected to the first counter in the processor through the first input pin of the processor. If the second counter is implemented by hardware, the output of the external clock source is connected to the second counter in the processor through the second input pin of the processor.

[0048] The phase deviation value between the local clock signal and the external clock signal can be obtained through the third counter. The trigger signal of the third counter is the first changing edge of the local clock signal, and the stop signal of the second counter is the first changing edge of the external clock signal. The first changing edge is a rising edge or a falling edge.

[0049] Specifically, the third counter may also be referred to as a phase counter, and its input includes a local clock signal and an external clock signal. The phase counter may be started at the first changing edge of the local clock signal, and the counting may be stopped and the counting result may be outputted at the first changing edge of the external clock signal, and then the product of the counting result and the period of the clock source of the counter may be calculated to obtain the phase deviation value.

[0050] If the third counter is implemented by hardware, the output end of the local clock source is connected to the third counter in the processor through the third input pin of the processor, and the output end of the external clock source is connected to the third counter through the fourth input pin of the processor.

[0051] S3: Calculate the calibration control amount according to the deviation value.

[0052] A specific taming method (eg, proportional-differential-integral) may be used to calculate the calibration control quantity, and negative feedback control of the local clock signal may be implemented with the external clock signal as a reference.

[0053] S4: Output a calibration control amount to the local clock source to control the local clock signal to follow the external clock signal.

[0054] If the local clock source includes a control circuit of a crystal oscillator, a calibration control amount may be output to the control circuit.

[0055] Through the implementation of this embodiment, the time and frequency device includes a processor, a satellite receiver and a local clock source, the processor is connected to the satellite receiver and the local clock source respectively, and the processor is used to: receive an external clock signal from the satellite receiver and a local clock signal from the local clock source; compare the external clock signal and the local clock signal to obtain a deviation value; calculate a calibration control amount according to the deviation value; output the calibration control amount to the local clock source to control the local clock signal to follow the external clock signal. The processor can complete the comparison of the local and external clock signals without the need for a logic gate circuit, thereby eliminating the need for a logic gate circuit and its power supply, thereby reducing the size of the time and frequency device and reducing power consumption.

[0056] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0057] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0058] An embodiment of the present application further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in the above-mentioned method embodiments can be implemented.

[0059] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present application implements all or part of the processes in the above-mentioned embodiment method, which can be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by the processor. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium can at least include: any entity or device that can carry the computer program code to the camera / time-frequency device, recording medium, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, RandomAccess Memory), electric carrier signal, telecommunication signal and software distribution medium. For example, a USB flash drive, a mobile hard disk, a magnetic disk or an optical disk. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be electric carrier signals and telecommunication signals.

[0060] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0061] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0062] In the embodiments provided in the present application, it should be understood that the disclosed devices / network equipment and methods can be implemented in other ways. For example, the device / network equipment embodiments described above are merely schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0063] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0064] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A time-frequency device, characterized in that: The invention comprises a processor, a satellite receiver and a local clock source, wherein the processor is connected to the satellite receiver and the local clock source respectively, and the processor is used for: receiving an external clock signal from the satellite receiver and a local clock signal from the local clock source; Comparing the external clock signal and the local clock signal to obtain a deviation value; Calculating a calibration control amount according to the deviation value; The calibration control amount is output to the local clock source to control the local clock signal to follow the external clock signal.

2. The time-frequency device according to claim 1, characterized in that: The deviation value includes a period deviation value, and the processor is specifically configured to: Acquire a first cycle of the local clock signal by a first counter, and acquire a second cycle of the external clock signal by a second counter; The difference between the first period and the second period is calculated to obtain the period deviation value.

3. The time-frequency device according to claim 2, characterized in that: The trigger signal of the first counter is a rising edge or a falling edge of the local clock signal, and the trigger signal of the second counter is a rising edge or a falling edge of the external clock signal.

4. The time-frequency device according to claim 2, characterized in that: The output end of the local clock source is connected to the first counter in the processor through the first input pin of the processor, and the output end of the external clock source is connected to the second counter in the processor through the second input pin of the processor.

5. The time-frequency device according to claim 1, characterized in that: The deviation value includes a phase deviation value, and the processor is specifically configured to: The phase deviation value between the local clock signal and the external clock signal is obtained through a third counter, the trigger signal of the third counter is the first changing edge of the local clock signal, and the stop signal of the third counter is the first changing edge of the external clock signal, and the first changing edge is a rising edge or a falling edge.

6. The time-frequency device according to claim 5, characterized in that: The output end of the local clock source is connected to the third counter in the processor through the third input pin of the processor, and the output end of the external clock source is connected to the third counter through the fourth input pin of the processor.

7. A local clock source control method, the method is applied to a time-frequency device, the time-frequency device comprises a processor, a satellite receiver and a local clock source, the processor is connected to the satellite receiver and the local clock source respectively, characterized in that: The method comprises: receiving an external clock signal from the satellite receiver and a local clock signal from the local clock source; Comparing the external clock signal and the local clock signal to obtain a deviation value; Calculating a calibration control amount according to the deviation value; The calibration control amount is output to the local clock source to control the local clock signal to follow the external clock signal.

8. The method according to claim 7, characterized in that The deviation value includes a period deviation value, and the comparison of the external clock signal and the local clock signal to obtain the deviation value includes: Acquire a first cycle of the local clock signal by a first counter, and acquire a second cycle of the external clock signal by a second counter; The difference between the first period and the second period is calculated to obtain the period deviation value.

9. The method according to claim 7, characterized in that The deviation value includes a phase deviation value, and the comparison of the external clock signal and the local clock signal to obtain the deviation value includes: The phase deviation value between the local clock signal and the external clock signal is obtained through a third counter, the trigger signal of the third counter is the first changing edge of the local clock signal, and the stop signal of the third counter is the first changing edge of the external clock signal, and the first changing edge is a rising edge or a falling edge.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 7 to 9 is implemented.

Images