Manufacturing method of thin-film resistor

Abstract

The invention provides a manufacturing method of a thin-film resistor. The manufacturing method comprises the following steps: S1, depositing at least one dielectric layer on a substrate; s2, sputtering or evaporating a first metal layer on the dielectric layer; s3, coating a first photoresist layer; s4, etching off the first metal layer on the peripheral side of the first photoresist layer, retaining the first metal layer below the first photoresist layer, and removing the first photoresist layer; s5, coating a second photoresist layer; s6, performing exposure and development, and forming a process groove on the second photoresist layer; s7, etching all the first metal layer; s8, metal sputtering or evaporation is carried out, and a second metal layer is formed at the bottom of the metal layer groove; and S9, removing the third metal layer, and finally removing the second photoresist layer. According to the manufacturing method, the edge of the second metal layer cannot be tilted, the second metal layer is good in appearance and good in yield, and the problem of device failure caused by the fact that lead metal is connected with the salient point position subsequently cannot be solved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a method for manufacturing a thin film resistor. Background Art

[0002] Existing sputtering process technology of thin film resistors, such as Figure 1 Specifically, photoresist is used → photoresist coating → alignment → IR inversion → full exposure → development to form a positive trapezoidal morphology → metal sputtering; the bottom corner of this morphology will be connected to the bottom sputtered metal during the sputtering operation, so when the metal is lifted off, the metal at the bottom edge will be torn up, causing the edge of the sputtered metal to warp up, affecting the appearance yield, and the subsequent lead metal connecting through the bump position is prone to cause device failure defects. Summary of the invention

[0003] In view of the above problems, the present invention proposes a method for manufacturing a thin film resistor on a dielectric layer, which has the characteristics of no warping of the metal edge, good appearance and good yield.

[0004] The technical solution of the present invention is as follows:

[0005] A method for manufacturing a thin film resistor comprises the following steps:

[0006] S1: depositing at least one dielectric layer on a substrate;

[0007] S2: sputtering or evaporating a first metal layer on the dielectric layer;

[0008] S3: coating a first photoresist layer on the middle of the first metal layer, wherein the width of the first photoresist layer is smaller than the width of the first metal layer;

[0009] S4: etching away the first metal layer around the first photoresist layer, retaining the first metal layer below the first photoresist layer, and removing the first photoresist layer;

[0010] S5: coating a second photoresist layer on the dielectric layer to cover the first metal layer;

[0011] S6: exposing and developing the second photoresist layer above the middle of the first metal layer to form a process groove on the second photoresist layer, wherein the width of the process groove is smaller than the width of the first metal layer;

[0012] S7: etching the first metal layer through the process groove to etch away the entire first metal layer, and forming a metal layer groove in the vacant part of the first metal layer;

[0013] S8: performing metal sputtering or evaporation to form a second metal layer at the bottom of the metal layer groove, and forming a third metal layer on the second photoresist layer, wherein the height of the second metal layer is smaller than the height of the metal layer groove;

[0014] S9: remove the third metal layer, and finally remove the second photoresist layer.

[0015] Preferably, the substrate is a single crystal silicon substrate, a gallium arsenide substrate, a gallium nitride substrate, an indium phosphide substrate or a silicon carbide substrate.

[0016] Preferably, the dielectric layer is one layer, two layers, three layers or four layers.

[0017] Preferably, the dielectric layer is a SiN layer, a TiW layer, an InGaP layer or a GaAs layer.

[0018] Preferably, the first metal layer is a TaN layer, a TiW layer, a Ti layer or an Au layer.

[0019] Preferably, the second metal layer is a TaN layer, a TiW layer, a Ti layer or an Au layer.

[0020] Preferably, the process groove is a rectangular groove or a trapezoidal groove that is smaller at the top and larger at the bottom.

[0021] Preferably, the first photoresist layer is a positive photoresist layer or a negative photoresist layer; and the second photoresist layer is a positive photoresist layer or a negative photoresist layer.

[0022] Beneficial effects of the present invention: During the formation of the second metal layer of the present invention, the height of the second metal layer is less than the height of the metal layer groove, so during metal sputtering or evaporation, the second metal layer and the third metal layer are disconnected and will not be connected together, so when the third metal layer is removed, the second metal layer will not be torn up by the third metal layer, and the edge of the second metal layer will not be warped. The second metal layer has a good appearance and a good yield rate, and there will be no subsequent device failure caused by the lead metal passing through the bump position. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0024] Figure 1 The sputtering process of the existing thin film resistor;

[0025] Figure 2 is a manufacturing process diagram of Example 2;

[0026] Figure 3 This is the manufacturing process diagram of Example 3. DETAILED DESCRIPTION

[0027] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] Example 1

[0029] A method for manufacturing a thin film resistor comprises the following steps:

[0030] S1: depositing at least one dielectric layer on a substrate;

[0031] S2: sputtering or evaporating a first metal layer on the dielectric layer;

[0032] S3: coating a first photoresist layer on the middle of the first metal layer, wherein the width of the first photoresist layer is smaller than the width of the first metal layer;

[0033] S4: etching away the first metal layer around the first photoresist layer, retaining the first metal layer below the first photoresist layer, and removing the first photoresist layer;

[0034] S5: coating a second photoresist layer on the dielectric layer to cover the first metal layer;

[0035] S6: exposing and developing the second photoresist layer above the middle of the first metal layer to form a process groove on the second photoresist layer, wherein the width of the process groove is smaller than the width of the first metal layer;

[0036] S7: etching the first metal layer through the process groove to etch away the entire first metal layer, and forming a metal layer groove in the vacant part of the first metal layer;

[0037] S8: performing metal sputtering or evaporation to form a second metal layer at the bottom of the metal layer groove, and forming a third metal layer on the second photoresist layer, wherein the height of the second metal layer is smaller than the height of the metal layer groove;

[0038] S9: remove the third metal layer, and finally remove the second photoresist layer.

[0039] The retained second metal layer is the desired thin-film resistor.

[0040] The substrate may be a single crystal silicon substrate, a gallium arsenide substrate, a gallium nitride substrate, an indium phosphide substrate or a silicon carbide substrate, which may be selected according to actual needs, but is not limited to the above materials.

[0041] The dielectric layer may be one layer, two layers, three layers, four layers or more layers.

[0042] The dielectric layer may be a SiN layer, a TiW layer, an InGaP layer or a GaAs layer, which may be selected according to actual needs, but is not limited to the above materials.

[0043] Wherein, the first metal layer is a TaN layer, a TiW layer, a Ti layer or an Au layer, which is selected according to actual needs, but is not limited to the above materials.

[0044] The second metal layer is a TaN layer, a TiW layer, a Ti layer or an Au layer, which is selected according to actual needs, but is not limited to the above materials.

[0045] Wherein, the process groove is a rectangular groove or a trapezoidal groove which is smaller at the top and larger at the bottom.

[0046] Wherein, the first photoresist layer is a positive photoresist layer or a negative photoresist layer; the second photoresist layer is a positive photoresist layer or a negative photoresist layer.

[0047] Example 2

[0048] Reference Figure 2 The difference between this embodiment and embodiment 1 is that: step S2: sputtering a first metal layer; step S8: metal sputtering; the process groove is a rectangular groove.

[0049] Example 3

[0050] Reference Figure 3 The difference between this embodiment and embodiment 1 is that: step S2: using vapor deposition to deposit a first metal layer; step S8: using metal vapor deposition; the process groove is a trapezoidal groove with a small top and a large bottom.

[0051] During the formation of the second metal layer of the present invention, the height of the second metal layer is less than the height of the metal layer groove, so during metal sputtering or evaporation, the second metal layer and the third metal layer are disconnected and will not be connected together. Therefore, when the third metal layer is removed, the second metal layer will not be torn up by the third metal layer, and the edge of the second metal layer will not be warped. The second metal layer has a good appearance and a good yield rate, and there will be no subsequent device failure caused by the lead metal passing through the bump position.

[0052] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for manufacturing a thin film resistor, characterized in that: The following steps are involved: S1: depositing at least one dielectric layer on a substrate; S2: sputtering or evaporating a first metal layer on the dielectric layer; S3: coating a first photoresist layer on the middle of the first metal layer, wherein the width of the first photoresist layer is smaller than the width of the first metal layer; S4: etching away the first metal layer around the first photoresist layer, retaining the first metal layer below the first photoresist layer, and removing the first photoresist layer; S5: coating a second photoresist layer on the dielectric layer to cover the first metal layer; S6: exposing and developing the second photoresist layer above the middle of the first metal layer to form a process groove on the second photoresist layer, wherein the width of the process groove is smaller than the width of the first metal layer; S7: etching the first metal layer through the process groove to etch away the entire first metal layer, and forming a metal layer groove in the vacant part of the first metal layer; S8: performing metal sputtering or evaporation to form a second metal layer at the bottom of the metal layer groove, and forming a third metal layer on the second photoresist layer, wherein the height of the second metal layer is smaller than the height of the metal layer groove; S9: remove the third metal layer, and finally remove the second photoresist layer.

2. The method for manufacturing a thin film resistor on a dielectric layer according to claim 1, characterized in that: The substrate is a single crystal silicon substrate, a gallium arsenide substrate, a gallium nitride substrate, an indium phosphide substrate or a silicon carbide substrate.

3. The method for manufacturing a thin film resistor on a dielectric layer according to claim 1, characterized in that: The dielectric layer is one layer, two layers, three layers or four layers.

4. The method for manufacturing a thin film resistor on a dielectric layer according to claim 1, wherein: The dielectric layer is a SiN layer, a TiW layer, an InGaP layer or a GaAs layer.

5. The method for manufacturing a thin film resistor on a dielectric layer according to claim 1, wherein: The first metal layer is a TaN layer, a TiW layer, a Ti layer or an Au layer.

6. The method for manufacturing a thin film resistor on a dielectric layer according to claim 1, characterized in that: The second metal layer is a TaN layer, a TiW layer, a Ti layer or an Au layer.

7. The method for manufacturing a thin film resistor on a dielectric layer according to claim 1, wherein: The process groove is a rectangular groove or a trapezoidal groove that is smaller at the top and larger at the bottom.

8. The method for manufacturing a thin film resistor on a dielectric layer according to claim 1, wherein: The first photoresist layer is a positive photoresist layer or a negative photoresist layer; the second photoresist layer is a positive photoresist layer or a negative photoresist layer.

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