Power silicon carbide MOSFET device integrated with fast recovery body diode

Abstract

The invention discloses a power silicon carbide MOSFET device integrated with a fast recovery body diode, and belongs to the technical field of semiconductors, the power silicon carbide MOSFET device integrated with the fast recovery body diode comprises an N-type epitaxial layer, a plurality of cellular structures are arranged in the N-type epitaxial layer, each cellular structure comprises two P-type well regions, a gap is arranged between the P-type well regions, and the gap is formed between the two P-type well regions. The P-type well region is arranged on the substrate, the P-type well region extends upwards at intervals to form protrusions so as to be in contact with the source end electrode, an N-type source region is arranged in the P-type well region, one side, close to the protrusions, of the N-type source region is further connected with a P body contact region, and the source end electrode covers the tops of the protrusions, the P body contact region and the N-type source region. A bump is formed between P-type well regions, a Schottky contact surface is increased, a P-type ion implantation region can be further arranged in the bump, and the bump and an N-type epitaxial layer form a heterojunction diode, so that excessive sacrifice of an MOS channel area is avoided, and the specific on-resistance of the device is kept at a lower value.

Description

Technical Field

[0001] The invention relates to the field of semiconductor technology, and in particular to a power silicon carbide MOSFET device with an integrated fast recovery body diode. Background Art

[0002] Semiconductor power devices are electronic components made of semiconductor materials. They are usually used for efficient control and conversion of electric energy and are one of the indispensable key components in modern power supply systems. As traditional silicon material technology becomes increasingly mature, the performance of silicon-based power devices is gradually approaching its theoretical limit. In recent years, wide bandgap semiconductors represented by silicon carbide (SiC) materials have gradually gained favor. Compared with traditional silicon-based power devices, silicon carbide power devices have obvious advantages in chip area, switching frequency and high temperature characteristics. They have proven their superior performance in fields such as new energy vehicles and photovoltaic power generation, and are expected to be more widely used in high-power fields such as rail transportation and smart grids.

[0003] Silicon carbide MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor: Metal-Insulator Semiconductor Field Effect Transistor) is one of the most widely used silicon carbide-based power devices. Its structure has a parasitic diode structure (i.e., body diode), which can be used for freewheeling in inverter circuit applications. However, the larger bandgap width makes the body diode of silicon carbide MOSFET have a large conduction voltage drop and poor reverse recovery characteristics. This will cause additional conduction loss and reverse recovery loss, reducing the power conversion efficiency. In order to improve these shortcomings, silicon carbide MOSFETs often require external Schottky barrier diode (Schottky barrier diode: SBD) chips or built-in Schottky barrier diode cells in practical applications. From the perspective of saving chip area and reducing parasitic parameters, built-in Schottky barrier diode cells have more advantages. However, built-in Schottky barrier diode cells will inevitably sacrifice the MOS channel area, resulting in a decrease in channel density and an increase in the device's specific on-resistance. In order to reduce the conduction voltage drop of the body diode, it is necessary to increase the area occupied by the Schottky barrier diode cell, thereby sacrificing more MOS channel area to make the device's specific on-resistance larger.

[0004] It should be noted that the information disclosed in the background technology section of the invention is only intended to deepen the understanding of the general background technology of the invention, and should not be regarded as an admission or suggestion in any form that the information constitutes prior art already known to those skilled in the art. Summary of the invention

[0005] The object of the present invention is to provide a power silicon carbide MOSFET device with an integrated fast recovery body diode to solve the problem of large specific on-resistance of the device.

[0006] To solve the above technical problems, the present invention provides a power silicon carbide MOSFET device with an integrated fast recovery body diode, comprising an N-type epitaxial layer, in which a plurality of cellular structures are arranged, the cellular structure comprising two P-type well regions, with a gap between the P-type well regions, and the gap extends upward and forms a protrusion to contact a source electrode, an N-type source region is arranged in the P-type well region, and a P-body contact region is also connected to a side of the N-type source region close to the protrusion, and the source electrode covers the top of the protrusion, the P-body contact region and the N-type source region.

[0007] Preferably, it further comprises an insulating layer, wherein the insulating layer covers a portion of the N-type epitaxial layer, a portion of the P-type well region and a portion of the N-type source region.

[0008] Preferably, the interior of the insulating layer is also coated with a gate terminal electrode.

[0009] Preferably, an N-type substrate is provided at the bottom of the N-type epitaxial layer, and a drain electrode is provided at the bottom of the N-type substrate.

[0010] Preferably, a JFET injection region is provided in the protrusion, and a lower edge of the JFET injection region is lower than an upper edge of the P-type well region.

[0011] Preferably, an N-type CSL layer is disposed on the top of the N-type epitaxial layer, and a plurality of cellular structures are disposed in the N-type CSL layer.

[0012] Preferably, a P-type ion implantation region is provided in the protrusion to form a body diode with the N-type epitaxial layer.

[0013] Preferably, a JFET implantation region is further provided at the bottom of the P-type ion implantation region.

[0014] Preferably, the doping concentration of the N-type epitaxial layer is less than 1×10 17 cm -3 .

[0015] Preferably, the source electrode and the drain electrode are both made of metal materials.

[0016] In the power silicon carbide MOSFET device with integrated fast recovery body diode provided by the present invention, the N-type epitaxial layer contacted by the source terminal electrode protrudes upward, thereby increasing the contact area between the N-type epitaxial layer and the source terminal electrode. The protrusion is arranged in the vertical direction and hardly occupies the MOS channel area, thereby increasing the corresponding Schottky contact surface. Furthermore, a P-type ion implantation region can be arranged in the protrusion to form a heterojunction body diode with the N-type epitaxial layer, thereby avoiding sacrificing too much MOS channel area and maintaining a low value of the device's specific on-resistance. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Those skilled in the art will appreciate that the accompanying drawings are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention. Figure 1 is a schematic structural diagram of Embodiment 1 of the present invention; Figure 2 It is a schematic diagram of the structure of setting a JFET injection region in the first embodiment of the present invention; Figure 3 is a schematic diagram of a structure in which an N-type CSL layer is provided in Embodiment 1 of the present invention; Figure 4 is a structural diagram of Embodiment 2 of the present invention; Figure 5 It is a schematic diagram of the structure of setting a JFET injection region in the second embodiment of the present invention; Figure 6 It is a schematic diagram of the structure of providing an N-type CSL layer in the second embodiment of the present invention.

[0018] In the attached figure: 01. Drain electrode; 02. Source electrode.

[0019] 10. N-type substrate; 11. N-type epitaxial layer; 12. N-type source region; 13. JFET injection region; 14. N-type CSL layer; 20. P-type well region; 21. P-body contact region; 30. Insulating layer; 40. Gate terminal electrode; 50. P-type ion injection region. DETAILED DESCRIPTION

[0020] In order to make the purpose, advantages and features of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the drawings is often a part of the actual structure. In particular, the emphasis of each drawing is different, and sometimes different scales are used.

[0021] As used in the present invention, the singular forms "a", "an" and "the" include plural objects, the term "or" is generally used in a sense including "and / or", the term "several" is generally used in a sense including "at least one", and the term "at least two" is generally used in a sense including "two or more". In addition, the terms "first", "second" and "third" are used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first", "second", and "third" may explicitly or implicitly include one or at least two of the features. The term "proximal end" is usually the end close to the operator, and the term "distal end" is usually the end close to the patient. "One end" and "the other end" as well as "proximal end" and "distal end" usually refer to two corresponding parts, which include not only the endpoints. The terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral body; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the internal connection of the two elements or the interaction relationship between the two elements. In addition, as used in the present invention, an element is arranged on another element, which usually only means that there is a connection, coupling, matching or transmission relationship between the two elements, and the connection, coupling, matching or transmission between the two elements can be direct or indirect through an intermediate element, and it cannot be understood as indicating or implying the spatial position relationship between the two elements, that is, one element can be in any position such as inside, outside, above, below or on one side of another element, unless the content clearly indicates otherwise. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0022] The inventors have found that in silicon carbide MOSFET devices, Schottky barrier diodes are often provided to improve the problems of large body diode conduction voltage drop and poor reverse recovery characteristics. However, the Schottky barrier diode will occupy the channel area and affect the device's specific on-resistance.

[0023] Based on this, the core idea of ​​the present invention is to increase the Schottky contact surface by forming a protrusion between the P-type well regions. Furthermore, a P-type ion implantation region can be set in the protrusion to form a heterojunction diode with the N-type epitaxial layer, thereby avoiding sacrificing too much MOS channel area and keeping the device's specific on-resistance at a low value.

[0024] For details, please refer to Figure 1-Figure 6 , which is a schematic diagram of an embodiment of the present invention. Figure 1As shown, a power silicon carbide MOSFET device with an integrated fast recovery body diode includes an N-type epitaxial layer 11, in which a plurality of cellular structures are arranged, and the cellular structure includes two P-type well regions 20, wherein there is a gap between the P-type well regions 20, and the gap extends upward to form a protrusion (not marked) to contact the source terminal electrode 02, an N-type source region 12 is arranged in the P-type well region 20, and a P-body contact region 21 is further connected to the side of the N-type source region 12 close to the protrusion, and the source terminal electrode 02 covers the top of the protrusion, the P-body contact region 21 and the N-type source region 12.

[0025] In one embodiment, the N-type epitaxial layer 11 in contact with the source terminal electrode 02 is convex upward, increasing the contact area between the N-type epitaxial layer 11 and the source terminal electrode 02. The protrusion is set in the vertical direction and almost does not occupy the MOS channel area. It can change the Schottky contact surface from one surface to three surfaces, increasing the Schottky contact area and enhancing its conductivity, so that the formed Schottky diode occupies less MOS channel area, avoiding sacrificing too much MOS channel area, so that the device's specific on-resistance is maintained at a lower value. In addition, ion implantation can be performed in the protrusion to form a P-type ion implantation area 50. The P-type ion implantation area 50 and the N-type epitaxial layer 11 can jointly form a heterojunction body diode, whose on-state voltage drop is smaller than that of a traditional homojunction body diode, and whose conductivity is stronger and occupies less MOS channel area, thereby avoiding sacrificing too much MOS channel area and keeping the device's specific on-resistance low.

[0026] [Example 1] Please refer to Figures 1 to 3 , among which, Figure 1 As shown, a power silicon carbide MOSFET device with an integrated fast recovery body diode includes an N-type epitaxial layer 11, in which a plurality of cellular structures are arranged, and the cellular structure includes two P-type well regions 20, wherein there is a gap between the P-type well regions 20, and the gap extends upward to form a protrusion (not marked) to contact the source terminal electrode 02, an N-type source region 12 is arranged in the P-type well region 20, and a P-body contact region 21 is further connected to the side of the N-type source region 12 close to the protrusion, and the source terminal electrode 02 covers the top of the protrusion, the P-body contact region 21 and the N-type source region 12.

[0027] The source terminal electrode 02 and the N-type source region 12, P-body contact region 21 and N-type epitaxial layer 11 below the source terminal electrode 02 together form an SBD structure. The source terminal electrode 02 forms an ohmic contact with the N-type source region 12 and P-body contact region 21 at its bottom, and the source terminal electrode 02 forms a Schottky contact with the N-type epitaxial layer 11. The N-type epitaxial layer 11 protrudes upward to form a protrusion that contacts the source terminal electrode 02. The top and both sides of the protrusion are connected to the source terminal electrode 02, which increases the Schottky contact area and enhances the conductivity. The occupied MOS channel area is small, avoiding sacrificing too much MOS channel area, and ensuring the specific on-resistance of the device.

[0028] The P-type well region 20 is located in the N-type epitaxial layer 11, and the upper edge of the P-type well region 20 is flush with the upper edge of the N-type epitaxial layer 11, the upper edge of the N-type source region 12 is also flush with the upper edge of the N-type epitaxial layer 11, and the P-body contact region 21 is also located in the P-type well region 20, and the side wall of the N-type source region 12 is in contact with one side of the P-body contact region 21.

[0029] Specifically, it also includes an insulating layer 30, which covers part of the N-type epitaxial layer 11, part of the P-type well region 20 and part of the N-type source region 12. The side and top of the insulating layer 30 are both in contact with the source terminal electrode 02. The inside of the insulating layer 30 is also covered with a gate terminal electrode 40. The gate terminal electrode 40 and the N-type epitaxial layer 11 and the source terminal electrode 02 are isolated by the insulating layer 30.

[0030] Exemplarily, the material of the insulating layer 30 is generally silicon oxide.

[0031] It can be understood that the gate terminal electrode 40 and the N-type source region 12, P body contact region 21 and N-type epitaxial layer 11 at its bottom together constitute a MOS structure, and the source terminal electrode 02 and the N-type source region 12, P body contact region 21 and N-type epitaxial layer 11 located under the source terminal electrode 02 together constitute an SBD structure, the source terminal electrode 02 forms an ohmic contact with the N-type source region 12 and P body contact region 21 located under the source terminal electrode 02, and the source terminal electrode 02 forms a Schottky contact with the N-type epitaxial layer 11.

[0032] Specifically, an N-type substrate 10 is disposed at the bottom of the N-type epitaxial layer 11, and a drain electrode 01 is disposed at the bottom of the N-type substrate 10. The N-type substrate 10 is located on the top of the drain electrode 01, and the N-type substrate 10 is usually heavily doped, with a doping concentration greater than 1×10 18 cm -3 The N-type epitaxial layer 11 is located above the N-type substrate 10. The N-type epitaxial layer 11 is usually lightly doped. The doping concentration of the N-type epitaxial layer 11 is less than 1×10 17 cm -3 .

[0033] Specifically, the source electrode 02 and the drain electrode 01 are both made of metal materials. The gate electrode 40 is made of semiconductor material, such as polysilicon, while the N-type substrate 10, the N-type epitaxial layer 11, the P-type well region 20, the N-type source region 12, and the P-body contact region 21 are made of semiconductor materials, including but not limited to silicon, germanium, gallium arsenide, silicon carbide, gallium nitride or gallium oxide.

[0034] like Figure 2 As shown, a JFET injection region 13 is provided in the protrusion, and the lower edge of the JFET injection region 13 is lower than the upper edge of the P-type well region 20. The JFET injection region 13 is provided in the N-type epitaxial layer 11 between the P-type well regions 20, and the JFET injection region 13 is located at the top of the N-type epitaxial layer 11, and is connected to the P-type well region 20 on both sides. At this time, the JFET injection region 13 forms a Schottky contact with the source electrode 02.

[0035] like Figure 3 As shown, an N-type CSL layer 14 is disposed on the top of the N-type epitaxial layer 11, and a plurality of cell structures are disposed in the N-type CSL layer 14. The N-type epitaxial layer 11 between the P-type well regions 20 and part of the bottom is replaced by the N-type CSL layer 14, and at this time, the N-type CSL layer 14 and the source electrode 02 form a Schottky contact.

[0036] [Example 2] Please refer to Figures 4 to 6 , Figure 4 In the invention, a power silicon carbide MOSFET device with integrated fast recovery body diode includes an N-type epitaxial layer 11, wherein a plurality of cellular structures are arranged in the N-type epitaxial layer 11, wherein the cellular structure includes two P-type well regions 20, wherein there is a gap between the P-type well regions 20, and the gap extends upward to form a protrusion (not marked) to contact with a source terminal electrode 02, wherein an N-type source region 12 is arranged in the P-type well region 20, wherein a side of the N-type source region 12 close to the protrusion is also connected to a P-body contact region 21, and the source terminal electrode 02 covers the top of the protrusion, the P-body contact region 21 and the N-type source region 12. A P-type ion implantation region 50 is arranged in the protrusion to form a body diode with the N-type epitaxial layer 11.

[0037] Among them, the P-type ion implantation region 50 serves as the anode region of the body diode. The conduction voltage drop of the heterojunction body diode composed of the P-type ion implantation region 50 and the N-type epitaxial layer 11 is smaller than that of the traditional homojunction body diode. It has stronger conductivity and occupies less MOS channel area, thereby avoiding sacrificing too much MOS channel area and keeping the device's specific on-resistance at a low value.

[0038] The P-type well region 20 is located in the N-type epitaxial layer 11, and the upper edge of the P-type well region 20 is flush with the upper edge of the N-type epitaxial layer 11, the upper edge of the N-type source region 12 is also flush with the upper edge of the N-type epitaxial layer 11, and the P-body contact region 21 is also located in the P-type well region 20, and the side wall of the N-type source region 12 is in contact with one side of the P-body contact region 21.

[0039] Specifically, it also includes an insulating layer 30, which covers part of the N-type epitaxial layer 11, part of the P-type well region 20 and part of the N-type source region 12. The side and top of the insulating layer 30 are both in contact with the source terminal electrode 02. The inside of the insulating layer 30 is also covered with a gate terminal electrode 40. The gate terminal electrode 40 and the N-type epitaxial layer 11 and the source terminal electrode 02 are isolated by the insulating layer 30.

[0040] Exemplarily, the material of the insulating layer 30 is generally silicon oxide.

[0041] It can be understood that the gate terminal electrode 40 and the N-type source region 12, P body contact region 21 and N-type epitaxial layer 11 at its bottom together constitute a MOS structure, and the source terminal electrode 02 and the N-type source region 12, P body contact region 21 and N-type epitaxial layer 11 located under the source terminal electrode 02 together constitute an SBD structure, the source terminal electrode 02 forms an ohmic contact with the N-type source region 12 and P body contact region 21 located under the source terminal electrode 02, and the source terminal electrode 02 forms a Schottky contact with the N-type epitaxial layer 11.

[0042] Specifically, an N-type substrate 10 is disposed at the bottom of the N-type epitaxial layer 11, and a drain electrode 01 is disposed at the bottom of the N-type substrate 10. The N-type substrate 10 is located on the top of the drain electrode 01, and the N-type substrate 10 is usually heavily doped, with a doping concentration greater than 1×10 18 cm -3 The N-type epitaxial layer 11 is located above the N-type substrate 10. The N-type epitaxial layer 11 is usually lightly doped. The doping concentration of the N-type epitaxial layer 11 is less than 1×10 17 cm -3 .

[0043] Specifically, the source electrode 02 and the drain electrode 01 are both made of metal materials. The gate electrode 40 is made of semiconductor material, such as polysilicon, while the N-type substrate 10, the N-type epitaxial layer 11, the P-type well region 20, the N-type source region 12, and the P-body contact region 21 are made of semiconductor materials, including but not limited to silicon, germanium, gallium arsenide, silicon carbide, gallium nitride or gallium oxide.

[0044] like Figure 5As shown, a JFET injection region 13 is also provided at the bottom of the P-type ion injection region 50. The N-type epitaxial layer 11 between the P-type well regions 20 is replaced by the JFET injection region 13, which is located above the N-type epitaxial layer 11 and surrounded by the P-type well region 20, and the JFET injection region 13 forms a heterojunction with the P-type ion injection region 50.

[0045] like Figure 6 As shown, an N-type CSL layer 14 is disposed on the top of the N-type epitaxial layer 11, and a plurality of cellular structures are disposed in the N-type CSL layer 14. The N-type epitaxial layer 11 between the P-type well regions 20 and the N-type epitaxial layer 11 under the P-type well region 20 are replaced by the N-type CSL layer 14, the N-type CSL layer 14 is located above the N-type epitaxial layer 11, the P-type well region 20 is surrounded by the N-type CSL layer 14, and the N-type CSL layer 14 forms a heterojunction with the P-type ion implantation region 50.

[0046] The above description is only a description of the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the technical solution of the present invention.

Claims

1. A power silicon carbide MOSFET device with an integrated fast recovery body diode, characterized in that: It includes an N-type epitaxial layer, in which a plurality of cellular structures are arranged, the cellular structure includes two P-type well regions, there is a gap between the P-type well regions, and the gap extends upward to form a protrusion to contact the source terminal electrode, an N-type source region is arranged in the P-type well region, and a P-body contact region is also connected to a side of the N-type source region close to the protrusion, and the source terminal electrode covers the top of the protrusion, the P-body contact region and the N-type source region.

2. The power silicon carbide MOSFET device with integrated fast recovery body diode according to claim 1, characterized in that: It also includes an insulating layer, which covers a portion of the N-type epitaxial layer, a portion of the P-type well region and a portion of the N-type source region.

3. The power silicon carbide MOSFET device with integrated fast recovery body diode according to claim 2, characterized in that: The interior of the insulating layer is also covered with a gate terminal electrode.

4. The power silicon carbide MOSFET device with integrated fast recovery body diode according to claim 1, characterized in that: An N-type substrate is disposed at the bottom of the N-type epitaxial layer, and a drain electrode is disposed at the bottom of the N-type substrate.

5. The power silicon carbide MOSFET device with integrated fast recovery body diode according to claim 1, characterized in that: A JFET injection region is disposed in the protrusion, and a lower edge of the JFET injection region is lower than an upper edge of the P-type well region.

6. The power silicon carbide MOSFET device with integrated fast recovery body diode according to claim 1, characterized in that: An N-type CSL layer is disposed on the top of the N-type epitaxial layer, and a plurality of cellular structures are disposed in the N-type CSL layer.

7. The power silicon carbide MOSFET device with integrated fast recovery body diode according to claim 1, characterized in that: A P-type ion implantation region is provided in the protrusion to form a body diode with the N-type epitaxial layer.

8. The power silicon carbide MOSFET device with integrated fast recovery body diode according to claim 7, characterized in that: A JFET implantation region is also provided at the bottom of the P-type ion implantation region.

9. The power silicon carbide MOSFET device with integrated fast recovery body diode according to claim 1, characterized in that: The doping concentration of the N-type epitaxial layer is less than 1×10 17 cm -3 .

10. The power silicon carbide MOSFET device with integrated fast recovery body diode according to claim 4, characterized in that: The source electrode and the drain electrode are both made of metal materials.

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