Display panel and display device

Abstract

The invention discloses a display panel and a display device. The display panel comprises a first display area and at least two wiring avoiding areas arranged in the first direction. The display panel further comprises a plurality of first signal lines, and each first signal line comprises a first wiring section and at least two second wiring sections; the first wiring section extends in the first direction, the at least two second wiring sections are in one-to-one correspondence with the at least two wiring avoiding areas, and the second wiring sections extend around the edges of the wiring avoiding areas; the at least two second wiring sections comprise at least one first-type second wiring section and at least one second-type second wiring section; the edge of at least one wiring avoiding area is wound with a first type of second wiring section, and the edge of at least one wiring avoiding area is wound with a second type of second wiring section; the resistance per unit length of the first-type second wiring section is smaller than that of the first wiring section, and the resistance per unit length of the first-type second wiring section is smaller than that of the second-type second wiring section. The display panel can improve the phenomenon of uneven display.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the development of display technology, the application of display panels is becoming more and more extensive, and correspondingly, the requirements for display panels are becoming higher and higher.

[0003] In the related art, the display panel may have a mura (uneven display) phenomenon, resulting in a poor display effect, which seriously limits the further application of the display panel. Summary of the invention

[0004] The invention provides a display panel and a display device to improve the mura phenomenon of the display panel.

[0005] According to one aspect of the present invention, a display panel is provided, comprising a first display area and at least two wiring avoidance areas arranged along a first direction; the first display area at least partially surrounds the wiring avoidance area;

[0006] The display panel further includes a plurality of first signal lines, the first signal lines including a first routing segment and at least two second routing segments; the first routing segment extends along the first direction, the at least two second routing segments correspond to the at least two routing avoidance areas one by one, and the second routing segments extend around the edges of the routing avoidance areas, and adjacent first routing segments are connected to the second routing segments;

[0007] Among them, the at least two second routing segments include at least one first-type second routing segment and at least one second-type second routing segment; the first-type second routing segment is wound around the edge of at least one routing avoidance area, and the second-type second routing segment is wound around the edge of at least one routing avoidance area; the resistance per unit length of the first-type second routing segment is smaller than the resistance per unit length of the first routing segment, and the resistance per unit length of the first-type second routing segment is smaller than the resistance per unit length of the second-type second routing segment.

[0008] Optionally, the resistance per unit length of the second type second wiring segment is the same as the resistance per unit length of the first wiring segment;

[0009] Preferably, the second routing segment of the second type is arranged on the same layer as the first routing segment.

[0010] Optionally, the resistance per unit length of the second type second routing segment is greater than the resistance per unit length of the first routing segment;

[0011] Preferably, the line width of the second type second routing segment is smaller than the line width of the first routing segment;

[0012] Preferably, the thickness of the second type second routing segment is smaller than the thickness of the first routing segment.

[0013] Optionally, among the multiple second-type second routing segments corresponding to the same routing avoidance area, the resistance per unit length of the second-type second routing segment close to the routing avoidance area is smaller than the resistance per unit length of the second-type second routing segment far from the routing avoidance area.

[0014] Optionally, among the multiple first-type second routing segments corresponding to the same routing avoidance area, the resistance per unit length of the first-type second routing segment close to the routing avoidance area is smaller than the resistance per unit length of the first-type second routing segment far from the routing avoidance area.

[0015] Optionally, along the first direction, a maximum size of a routing avoidance zone corresponding to the first type second routing segment is greater than a maximum size of a routing avoidance zone corresponding to the second type second routing segment; wherein the routing avoidance zone is arranged along the extension direction of the first routing segment;

[0016] Preferably, the display panel includes at least two hole-digging areas, and the wiring avoidance area is the hole-digging area;

[0017] Preferably, the at least two hole-digging areas include two hole-digging areas, wherein the first type of second routing segment is wound around the edge of one of the hole-digging areas, and the second type of second routing segment is wound around the edge of the other hole-digging area;

[0018] Preferably, the excavated hole area corresponding to the first type of second routing segment is a runway hole, and the excavated hole area corresponding to the second type of second routing segment is a round hole.

[0019] Optionally, the first type second routing segment includes at least two layers of conductive material;

[0020] Preferably, the first type of second routing segment comprises a stacked first metal layer, a second metal layer and a third metal layer;

[0021] Preferably, the first type second routing segment and the first routing segment are arranged in different layers;

[0022] Preferably, the material of the second type of second wiring segment includes molybdenum;

[0023] Preferably, the material of the first metal stack includes titanium, the material of the second metal stack includes aluminum, and the material of the third metal stack includes titanium.

[0024] Optionally, the line width of the first type second routing segment is greater than the line width of the first routing segment;

[0025] Preferably, the first type second routing segment is on the same layer as the first routing segment;

[0026] Preferably, the first-type second routing segment and the second routing segment are in different layers.

[0027] Optionally, the display panel includes a substrate and a driving circuit layer stacked in sequence, and the driving circuit layer is provided with a plurality of pixel openings; the display panel further includes a plurality of light emitting elements, and the light emitting elements are provided in the pixel openings;

[0028] The driving circuit layer includes a plurality of pixel driving circuits, a plurality of light emitting control signal lines and a plurality of data lines, and the pixel driving circuits are electrically connected to the light emitting control signal lines and the data lines;

[0029] The first signal line is the light emitting control signal line or the data line.

[0030] According to another aspect of the present invention, a display device is provided, comprising the display panel as described above.

[0031] According to the technical solution of the embodiment of the present invention, the display panel adopted includes a first display area and at least two routing avoidance areas arranged along a first direction; the first display area at least partially surrounds the routing avoidance area; the display panel also includes a plurality of first signal lines, the first signal line includes a first routing segment and at least two second routing segments; the first routing segment extends along the first direction, at least two second routing segments correspond to at least two routing avoidance areas one by one, and the second routing segments extend around the edges of the routing avoidance areas, and adjacent first routing segments are connected to the second routing segments; wherein the at least two second routing segments include at least one first-type second routing segment and at least one second-type second routing segment; the edge of at least one routing avoidance area is surrounded by the first-type second routing segment, and the edge of at least one routing avoidance area is surrounded by the second-type second routing segment; the resistance per unit length of the first-type second routing segment is less than the resistance per unit length of the first routing segment, and the resistance per unit length of the first-type second routing segment is less than the resistance per unit length of the second-type second routing segment. The first type of second routing segment can compensate for the total resistance of the winding portion of the first signal line, while the second type of second routing segment can prevent over-compensation of the total resistance of the winding portion of the first signal line. Therefore, the solution of this embodiment can reduce the signal load difference between different signal lines, thereby improving the mura phenomenon.

[0032] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0034] Figure 1 A schematic diagram of the structure of a display panel provided by an embodiment of the present invention;

[0035] Figure 2 A partial enlarged view of a display panel provided by an embodiment of the present invention;

[0036] Figure 3 A cross-sectional view of a display panel provided by an embodiment of the present invention;

[0037] Figure 4 Another cross-sectional view of a display panel provided by an embodiment of the present invention;

[0038] Figure 5 A partial enlarged view of another display panel provided by an embodiment of the present invention;

[0039] Figure 6 Another cross-sectional view of a display panel provided by an embodiment of the present invention;

[0040] Figure 7 A schematic diagram of a circuit structure of a pixel driving circuit provided by an embodiment of the present invention;

[0041] Figure 8 A schematic structural diagram of a display device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0042] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0043] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0044] Just as the display panel in the related art has the phenomenon of uneven display, the inventor has found through extensive research that the reason for this technical problem is that the display panel in the related art includes a display area and at least two wiring avoidance areas, and the wiring avoidance area is, for example, a hole area. The extension direction of some signal lines in the display panel (recorded as the first part of the signal lines) overlaps with the hole area and needs to bypass the hole area; while the extension direction of the remaining signal lines (recorded as the second part of the signal lines) does not overlap with the hole area, so there is no need to bypass the hole area; this makes the length of the first part of the signal line corresponding to the hole area longer than the length of the second part of the signal line corresponding to the hole area. In order to prevent the signal load of the first part of the signal line corresponding to the hole area from being larger than the signal load of the second part of the signal line corresponding to the hole area, the related art sets the first part of the signal line corresponding to all the hole areas to a solution with a smaller resistance. However, this setting will cause the signal load of the first part of the signal line to be less than the signal load of the second part of the signal line, and mura will appear on the display panel.

[0045] In view of the above technical problems, the present invention proposes the following solutions:

[0046] Figure 1 A schematic diagram of the structure of a display panel provided by an embodiment of the present invention, Figure 2 A partial enlarged view of a display panel provided by an embodiment of the present invention, referring to Figure 1 and Figure 2The display panel includes a first display area AA and at least two routing avoidance areas H arranged along a first direction X; the first display area AA1 at least partially surrounds the routing avoidance area H; the display panel also includes a plurality of first signal lines L1(H), wherein the first signal line L1(H) includes a first routing segment L11 and at least two second routing segments L12; the first routing segment L11 extends along the first direction X, the at least two second routing segments L12 correspond to the at least two routing avoidance areas H one by one, and the second routing segments L12 extend around the edge of the routing avoidance area H, and the first signal line L11 extends along the first direction X, and the at least two second routing segments L12 correspond to the at least two routing avoidance areas H one by one, and the second routing segments L12 extend around the edge of the routing avoidance area H, and the first signal line L11 extends along the first direction X, and the first signal line L11 extends along the first direction X, and the at least two second routing segments L12 correspond to the at least two routing avoidance areas H one by one, and the second signal line L11 extends around the edge of the routing avoidance area H, and the first signal line L11 extends along the first direction X ... The adjacent first routing segment L11 is connected to the second routing segment L12; wherein, the at least two second routing segments L12 include at least one first-type second routing segment and at least one second-type second routing segment; the edge of at least one routing avoidance area H is wound with the first-type second routing segment, and the edge of at least one routing avoidance area H is wound with the second-type second routing segment; the resistance per unit length of the first-type second routing segment is less than the resistance per unit length of the first routing segment L11, and the resistance per unit length of the first-type second routing segment is less than the resistance per unit length of the second-type second routing segment.

[0047] Specifically, a plurality of light-emitting elements are arranged in the display area AA of the display panel, which may specifically include a plurality of first color light-emitting elements, a plurality of second color light-emitting elements and a plurality of third color light-emitting elements. The light-emitting color of the first color light-emitting element is the first color, the light-emitting color of the second color light-emitting element is the second color, and the light-emitting color of the third color light-emitting element is the third color. The first color, the second color and the third color are different from each other. Exemplarily, the first color may be red, the second color may be green, and the third color may be blue. The first display area AA of the display panel may also include a plurality of pixel driving circuits, each pixel driving circuit is electrically connected to at least one light-emitting element, and the pixel driving circuit is used to drive the corresponding light-emitting element to emit light. The display panel also includes a plurality of preset signal lines, which extend along the first direction X as a whole and are arranged along the second direction Y. Wherein, the first direction X intersects with the second direction Y. Exemplarily, the first direction X is the row direction and the second direction Y is the column direction. The preset signal line includes a first signal line L1 (H) and a second signal line L1 (N), and the first signal line L1 (H) and the second signal line L1 (N) are both used to provide a preset signal to a pixel driving circuit that is on the same straight line along the first direction X, so that the pixel driving circuit can normally drive the corresponding light-emitting element. In this embodiment, for the convenience of explanation, the preset signal line is divided into a first signal line L1 (H) and a second signal line L1 (N). It can be understood by those skilled in the art that the first signal line L1 (H) and the second signal line L1 (N) have the same function with respect to the pixel driving circuit, and the difference is that the extension direction of the first signal line L1 (H) overlaps with the wiring avoidance area H, while the extension direction of the second signal line L1 (N) does not overlap with the wiring avoidance area H.

[0048] like Figure 1 and Figure 2 As shown, for the first signal line L1(H), it includes at least one first-type second routing segment L121 and at least one second-type second routing segment L122. Under unit length, the resistance of the first-type second routing segment L121 is less than the resistance of the first routing segment L11; that is, the first-type second routing segment L121 is used to reversely compensate for the resistance of the first signal line L1(H), so that the total resistance of the part between the winding starting point and the winding ending point of the first signal line L1(H) tends to be equal to the total resistance of the corresponding part of the second signal line L1(N). Among them, the corresponding part of the second signal line L1(N) is the part corresponding to the projection of the part between the winding starting point and the winding ending point of the first signal line L1(H) on the second signal line L1(N) along the second direction, which can be understood as follows Figure 2 , the portion of the last first signal line L1(H) and the second signal line L1(N) from top to bottom along the second direction Y is located within the dotted line segment. However, as mentioned above, since the display panel includes at least two routing avoidance areas H, along the first direction X, the total size of all routing avoidance areas H is relatively large, which makes the portion between the winding start point and the winding end point of the first signal line L1(H) longer. In the related art, this portion is treated with a relatively small resistance, so that the resistance of this portion is smaller than the resistance of the corresponding portion of the second signal line L1(N), so that the signal load of the first signal line L1(H) at both ends of this portion is smaller than the signal load of the corresponding portion of the second signal line L1(N), thereby generating mura.

[0049] In this embodiment, the resistance of the first type second routing segment L121 in the first signal line L1 (H) is set to be less than the resistance of the second type second routing segment L122 under unit length. In other words, the second type second routing segment L122 is used to positively compensate for the total resistance of the first signal line L1 between the winding start point and the winding end point, preventing the first type second routing segment L121 from overcompensating the resistance of this part. In other words, the setting of this embodiment makes the total resistance of the first signal line L1 between the winding start point and the winding end point closer to the total resistance of the second signal line L1 in the corresponding part, reducing the difference in signal load between different signal lines, thereby improving the mura phenomenon.

[0050] It should be noted that the unit length described in this article can be understood as the unit length along the extension direction of the corresponding signal line.

[0051] The technical solution of this embodiment adopts a display panel including a first display area and at least two routing avoidance areas arranged along a first direction; the first display area at least partially surrounds the routing avoidance area; the display panel also includes a plurality of first signal lines, the first signal line includes a first routing segment and at least two second routing segments; the first routing segment extends along the first direction, at least two second routing segments correspond to at least two routing avoidance areas one by one, and the second routing segments extend around the edges of the routing avoidance areas, and adjacent first routing segments are connected to second routing segments; wherein the at least two second routing segments include at least one first-type second routing segment and at least one second-type second routing segment; the resistance per unit length of the first-type second routing segment is less than the resistance per unit length of the first routing segment, and the resistance per unit length of the first-type second routing segment is less than the resistance per unit length of the second-type second routing segment. The first-type second routing segment can compensate for the total resistance of the winding portion of the first signal line, and the second-type second routing segment can prevent over-compensation of the total resistance of the winding portion of the first signal line. Therefore, the solution of this embodiment can reduce the signal load difference between different signal lines, thereby improving the mura phenomenon.

[0052] For example, the following takes the display panel including two wiring avoidance areas H as an example. Figure 1 and Figure 2 As shown. The two routing avoidance areas H are respectively the first routing avoidance area H1 and the second routing avoidance area H2. The routing avoidance area H can be a hole-punching area for installing components; the edge of one of the hole-punching areas is surrounded by a first type of second routing segment, and the edge of the other hole-punching area is surrounded by a second type of second routing segment. For example, the first routing avoidance area H1 can be used to install a handset, etc., and the second routing avoidance area H2 can be used to install a camera or an infrared sensor, etc. Of course, in some other embodiments, the routing avoidance area H can also be a second display area for display.

[0053] Optionally, refer to Figure 2 , along the first direction X, the routing avoidance area corresponding to the first type second routing segment L121 ( Figure 2 is the maximum size of the first routing avoidance area H1), which is larger than the routing avoidance area corresponding to the second type second routing segment L122 ( Figure 2 , where is the maximum size of the second routing avoidance area H2); wherein the routing avoidance area H is arranged along the extension direction of the first routing segment.

[0054] Specifically, the first routing avoidance area H1 may be a runway hole, and the second routing avoidance area H2 may be a circular hole. The first routing avoidance area H1 has a larger size along the first direction X, and the length of the portion of the first signal line L1 (H) corresponding to the first routing avoidance area H1 is also longer. Routing with a smaller resistance per unit length can avoid the resistance of the portion of the first signal line L1 (H) between the winding start point and the winding end point being greater than the resistance of the corresponding portion of the second signal line L1 (N). The second routing avoidance area H2 has a smaller size along the first direction X, and the length of the portion of the first signal line L1 (H) corresponding to the second routing avoidance area H2 is also shorter. Routing with a resistance per unit length greater than the resistance of the first type of second routing segment can improve the phenomenon that the resistance of the portion of the first signal line L1 (H) between the winding start point and the winding end point is over-compensated and is less than the resistance of the corresponding portion of the second signal line L1 (N). On the contrary, if the resistance per unit length of the second routing segment of the first type is set to be smaller than the resistance per unit length of the second routing segment of the second type, the resistance cannot be compensated well, that is, the resistance of the first signal line between the starting point and the ending point of the winding will be greater than the resistance of the corresponding part of the second signal line.

[0055] Optionally, Figure 3 A cross-sectional view of a display panel provided by an embodiment of the present invention, Figure 4 Another cross-sectional view of a display panel provided by an embodiment of the present invention, combined with Figures 1 to 4 .in, Figure 3 Used to illustrate the relationship between the various film layers in the display panel. Figure 4Used to illustrate the film layer position of the first signal line in the display panel. The display panel includes a substrate 11 and a driving circuit layer stacked in sequence, the driving circuit layer is provided with a plurality of pixel openings, and the light-emitting element 18 of the display panel is arranged in the pixel opening. The driving circuit layer includes an active layer 12, a first metal layer 13, a second metal layer 13, a third metal layer 14 and a pixel defining layer 17 stacked in sequence on the substrate 11. The substrate 11 can be a rigid substrate, such as a glass substrate, a silicon substrate, a diamond substrate or a sapphire substrate. The substrate 11 can also be a flexible substrate, such as a polyimide substrate. The active layer 12 is used to set the active structure of the transistor in the pixel driving circuit, the first metal layer 13 is used to set the gate of the transistor in the pixel driving circuit and the first plate of the capacitor, and the second metal layer 14 is used to set the source and drain of the transistor in the pixel driving circuit. A gate insulating layer GI is also arranged between the active layer 12 and the first metal layer 13, a first interlayer insulating layer CI1 is also arranged between the first metal layer 13 and the second metal layer 14, a second interlayer insulating layer CI2 is also arranged between the second metal layer 14 and the third metal layer 15, a passivation layer PVX and a planarization layer PLN are also arranged between the third metal layer 15 and the pixel defining layer 17, the light-emitting element 18 is electrically connected to the corresponding pixel driving circuit PX through the first electrode 16, and the display panel also includes a second electrode layer (not shown) and an encapsulation layer, the second electrode layer covers the pixel defining layer and the light-emitting element 18, and the encapsulation layer covers the second electrode layer.

[0056] Alternatively, if Figures 2 to 4 As shown, the resistance per unit length of the second type second wiring segment L122 is the same as the resistance per unit length of the first wiring segment L11. Figure 2 In the figure, the first type second routing segment L121 is represented by a red line, and its resistance per unit length is small; the second type second routing segment L122 and the first routing segment L11 are both represented by black lines, and the resistance per unit length of the two is the same. The configuration of this embodiment makes the resistance per unit length of the second type second routing segment L122 greater than the resistance per unit length of the first type second routing segment L121, thereby avoiding the over-compensation of the resistance of the first signal line L1 (H) by the first type second routing segment L121. In addition, by setting the resistance per unit length of the first type second routing segment L121 to be equal to the resistance per unit length of the first routing segment L11, the second type second routing segment L122 can be set using the metal layer where the first routing segment L11 is located, that is, the second type second routing segment L122 can be set on the same layer as the first routing segment L11, thereby reducing the design difficulty, reducing the line change holes caused by the different layer settings, and further reducing the manufacturing difficulty.

[0057] In this embodiment, the resistance per unit length of the second type second routing segment L122 and the resistance per unit length of the first type second routing segment L121 can be determined according to the size of the first routing avoidance area H1 along the first direction (set as a1) and the size of the second routing avoidance area H2 along the first direction (set as a2); for example, if a2 / a1>b, it indicates that the size of the second routing avoidance area also accounts for a large proportion, and the resistance per unit length of the second type second routing segment corresponding to the second routing avoidance area is less than or equal to the resistance per unit length of the first routing segment, which can improve the over-compensation situation. If a2 / a1≤b, it indicates that the size of the second routing avoidance area accounts for a small proportion, and the resistance per unit length of the second type second routing segment corresponding to the second routing avoidance area is less than or equal to the resistance per unit length of the first routing segment, which may not effectively improve the over-compensation situation.

[0058] Therefore, in some other embodiments, Figure 5 As shown, Figure 5 A partial enlarged view of another display panel provided by an embodiment of the present invention. The resistance per unit length of the second type second wiring segment L122 is greater than the resistance per unit length of the first wiring segment L11.

[0059] Specifically, in Figure 5 In the structure shown, the second type of second routing segment L122 is represented by a green line. The second type of second routing segment L122 has a larger resistance per unit length, and when the size of the second routing avoidance area H2 is small, it can effectively prevent the first type of second routing segment L121 from overcompensating the resistance of the first signal line L1 between the winding start point and the winding end point.

[0060] Optionally, in some embodiments, the line width of the second type second routing segment L122 can be set smaller than the line width of the first routing segment L11, so that the resistance per unit length of the second type second routing segment L122 is greater than the resistance per unit length of the first routing segment L11. In this embodiment, the second type second routing segment L122 and the first routing segment L11 can be set on the same layer.

[0061] Optionally, in some other embodiments, the thickness of the second type of second routing segment can be set to be smaller than the thickness of the first routing segment, thereby making the resistance per unit length of the second type of second routing segment L122 greater than the resistance per unit length of the first routing segment L11. In this embodiment, the second type of second routing segment and the first routing segment can be set in different layers. Figure 6 As shown, Figure 6Another cross-sectional view of a display panel provided by an embodiment of the present invention. In this embodiment, the second type second routing segment L122 and the first type second routing segment L121 can be set in different layers. Exemplarily, in this embodiment, the second type second routing segment L122 can be set in the first metal layer, the first routing segment L11 can be set in the second metal layer, and the first type second routing segment L121 can be set in the second metal layer.

[0062] Optionally, the first type second routing segment L121 includes at least two layers of conductive material; the conductive material is, for example, metal. Different conductive materials may be different metals. Exemplarily, the first type second routing segment L121 may include a stacked first metal stack, a second metal stack, and a third metal stack; the material of the first metal stack is, for example, titanium Ti, the material of the second metal stack is, for example, aluminum Al, and the material of the third metal stack is, for example, titanium Ti. The material of the second type second routing segment L122 is, for example, molybdenum Mo.

[0063] Optionally, in some other implementations, the second type second routing segment L122 and the first type second type L121 may also be arranged on the same layer.

[0064] Alternatively, if Figure 5 As shown, among the multiple second-type second routing segments L122 corresponding to the same routing avoidance area, the resistance per unit length of the second-type second routing segment L122 close to the routing avoidance area is smaller than the resistance per unit length of the second-type second routing segment L122 far from the routing avoidance area.

[0065] Specifically, among the multiple second-class second routing segments L122 corresponding to the same routing avoidance area, the closer the second-class second routing segment L122 is to the routing avoidance area, the longer the total length is, and the corresponding total resistance is also greater; and the farther the second-class second routing segment L122 is from the routing avoidance area, the shorter the total length is. If the resistance per unit length of each second-class second routing segment is the same, due to the difference in total length, the total resistance of different second-class second routing segments will be different, which will also make the partial resistance of different first signal lines L1 (H) between the starting point and the end point of the winding different different, which may cause mura. The arrangement of this embodiment makes the resistance per unit length of the second-class second routing segment with a smaller total length larger, which can make the total resistance of different second-class second routing segments L122 close, and then make the partial resistance of different first signal lines L1 (H) between the starting point and the end point of the winding closer, so as to improve the mura phenomenon.

[0066] Optionally, continue to refer to Figure 5Among the multiple first-type second routing segments L121 corresponding to the same routing avoidance area, the resistance per unit length of the first-type second routing segment L121 close to the routing avoidance area is smaller than the resistance per unit length of the first-type second routing segment L121 far from the routing avoidance area.

[0067] Specifically, among the multiple first-class second routing segments L121 corresponding to the same routing avoidance area, the closer the first-class second routing segment L121 is to the routing avoidance area, the longer the total length is, and the corresponding total resistance is also greater; and the farther the first-class second routing segment L121 is from the routing avoidance area, the shorter the total length is. If the resistance per unit length of each first-class second routing segment L121 is the same, due to the difference in total length, the total resistance of different first-class second routing segments L121 will be different, which will also make the partial resistance of different first signal lines L1 (H) between the starting point and the end point of the winding different different, which may cause mura. The configuration of this embodiment makes the resistance per unit length of the first-class second routing segment L121 with a smaller total length larger, which can make the total resistance of different first-class second routing segments L121 close, and then make the partial resistance of different first signal lines L1 (H) between the starting point and the end point of the winding closer, so that the mura phenomenon can be improved.

[0068] Optionally, the driving circuit layer includes a plurality of light-emitting control signal lines and a plurality of data lines, and the pixel driving circuit is electrically connected to the light-emitting control signal lines and the data lines; the first signal line is a light-emitting control signal line or a data line.

[0069] Specifically, Figure 7 A schematic diagram of a circuit structure of a pixel driving circuit provided by an embodiment of the present invention, referring to Figure 7 The pixel driving circuit includes a driving module 101, a data writing module 102, a threshold compensation module 103, a first light-emitting control module 108 and a second light-emitting control module 109. The data writing module 102 is used to write the voltage on the data line into the control end of the driving module 101, the driving module 101 is used to generate a driving current according to the potential of its control end, the light-emitting element 18 is used to emit light in response to the driving current, and the threshold compensation module 103 is used to compensate for the threshold voltage of the driving module 101. The first light-emitting control module 108, the driving module, the second light-emitting control module 109 and the light-emitting element are connected in series between the first power signal line and the second power signal line, and the first light-emitting control module 108 and the second light-emitting control module 109 provide a conduction path for the driving current according to the control of the light-emitting control signal on the light-emitting control signal line.

[0070] In some embodiments, the first signal line L1(H) may be a data line. In other embodiments, the first signal line L1(H) may be a light-emitting control signal line. When the first signal line L1(H) is a light-emitting control signal line, since the signal load difference between different light-emitting control signal lines is small, the pixel driving circuit may implement a multi-pulse driving mode, for example, a 32-pulse driving mode. It is understandable that the multi-pulse driving mode may greatly improve the display effect, and its specific driving mode is well known to those skilled in the art and will not be described in detail here.

[0071] Optionally, continue to refer to Figure 7The pixel driving circuit also includes a storage module 104, a first initialization module 105 and a second initialization module 106. The first end of the data writing module 102 is electrically connected to the data line connection end Vdata, the second end of the data writing module 102 is electrically connected to the first end of the driving module 101, and the control end of the data writing module 102 is electrically connected to the second scanning signal input end S2; the data line connection end Vdata is used to connect the data line, and the second scanning signal input end S2 is used to connect the second scanning signal line; the first end of the threshold compensation module 103 is electrically connected to the second end of the driving module 101, the second end of the threshold compensation module 103 is electrically connected to the control end of the driving module 101, and the control end of the threshold compensation module 103 is electrically connected to the second scanning signal line. The first end of the first initialization module 105 is electrically connected to the first initialization signal input terminal Vref1, the second end of the first initialization module 105 is electrically connected to the control end of the driving module 101, and the control end of the first initialization module 105 is electrically connected to the first scan signal input terminal S1; wherein the first scan signal input terminal S1 is used to connect the first scan signal line, and the first initialization signal input terminal Vref1 is used to connect the first initialization signal line; the first end of the first light-emitting control module 108 is electrically connected to the first power supply signal input terminal ELVDD, and the second end of the first light-emitting control module 108 is electrically connected to the driving module 101. The first end of the driving module 101 is electrically connected, the control end of the first light-emitting control module 108 is electrically connected to the light-emitting control signal end EM; the light-emitting control signal end EM is used to be electrically connected to the light-emitting control signal line; the first end of the second light-emitting control module 109 is electrically connected to the second end of the driving module 101, the second end of the second light-emitting control module 109 is electrically connected to the first end of the light-emitting element 18, the control end of the second light-emitting control module 109 is electrically connected to the light-emitting control signal end EM, and the second end of the light-emitting element 18 is electrically connected to the second power signal input end ELVSS; wherein the first power signal input end ELVDD is used to connect the first power signal line, the second power signal input terminal ELVSS is used to connect the second power signal line; the first end of the second initialization module 106 is electrically connected to the second initialization signal input terminal Vref2, the second end of the second initialization module 106 is electrically connected to the first end of the light emitting element 18, and the control end of the second initialization module 106 is electrically connected to the first scan signal input terminal S1; wherein the second initialization signal input terminal Vref2 is used to connect the second initialization signal line; the first end of the storage module 104 is electrically connected to the first power signal input terminal ELVDD, and the second end of the storage module 104 is electrically connected to the control end of the driving module 101.

[0072] The working process of the pixel driving circuit includes an initialization phase, a charging phase and a light-emitting phase.

[0073] In the initialization stage, the first scanning signal line controls the first initialization module 105 and the second initialization module 106 to be turned on, the first initialization signal on the first initialization signal line initializes the control end of the driving module 101, and the second initialization signal on the second initialization signal line initializes the first end of the light emitting element.

[0074] In the charging stage, the second scanning signal line controls the data writing module 107 and the threshold compensation module 103 to be turned on; the data signal on the data line is written to the control end of the driving module 101 after passing through the data writing module 107, the driving module 101 and the threshold compensation module 103. In the charging stage, the threshold compensation of the driving module 101 is completed. At this time, the storage module 104 stores the data voltage with the threshold voltage information of the driving module 101.

[0075] In the light-emitting stage, the light-emitting control signal line controls the first light-emitting control module 108 and the second light-emitting control module 109 to be turned on. The driving module 101 generates a driving current according to the voltage at its control terminal, and the light-emitting element displays a corresponding gray scale.

[0076] Alternatively, if Figure 7 The driving module 101 includes a first transistor M1, a first end of the first transistor M1 serves as a first end of the driving module 101, a second end of the first transistor M1 serves as a second end of the driving module 101, and a control end of the first transistor M1 serves as a control end of the driving module 101.

[0077] The data writing module 107 includes a second transistor M2 , a first end of the second transistor M2 serves as a first end of the data writing module 107 , a second end of the second transistor M2 serves as a second end of the data writing module 107 , and a control end of the second transistor M2 serves as a control end of the data writing module 107 .

[0078] The threshold compensation module 103 includes a third transistor M3 , a first end of the third transistor M3 serves as a first end of the threshold compensation module 103 , a second end of the third transistor M3 serves as a second end of the threshold compensation module 103 , and a control end of the third transistor M3 serves as a control end of the threshold compensation module 103 .

[0079] The first initialization module 105 includes a fourth transistor M4 , a first end of the fourth transistor M4 serves as a first end of the first initialization module 105 , a second end of the fourth transistor M4 serves as a second end of the first initialization module 105 , and a control end of the fourth transistor M4 serves as a control end of the first initialization module 105 .

[0080] The first light emitting control module 108 includes a fifth transistor M5, a first end of the fifth transistor M5 serves as a first end of the first light emitting control module 108, a second end of the fifth transistor M5 serves as a second end of the first light emitting control module 108, and a control end of the fifth transistor M5 serves as a control end of the first light emitting control module 108.

[0081] The second light-emitting control module 109 includes a sixth transistor M6, a first end of the sixth transistor M6 serves as the first end of the second light-emitting control module 109, a second end of the sixth transistor M6 serves as the second end of the second light-emitting control module 109, and a control end of the sixth transistor M6 serves as the control end of the second light-emitting control module 109. The second initialization module 106 includes a seventh transistor M7, a first end of the seventh transistor M7 serves as the first end of the second initialization module 106, a second end of the seventh transistor M7 serves as the second end of the second initialization module 106, and a control end of the seventh transistor M7 serves as the control end of the second initialization module 106.

[0082] The storage module 104 includes a storage capacitor Cst, a first end of the storage capacitor Cst serves as a first end of the storage module 104 , and a second end of the storage capacitor Cst serves as a second end of the storage module 104 .

[0083] In the above-mentioned embodiments, each transistor may be an N-type transistor or a P-type transistor.

[0084] The embodiment of the present invention further provides a display device, such as Figure 8 As shown, Figure 8 A schematic diagram of the structure of a display device provided in an embodiment of the present invention. The display device includes a display panel provided in any embodiment of the present invention. The display device may be a mobile phone, a tablet computer, an MP3, an MP4, a videophone, a personal digital assistant, a smart watch, a smart helmet or other wearable device. Since the display device provided in an embodiment of the present invention includes a display panel provided in any embodiment of the present invention, it also has the same beneficial effects, which will not be described in detail here.

[0085] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0086] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A display panel, characterized in that: The display panel comprises a first display area and at least two wiring avoidance areas arranged along a first direction; the first display area at least partially surrounds the wiring avoidance area; The display panel further includes a plurality of first signal lines, the first signal lines including a first routing segment and at least two second routing segments; the first routing segment extends along the first direction, the at least two second routing segments correspond to the at least two routing avoidance areas one by one, and the second routing segments extend around the edges of the routing avoidance areas, and adjacent first routing segments are connected to the second routing segments; Among them, the at least two second routing segments include at least one first-type second routing segment and at least one second-type second routing segment; the first-type second routing segment is wound around the edge of at least one routing avoidance area, and the second-type second routing segment is wound around the edge of at least one routing avoidance area; the resistance per unit length of the first-type second routing segment is smaller than the resistance per unit length of the first routing segment, and the resistance per unit length of the first-type second routing segment is smaller than the resistance per unit length of the second-type second routing segment.

2. The display panel according to claim 1, characterized in that: The resistance per unit length of the second routing segment of the second type is the same as the resistance per unit length of the first routing segment; Preferably, the second routing segment of the second type is arranged on the same layer as the first routing segment.

3. The display panel according to claim 1, characterized in that: The resistance per unit length of the second routing segment of the second type is greater than the resistance per unit length of the first routing segment; Preferably, the line width of the second type second routing segment is smaller than the line width of the first routing segment; Preferably, the thickness of the second type second routing segment is smaller than the thickness of the first routing segment.

4. The display panel according to claim 3, characterized in that: Among the plurality of second-type second routing segments corresponding to the same routing avoidance area, the resistance per unit length of the second-type second routing segment close to the routing avoidance area is smaller than the resistance per unit length of the second-type second routing segment far from the routing avoidance area.

5. The display panel according to claim 1, characterized in that: Among the multiple first-type second routing segments corresponding to the same routing avoidance area, the resistance per unit length of the first-type second routing segment close to the routing avoidance area is smaller than the resistance per unit length of the first-type second routing segment far from the routing avoidance area.

6. The display panel according to any one of claims 1 to 5, characterized in that: Along the first direction, the maximum size of the routing avoidance area corresponding to the first type of second routing segment is greater than the maximum size of the routing avoidance area corresponding to the second type of second routing segment; wherein the routing avoidance area is arranged along the extension direction of the first routing segment; Preferably, the display panel includes at least two hole-digging areas, and the wiring avoidance area is the hole-digging area; Preferably, the at least two hole-digging areas include two hole-digging areas, wherein the first type of second routing segment is wound around the edge of one of the hole-digging areas, and the second type of second routing segment is wound around the edge of the other hole-digging area; Preferably, the excavated hole area corresponding to the first type of second routing segment is a runway hole, and the excavated hole area corresponding to the second type of second routing segment is a round hole.

7. The display panel according to claim 1, characterized in that: The first type of second routing segment includes at least two layers of conductive material; Preferably, the first type of second routing segment comprises a stacked first metal layer, a second metal layer and a third metal layer; Preferably, the first type second routing segment and the first routing segment are arranged in different layers; Preferably, the material of the second type of second wiring segment includes molybdenum; Preferably, the material of the first metal stack includes titanium, the material of the second metal stack includes aluminum, and the material of the third metal stack includes titanium.

8. The display panel according to claim 1, characterized in that: The line width of the first type second routing segment is greater than the line width of the first routing segment; Preferably, the first type second routing segment is on the same layer as the first routing segment; Preferably, the first-type second routing segment and the second routing segment are in different layers.

9. The display panel according to claim 1, characterized in that: The display panel includes a substrate and a driving circuit layer stacked in sequence, wherein the driving circuit layer is provided with a plurality of pixel openings; the display panel also includes a plurality of light emitting elements, wherein the light emitting elements are provided in the pixel openings; The driving circuit layer includes a plurality of pixel driving circuits, a plurality of light emitting control signal lines and a plurality of data lines, and the pixel driving circuits are electrically connected to the light emitting control signal lines and the data lines; The first signal line is the light emitting control signal line or the data line.

10. A display device, characterized in that: The display device comprises the display panel according to any one of claims 1 to 9.

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