Silicon and carbon-containing material with low dielectric constant

Abstract

An exemplary method of semiconductor processing may include providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber. The carbon-containing precursor may be characterized by a carbon-carbon double bond or a carbon-carbon triple bond. A substrate may be disposed within a processing region of a semiconductor processing chamber. The method may include providing an oxygen-containing precursor to a processing region of a semiconductor processing chamber. The method may include thermally reacting a silicon-containing precursor, a carbon-containing precursor, and an oxygen-containing precursor at a temperature of less than or about 700 DEG C. The method may include forming a silicon and carbon containing layer on a substrate.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of and priority to U.S. Patent Application No. 17 / 737,328, filed on May 5, 2022, entitled “SILICON-AND-CARBON-CONTAINING MATERIALS WITH LOW DIELECTRIC CONSTANTS,” the entire contents of which are incorporated herein by reference. Technical Field

[0002] The present technology relates to methods and components for semiconductor processing. More specifically, the present technology relates to systems and methods for producing silicon and carbon containing films for semiconductor structures. Background Art

[0003] Integrated circuits may be fabricated by processes that produce intricately patterned layers of material on a substrate surface. Producing patterned materials on a substrate requires controlled methods for forming and removing materials. As device dimensions continue to decrease, the aspect ratios of structures may increase, and maintaining the dimensions of these structures during processing operations may be challenging. Developing dielectric materials that may have sufficient conformality across features may be a challenge. Additionally, as the number of material layers that are patterned during processing continues to increase, producing materials that may have improved removal selectivity to other exposed materials as well as maintaining material properties is becoming a greater challenge.

[0004] Therefore, there is a need for improved systems and methods for producing high quality devices and structures. These and other needs are addressed by the present technology. Summary of the invention

[0005] An exemplary method of semiconductor processing may include providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber. The carbon-containing precursor may be characterized by a carbon-carbon double bond or a carbon-carbon triple bond. A substrate may be disposed within the processing region of the semiconductor processing chamber. The method may include providing an oxygen-containing precursor to the processing region of the semiconductor processing chamber. The method may include thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor at a temperature of less than or about 700° C. The method may include forming a layer containing silicon and carbon on the substrate.

[0006] In some embodiments, the oxygen-containing precursor may be or include nitrous oxide. The thermal reaction of the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor may be performed at a temperature of less than or about 575° C. When forming the layer containing silicon and carbon, the pressure in the semiconductor processing chamber may be maintained at greater than or about 3 Torr. While the layer containing silicon and carbon is formed on the substrate, the processing area of ​​the semiconductor processing chamber may remain plasma-free. The carbon-containing precursor and the silicon-containing precursor may be provided at a flow rate ratio greater than or about 4:1. The substrate may be characterized by one or more features. The layer containing silicon and carbon may be formed around the one or more features with a conformality greater than or about 80%. The layer containing silicon and carbon may be characterized by a carbon concentration of less than or about 30 atomic %. The method may include circulating the oxygen-containing precursor while maintaining the delivery of the silicon-containing precursor and the carbon-containing precursor. The time period for providing the oxygen-containing precursor may be between about 0.5 seconds and about 10 seconds. The layer containing silicon and carbon may be formed at least partially around one or more alternating stacks of silicon and silicon germanium.

[0007] Some embodiments of the present technology cover semiconductor processing methods. The method may include providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber. The carbon-containing precursor and the silicon-containing precursor may be provided at a flow rate ratio greater than or about 4:1. A substrate may be disposed within a processing region of the semiconductor processing chamber. The method may include providing an oxygen-containing precursor to the processing region of the semiconductor processing chamber. The method may include thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor at a temperature less than or about 650° C. The method may include forming a layer containing silicon and carbon on the substrate.

[0008] In some embodiments, the oxygen-containing precursor may be or include nitrous oxide. A processing region of a semiconductor processing chamber may be maintained plasma-free during the semiconductor processing method. The method may include circulating the oxygen-containing precursor while maintaining the delivery of the silicon-containing precursor and the carbon-containing precursor. The oxygen-containing precursor is provided for a period of time between about 0.5 seconds and about 10 seconds.

[0009] Some embodiments of the present technology encompass semiconductor processing methods. The method may include providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber. The silicon-containing precursor may be or include disilane. The carbon-containing precursor may be characterized by a carbon-carbon double bond or a carbon-carbon triple bond. A substrate may be disposed within a processing region of the semiconductor processing chamber. One or more alternating stacks of silicon and silicon germanium may be disposed on the substrate. The method may include providing an oxygen-containing precursor to a processing region of the semiconductor processing chamber. The oxygen-containing precursor may be or include nitrous oxide. The oxygen-containing precursor may be provided discontinuously. The method may include thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor at a temperature of less than or about 600° C. The method may include forming a layer containing silicon and carbon on the substrate. The layer containing silicon and carbon may be formed at least partially around one or more alternating stacks of silicon and silicon germanium.

[0010] In some embodiments, a processing region of a semiconductor processing chamber may be maintained plasma-free during a semiconductor processing method. A layer comprising silicon and carbon may be formed around one or more features with greater than or about 85% conformality. The layer comprising silicon and carbon may be characterized by a carbon concentration of less than or about 30 atomic %. The method may include exposing the layer comprising silicon and carbon to an oxygen-containing plasma, a hydrogen-containing plasma, or a wet etching process. The layer comprising silicon and carbon may maintain a thickness of at least 50%.

[0011] Such techniques can provide numerous advantages over conventional systems and techniques. For example, embodiments of the present technology can produce silicon-and-carbon containing materials characterized by increased carbon concentrations compared to conventional techniques. In addition, the present technology can produce carbon-containing films with tunable film properties having increased mechanical and electrical properties. These and other embodiments and many of their advantages and features are described in more detail in conjunction with the description and accompanying drawings below. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] A further understanding of the nature and advantages of the disclosed technology may be realized by reference to the remainder of the specification and drawings.

[0013] Figure 1 A schematic cross-sectional view of an exemplary plasma system is shown in accordance with some embodiments of the present technology.

[0014] Figure 2 Operations in a semiconductor processing method according to some embodiments of the present technology are illustrated.

[0015] FIG. 3A to FIG. 3C Exemplary schematic cross-sectional structures are shown in which material layers are included and created according to some embodiments of the present technology.

[0016] Some of the drawings are included as schematic diagrams. It should be understood that the drawings are for illustrative purposes and should not be considered to scale unless specifically indicated to scale. Furthermore, as schematic diagrams, the drawings are provided to aid understanding and may not include all aspects or information compared to realistic representations and may include exaggerated material for illustrative purposes.

[0017] In the accompanying drawings, similar components and / or features may have the same reference number. In addition, various components of the same type may be distinguished by following the reference number with a letter that distinguishes between the similar components. If only the first reference number is used in the specification, the description applies to any of the similar components having the same first reference number, regardless of the letter. DETAILED DESCRIPTION

[0018] As device sizes continue to shrink, the thickness and size of many material layers can be reduced in order to scale the device. When structures are closer together within a device, it may be more difficult to maintain consistency between structures. In addition, dielectric materials can play an important role in limiting crosstalk and other electrical problems. Current materials may not be able to fully reduce the dielectric constant without sacrificing the material or electrical properties of the film. For example, by adjusting the film properties to reduce the dielectric constant of certain materials, the leakage characteristics of the material may increase, and the breakdown properties of the film may be reduced, which may cause device failure. In addition, for these films to be incorporated into semiconductor integration, the processing may include a back-end production line annealing process that may expose the structure to temperatures exceeding 600°C or higher. Many films may be affected by this annealing, which may cause outgassing, thereby increasing the dielectric constant.

[0019] The present technique overcomes these problems by performing thermal-based material deposition, which may not utilize plasma generation during the deposition process. By performing a thermal reaction between specific silicon-containing precursors, carbon-containing precursors, and / or oxygen-containing precursors, the present technique may allow for low temperature chemical vapor deposition, which may provide conformal growth on any number of semiconductor structures. The performed process may allow for increased tuning of the resulting film, providing films characterized by a variety of material properties for different applications.

[0020] Although the remainder of the disclosure will conventionally identify a particular deposition process utilizing the disclosed technology, and will describe one type of semiconductor processing chamber, it will be readily appreciated that the described processes may be performed in any number of semiconductor processing chambers and may be used for any number of processing operations that may incorporate the described films. Therefore, the described technology should not be considered limited to use with only these particular deposition processes or chambers. Prior to describing semiconductor processing methods according to the present technology, the present disclosure will discuss one possible chamber that may be used to perform processes according to embodiments of the present technology.

[0021] Figure 1A cross-sectional view of an exemplary processing chamber 100 according to some embodiments of the present technology is shown. An overview of a system incorporating one or more aspects of the present technology may be shown in the figure, and / or may be specifically configured to perform one or more operations according to embodiments of the present technology. Additional details of the chamber 100 or the methods performed may be further described below. According to some embodiments of the present technology, the chamber 100 may be used to form a film layer, but it should be understood that these methods may be similarly performed in any chamber where film formation may occur. The processing chamber 100 may include a chamber body 102, a substrate support 104 disposed within the chamber body 102, and a lid assembly 106 coupled to the chamber body 102 and enclosing the substrate support 104 in a processing volume 120. The substrate 103 may be provided to the processing volume 120 through an opening 126, and the opening 126 may be conventionally sealed using a slit valve or door for processing. The substrate 103 may be placed on a surface 105 of the substrate support during processing. As indicated by arrow 145, the substrate support 104 may be rotatable along an axis 147, and the shaft 144 of the substrate support 104 may be located at the axis 147. Alternatively, the substrate support 104 may be lifted for rotation as desired during the deposition process.

[0022] The plasma profile modulator 111 can be disposed in the processing chamber 100 to control the plasma distribution on the substrate 103 disposed on the substrate support 104. The plasma profile modulator 111 can include a first electrode 108, which can be disposed adjacent to the chamber body 102 and can separate the chamber body 102 from other components of the lid assembly 106. The first electrode 108 can be part of the lid assembly 106, or can be a separate sidewall electrode. The first electrode 108 can be an annular or ring-shaped member, and can be a ring electrode. The first electrode 108 can be a continuous loop around the perimeter of the processing chamber 100 surrounding the processing volume 120, or can be discontinuous at selected locations if desired. The first electrode 108 can also be a perforated electrode, such as a perforated ring or mesh electrode, or can be a flat plate electrode, such as, for example, a secondary gas distributor.

[0023] The one or more isolators 110a, 110b may be a dielectric material, such as a ceramic or a metal oxide, for example, aluminum oxide and / or aluminum nitride, and the one or more isolators 110a, 110b may contact the first electrode 108 and electrically and thermally isolate the first electrode 108 from the gas distributor 112 and the chamber body 102. The gas distributor 112 may define an aperture 118 for dispensing process precursors into the processing volume 120. The gas distributor 112 may be coupled to a first electrical power source 142, such as an RF generator, an RF power supply, a DC power supply, a pulsed DC power supply, a pulsed RF power supply, or any other power supply that may be coupled to the processing chamber. In some embodiments, the first electrical power source 142 may be an RF power supply.

[0024] The gas distributor 112 may be a conductive gas distributor or a non-conductive gas distributor. The gas distributor 112 may also be formed of conductive and non-conductive components. For example, the body of the gas distributor 112 may be conductive, while the panel of the gas distributor 112 may be non-conductive. The gas distributor 112 may be powered, such as by a Figure 1 The first electrical power source 142 is shown to provide power, or in some embodiments, the gas distributor 112 may be coupled to ground.

[0025] The first electrode 108 can be coupled to a first tuning circuit 128, which can control a ground path for the processing chamber 100. The first tuning circuit 128 can include a first electronic sensor 130 and a first electronic controller 134. The first electronic controller 134 can be or include a variable capacitor or other circuit element. The first tuning circuit 128 can be or include one or more inductors 132. The first tuning circuit 128 can be any circuit capable of achieving a variable or controllable impedance under the plasma conditions present in the processing volume 120 during processing. In some embodiments as shown, the first tuning circuit 128 can include a first circuit branch and a second circuit branch coupled in parallel between ground and the first electronic sensor 130. The first circuit branch can include a first inductor 132A. The second circuit branch can include a second inductor 132B coupled in series with the first electronic controller 134. The second inductor 132B can be disposed between the first electronic controller 134 and a node connecting both the first circuit branch and the second circuit branch to the first electronic sensor 130. The first electronic sensor 130 may be a voltage sensor or a current sensor and may be coupled to a first electronic controller 134 , which may provide a degree of closed-loop control of the plasma conditions within the processing volume 120 .

[0026] The second electrode 122 may be coupled to the substrate support 104. The second electrode 122 may be embedded within the substrate support 104 or coupled to a surface of the substrate support 104. The second electrode 122 may be a plate, a perforated plate, a grid, a wire mesh, or any other distributed arrangement of conductive elements. The second electrode 122 may be a tuning electrode and may be coupled to the second tuning circuit 136 through, for example, a conduit 146 disposed in the shaft 144 of the substrate support 104, such as a cable having a selected resistance, such as 50 ohms. The second tuning circuit 136 may have a second electronic sensor 138 and a second electronic controller 140, which may be a second variable capacitor. The second electronic sensor 138 may be a voltage sensor or a current sensor and may be coupled to the second electronic controller 140 to provide further control of the plasma conditions in the processing volume 120.

[0027] A third electrode 124, which may be a bias electrode and / or an electrostatic clamping electrode, may be coupled to the substrate support 104. The third electrode may be coupled to a second electrical power source 150 via a filter 148, which may be an impedance matching circuit. The second electrical power source 150 may be a DC power, a pulsed DC power, an RF bias power, a pulsed RF source or bias power, or a combination of these or other power sources. In some embodiments, the second electrical power source 150 may be an RF bias power source. The substrate support 104 may also include one or more heating elements configured to heat the substrate to a processing temperature, which may be between about 25° C. and about 800° C. or higher.

[0028] Figure 1 The lid assembly 106 and substrate support 104 of the present invention can be used with any processing chamber for plasma processing or thermal processing. In operation, the processing chamber 100 can provide real-time control of plasma conditions in the processing volume 120. The substrate 103 can be disposed on the substrate support 104, and the processing gas can flow through the lid assembly 106 using the inlet 114 according to any desired flow plan. The gas can exit the processing chamber 100 via the outlet 152. Electrical power can be coupled to the gas distributor 112 to establish a plasma in the processing volume 120. In some embodiments, the substrate can be electrically biased using the third electrode 124.

[0029] When the plasma in the processing volume 120 is energized, a potential difference can be established between the plasma and the first electrode 108. A potential difference can also be established between the plasma and the second electrode 122. The electronic controllers 134, 140 can then be used to adjust the flow properties of the ground path represented by the two tuning circuits 128 and 136. Set points can be transmitted to the first tuning circuit 128 and the second tuning circuit 136 to provide independent control of the deposition rate and the uniformity of the plasma density from the center to the edge. In some embodiments where both electronic controllers can be variable capacitors, the electronic sensors can independently adjust the variable capacitors to maximize the deposition rate and minimize the thickness non-uniformity.

[0030] Each of the tuning circuits 128, 136 may have a variable impedance that may be adjusted using the corresponding electronic controller 134, 140. In the case where the electronic controllers 134, 140 are variable capacitors, the capacitance range of each of the variable capacitors, and the inductance of the first inductor 132A and the second inductor 132B may be selected to provide an impedance range. This range may depend on the frequency and voltage characteristics of the plasma, and the range may have a minimum value within the capacitance range of each variable capacitor. Thus, when the capacitance of the first electronic controller 134 is at a minimum or maximum value, the impedance of the first tuning circuit 128 may be high, which results in a plasma shape with minimum air or lateral coverage on the substrate support. When the capacitance of the first electronic controller 134 approaches a value that minimizes the impedance of the first tuning circuit 128, the air coverage of the plasma may grow to a maximum, effectively covering the entire working area of ​​the substrate support 104. When the capacitance of the first electronic controller 134 deviates from the minimum impedance setting, the plasma shape may shrink from the chamber wall, and the air coverage of the substrate support may decrease. The second electronic controller 140 may have a similar effect, increasing and decreasing the air coverage of the plasma on the substrate support as the capacitance of the second electronic controller 140 may be varied.

[0031] The electronic sensors 130, 138 may be used to tune the respective circuits 128, 136 in a closed loop. Depending on the type of sensor used, a set point for current or voltage may be installed in each sensor, and the sensor may be provided with control software that determines adjustments to each respective electronic controller 134, 140 to minimize deviations from the set point. Thus, the plasma shape may be selected and dynamically controlled during processing. It should be understood that while the above discussion is based on electronic controllers 134, 140 that may be variable capacitors, any electronic component having an adjustable characteristic may be used to provide a tuned circuit 128 and 136 having an adjustable impedance.

[0032] As previously discussed, although plasma processing chambers may be used for one or more aspects of film processing according to the present technology, in some embodiments, silicon and carbon films may be formed without utilizing plasma enhanced processes. Utilizing plasma may limit conformality of the film produced by further releasing carbon from the precursor, and this may limit carbon incorporation in the film produced by allowing carbon to recombine with other radical species and flow out of the chamber. In some embodiments, the present technology may form films at least without plasma generation. Figure 2 Exemplary operations in a processing method 200 according to some embodiments of the present technology are shown. The method may be performed in various processing chambers, including the processing chamber 100 described above, and any other chamber in which operations may be performed, including non-plasma chambers. Method 200 may include a plurality of optional operations that may or may not be specifically associated with some embodiments of the method according to the present technology. For example, many of the operations are described in order to provide a wider range of structure formation, but are not critical to the present technology, or may be performed by readily understood alternative methods. Method 200 may include a processing method that may include a plurality of operations for gradually forming a film containing silicon and carbon, the film containing silicon and carbon may include an adjustable ratio of carbon within the film. As will be further explained below, modifying the ratio of silicon and carbon, and how the materials are combined within the film, can provide multiple properties to facilitate device processing for multiple structures.

[0033] At operation 205, the method may include providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber that may house a substrate. At operation 210, which may occur simultaneously with operation 205 and before or after operation 205, an oxygen-containing precursor may be provided to the processing region of the semiconductor processing chamber. At operation 215, the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor may be thermally reacted within the processing region of the semiconductor processing chamber, which may form a silicon-and-carbon layer on the substrate at operation 220.

[0034] As reactions are performed in some embodiments, the semiconductor processing chamber, susceptor, or substrate 305 may be maintained at a temperature greater than or about 250° C., and in some embodiments may be maintained at a temperature greater than or about 300° C., greater than or about 320° C., greater than or about 340° C., greater than or about 360° C., greater than or about 380° C., greater than or about 400° C., greater than or about 420° C., greater than or about 440° C., greater than or about 460° C., greater than or about 480° C., greater than or about 500° C., greater than or about 520° C., greater than or about 540° C., or more. Similarly, in some embodiments, the semiconductor processing chamber, pedestal, or substrate 305 may be maintained at a temperature of less than or about 700°C, and in some embodiments may be maintained at a temperature of less than or about 680°C, less than or about 660°C, less than or about 640°C, less than or about 620°C, less than or about 600°C, less than or about 580°C, less than or about 575°C, less than or about 560°C, less than or about 540°C, or less.

[0035] The semiconductor processing chamber can be maintained at a pressure greater than or about 3 Torr, and in some embodiments can be maintained at a pressure greater than or about 5 Torr, greater than or about 10 Torr, greater than or about 15 Torr, greater than or about 25 Torr, greater than or about 50 Torr, greater than or about 75 Torr, greater than or about 100 Torr, greater than or about 125 Torr, greater than or about 150 Torr, greater than or about 175 Torr, greater than or about 200 Torr, greater than or about 225 Torr, greater than or about 250 Torr, greater than or about 275 Torr, greater than or about 300 Torr, or more.

[0036] As previously discussed, some or all of the forming operations can be performed while maintaining the substrate processing region plasma-free. By performing thermal chemical vapor deposition, more corrective material formation can be produced, as well as materials characterized by increased carbon incorporation. During processing according to some embodiments of the present technology, non-limiting examples of available silicon-containing precursors may include silane, disilane, silicon tetrafluoride, silicon tetrachloride, dichlorosilane, tetraethyl orthosilicate, and any other silicon-containing precursor that can be used for silicon-containing film formation. The carbon-containing precursor can be or include any number of carbon-containing precursors. For example, the carbon-containing precursor can be or include any hydrocarbon, or any material including carbon and hydrogen or consisting of carbon and hydrogen. In some embodiments, in order to promote the reaction between the carbon precursor and the silicon precursor or the oxygen precursor, the carbon-containing precursor can be characterized by one or more carbon-carbon double bonds and / or one or more carbon-carbon triple bonds. Therefore, in some embodiments, the carbon-containing precursor can be or include an olefin or an alkyne, such as acetylene, ethylene, propylene, or any other carbon-containing material. Precursors may include carbon and hydrogen containing precursors that may include any amount of carbon bonding and hydrogen bonding, as well as any other element bonding, although in some embodiments, the carbon containing precursor may consist of carbon-carbon bonding and carbon-hydrogen bonding. Oxygen containing precursors used throughout any of the operations described in the present technology may include diatomic oxygen, nitrous oxide, nitrogen dioxide, ozone, and any other oxygen containing precursors that may be used for silicon oxide film formation, although in some embodiments, the oxygen containing precursor may not include hydroxyl moieties. Using an oxygen containing precursor that may include reduced oxygen incorporation, such as a precursor that includes single bonded oxygen, as a non-limiting example, including nitrous oxide, may result in more controlled reaction rates and oxygen incorporation, which may facilitate additional tuning of carbon incorporation within the film to produce film properties for various applications.

[0037] A number of factors may affect the concentration of silicon, oxygen, and carbon within the film. For example, in some embodiments, the resulting film may be limited to or substantially composed of silicon, oxygen, carbon, and hydrogen, as well as any trace materials, which may be contaminants, for example. In some embodiments, the silicon concentration within the film may be maintained at less than or about 50 atomic %, which may help limit the leakage current of the resulting film, as a more silicon-rich film may be characterized by a higher leakage. Thus, in some embodiments, the resulting material before or after annealing may be characterized by a silicon concentration of less than or about 48%, and the silicon concentration may be maintained at less than or about 45 atomic %, less than or about 40 atomic %, less than or about 38 atomic %, less than or about 36 atomic %, less than or about 34 atomic %, less than or about 32 atomic %, less than or about 30 atomic %, less than or about 28 atomic %, less than or about 26 atomic %, less than or about 24 atomic %, less than or about 22 atomic %, less than or about 20 atomic %, or lower.

[0038] The oxygen concentration within the film can be maintained at less than or about 60%, which can indicate the amount of silicon and carbon remaining in the film after annealing, wherein lower oxygen content can indicate that more silicon and carbon may be retained. Thus, in some embodiments, the material produced before or after annealing as discussed below can be characterized by an oxygen concentration greater than or about 5 atomic %, and the oxygen concentration can be greater than or about 10 atomic %, greater than or about 15 atomic %, greater than or about 20 atomic %, greater than or about 25 atomic %, greater than or about 30 atomic %, greater than or about 35 atomic %, greater than or about 40 atomic %, greater than or about 45 atomic %, greater than or about 50 atomic %, or more.

[0039] As will be discussed below, the present technology is capable of tuning carbon incorporation within the film based on flow rate. In embodiments of the present technology, the resulting film may be characterized by a carbon concentration of less than or about 30 atomic % within the resulting material before or after annealing as discussed below, and the carbon concentration may be maintained at less than or about 28 atomic %, less than or about 26 atomic %, less than or about 24 atomic %, less than or about 22 atomic %, less than or about 20 atomic %, less than or about 18 atomic %, less than or about 16 atomic %, less than or about 14 atomic %, less than or about 12 atomic %, less than or about 10 atomic %, or less. For example, the thermal reaction may be based on the dissociation of a silicon-containing precursor, and the radical effluent of the silicon-containing precursor may promote the dissociation of the carbon-containing precursor. However, the formation of silicon-silicon bonds may compete with the formation of silicon-carbon bonds, and thus the carbon incorporation may be limited to a threshold of about 30 atomic % or less, depending on the carbon-containing precursor. In addition, a carbon-containing precursor including a carbon-carbon triple bond can dissociate more easily than a carbon-containing precursor including only one or more carbon-carbon double bonds. Thus, increasing the flow rate of a carbon-containing precursor including one or more double bonds can be limited to produce less than or about 25 atomic % carbon incorporation, while increasing the flow rate of a carbon-containing precursor including one or more triple bonds can provide a threshold of up to less than or about 30 atomic % carbon incorporation.

[0040] However, the present technology can further increase the carbon concentration in the produced film by discontinuously providing oxygen-containing precursors. That is, in some embodiments, method 200 may include circulating oxygen-containing precursors while maintaining the delivery of silicon-containing precursors and carbon-containing precursors. This can increase the amount of carbon radicals that can be used for deposition relative to oxygen radicals, and compared with conventional techniques, this can allow higher carbon concentrations. Therefore, in some embodiments, oxygen-containing precursors can be cyclically opened and closed in equal or unequal time periods. The time period for opening and closing the oxygen-containing precursor cycle can be greater than or about 0.5 seconds, and the time period can be greater than or about 1 second, greater than or about 3 seconds, greater than or about 5 seconds, greater than or about 7 seconds, greater than or about 9 seconds, or longer. In some embodiments, the time period for providing oxygen-containing precursors can be between about 0.5 seconds and about 10 seconds.

[0041] Hydrogen incorporation in the film may affect one or more material properties, as well as the quality of the resulting film. Although the carbon-containing precursor and / or the silicon-containing precursor may include hydrogen, in some embodiments no additional source of hydrogen may be provided. Although an inert precursor or carrier gas may be provided with the silicon-containing precursor and the carbon-containing precursor, in some embodiments other chemically reactive precursors may not be delivered with the precursors. By limiting the hydrogen provided to the chamber to that included in the carbon-containing precursor and the silicon-containing precursor, the atomic ratio of hydrogen in the resulting film may be lower than when additional hydrogen is provided.

[0042] In order to produce a film characterized by a low dielectric constant while maintaining adequate leakage and breakdown performance, the present technology can deliver precursors to control atomic incorporation and promote bonding between silicon and carbon, which can improve film quality and performance. In many processing operations, silicon can easily bond to itself and form within the film. At higher flow rates, more carbon-hydrogen bonds may be retained, or carbon may bond around oxygen, which may then be more easily outgassed from the film. Therefore, the flow rates of the silicon-containing precursor and the carbon-containing precursor can be kept low to ensure that bonding between carbon and silicon can be increased. Therefore, the flow rate of the silicon-containing precursor can be kept low to ensure increased incorporation of carbon material. For example, in some embodiments, the flow rate of the silicon-containing precursor can be maintained at less than or about 100 sccm, and the flow rate can be maintained at less than or about 75 sccm, less than or about 50 sccm, less than or about 25 sccm, less than or about 20 sccm, less than or about 515 sccm, less than or about 10 sccm, less than or about 9 sccm, less than or about 8 sccm, less than or about 7 sccm, less than or about 6 sccm, less than or about 5 sccm, or less. By maintaining a sufficiently low flow rate of the silicon-containing precursor, silicon incorporation can be controlled while allowing silicon radicals to promote the dissociation of the carbon material.

[0043] By keeping the flow rate of the carbon-containing precursor low enough, improved carbon-silicon bonding can occur, which can limit shrinkage and outgassing during subsequent annealing processes. For example, when the carbon-containing precursor flow rate is increased to above 50 sccm or more, increased dangling bonds can be incorporated into the film, and annealing the film can further reduce the incorporation of carbon and hydrogen, which can make the dielectric constant even higher. Therefore, by maintaining a lower flow rate of the carbon-containing precursor, the dielectric constant can be further reduced. This also helps to maintain a higher breakdown voltage of the resulting film. Therefore, in some embodiments of the present technology, the flow rate of the carbon-containing precursor can be maintained at less than or about 100 sccm, and the flow rate can be maintained at less than or about 90 sccm, less than or about 80 sccm, less than or about 70 sccm, less than or about 60 sccm, less than or about 50 sccm, less than or about 40 sccm, less than or about 30 sccm, greater than or about 25 sccm, less than or about 24 sccm, less than or about 23 sccm, less than or about 22 sccm, less than or about 21 sccm, less than or about 20 sccm, less than or about 19 sccm, less than or about 18 sccm or less.

[0044] Providing the precursors in a certain ratio relative to each other can also facilitate control over film formation to produce the above-mentioned properties and characteristics. For example, in some embodiments, the flow rate of the carbon-containing precursor can be maintained higher than the silicon-containing precursor, which can help increase carbon incorporation into the film. Therefore, in some embodiments, the flow rate ratio of the carbon-containing precursor to the silicon-containing precursor can be maintained at greater than or about 1:1, and the flow rate ratio can be maintained at greater than or about 2:1, greater than or about 4:1, greater than or about 5:1, greater than or about 6:1, or higher.

[0045] Although the resulting material may be affected by annealing, the present technology can produce films characterized by lower dielectric constants before or after annealing, and can produce materials characterized by dielectric constants of less than or about 4.20, and the material can be characterized by dielectric constants of less than or about 4.15, less than or about 4.10, less than or about 4.10, less than or about 4.05, less than or about 4.00, less than or about 3.95, less than or about 3.90, less than or about 3.85, less than or about 3.80, or less. In addition, materials produced according to embodiments of the present technology can have a dielectric constant increased by less than or about 1.5 after annealing as described above, and can have a dielectric constant increased by less than or about 1.4, less than or about 1.3, less than or about 1.2, less than or about 1.1, less than or about 1.0, less than or about 0.9, less than or about 0.8, less than or about 0.7, less than or about 0.6, or the dielectric constant can remain substantially or essentially the same after annealing. During annealing, in some embodiments, increased bonding between silicon and carbon in the film can increase the dielectric constant. This increase can be caused by outgassing of residual hydrogen in the film and / or bonding of excess silicon or carbon in the film during annealing.

[0046] Leakage current and dielectric breakdown can be affected by the concentration of atoms in the produced material. However, by producing materials according to embodiments of the present technology, leakage current can be kept to less than or about 5.0E-8A / cm at 2MV / cm. 2 and can be maintained at less than or about 4.0E-8A / cm 2 , less than or about 3.0E-8A / cm 2 , less than or about 2.8E-8A / cm 2 , less than or about 2.6E-8A / cm 2 , less than or about 2.4E-8A / cm 2 , less than or about 2.2E-8A / cm 2 , less than or about 2.0E-8A / cm 2 , less than or about 1.8E-8A / cm 2 , less than or about 1.6E-8A / cm 2 , less than or about 1.4E-8A / cm 2 , less than or about 1.2E-8A / cm 2 , less than or about 1.0E-8A / cm 2 Or less. In addition, at 0.001A / cm 2At this level, the breakdown voltage of the film can be maintained at greater than or about 6.0 MV / cm, and can be maintained at greater than or about 6.5 MV / cm, greater than or about 7.0 MV / cm, greater than or about 7.5 MV / cm, greater than or about 8.0 MV / cm, greater than or about 8.5 MV / cm, greater than or about 9.0 MV / cm, greater than or about 9.5 MV / cm, greater than or about 10.0 MV / cm, greater than or about 10.5 MV / cm, greater than or about 11.0 MV / cm, or more.

[0047] The silicon and carbon materials produced by the present technology can be used in multiple structures and can be, for example, masks, liners, or spacers, which can be maintained in the formed structure and exposed to multiple subsequent processing operations. In some embodiments, the silicon and carbon materials are included as materials used in integration, and the silicon and carbon materials can be maintained or removed after performing subsequent processing, which can include annealing at downstream processes, which can exceed a temperature of 700°C and can be performed at a temperature greater than or about 750°C, greater than or about 800°C, greater than or about 850°C, or higher. Due to the improved film bonding and growth produced by some embodiments of the present technology, low dielectric materials can be less damaged by annealing processes, thereby providing additional integration operations for low dielectric constant materials. For example, during the formation of many carbon oxygen silicon films, carbon can be formed around oxygen, which can increase the loss of carbon and hydrogen in annealing. By performing deposition according to embodiments of the present technology, in which improved silicon-carbon bonding can be performed, carbon can be better retained during annealing and subsequent processing. For example, in many applications where the material may be used as a low-k spacer, as will be discussed further below, subsequent processing and layer formation may expose the film to photoresist or organic layer ashing, material etching and cleaning, or other processes that may damage the film that is not structurally sound. For example, the material produced by the present technology can be exposed to ashing with oxygen-containing and / or hydrogen-containing materials, and etching with halogen-containing materials. By maintaining sufficient oxygen in the structure, the material can better resist ashing, and by having sufficient carbon incorporation, the material can better resist etching processes.

[0048] The silicon, oxygen and carbon concentrations within the film can be tuned depending on the desired ashing and etching survival rates. As previously discussed, the film can be subjected to subsequent processing, including but not limited to ashing and etching operations at optional operation 225. Films with lower carbon concentrations may tend to have better survival rates for ashing operations, while films with higher carbon concentrations may tend to have lower survival rates for ashing operations. On the contrary, films with lower carbon concentrations may tend to have lower survival rates for etching operations, and films with higher carbon concentrations may tend to have higher survival rates for ashing operations. In addition, the type of silicon and carbon bonding in the film may also affect the survival rate. For example, relative to films with Si-C bonds, Si-CH3 bonds or CC bonds, films with Si-C-Si bonds may be the most stable for ashing operations, which may be due to the reduction in the amount of hydrogen in the film. Different forms of bonding can be controlled by modifying precursors and flows. For example, excessive carbon incorporation in the film can add unstable carbon to the film by a carbon-containing precursor or the flow of the precursor. Depending on the integration operation, it may be desirable to tune the carbon concentration and / or bonding type in the film depending on the ashing and etching operations after depositing the film of the present technology. In embodiments with increased etching operations relative to the ashing operations, it may be desirable to increase the carbon concentration in the film. Conversely, in embodiments with increased ashing operations relative to the etching operations, it may be desirable to reduce the carbon concentration in the film.

[0049] As previously explained, in some embodiments, thermal-based material formation can provide a more corrective film that can be used as a liner, spacer, or other material used during semiconductor processing. Although the remaining figures will discuss a gate-all-around ("GAA") structure, including films produced by the present technology, the present material can be used in any number of structures. For example, in some embodiments, the film can be used in memory applications, such as DRAM, and as a non-limiting example, the material can be incorporated around the structure as a spacer, such as for a bit line spacer. FIG. 3A to FIG. 3C An exemplary schematic cross-sectional structure is shown in which a material layer according to some embodiments of the present technology is included and produced. Figure 3A As shown, structure 300 may include substrate 305, which may be any number of materials, such as a base wafer or substrate 305 made of silicon or silicon-containing materials, other substrate 305 materials, and one or more materials that may be formed overlying substrate 305 during semiconductor processing. For example, in some embodiments, substrate 305 may be processed to include one or more materials or structures used for semiconductor processing. Substrate 305 may be or include a dielectric material, such as an oxide or nitride of any number of materials. Substrate 305 may be processed to form one or more material layers on substrate 305. As shown in FIG. Figure 3AAs shown, material layers can be deposited to begin forming a GAA transistor structure. In an embodiment, the substrate 305 may include one or more features, such as an alternating stack of silicon 310 and silicon germanium 315, but it should be understood that the materials may be reversed for different areas along the substrate or device structure. The silicon germanium 315 may be recessed inward compared to the silicon 310. In subsequent processing, the silicon 310 may be exposed to form source and drain regions on opposite sides of the gate. A gate or gate placeholder 320 may be disposed on top of the alternating stack of silicon 310 and silicon germanium 315. A silicon oxide material 325 may be disposed on both the bottom and top of the gate or gate placeholder 320. A liner material 330 may be disposed on the sides of the gate or gate placeholder 320. As shown Figure 3B As shown, in some embodiments of the present technology, a layer 335 containing silicon and carbon can be formed on the structure 300, such as around one or more alternating stacks of silicon 310 and silicon germanium 315. It should be understood that this example is not intended to be limiting, as the present technology can be used for any number of processing operations, and the material of the structure 300 can be any other material understood by those skilled in the art. The formation of the film can occur based on the methods or operations described above, which can provide a more corrective deposition and can advantageously accommodate gate structures having one or more recessed materials.

[0050] The silicon and carbon films produced by the present technique are characterized by coverage completely surrounding the structure as shown. For example, the thickness of the film along the sidewalls closer to the top of the structure and the thickness of the film along the sidewalls closer to the bottom of the structure can be substantially the same, wherein the produced film is substantially conformal. Thus, in some embodiments, the deposited film can be characterized by a conformality or similarity of thickness formed between any two regions being greater than or about 80%, including regions across the top of the feature, along the sidewalls, and / or at the bottom between the features and anywhere along the formed film. In some embodiments, the conformality can be greater than or about 85%, greater than or about 90%, greater than or about 92%, greater than or about 94%, greater than or about 96%, greater than or about 98%, or more. Thus, the present technique can produce silicon and carbon containing films characterized by low dielectric constants and increased carbon incorporation compared to conventionally formed films. As shown in FIG. Figure 3CAs shown, subsequent processing may recess the spacer material of the silicon and carbon containing layer 335 to the area recessed along the gate structure. Additional processing may be performed in the formation of the GAA transistor. This may include multiple processes that may expose the silicon and carbon containing layer 335 to an etchant material (such as may include fluorine or chlorine), including plasma dry etching, or wet etching, such as using diluted HF or HCl. In addition, the organic material may be ashed in one or more processing operations, thereby exposing the material to oxygen, nitrogen and / or hydrogen plasma effluents. The silicon and carbon containing material according to embodiments of the present technology may be substantially maintained during any of these operations, such as Figure 3C Greater than or about 50% of the materials shown. Silicon and carbon containing materials may provide improved survival rates compared to conventional films while also maintaining a relatively low dielectric constant and improved electrical properties.

[0051] In the above description, for the purpose of explanation, many details have been set forth in order to provide an understanding of various embodiments of the present technology. However, it will be apparent to those skilled in the art that certain embodiments may be practiced without some of these details or with additional details.

[0052] Several embodiments have been disclosed, and those skilled in the art will recognize that various modifications, alternative structures, and equivalents may be used without departing from the spirit of the embodiments. In addition, in order to avoid unnecessarily obscuring the present technology, many well-known processes and elements are not described. Therefore, the above description should not be construed as limiting the scope of the present technology.

[0053] Where a numerical range is provided, it is understood that, unless the context clearly specifies, each intermediate value between the upper and lower limits of this range, up to the smallest fraction of the lower limit unit, is also specifically disclosed. Any narrower range between any stated value or unstated intermediate value in the stated range and any other stated value or intermediate value in this stated range is covered. The upper and lower limits of these smaller ranges may be independently included or excluded in the range, and each range in which one, none, or both of the limits are included in the smaller range is also covered in the present technology, subject to any specifically excluded limits in the stated range. If the stated range includes one or both of the limits, the range excluding any one or both of these included limits is also included.

[0054] As used herein and in the appended claims, the singular forms "a," "an," and "the" include plural references unless the context clearly dictates otherwise. Thus, for example, reference to "a precursor" includes a plurality of such precursors and reference to "the layer" includes reference to one or more layers and equivalents thereof known to those skilled in the art, and so forth.

[0055] Furthermore, when used in this specification and the appended claims, the words “comprise / comprising,” “contain / containing,” and “include / including” are intended to specify the presence of stated features, integers, components, or operations, but they do not preclude the presence or addition of one or more other features, integers, components, operations, actions, or groups.

Claims

1. A semiconductor processing method, comprising: providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber, wherein the carbon-containing precursor is characterized by a carbon-carbon double bond or a carbon-carbon triple bond, and wherein a substrate is disposed within the processing region of the semiconductor processing chamber; providing an oxygen-containing precursor to the processing region of the semiconductor processing chamber; thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor at a temperature of less than or about 700° C.; as well as A layer comprising silicon and carbon is formed on the substrate.

2. The semiconductor processing method according to claim 1, wherein: The oxygen-containing precursor includes nitrous oxide.

3. The semiconductor processing method according to claim 1, wherein: Thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor is performed at a temperature of less than or about 575°C.

4. The semiconductor processing method according to claim 1, wherein: The pressure within the semiconductor processing chamber is maintained at greater than or about 3 Torr while the silicon-and-carbon containing layer is formed.

5. The semiconductor processing method according to claim 1, wherein: The processing region of the semiconductor processing chamber remains plasma-free while the silicon-and-carbon-containing layer is formed on the substrate.

6. The semiconductor processing method according to claim 1, wherein: The carbon-containing precursor and the silicon-containing precursor are provided at a flow rate ratio of greater than or about 4:

1.

7. The semiconductor processing method according to claim 1, wherein: The substrate is characterized by one or more features, and wherein the layer comprising silicon and carbon is formed around the one or more features with a conformality of greater than or about 80%.

8. The semiconductor processing method of claim 1, wherein: The silicon and carbon containing layer is characterized by a carbon concentration of less than or about 30 atomic %.

9. The semiconductor processing method of claim 1, further comprising: The oxygen-containing precursor is circulated and supplied while the silicon-containing precursor and the carbon-containing precursor are kept supplied.

10. The semiconductor processing method according to claim 9, wherein: The oxygen-containing precursor is provided for a period of time between about 0.5 s and about 10 s.

11. The semiconductor processing method of claim 1, wherein: The silicon and carbon containing layer at least partially surrounds one or more alternating stacks of silicon and silicon germanium.

12. A semiconductor processing method comprising: providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber, wherein the carbon-containing precursor is provided at a flow rate ratio of greater than or about 4:1 to the silicon-containing precursor, and wherein a substrate is disposed within the processing region of the semiconductor processing chamber; providing an oxygen-containing precursor to the processing region of the semiconductor processing chamber; thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor at a temperature of less than or about 650° C.; and A layer comprising silicon and carbon is formed on the substrate.

13. The semiconductor processing method of claim 12, wherein: The oxygen-containing precursor includes nitrous oxide.

14. The semiconductor processing method of claim 12, wherein: During the semiconductor processing method, the processing region of the semiconductor processing chamber is maintained plasma-free.

15. The semiconductor processing method of claim 12, further comprising: The oxygen-containing precursor is circulated while the silicon-containing precursor and the carbon-containing precursor are kept being supplied, wherein the oxygen-containing precursor is provided for a time period between about 0.5 s and about 10 s.

16. A semiconductor processing method comprising: providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber, wherein the silicon-containing precursor comprises disilane, wherein the carbon-containing precursor is characterized by a carbon-carbon double bond or a carbon-carbon triple bond, and wherein a substrate is disposed within the processing region of the semiconductor processing chamber, and wherein one or more alternating stacks of silicon and silicon germanium are disposed on the substrate; providing an oxygen-containing precursor to the processing region of the semiconductor processing chamber, wherein the oxygen-containing precursor comprises nitrous oxide, and wherein the oxygen-containing precursor is provided discontinuously; thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the oxygen-containing precursor at a temperature of less than or about 600° C.; as well as A layer comprising silicon and carbon is formed on the substrate, wherein the layer comprising silicon and carbon is formed at least partially around the one or more alternating stacks of silicon and silicon germanium.

17. The semiconductor processing method of claim 16, wherein: During the semiconductor processing method, the processing region of the semiconductor processing chamber is maintained plasma-free.

18. The semiconductor processing method of claim 16, wherein: The silicon and carbon containing layer is formed around the one or more features with greater than or about 85% conformality.

19. The semiconductor processing method of claim 16, wherein: The silicon and carbon containing layer is characterized by a carbon concentration of less than or about 30 atomic %.

20. The semiconductor processing method of claim 16, further comprising: The silicon-and-carbon-containing layer is exposed to an oxygen-containing plasma, a hydrogen-containing plasma, or a wet etching process, wherein the silicon-and-carbon-containing layer retains at least 50% of its thickness.

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