Subspace derivative-free optimization method for parallel Bayesian and Gaussian model enhancement

Abstract

The invention belongs to the field of integrated circuit computer aided design / electronic design automation, relates to a parallel Bayesian and Gaussian model enhanced subspace derivative-free optimization method, belongs to a heuristic global optimization algorithm, and is suitable for solving the problem of high-dimensional constrained analog circuit optimization. According to the method, total space exploration is carried out by using a multi-mode and weight expectation promotion function, preferential development is carried out on a current region by using a region acquisition function, and efficient local development is carried out by using a Gaussian process model enhanced subspace non-derivative optimization method. The method provided by the invention has relatively high simulation efficiency and operation time efficiency for high-dimensional design parameter optimization of the analog integrated circuit.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuit computer aided design / electronic design automation (CAD / EDA), and relates to a subspace derivative-free optimization method enhanced by parallel Bayesian and Gaussian models, and specifically to an efficient optimization method combining subspace derivative-free optimization (Subspace Derivative-Free Optimization) and Bayesian optimization (Bayesian Optimization) for simulating integrated circuit high-dimensional design parameter optimization problems. Background Art

[0002] As the process of integrated circuits is further reduced, the complexity of circuit design continues to rise. Due to the lack of automated optimization methods for analog circuits, the design time bottleneck of integrated circuits is mainly in the analog circuit part. Specifically, analog circuits are currently facing the following important problems. First, the performance indicators of analog circuits are not unified and the trade-offs between them are very complex. The relationship between each performance indicator function and the variable is extremely nonlinear and non-smooth. Analog circuits are often accompanied by extremely long simulation times. Under new process nodes and topological structures, a large number of parameters need to be optimized, which becomes a high-dimensional nonlinear optimization problem.

[0003] At present, there have been many studies on analog circuit optimization in non-high-dimensional design space, such as methods based on precise models such as support vector machine (SVM) [1] and artificial neural network (ANN) [2], random particle swarm optimization [3] and online model-based Bayesian optimization [4]. However, research practice shows that the above methods are not suitable for high-dimensional design variable circuit optimization problems. When the number of circuit optimization parameters exceeds 50, it is difficult for the above methods to provide high-quality designs within an acceptable time frame.

[0004] Research has shown that for high-dimensional optimization problems, the trust-region-based local Bayesian method (Trust-region Bayesian Optimization, TuRBO) [5] has made contributions in the field of analog circuit optimization. However, TuRBO's global exploration capability is limited by the trust region mechanism, and its local development capability is limited by Bayesian optimization. It still has significant limitations in high-dimensional optimization problems.

[0005] The subspace technology proposed by Yuan [6] and the subsequent derivative-free subspace optimization method NEWUOAs [7] provide new solutions to high-dimensional local optimization problems. However, the NEWUOAs method based on O(d) simulation points for derivation is not suitable for analog circuit optimization problems with extremely high simulation costs. Moreover, these subspace technologies are all methods for local optimization design. In circuit optimization problems, it is very easy to fall into local optimality and fail to provide satisfactory designs.

[0006] Based on the current status of the prior art, the inventors of this application intend to address the problems of low optimization efficiency and poor optimization quality in the high-dimensional design parameter optimization method of analog integrated circuits, and provide a method that uses Bayesian optimization as a global optimization strategy, subspace derivative-free optimization as a local optimization strategy, and uses a Gaussian process model to screen and derive the areas near the current best simulation points, thereby improving the optimization efficiency and optimization quality of the algorithm. The method proposed by the present invention will help solve the problem of large-scale analog circuit design with a high number of variables.

[0007] References:

[0008] [1]A.Ciccazzo, GDPillo, and V.Latorre, "A svm surrogate modelbasedmethod for parametric yield optimization," IEEE Transactions on Computer-AidedDesign ofIntegrated Circuits and Systems, vol.35, no.7, pp.1–1, 2016.J.Phillipsand J.White, "A Precorrected-FFT Method For Capacitance Extraction ofComplicated 3-D Structures," in Proc. IEEE / ACM Int. Conf. Computer-Aided Design, Nov. 1994, pp. 268–271.

[0009] [2]Y.Li,Y.Wang,Y.Li,R.Zhou,and Z.Lin,“An artificial neural networkassisted optimization system for analog design space exploration,”IEEETransactions on Computer-Aided Design ofIntegrated Circuits and Systems,vol.39,no.10,pp.2640–2653,2020.W.Shi,J.Liu,N.Kakani,and T.Yu,“A fasthierarchical algorithm for three-dimensional capacitance extraction,”IEEETrans.Comput.-Aided Des.Inter.Circuits Syst.,vol.21,no.3,pp.330–336,Mar.2002.

[0010] [3]R.A.Vural and T.Yildirim,“Analog circuit sizing viaswarmintelligence,”AEUE-InternationalJournal ofElectronics andCommunications,vol.66,no.9,pp.732–740,2012

[0011] [4]W.Lyu,P.Xue,F.Yang,C.Yan,Z.Hong,X.Zeng,and D.Zhou,“An efficientbayesian optimization approach for automated optimization ofanalog circuits,”IEEE Transactions on Circuits and Systems I:RegularPapers,vol.65,no.6,pp.1954–1967,2017.

[0012] [5] K. Touloupas, N. Chouridis, and PPSotiriadis, "Local Bayesian optimization for analog circuit sizing," in 202158th ACM / IEEE DesignAutomation Conference (DAC). IEEE, 2021, pp.1237–1242

[0013] [6] Y. -

[0014] [7]Z.Zaikun, "On derivative-free optimization methods (in chinese)," Ph.D.dissertation, Chinese Academy of Sciences, Beijing, CN, 2012. [Online].Available: https: / / www.zhangzk.net / docs / publications / thesis.pdf Summary of the invention

[0015] The purpose of the present invention is to provide a subspace derivative-free optimization method enhanced by a parallel Bayesian and Gaussian model based on the current status of the prior art, aiming at the problems of high-dimensional design parameter optimization of analog integrated circuits, such as low optimization efficiency and poor optimization quality.

[0016] Specifically, the present invention provides a subspace derivative-free optimization method enhanced by a parallel Bayesian and Gaussian process model for analog integrated circuit optimization, the process of which is as follows: Figure 1 as shown.

[0017] More specifically, this method uses the parallel Bayesian method as the global optimization strategy, and utilizes the methods of random sampling and multimodal recognition to extract the approximate locations of multiple peaks of the weighted expected lift acquisition function. The BFGS method is then used to optimize the acquisition function of the multimodal center, and multiple peaks of the weighted expected lift acquisition function are obtained as candidate points for simulation to avoid falling into local optimality.

[0018] In the present invention, each time the global strategy is optimized, the method uses the global Gaussian model to screen the areas near the current best simulation points, randomly samples points with the Gaussian model in the areas near the simulation points, and uses the Monte Carlo method to obtain the weight expectation improvement function of all points inside this area as the judgment criterion, and takes the area with the highest regional weight expectation improvement as the advantage area for further operation.

[0019] In the present invention, in the advantageous region, if the circuit performance constraints of the advantageous region have been met, then the method will use the subspace derivative-free optimization method for efficient local optimization. The method will use the iteration direction of the previous subspace optimization of the region and the imprecise derivative direction of this time as the basis vector, and use the trust region derivative-free optimization method to optimize in the 2D subspace spanned by the basis vector. The imprecise derivative method is sampled on the Gaussian process model, and each iteration direction of the subspace optimization will be recorded for the next subspace optimization of the region.

[0020] In the present invention, for a dominant region with 10% unsatisfied circuit performance constraints, this method will perform global-like parallel Bayesian optimization in this region, hoping to find a design point that meets the constraints nearby; for other dominant regions with larger performance constraint violations, this method directly skips the local strategy and directly performs the next round of global optimization.

[0021] The method proposed in the present invention is applicable to general high-dimensional design parameter optimization problems of single-objective analog integrated circuits with constraints; it includes:

[0022] The following definition:

[0023]

[0024] stg i (x)≤0,

[0025] i=1,...,N c

[0026] Input parameters: circuit optimization target performance f, circuit constraint performance Optimization range S, number of parallel operations b, radius of the dominant region r, number of initial points N init , the total number of simulations N max ;

[0027] Output result: Optimize the optimal design point x * .

[0028] Step 1: Use Sobol to randomly sample points within the optimization range S and simulate to obtain the initial data set Establish a global Gaussian model;

[0029] Step 2: Use the parallel Bayesian method to optimize the weighted expected improvement function globally to obtain the b highest peaks as the optimization points Simulate these points and update the Gaussian model;

[0030] Step 3: Using the Gaussian model, establish a region with a radius of r near the current optimal five points, and use the region acquisition function to obtain the dominant region Ω * ;

[0031] Step 4: If Ω * There are points in the region that satisfy the constraints, and the subspace derivative-free optimization of Gaussian model enhancement is performed; if Ω * The constraint violation is ≤ 10% in Ω * Perform parallel Bayesian optimization within; otherwise skip step 4;

[0032] Step 5: Update the Gaussian model and return to step 2 until the number of simulations reaches N max Stop the loop.

[0033] More specifically,

[0034] In the present invention, the Gaussian process model trained in steps 1, 3, and 5 predicts the mean value of the circuit optimization target performance at any point x. and standard deviation and the mean of the circuit constraint performance and standard deviation i=1,...,N c Taking the optimization target f as an example, the formulas for the mean and variance can be written as follows:

[0035]

[0036]

[0037] where k x The elements of Kernel(x, x i ), the elements of K are determined by Kernel(x i , x j ) decides, x i , x j ∈D. Kernel function adopts Matern-5 / 2 function form.

[0038] In step 3, the radius r should be chosen to be within 20% of the entire design space if the design space S has been normalized to [0, 1] d , then 0.2 is a reasonable value for r. Specific circuits may have better specific values, but 0.2 is a more general and stable value.

[0039] In step 2 of the method of the present invention, the following sub-steps are used to obtain the Bayesian optimization point, such as Figure 2 As shown:

[0040] Step 2.1: In the full design range S, use random sampling to obtain a batch of points X sample The global Gaussian model is used to estimate their weighted expected improvement function, as follows. The number of sampling points defaults to the dimension d of the problem times 10:

[0041] α wEI (x) = α EI (x)·α PF (x),

[0042]

[0043]

[0044] Step 2.2: Use the multimodal identification method to identify the multimodal population of the weighted expected boost function:

[0045] Step 2.3: Use the BFGS method to optimize the geometric centers of the b optimal populations and obtain the peaks of the b different weighted expected lift functions as Bayesian optimization points.

[0046] More specifically, judging whether two points belong to the same mode in step 2.2 is achieved through the following sub-steps.

[0047] Input parameters: Get function α wEI , sampling point X sample ;

[0048] Output result: population list P of different modes.

[0049] Step 2.2.1: Initialize the population list Unclassified point list X = X sample ;

[0050] Step 2.2.2: Select a point x0∈X from the unclassified point list to initialize a new population p=[x0].

[0051] Step 2.2.3: Traverse other unclassified points x′∈X\p; the geometric center of the new population is x p , take the center and three equally divided points of x′ if α wEI (x i )<min(α wEI (x p ), α wEI (x′)) skip point x′, otherwise p←p+x′;

[0052] Step 2.2.4: Update the population list p←p+p, update the unclassified point X←X\p;

[0053] Step 2.2.5: Go back to step 2.2.2 until End the loop;

[0054] Step 2.2.6: Arrange the populations in the population list P from large to small according to the weighted expected lift function of the geometric center of each population.

[0055] In step 3 of the method of the present invention, the following sub-steps are used to screen some current areas.

[0056] Step 3.1: Create a region Ω(x i , r), i = 1..5

[0057] Ω(x i ,r)={x|x∈S,||xx i || ∞ ≤r}

[0058] Step 3.2: Evaluate the expected improvement of regional weight for each region, and select the region with the highest expected improvement as the optimal region Ω * ;

[0059] Step 3.3: Judge the simulation points in the optimal area. If they meet the constraints, they are the optimal area that meets the constraints; if the constraint violation is less than 10%, they are the area that is close to meeting the constraints; otherwise, they are the area that violates the constraints.

[0060] More specifically, in step 3.2, the expected improvement function value of a region is obtained by the following method: Figure 3 shown.

[0061] Input parameters: Gaussian process model G, candidate region Ω, Monte Carlo number N s ;

[0062] Output result: expected improvement function value of regional weight

[0063] Step 3.2.1: Initialization

[0064] Step 3.2.2: Randomly sample a batch of points X in the candidate area Ω cand ;

[0065] Step 3.2.3: Model X on the Gaussian process model cand The target performance value is N sThe regional expected lift function is calculated using the following formula

[0066]

[0067] Step 3.2.4: Apply Gaussian model to X cand The constraint compliance probability of the point is calculated and the average is taken as the regional constraint compliance probability

[0068]

[0069]

[0070] Step 3.2.5: Calculate the expected improvement function of regional weights

[0071]

[0072] In step 4, the optimization for the region close to the constraint is similar to step 2, except that the optimization range is changed from the entire space S to the advantage region Ω * , so I will not repeat it here. For the dominant region that meets the constraints, this method uses the following sub-steps to develop the high-dimensional space.

[0073] Input parameters: optimization target performance f, Gaussian model G, center of dominant region x0, direction of last subspace iteration s;

[0074] Output results: Subspace optimization results Subspace iteration direction s.

[0075] Step 4.1: Initialization, if there is no s, then s = 0;

[0076] Step 4.2: Compute the distribution of inexact derivatives on the Gaussian model

[0077]

[0078]

[0079]

[0080] in The superscript represents the chain derivative of the original vector and matrix with respect to x.

[0081] Step 4.3: Establish subspace The subspace iteration direction is obtained by optimizing the real circuit using the trust region derivative-free optimization method.

[0082]

[0083] Step 4.4: Update region center and iteration direction

[0084]

[0085]

[0086] The present invention provides a subspace derivative-free optimization method enhanced by parallel Bayesian and Gaussian models. The method uses Bayesian optimization as a global optimization strategy, subspace derivative-free optimization as a local optimization strategy, and uses a Gaussian process model to screen and derive the area near the current best simulation points, thereby improving the optimization efficiency and optimization quality of the algorithm. The method proposed by the present invention will help solve the problem of large-scale analog circuit design with a high number of variables, and has strong simulation efficiency and running time efficiency for the optimization of high-dimensional design parameters of analog integrated circuits.

[0087] The advantages of the method of the present invention are:

[0088] (1) The exploration of the global space is more efficient. By using the weighted expectation improvement and multimodal recognition methods, the diversity and efficiency of parallel simulation points can be improved, and the ability of global exploration is not limited by the trust region.

[0089] (2) Through the region acquisition function, the algorithm can be pulled back from global exploration to regional development, avoiding wasting too many simulation resources in global exploration;

[0090] (3) The subspace derivative-free optimization method has high scalability for high-dimensional local optimization problems. In 2D space, the cost of derivative-free optimization is extremely low, and the model accuracy is much higher than that of high-dimensional models. This method uses the Gaussian process model to overcome the problem that the subspace derivative-free optimization requires a large number of simulation points, further improving the efficiency of simulation resource utilization. BRIEF DESCRIPTION OF THE DRAWINGS

[0091] Figure 1 .Flowchart of this method.

[0092] Figure 2 . Schematic diagram of the global Bayesian method.

[0093] Figure 3 . Schematic diagram of regional expectation improvement function.

[0094] Figure 4 .Schematic diagram of an AC-coupled sense amplifier. DETAILED DESCRIPTION

[0095] The method of the present invention is described below through the implementation process of a specific example.

[0096] Implementation Example 1

[0097] This method compares the internationally advanced trust region Bayesian optimization method TuRBO, the adaptive covariance matrix evolution algorithm CMA-ES, and the asynchronous parallel Bayesian optimization method EasyBO. All methods use a parallel simulation strategy with a parallelism of 10, where TuRBO-1 represents the TuRBO method with 1 trust region, and TuRBO-5 represents the TuRBO method with 5 trust regions. In order to compare different methods, the experiment was repeated 10 times, and when the optimization method finds a design that meets the constraints, it is a successful experiment.

[0098] Here is an optimization problem for an AC-coupled sense amplifier with a circuit topology such as Figure 4 As shown, there are 62 dimensions of optimization parameters, including the width, length, resistance value, etc. of the transistor, and the requirements of transistor symmetry and matching have been taken into consideration. The optimization problem is as follows:

[0099] Minimize power consumption

[0100] Constraints: Gain>19.5dB, Gain-Bandwidth Product>500kHz, Input-Related Noise Voltage<2.2uV

[0101] It can be seen that in order to achieve similar power consumption values, the simulation times efficiency of this method is 5.56 times higher than that of TuRBO-5, and the running time efficiency is 3.49 times higher; compared with CMA-ES, the simulation times efficiency is 6.61 times higher, and the running time efficiency is 4.14 times higher.

[0102] Table 1: Optimization results of different methods

[0103] method Power consumption (uW) Simulation times Run time Number of successes This method 10.09 360 27.4h 10 / 10 TuRBO-1 10.44 2000 96.8h 10 / 10 TuRBO-5 10.32 2000 95.7h 10 / 10 CMA-ES 10.37 2381 113.5h 10 / 10 EasyBO 16.05 4000 174.6h 6 / 10

Claims

1. A parallel Bayesian and Gaussian model-enhanced subspace derivative-free optimization method, characterized in that: The method described herein performs Bayesian global optimization based on multimodal recognition in global space; uses a region acquisition function to select the most advantageous region for development; and performs a Gaussian process enhanced subspace derivative-free optimization method for the most advantageous region that meets the constraints; Includes steps: Input parameters: circuit optimization target performance f, circuit constraint performance Optimization range S, number of parallel operations b, radius of the dominant region r, number of initial points N init , the total number of simulations N max ; Output Result: Optimize the optimal design point x * ; Step 1: Use Sobol to randomly sample points within the optimization range S and simulate to obtain the initial data set Establish a global Gaussian model; Step 2: Use the parallel Bayesian method to optimize the weighted expected improvement function globally to obtain the b highest peaks as the optimization points Simulating the optimization point and updating the Gaussian model; Step 3: Using the Gaussian model, establish a region with a radius of r near the current optimal five points, and use the region acquisition function to obtain the dominant region Ω * ; Step 4: If Ω * There are points in the region that satisfy the constraints, and the subspace derivative-free optimization of Gaussian model enhancement is performed; if Ω * The constraint violation is ≤ 10% in Ω * Perform parallel Bayesian optimization within; otherwise skip step 4; Step 5: Update the Gaussian model and return to step 2 until the number of simulations reaches N max Stop the loop.

2. The method according to claim 1, characterized in that: In step 3, the radius r is selected within a range of about 20% of the entire design space, and different test cases have better values.

3. The method according to claim 1, characterized in that: In step 2, multimodal recognition and weighted expected improvement function are used to perform global Bayesian optimization, which includes the following sub-steps: Step 2.1: In the full design range S, use random sampling to obtain a batch of points X sample The global Gaussian model is used to estimate the expected weighted lift function. The formula is as follows. The number of sampling points defaults to the dimension d of the problem times 10: a wEI (x)=a EI (x)·a PF (x), Step 2.2: Use the multimodal identification method to identify the multimodal population of the weighted expected boost function. The steps are as follows: Input parameters: Get function α wEI , sampling point X sample ; Output result: population list P of different modes; Step 2.2.1: Initialize the population list Unclassified point list X = X sample ; Step 2.2.2: Select a point x0∈X from the unclassified point list to initialize a new population p=[x0]; Step 2.2.3: Traverse other unclassified points x′∈X\p; the geometric center of the new population is x p , take the center and three equally divided points of x′ if Skip point x′, otherwise p←p+x′; Step 2.2.4: Update the population list P←P+p, update the unclassified point X←X\p; Step 2.2.5: Go back to step 2.2.2 until End the loop; Step 2.2.6: Arrange the populations in the population list P from large to small according to the weighted expected lift function of the geometric center of each population; Step 2.3: Use the BFGS method to optimize the geometric centers of the b optimal populations and obtain the peaks of the b different weighted expected improvement functions as Bayesian optimization points.

4. The method according to claim 1, characterized in that: In the step 3, the region is screened using a global Gaussian model, which includes the following sub-steps: Step 3.1: Create a region Ω(x i , r), i = 1..5 Ω(x i ,r)={x|x∈S,||x-x i || ∞ ≤r} Step 3.2: Evaluate the expected improvement of regional weight for each region, and select the region with the highest expected improvement as the optimal region Ω * , its sub-steps are as follows, Input parameters: Gaussian process model G, candidate region Ω, Monte Carlo number N s ; Output result: expected improvement function value of regional weight Step 3.2.1: Initialization Step 3.2.2: Randomly sample a batch of points X in the candidate area Ω cand ; Step 3.2.3: Model X on the Gaussian process model cand The target performance value is N s The regional expected lift function is calculated using the following formula Step 3.2.4: Apply Gaussian model to X cand The constraint compliance probability of the point is calculated and the average is taken as the regional constraint compliance probability Step 3.2.5: Calculate the expected improvement function of regional weights Step 3.3: Judge the simulation points in the optimal area. If they meet the constraints, they are the optimal area that meets the constraints; if the constraint violation is less than 10%, they are the area close to meeting the constraints; otherwise, they are the area that violates the constraints.

5. The method according to claim 1, characterized in that: In step 4, the Gaussian model is used for derivation, and derivative-free optimization is performed after establishing a 2-dimensional subspace. The sub-steps are as follows: Input parameters: optimization target performance f, Gaussian model G, center of dominant region x0, direction of last subspace iteration s; Output results: Subspace optimization results Subspace iteration direction s; Step 4.1: Initialization, if there is no s, then s = 0; Step 4.2: Compute the distribution of inexact derivatives on the Gaussian model in The superscript represents the chain derivative of the original vector and matrix with respect to x; Step 4.3: Establish subspace The subspace iteration direction is obtained by optimizing the real circuit using the trust region derivative-free optimization method. Step 4.4: Update region center and iteration direction 6. The method according to claim 1, characterized in that: The method is used for constrained single-objective high-dimensional analog circuit parameter optimization.

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