Multi-channel frequency conversion microwave link measuring circuit, testing method and frequency conversion microwave link

Abstract

The invention is suitable for the technical field of microwave link measurement, and provides a multichannel frequency conversion microwave link measurement circuit and a test method. The input end of an up-conversion circuit is used for transmitting an intermediate frequency signal, and the output end of the up-conversion circuit is connected with one input end of a channel calibration circuit; the other input end of the channel calibration circuit serves as a test transmitting end, multiple output ends of the channel calibration circuit are connected with multiple input ends of the receiving selection circuit, and one output end of the channel calibration circuit is connected with one end of the transceiving power division selection circuit; a plurality of output ends of the receiving selection circuit are connected with a plurality of input ends of the down-conversion circuit; a plurality of output ends of the down-conversion circuit serve as an intermediate frequency signal receiving end; a plurality of ends of the transmitting-receiving power division selection circuit are connected with a plurality of ends of the radio frequency transmitting-receiving circuit; a plurality of ends of the radio frequency transceiving circuit are used as radio frequency transceiving ends; one end of the transmit-receive power division selection circuit is used as a test output receiving end. According to the method, a vector network analyzer without a frequency conversion function can be used for testing the relative gain and phase of a multi-channel transmitting and receiving frequency conversion microwave circuit.

Description

Technical Field

[0001] The present application belongs to the technical field of microwave link measurement, and in particular, relates to a multi-channel variable frequency microwave link measurement circuit and a test method. Background Art

[0002] Multi-channel transmission and multi-channel reception frequency conversion microwave circuits are widely used, mainly to achieve the up-conversion of intermediate frequency input signals through a single channel, and to divide the power into several RF channel outputs, and to down-convert several channel RF signals to intermediate frequency signals before output. The multi-transmission channel mainly consists of an up-conversion circuit, a transmission amplifier, and a multi-RF transceiver circuit.

[0003] Testing the indicators of frequency conversion microwave circuits usually requires testing the indicators of multiple transmission channels and multiple receiving channels separately for subsequent calibration. However, since the circuit contains a frequency conversion function, that is, it contains both intermediate frequency and radio frequency circuits, and the intermediate frequency signal and the radio frequency signal have different frequencies, they cannot be tested using an ordinary vector network analyzer. Instead, a vector network analyzer with a frequency conversion function must be used, which undoubtedly increases the testing cost. Summary of the invention

[0004] In order to overcome the problems existing in the related art, the embodiments of the present application provide a multi-channel variable frequency microwave link measurement circuit and test method, which can solve the problem that the relative gain and relative phase tests of multi-channel transmitting and multi-channel receiving variable frequency microwave circuits must be tested using a vector network analyzer with a frequency conversion function, and cannot be tested using a vector network analyzer without a frequency conversion function.

[0005] This application is implemented through the following technical solutions:

[0006] In a first aspect, an embodiment of the present application provides a multi-channel variable frequency microwave link measurement circuit, which is embedded in a working circuit of a variable frequency microwave link, and includes an up-conversion circuit, a channel calibration circuit, a receiving selection circuit, a down-conversion circuit, a transmitting and receiving power division selection circuit, and a radio frequency transmitting and receiving circuit;

[0007] The input end of the up-conversion circuit is used as an intermediate frequency signal transmission port; the output end of the up-conversion circuit is connected to the first input end of the channel calibration circuit;

[0008] The second input end of the channel calibration circuit is used as a test transmission port; the first output end to the nth output end of the channel calibration circuit are respectively connected to the first input end to the nth input end of the receiving selection circuit in a one-to-one manner; the n+1th output end of the channel calibration circuit is connected to the first end of the receiving and transmitting power division selection circuit; the first end of the receiving and transmitting power division selection circuit is a unidirectional input port; n>2, and is a positive integer; the third input end of the channel calibration circuit is used as a TTL control signal input port;

[0009] The first output end to the nth output end of the receiving selection circuit are connected one-to-one with the first input end to the nth input end of the down-conversion circuit; the first output end to the nth output end of the down-conversion circuit are respectively used as n intermediate frequency signal receiving ports;

[0010] The second end to the n+1th end of the transceiver power division selection circuit are respectively connected one-to-one with the first end to the nth end of the radio frequency transceiver circuit; the n+1th end to the 2nth end of the radio frequency transceiver circuit are respectively used as n radio frequency transceiver ports; the n+2th end of the transceiver power division selection circuit is used as a test output receiving port; the second end to the n+1th end of the transceiver power division selection circuit are input and output bidirectional ports; the n+2th end of the transceiver power division selection circuit is a unidirectional output port.

[0011] In a possible implementation of the first aspect, the channel calibration circuit includes a multiplexing selection circuit, an isolation circuit, and a transmission amplifier;

[0012] The first input end of the multiplexing selection circuit is used as the first input end of the channel calibration circuit; the second input end of the multiplexing selection circuit is used as the second input end of the channel calibration circuit; the first output end of the multiplexing selection circuit is connected to the first input end of the isolation circuit; the second output end of the multiplexing selection circuit is connected to the input end of the transmitting amplifier;

[0013] The second input end of the isolation circuit serves as the third input end of the channel calibration circuit; the first output end to the nth output end of the isolation circuit serve as the first output end to the nth output end of the channel calibration circuit respectively;

[0014] The output end of the transmitting amplifier serves as the (n+1)th output end of the channel calibration circuit.

[0015] In a possible implementation of the first aspect, the multiplexing selection circuit includes two power dividers and a first single-pole double-set switch;

[0016] The input end of the second power divider is used as the first input end of the multiplexing selection circuit; the output end of the second power divider is connected to the input end of the first single-pole double-set switch; the first output end of the first single-pole double-set switch is used as the first output end of the multiplexing selection circuit; the second output end of the first single-pole double-set switch is used as the second output end of the multiplexing selection circuit;

[0017] The isolation circuit includes a first attenuator, a second attenuator, ..., an n+1th attenuator, a low noise amplifier and a power supply control module;

[0018] The input end of the n+1th attenuator serves as the first input end of the isolation circuit; the output end of the n+1th attenuator is connected to the first input end of the low noise amplifier; the second input end of the low noise amplifier is connected to the output end of the power control module; the input end of the power control module serves as the second input end of the isolation circuit; the output end of the low noise amplifier is respectively connected to the input ends of the first attenuator, the second attenuator, ..., and the nth attenuator;

[0019] The output end of the first attenuator to the output end of the nth attenuator serve as the first output end to the nth output end of the isolation circuit respectively.

[0020] In a possible implementation of the first aspect, the receiving selection circuit includes a second single-pole double-set switch, a third single-pole double-set switch, ..., and an (n+1)th single-pole double-set switch;

[0021] The input end of the second single-pole double-set switch to the input end of the (n+1)th single-pole double-set switch are respectively used as the first input end to the nth input end of the receiving selection circuit.

[0022] In a possible implementation of the first aspect, the transceiver power division selection circuit includes a transceiver power division multiplexing circuit and a transceiver selection circuit; the transceiver power division multiplexing circuit includes a circulator and a second n power divider; the transceiver selection circuit includes an n+2th single-pole double-set switch, ..., and a 2n+1th single-pole double-set switch;

[0023] The first end of the circulator is used as the first end of the transmit-receive power division selection circuit; the second end of the circulator is used as the n+2th end of the transmit-receive power division selection circuit; the third end of the circulator is connected to the first end of the second n power divider;

[0024] The second end to the n+1th end of the second n power divider are connected one-to-one with the first end of the n+2th single-pole double-position switch to the first end of the 2n+1th single-pole double-position switch respectively;

[0025] The second end of the n+2th single-pole double-set switch and the second end of the 2n+1th single-pole double-set switch are respectively connected one-to-one with the first input end to the nth input end of the receiving selection circuit;

[0026] The third end of the n+2th single-pole double-set switch to the third end of the 2n+1th single-pole double-set switch are respectively used as the second end to the n+1th end of the transmitting and receiving power division selection circuit.

[0027] In a second aspect, an embodiment of the present application provides a method for testing a multi-channel variable frequency microwave link, using a vector network analyzer to test the multi-channel variable frequency microwave link measurement circuit of the first aspect, and the method for testing the multi-channel variable frequency microwave link includes:

[0028] Connect the intermediate frequency signal transmission port to the RF output port of the vector network analyzer, and connect n intermediate frequency signal receiving ports to the input ports of the vector network analyzer for testing, input a TTL control signal to the third input terminal of the control channel calibration circuit, use the channel calibration circuit to control the signal to enter the down-conversion circuit through the receiving selection circuit, and output from the first output terminal to the nth output terminal of the down-conversion circuit, so as to obtain the absolute gain and absolute phase of the frequency conversion of n channels;

[0029] The RF output port of the vector network analyzer is connected to n RF transceiver ports respectively, and the test output receiving port is connected to the input port of the vector network analyzer for testing. The control signal enters the transceiver power division selection circuit from the n+1th terminal to the 2nth terminal of the RF transceiver circuit respectively, and is output from the n+2th terminal of the transceiver power division selection circuit to obtain the receiving RF absolute gain and receiving RF absolute phase of n channels;

[0030] Based on the frequency conversion absolute gain and frequency conversion absolute phase of the n channels and the receiving RF absolute gain and receiving RF absolute phase of the n channels, the relative gain and relative phase of the signal receiving process of the frequency conversion microwave link of the n channels are determined.

[0031] In a possible implementation manner of the second aspect, determining a relative gain and a relative phase of a signal reception process of a frequency conversion microwave link of the n channels based on the frequency conversion absolute gain and the frequency conversion absolute phase of the n channels and the reception RF absolute gain and the reception RF absolute phase of the n channels includes:

[0032] Select one of the n channels as the target channel, determine the total absolute gain of the signal receiving process of the target channel of the variable frequency microwave link based on the frequency conversion absolute gain of the target channel and the sum of the receiving radio frequency absolute gain of the target channel, and determine the total absolute phase of the signal receiving process of the target channel of the variable frequency microwave link based on the frequency conversion absolute phase of the target channel and the sum of the receiving radio frequency absolute phase of the target channel;

[0033] Similarly, based on the frequency conversion absolute gain of each other channel and the sum of the receiving RF absolute gain of each other channel, the total absolute gain of the signal receiving process of each other channel of the frequency conversion microwave link is determined, and based on the frequency conversion absolute phase of each other channel and the sum of the receiving RF absolute phase of each other channel, the total absolute phase of the signal receiving process of each other channel of the frequency conversion microwave link is determined;

[0034] Determine the relative gains of n channels in the signal receiving process of the variable frequency microwave link based on the difference between the total absolute gain of the signal receiving process of the target channel and the total absolute gain of the signal receiving process of other channels;

[0035] Based on the difference between the total absolute phase of the signal receiving process of the target channel and the total absolute phase of the signal receiving process of other channels, the relative phases of the n channels of the signal receiving process of the variable frequency microwave link are determined.

[0036] In a possible implementation manner of the second aspect, the method for testing a multi-channel variable frequency microwave link further includes:

[0037] Connect the RF output port of the vector network analyzer to the test transmission port, and connect n RF transceiver ports to the input port of the vector network analyzer for testing. Use the channel calibration circuit to control the signal to enter the RF transceiver circuit through the transceiver power selection circuit, and output from the first end to the nth end of the RF transceiver circuit to obtain the transmit RF absolute gain and transmit RF absolute phase of the n channels;

[0038] Based on the transmission radio frequency absolute gains and transmission radio frequency absolute phases of the n channels, the relative gains and relative phases of the signal transmission process of the variable frequency microwave links of the n channels are determined.

[0039] In a possible implementation manner of the second aspect, determining a relative gain and a relative phase of a signal transmission process of a variable frequency microwave link of the n channels based on the transmit RF absolute gain and the transmit RF absolute phase of the n channels includes:

[0040] Select one of the n channels as a target channel, and determine the relative gains of the n channels in a signal transmission process of a variable frequency microwave link based on a difference between a transmit RF absolute gain of the target channel and a transmit RF absolute gain of other channels;

[0041] Based on the difference between the transmission radio frequency absolute phase of the target channel and the transmission radio frequency absolute phase of other channels, the relative phases of n channels in the signal transmission process of the variable frequency microwave link are determined.

[0042] In a third aspect, the present application provides a variable frequency microwave link, including a multi-channel variable frequency microwave link measurement circuit as in the first aspect.

[0043] It can be understood that the beneficial effects of the second to third aspects mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here.

[0044] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0045] In the embodiment of the present application, a measurement circuit including an up-conversion circuit, a channel calibration circuit, a receiving selection circuit, a down-conversion circuit, a transmitting and receiving power division selection circuit and a radio frequency transmitting and receiving circuit is embedded in the working circuit of the variable frequency microwave link. The multi-channel receiving process includes two different frequency signal channels, namely, a radio frequency receiving signal and an intermediate frequency output signal. By designing the measurement circuit to include two parts, namely, a channel of a radio frequency transmitting and receiving signal (including a receiving part) and a down-conversion circuit, the final indicators of the multiple transmitting channels can be obtained by calculation after being tested separately using an ordinary vector network analyzer. This solves the problem that the relative gain and relative phase tests of multi-channel transmitting and multi-channel receiving variable frequency microwave circuits must be tested using a vector network analyzer with a frequency conversion function, but cannot be tested using a vector network analyzer without a frequency conversion function, thereby reducing the testing cost.

[0046] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0048] Figure 1 It is a structural schematic diagram of a multi-channel variable frequency microwave link measurement circuit provided in an embodiment of the present application;

[0049] Figure 2 It is a specific structural diagram of a multi-channel variable frequency microwave link measurement circuit provided in an embodiment of the present application;

[0050] Figure 3 is a structural schematic diagram of a channel calibration circuit provided in an embodiment of the present application;

[0051] Figure 4 It is a schematic diagram of the specific structure and connection relationship of the transceiver power division selection circuit and the radio frequency transceiver circuit provided in one embodiment of the present application;

[0052] Figure 5 It is a schematic diagram of the structure of a controller provided in one embodiment of the present application. DETAILED DESCRIPTION

[0053] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0054] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.

[0055] It should also be understood that the term “and / or” used in the specification and appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0056] As used in the specification and appended claims of this application, the term "if" can be interpreted as "when" or "uponce" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "uponce it is determined" or "in response to determining" or "uponce [described condition or event] is detected" or "in response to detecting [described condition or event]", depending on the context.

[0057] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0058] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0059] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0060] Figure 1is a schematic diagram of a multi-channel variable frequency microwave link measurement circuit provided in an embodiment of the present application, referring to Figure 1 , the multi-channel variable frequency microwave link measurement circuit is described in detail as follows:

[0061] An embodiment of the present application provides a multi-channel variable frequency microwave link measurement circuit, which is embedded in the working circuit of the variable frequency microwave link, and includes an up-conversion circuit 100, a channel calibration circuit 200, a receiving selection circuit 300, a down-conversion circuit 400, a transmitting and receiving power division selection circuit 500 and a radio frequency transceiver circuit 600.

[0062] Exemplarily, the entire functional circuit is divided into three parts. The first part of the circuit mainly includes an up-conversion circuit 100 and a channel calibration circuit 200, the second part of the circuit mainly includes a receiving selection circuit 300 and a down-conversion circuit 400, and the third part of the circuit mainly includes a transmitting and receiving power selection circuit 500 and a radio frequency transmitting and receiving circuit 600.

[0063] The input end of the up-conversion circuit 100 is used as an intermediate frequency signal transmission port; the output end of the up-conversion circuit 100 is connected to the first input end of the channel calibration circuit 200 .

[0064] The second input terminal of the channel calibration circuit 200 serves as a test transmission port; the first output terminal to the nth output terminal of the channel calibration circuit 200 are respectively connected one-to-one with the first input terminal to the nth input terminal of the receiving selection circuit 300; the n+1th output terminal of the channel calibration circuit 200 is connected to the first terminal of the transceiver power division selection circuit 500; the first terminal of the transceiver power division selection circuit 500 is a unidirectional input port; n>2 and is a positive integer; the third input terminal of the channel calibration circuit 200 serves as a TTL control signal input port.

[0065] Exemplarily, the radio frequency signal T_RF is input from a first terminal of the transmit / receive power division selection circuit 500 .

[0066] The first output end to the nth output end of the receiving selection circuit 300 are connected one-to-one with the first input end to the nth input end of the down-conversion circuit 400; the first output end to the nth output end of the down-conversion circuit 400 serve as n intermediate frequency signal receiving ports respectively.

[0067] The second end to the n+1th end of the transceiver power division selection circuit 500 are respectively connected one-to-one with the first end to the nth end of the RF transceiver circuit 600; the n+1th end to the 2nth end of the RF transceiver circuit 600 serve as n RF transceiver ports respectively; the n+2th end of the transceiver power division selection circuit 500 serves as a test output receiving port; the second end to the n+1th end of the transceiver power division selection circuit 500 are input and output bidirectional ports; the n+2th end of the transceiver power division selection circuit 500 is a unidirectional output port.

[0068] Exemplarily, the intermediate frequency signal transmitting port is connected to the RF output port of the vector network analyzer, and the n intermediate frequency signal receiving ports are respectively connected to the input port of the vector network analyzer for a receiving frequency conversion connection test; the RF output port of the vector network analyzer is respectively connected to n RF transceiver ports, and the test output receiving port is respectively connected to the input port of the vector network analyzer for a receiving RF connection test; the RF output port of the vector network analyzer is connected to the test transmitting port, and the n RF transceiver ports are respectively connected to the input port of the vector network analyzer for a transmitting RF connection test.

[0069] In this embodiment, a measurement circuit including an up-conversion circuit 100, a channel calibration circuit 200, a receiving selection circuit 300, a down-conversion circuit 400, a transmitting and receiving power division selection circuit 500 and a radio frequency transmitting and receiving circuit 600 is embedded in the working circuit of the frequency conversion microwave link. The multi-channel receiving process includes two different frequency signal channels, namely, a radio frequency receiving signal and an intermediate frequency output signal. By designing the measurement circuit to include two parts, namely, a radio frequency transmitting and receiving channel (including a receiving part) and a down-conversion circuit 400, the final indicators of the multiple transmitting channels can be obtained by calculation after being tested separately using an ordinary vector network analyzer. This solves the problem that the relative gain and relative phase tests of multi-channel transmitting and multi-channel receiving frequency conversion microwave circuits must be tested using a vector network analyzer with a frequency conversion function, but cannot be tested using a vector network analyzer without a frequency conversion function, thereby reducing the testing cost.

[0070] For an embodiment, see Figure 2 and Figure 3 The up-conversion circuit 100 is single, and multiple down-conversion channels, namely, the specific structures and connection relationships of the channel calibration circuit 200, the receiving selection circuit 300, and the down-conversion circuit 400 are specifically introduced here.

[0071] Exemplarily, the channel calibration circuit 200 includes a multiplexing selection circuit 201 , an isolation circuit 202 , and a transmitting amplifier 203 .

[0072] The first input end of the multiplexing selection circuit 201 serves as the first input end of the channel calibration circuit 200; the second input end of the multiplexing selection circuit 201 serves as the second input end of the channel calibration circuit 200; the first output end of the multiplexing selection circuit 201 is connected to the first input end of the isolation circuit 202; the second output end of the multiplexing selection circuit 201 is connected to the input end of the transmitting amplifier 203.

[0073] The second input terminal of the isolation circuit 202 serves as the third input terminal of the channel calibration circuit 200 ; the first output terminal to the nth output terminal of the isolation circuit 202 serve as the first output terminal to the nth output terminal of the channel calibration circuit 200 , respectively.

[0074] Taking n=8 as an example, the first output end to the eighth output end of the isolation circuit 202 are respectively used as the first output end to the eighth output end of the channel calibration circuit 200. The first output end of the isolation circuit 202 is used as the first output end of the channel calibration circuit 200; the second output end of the isolation circuit 202 is used as the second output end of the channel calibration circuit 200; the third output end of the isolation circuit 202 is used as the third output end of the channel calibration circuit 200; the fourth output end of the isolation circuit 202 is used as the fourth output end of the channel calibration circuit 200; the fifth output end of the isolation circuit 202 is used as the fifth output end of the channel calibration circuit 200; the sixth output end of the isolation circuit 202 is used as the sixth output end of the channel calibration circuit 200; the seventh output end of the isolation circuit 202 is used as the seventh output end of the channel calibration circuit 200; and the eighth output end of the isolation circuit 202 is used as the eighth output end of the channel calibration circuit 200.

[0075] The output terminal of the transmitting amplifier 203 serves as the (n+1)th output terminal of the channel calibration circuit 200 .

[0076] Exemplarily, the multiplexing selection circuit 201 includes two power dividers and a first single-pole double-set switch SPDT1, such as Figure 3 shown.

[0077] The input end of the second power divider serves as the first input end of the multiplexing selection circuit 201; the output end of the second power divider is connected to the input end of the first single-pole double-set switch SPDT1; the first output end of the first single-pole double-set switch SPDT1 serves as the first output end of the multiplexing selection circuit 201; the second output end of the first single-pole double-set switch SPDT1 serves as the second output end of the multiplexing selection circuit 201.

[0078] The isolation circuit 202 includes a first attenuator, a second attenuator, ..., an (n+1)th attenuator, a first n-power divider, a low noise amplifier and a power control module.

[0079] The input end of the n+1th attenuator serves as the first input end of the isolation circuit 202; the output end of the n+1th attenuator is connected to the first input end of the low noise amplifier; the second input end of the low noise amplifier is connected to the output end of the power control module; the input end of the power control module serves as the second input end of the isolation circuit 202, that is, the TTL control signal input port; the output end of the low noise amplifier is connected to the input end of the first n power divider; the first output end to the nth output end of the first n power divider are respectively connected to the input ends of the first attenuator ATT1, the second attenuator ATT2, ..., and the nth attenuator ATTn;

[0080] The output end of the first attenuator ATT1 to the output end of the nth attenuator ATTn serve as the first output end to the nth output end of the isolation circuit 202 , respectively.

[0081] Taking n=8 as an example, the output end of the first attenuator ATT1 to the output end of the eighth attenuator ATT8 are respectively used as the first output end to the eighth output end of the isolation circuit 202. The output end of the first attenuator ATT1 is used as the first output end of the isolation circuit 202; the output end of the second attenuator ATT2 is used as the second output end of the isolation circuit 202; the output end of the third attenuator ATT3 is used as the third output end of the isolation circuit 202; the output end of the fourth attenuator ATT4 is used as the fourth output end of the isolation circuit 202; the output end of the fifth attenuator ATT5 is used as the fifth output end of the isolation circuit 202; the output end of the sixth attenuator ATT6 is used as the sixth output end of the isolation circuit 202; the output end of the seventh attenuator ATT7 is used as the seventh output end of the isolation circuit 202; and the output end of the input end of the eighth attenuator ATT8 is used as the eighth output end of the isolation circuit 202.

[0082] Exemplarily, the receiving selection circuit 300 includes a second single-pole double-set switch SPDT2, a third single-pole double-set switch SPDT3, ..., and an n+1th single-pole double-set switch SPDTn+1, such as Figure 2 shown.

[0083] The input terminal of the second single-pole double-set switch SPDT2 to the input terminal of the (n+1)th single-pole double-set switch SPDTn+1 serve as the first input terminal to the nth input terminal of the receiving selection circuit 300 , respectively.

[0084] Taking n=8 as an example, the input end of the second single-pole double-set switch SPDT2 to the input end of the ninth single-pole double-set switch are respectively used as the first input end to the eighth input end of the receiving selection circuit 300. The input end of the second single-pole double-set switch SPDT2 is used as the first input end of the receiving selection circuit 300; the input end of the third single-pole double-set switch SPDT3 is used as the second input end of the receiving selection circuit 300; the input end of the fourth single-pole double-set switch SPDT4 is used as the third input end of the receiving selection circuit 300; the input end of the fifth single-pole double-set switch SPDT5 is used as the fourth input end of the receiving selection circuit 300; the input end of the sixth single-pole double-set switch SPDT6 is used as the fifth input end of the receiving selection circuit 300; the input end of the seventh single-pole double-set switch SPDT7 is used as the sixth input end of the receiving selection circuit 300; the input end of the eighth single-pole double-set switch SPDT8 is used as the seventh input end of the receiving selection circuit 300; and the input end of the ninth single-pole double-set switch SPDT9 is used as the eighth input end of the receiving selection circuit 300.

[0085] In this embodiment, two power dividers are used to multiplex the output signal of the up-conversion circuit 100 (the input signal of the channel calibration circuit 200) and the input signal of the test transmission port. Only one of the two signal terminals can have an input signal at the same time. The first single-pole double-throw switch SPDT1 (Single Pole Double Throw) is used to select two branches, that is, the down-conversion channel calibration branch and the normal transmission branch. Among them, SPDT1 can be selected by external control.

[0086] Exemplarily, when n=8, take the eight-channel down-conversion channel calibration branch as an example: the two power dividers of the first part of the circuit complete the multiplexing function of the transmission RF signal and the transmission test input port. At the same time, only one of the interfaces has an input signal, and the first single-pole double-throw switch SPDT1 completes the selection of the normal transmission channel and the down-conversion receiving calibration channel. The down-conversion calibration channel passes through the ninth attenuator ATT9 (the attenuation value can be 20dB), a low-noise amplifier with power control function (the relative gain of the low-noise amplifier is not greater than 10dB, and the reverse isolation is 30dB), the first eight-way power divider, and the first attenuator ATT1 to the eighth attenuator ATT8 (the attenuation value of each attenuator can be 10dB) and then outputs the signal to the 8-way receiving selection switches SPDT2~SPDT9.

[0087] Among them, the ninth attenuator ATT9 is mainly used to prevent the input signal of the up-conversion circuit 100 from being too large, which leads to the signal saturation of the down-conversion circuit 400. The first attenuator ATT1 to the eighth attenuator ATT8 are mainly used to increase the isolation of the output branch of the power divider. The low noise amplifier with power control function is linked with the first single-pole double-throw switch SPDT1 and the receiving selection switch (the second single-pole double-position switch to the ninth single-pole double-position switch) SPDT2~SPDT9 to achieve a selection on-off ratio of not less than 100dBc.

[0088] When in the down-conversion calibration state, the TTL level input of the TTL control signal input port is valid, the signals output by the first attenuator ATT1 to the eighth attenuator ATT8 are the test calibration signals CAL_R1~CAL_R8, SPDT2~SPDT9 switch to the test state, and receive the test calibration signals CAL_R1~CAL_R8; when in the non-down-conversion calibration state, the TTL level input of the TTL control signal input port is invalid, the signals output by the first attenuator ATT1 to the eighth attenuator ATT8 are the normal working signals CR1~CR8, SPDT2~SPDT9 switch to the normal receiving state, and receive the normal working signals CR1~CR8. Thus, in the down-conversion calibration state, the intermediate frequency signal transmitting port is connected to the RF output port of the vector network analyzer, and the eight intermediate frequency signal receiving ports are respectively connected to the input ports of the vector network analyzer for testing, so that the gain and phase of the eight-channel down-conversion circuit can be tested.

[0089] For an embodiment, see Figure 2 and Figure 4 Here, multiple radio frequency channels are specifically introduced, that is, mainly the specific structure and connection relationship of the transceiver power division selection circuit 500 and the radio frequency transceiver circuit 600.

[0090] Exemplarily, the transceiver power division selection circuit 500 includes a transceiver power division multiplexing circuit and a transceiver selection circuit, as shown in the figure. The transceiver power division multiplexing circuit includes a circulator and a second n power divider; the transceiver selection circuit includes an n+2th single-pole double-set switch, ..., and a 2n+1th single-pole double-set switch.

[0091] The first end of the circulator serves as the first end of the transmit / receive power division selection circuit 500; the second end of the circulator serves as the n+2th end of the transmit / receive power division selection circuit 500; and the third end of the circulator is connected to the first end of the second n power divider.

[0092] The second end to the n+1th end of the second n power divider are connected one-to-one with the first end of the n+2th single-pole double-position switch to the first end of the 2n+1th single-pole double-position switch respectively.

[0093] Exemplarily, when n=8, the second end to the ninth end of the second eight-power divider are connected one-to-one with the first end of the tenth single-pole double-position switch SPDT10 to the first end of the seventeenth single-pole double-position switch SPDT17, respectively. Figure 4 As shown. The second end of the second eight power divider is connected to the first end of the tenth single-pole double-set switch SPDT10; the third end of the second eight power divider is connected to the first end of the eleventh single-pole double-set switch SPDT11; the fourth end of the second eight power divider is connected to the first end of the twelfth single-pole double-set switch SPDT12; the fifth end of the second eight power divider is connected to the first end of the thirteenth single-pole double-set switch SPDT13; the sixth end of the second eight power divider is connected to the first end of the fourteenth single-pole double-set switch SPDT14; the seventh end of the second eight power divider is connected to the first end of the fifteenth single-pole double-set switch SPDT15; the eighth end of the second eight power divider is connected to the first end of the sixteenth single-pole double-set switch SPDT16; the ninth end of the second eight power divider is connected to the first end of the seventeenth single-pole double-set switch SPDT17.

[0094] The second end of the (n+2)th single-pole double-set switch to the second end of the (2n+1)th single-pole double-set switch are respectively connected one-to-one to the first input end to the nth input end of the receiving selection circuit 300 .

[0095] Exemplarily, when n=8, the second end of the tenth single-pole double-set switch SPDT10 to the second end of the seventeenth single-pole double-set switch SPDT17 are respectively connected one-to-one with the first input end to the eighth input end of the receiving selection circuit 300. When transmitting a radio frequency signal from the radio frequency transceiver port, the second end of the tenth single-pole double-set switch SPDT10 to the second end of the seventeenth single-pole double-set switch SPDT17 output normal working signals CR1-CR8 respectively, and the first input end to the eighth input end of the receiving selection circuit 300 receive the normal working signals CR1-CR8.

[0096] The third end of the n+2th single-pole double-set switch to the third end of the 2n+1th single-pole double-set switch are respectively used as the second end to the n+1th end of the transmit / receive power division selection circuit 500 .

[0097] Exemplarily, when n=8, the third end of the tenth single-pole double-set switch SPDT10 to the third end of the seventeenth single-pole double-set switch SPDT17 are respectively used as the second end to the ninth end of the transceiver power division selection circuit 500. When transmitting a radio frequency signal from the radio frequency transceiver port, the second end of the tenth single-pole double-set switch SPDT10 to the second end of the seventeenth single-pole double-set switch SPDT17 output radio frequency signals respectively, and the second end to the ninth end of the transceiver power division selection circuit 500 receive the radio frequency signal and output it from the test output receiving port.

[0098] In this embodiment, the RF output port of the vector network analyzer can be connected to n RF transceiver ports respectively, and the test output receiving port can be connected to the input port of the vector network analyzer for testing. The signal passes through the RF transceiver circuit 600, the transceiver selection circuit, and the transceiver power division multiplexing circuit, and is finally output to the input port of the vector network analyzer through the test output receiving port, thereby completing the measurement of multi-channel receiving RF gain and phase.

[0099] The RF output port of the vector network analyzer can also be connected to the test transmission port, and n RF transceiver ports can be connected to the input port of the vector network analyzer for testing. The signal passes through the transmitting amplifier 203, the transceiver power division multiplexing circuit, the transceiver selection circuit, and the RF transceiver circuit 600, and is finally output to the input end of the vector network analyzer through the RF transceiver port, thereby completing the measurement of multi-channel transmitting RF gain and phase.

[0100] An embodiment of the present application provides a method for testing a multi-channel variable frequency microwave link, which uses a vector network analyzer to test the multi-channel variable frequency microwave link measurement circuit of the above embodiment.

[0101] This embodiment performs a variable frequency receiving n-channel test and a radio frequency receiving n-channel test. Then, the test method of a multi-channel variable frequency microwave link includes:

[0102] The intermediate frequency signal transmitting port is connected to the RF output port of the vector network analyzer, and the n intermediate frequency signal receiving ports are respectively connected to the input ports of the vector network analyzer for testing. The third input terminal of the control channel calibration circuit 200 inputs a TTL control signal, and the channel calibration circuit 200 controls the signal to enter the down-conversion circuit 400 through the receiving selection circuit 300, and outputs from the first output terminal to the nth output terminal of the down-conversion circuit 400, so as to obtain the absolute frequency conversion gain Gain_IF and the absolute frequency conversion phase Phase_IF of the n channels.

[0103] The RF output port of the vector network analyzer is connected to n RF transceiver ports respectively, and the test output receiving port is connected to the input port of the vector network analyzer for testing. The control signal enters the transceiver power division selection circuit 500 from the n+1th terminal to the 2nth terminal of the RF transceiver circuit 600 respectively, and is output from the n+2th terminal of the transceiver power division selection circuit 500, and the receiving RF absolute gain Gain_RF and the receiving RF absolute phase Phase_RF of the n channels are obtained.

[0104] Based on the frequency conversion absolute gain and frequency conversion absolute phase of the n channels and the receiving RF absolute gain and receiving RF absolute phase of the n channels, the relative gain ΔGain and relative phase ΔPhase of the signal receiving process of the frequency conversion microwave link of the n channels are determined.

[0105] Exemplarily, the relative gain ΔGain reflects the difference in gain between different channels. Inconsistency in gain may cause the signal to be amplified more on some channels and less on other channels, thereby affecting the signal quality and uniformity of the system. By testing the relative gain, channels with unbalanced gain can be identified, and corresponding measures can be taken to calibrate or adjust to ensure that the gain of all channels is as consistent as possible.

[0106] The relative phase ΔPhase reflects the phase difference of signals between different channels. Phase consistency is critical for coherent synthesis and signal processing of signals. Phase inconsistency may lead to signal distortion, increased interference, or decreased system performance. By testing the relative phase, channels with large phase deviations can be identified and necessary calibration or adjustments can be made to ensure signal coherence and system stability.

[0107] Therefore, the channel indicators "relative gain" and "relative phase" obtained from the test play a vital role in evaluating system performance, performing calibration work, optimizing system design and troubleshooting.

[0108] Exemplarily, based on the frequency conversion absolute gain and frequency conversion absolute phase of the n channels, and the receiving RF absolute gain and receiving RF absolute phase of the n channels, determining the relative gain and relative phase of the signal receiving process of the frequency conversion microwave link of the n channels includes:

[0109] One of the n channels is selected as the target channel, and the total absolute gain of the signal receiving process of the target channel of the variable frequency microwave link is determined based on the frequency conversion absolute gain of the target channel and the sum of the receiving RF absolute gain of the target channel, and the total absolute phase of the signal receiving process of the target channel of the variable frequency microwave link is determined based on the frequency conversion absolute phase of the target channel and the sum of the receiving RF absolute phase of the target channel.

[0110] For example, taking the first channel as the target channel, the total absolute gain Gain_1 and total absolute phase Phase_1 of the first channel are expressed as:

[0111] Gain_1=Gain_RF1+Gain_IF1;

[0112] Phase_1=Phase_RF1+Phase_IF1;

[0113] Among them, Gain_RF1 is the absolute gain of the receiving RF of the first channel; Gain_IF1 is the absolute gain of the frequency conversion of the first channel; Phase_RF1 is the absolute phase of the receiving RF of the first channel; Phase_IF1 is the absolute phase of the frequency conversion of the first channel.

[0114] Similarly, based on the frequency conversion absolute gain of each other channel and the sum of the received RF absolute gain of each other channel, the total absolute gain of the signal reception process of each other channel of the frequency conversion microwave link is determined, and based on the frequency conversion absolute phase of each other channel and the sum of the received RF absolute phase of each other channel, the total absolute phase of the signal reception process of each other channel of the frequency conversion microwave link is determined.

[0115] Similarly, the total absolute gain Gain_n and the total absolute phase Phase_n of each other channel are expressed with reference to the first channel.

[0116] Gain_n=Gain_RFn+Gain_IFn;

[0117] Phase_n=Phase_RFn+Phase_IFn;

[0118] Among them, Gain_RFn is the absolute gain of the receiving RF of the nth channel; Gain_IFn is the absolute gain of the frequency conversion of the nth channel; Phase_RFn is the absolute phase of the receiving RF of the nth channel; Phase_IFn is the absolute phase of the frequency conversion of the nth channel.

[0119] Based on the difference between the total absolute gain of the signal receiving process of the target channel and the total absolute gain of the signal receiving process of other channels, the relative gains of the n channels of the signal receiving process of the variable frequency microwave link are determined.

[0120] Exemplarily, the relative gain ΔGain_2 of the second channel is expressed as:

[0121] ΔGain=Gain_2-Gain_1=(Gain_RF2+Gain_IF2)-(Gain_RF1+Gain_IF1)

[0122] =(Gain_RF2-Gain_RF1)+(Gain_IF2-Gain_IF1)

[0123] =ΔGain_RF(2-1)+ΔGain_IF(2-1)

[0124] The relative gain ΔGain_n of the nth channel is expressed as:

[0125] ΔGain=Gain_n-Gain_1=(Gain_RFn+Gain_IFn)-(Gain_RF1+Gain_IF1)

[0126] =(Gain_RFn-Gain_RF1)+(Gain_IFn-Gain_IF1)

[0127] =ΔGain_RF(n-1)+ΔGain_IF(n-1)

[0128] Based on the difference between the total absolute phase of the signal receiving process of the target channel and the total absolute phase of the signal receiving process of other channels, the relative phases of the n channels of the signal receiving process of the variable frequency microwave link are determined.

[0129] In this embodiment, the absolute gain value and absolute phase value of the target channel among the eight channels with the same function are measured as a reference, and the absolute gain and absolute phase of all eight channels are respectively subtracted from the absolute gain and absolute phase of the first channel to obtain the relative gain and relative phase of each channel.

[0130] In one embodiment, since the up-conversion circuit 100 is single, the relative gain and relative phase between the test channels can be tested by bypassing the up-conversion circuit 100 and only testing the inter-channel indicators of part of the transmitting RF circuit to perform RF transmission n-channel testing. Then, the test method of the multi-channel frequency conversion microwave link also includes:

[0131] The RF output port of the vector network analyzer is connected to the test transmitting port, and n RF transceiver ports are respectively connected to the input port of the vector network analyzer for testing. The channel calibration circuit 200 is used to control the signal to enter the RF transceiver circuit 600 through the transceiver power selection circuit 500, and output from the first end to the nth end of the RF transceiver circuit 600, so as to obtain the transmitting RF absolute gain and transmitting RF absolute phase of the n channels.

[0132] Based on the transmission radio frequency absolute gains and transmission radio frequency absolute phases of the n channels, the relative gains and relative phases of the signal transmission process of the variable frequency microwave links of the n channels are determined.

[0133] Exemplarily, determining the relative gain and relative phase of the signal transmission process of the variable frequency microwave link of the n channels based on the absolute gain and absolute phase of the transmitted radio frequency of the n channels includes:

[0134] One of the n channels is selected as the target channel, and the relative gains of the n channels in the signal transmission process of the variable frequency microwave link are determined based on the difference between the transmit RF absolute gain of the target channel and the transmit RF absolute gain of other channels.

[0135] For example, taking the first channel as the target channel, the total absolute gain Gain_1 and total absolute phase Phase_1 of the first channel are expressed as:

[0136] Gain_1 = Gain_RF1;

[0137] Phase_1 = Phase_RF1;

[0138] Among them, Gain_RF1 is the absolute gain of the transmit RF of the first channel; Phase_RF1 is the absolute phase of the transmit RF of the first channel.

[0139] Based on the difference between the transmission radio frequency absolute phase of the target channel and the transmission radio frequency absolute phase of other channels, the relative phases of n channels in the signal transmission process of the variable frequency microwave link are determined.

[0140] Exemplarily, the relative gain ΔGain_2 of the second channel is expressed as:

[0141] ΔGain=Gain_2-Gain_1=Gain_RF2-Gain_RF1

[0142] =ΔGain_RF(2-1)

[0143] The relative gain ΔGain_n of the nth channel is expressed as:

[0144] ΔGain=Gain_n-Gain_1=(Gain_RFn-Gain_RF1)

[0145] =Gain_RFn-Gain_RF1

[0146] =ΔGain_RF(n-1)

[0147] It can be seen that the multi-channel variable frequency microwave link measurement circuit proposed by the present invention is based on a measurement circuit including an up-conversion circuit 100, a channel calibration circuit 200, a receiving selection circuit 300, a down-conversion circuit 400, a transmitting and receiving power division selection circuit 500 and a radio frequency transceiver circuit 600. The multi-channel receiving process includes two different frequency signal channels of a radio frequency receiving signal and an intermediate frequency output signal. By designing the measurement circuit to include two parts of a channel including radio frequency transceiver (including a receiving part) and a down-conversion circuit 400, and using the principle that the relative gain and relative phase of the entire link between channels can be divided into the addition of the relative gain and relative phase of the radio frequency and the relative gain and relative phase of the frequency conversion part, the multi-channel variable frequency microwave link calibration measurement circuit divides the frequency conversion microwave circuit into a radio frequency circuit part and a frequency conversion circuit part. After being tested separately using an ordinary vector network analyzer, the final indicators of the multiple transmission channels are obtained by calculation, thereby solving the problem that the relative gain and relative phase test of the multi-channel transmitting and multi-channel receiving variable frequency microwave circuits must be tested using a vector network analyzer with a frequency conversion function, but cannot be tested using a vector network analyzer without a frequency conversion function, thereby reducing the test cost.

[0148] An embodiment provides a variable frequency microwave link, including the multi-channel variable frequency microwave link measurement circuit as described in the above embodiment.

[0149] The present application also provides a controller, see Figure 5 The controller 700 may include: at least one processor 710 and a memory 720, wherein the memory 720 stores a computer program that can be run on the at least one processor 710, and when the processor 710 executes the computer program, the steps in any of the above method embodiments are implemented.

[0150] Exemplarily, the computer program may be divided into one or more modules / units, one or more modules / units are stored in the memory 720, and executed by the processor 710 to complete the present application. One or more modules / units may be a series of computer program segments capable of completing specific functions, and the program segments are used to describe the execution process of the computer program in the controller 700.

[0151] Those skilled in the art will understand that Figure 5 These are merely examples of controllers and do not constitute a limitation of the controller, which may include more or fewer components than those shown in the figure, or a combination of certain components, or different components, such as input and output devices, network access devices, buses, etc.

[0152] The processor 710 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or the processor may be any conventional processor, etc.

[0153] The memory 720 may be an internal storage unit of the controller or an external storage device of the controller, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. The memory 720 is used to store computer programs and other programs and data required by the test method. The memory 720 may also be used to temporarily store data that has been output or is to be output.

[0154] The bus may be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, the bus in the drawings of the present application is not limited to only one bus or one type of bus.

[0155] The rapid intelligent detection method for physical and chemical indicators of hazardous waste provided in the embodiments of the present application can be applied to controllers such as computers, tablet computers, laptops, netbooks, personal digital assistants (PDAs), etc. The embodiments of the present application do not impose any restrictions on the specific type of controller.

[0156] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0157] The beneficial effects of a manufacturing method refer to the beneficial effects of the smoking device self-cleaning method of the above embodiment.

[0158] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A multi-channel variable frequency microwave link measurement circuit, characterized in that: It is embedded in the working circuit of the frequency conversion microwave link, including up-conversion circuit, channel calibration circuit, receiving selection circuit, down-conversion circuit, transmitting and receiving power division selection circuit and radio frequency transmitting and receiving circuit; The input end of the up-conversion circuit serves as an intermediate frequency signal transmission port; the output end of the up-conversion circuit is connected to the first input end of the channel calibration circuit; The second input terminal of the channel calibration circuit serves as a test transmission port; The first output end to the nth output end of the channel calibration circuit are respectively connected to the first input end to the nth input end of the receiving selection circuit in a one-to-one manner; the n+1th output end of the channel calibration circuit is connected to the first end of the transceiver power division selection circuit; the first end of the transceiver power division selection circuit is a unidirectional input port; n>2, and is a positive integer; the third input end of the channel calibration circuit is used as a TTL control signal input port; The first output end to the nth output end of the receiving selection circuit are connected one-to-one with the first input end to the nth input end of the down-conversion circuit; the first output end to the nth output end of the down-conversion circuit are respectively used as n intermediate frequency signal receiving ports; The second end to the n+1th end of the transceiver power division selection circuit are respectively connected one-to-one with the first end to the nth end of the radio frequency transceiver circuit; the n+1th end to the 2nth end of the radio frequency transceiver circuit are respectively used as n radio frequency transceiver ports; The n+2th terminal of the transmit / receive power division selection circuit is used as a test output receiving port; The second end to the n+1th end of the transmit / receive power division selection circuit are input / output bidirectional ports; The n+2th terminal of the transmit / receive power division selection circuit is a unidirectional output port.

2. The multi-channel variable frequency microwave link measurement circuit according to claim 1, characterized in that: The channel calibration circuit includes a multiplexing selection circuit, an isolation circuit and a transmitting amplifier; The first input end of the multiplexing selection circuit serves as the first input end of the channel calibration circuit; the second input end of the multiplexing selection circuit serves as the second input end of the channel calibration circuit; the first output end of the multiplexing selection circuit is connected to the first input end of the isolation circuit; the second output end of the multiplexing selection circuit is connected to the input end of the transmitting amplifier; The second input end of the isolation circuit serves as the third input end of the channel calibration circuit; the first output end to the nth output end of the isolation circuit serve as the first output end to the nth output end of the channel calibration circuit respectively; The output end of the transmitting amplifier serves as the (n+1)th output end of the channel calibration circuit.

3. The multi-channel variable frequency microwave link measurement circuit according to claim 2, characterized in that: The multiplexing selection circuit includes two power dividers and a first single-pole double-position switch; The input end of the two power dividers is used as the first input end of the multiplexing selection circuit; the output end of the two power dividers is connected to the input end of the first single-pole double-set switch; the first output end of the first single-pole double-set switch is used as the first output end of the multiplexing selection circuit; the second output end of the first single-pole double-set switch is used as the second output end of the multiplexing selection circuit; The isolation circuit includes a first attenuator, a second attenuator, ..., an n+1th attenuator, a low noise amplifier and a power supply control module; The input end of the n+1th attenuator serves as the first input end of the isolation circuit; the output end of the n+1th attenuator is connected to the first input end of the low noise amplifier; the second input end of the low noise amplifier is connected to the output end of the power control module; the input end of the power control module serves as the second input end of the isolation circuit; the output end of the low noise amplifier is respectively connected to the input ends of the first attenuator, the second attenuator, ..., and the nth attenuator; The output end of the first attenuator to the output end of the nth attenuator serve as the first output end to the nth output end of the isolation circuit respectively.

4. The multi-channel variable frequency microwave link measurement circuit according to claim 1, characterized in that: The receiving selection circuit includes a second single-pole double-set switch, a third single-pole double-set switch, ..., and an n+1th single-pole double-set switch; The input end of the second single-pole double-set switch to the input end of the (n+1)th single-pole double-set switch are respectively used as the first input end to the nth input end of the receiving selection circuit.

5. The multi-channel variable frequency microwave link measurement circuit according to claim 1, characterized in that: The transceiver power division selection circuit includes a transceiver power division multiplexing circuit and a transceiver selection circuit; the transceiver power division multiplexing circuit includes a circulator and a second n power divider; the transceiver selection circuit includes an n+2th single-pole double-position switch, ..., and a 2n+1th single-pole double-position switch; The first end of the circulator serves as the first end of the transmit-receive power division selection circuit; the second end of the circulator serves as the n+2th end of the transmit-receive power division selection circuit; the third end of the circulator is connected to the first end of the second n power divider; The second end to the n+1th end of the second n power divider are respectively connected one-to-one with the first end of the n+2th single-pole double-position switch to the first end of the 2n+1th single-pole double-position switch; The second end of the n+2th single-pole double-set switch to the second end of the 2n+1th single-pole double-set switch are respectively connected one-to-one with the first input end to the nth input end of the receiving selection circuit; The third end of the n+2th single-pole double-set switch to the third end of the 2n+1th single-pole double-set switch are respectively used as the second end to the n+1th end of the transmit-receive power division selection circuit.

6. A method for testing a multi-channel variable frequency microwave link, characterized in that: The multi-channel variable frequency microwave link measurement circuit according to any one of claims 1 to 5 is tested using a vector network analyzer, and the test method of the multi-channel variable frequency microwave link comprises: Connect the intermediate frequency signal transmission port to the RF output port of the vector network analyzer, and connect n intermediate frequency signal receiving ports to the input ports of the vector network analyzer for testing, input a TTL control signal to the third input terminal of the control channel calibration circuit, use the channel calibration circuit to control the signal to enter the down-conversion circuit through the receiving selection circuit, and output from the first output terminal to the nth output terminal of the down-conversion circuit, so as to obtain the absolute gain and absolute phase of the frequency conversion of n channels; The RF output port of the vector network analyzer is connected to n RF transceiver ports respectively, and the test output receiving port is connected to the input port of the vector network analyzer for testing, and the control signal enters the transceiver power division selection circuit from the n+1th terminal to the 2nth terminal of the RF transceiver circuit respectively, and is output from the n+2th terminal of the transceiver power division selection circuit, so as to obtain the receiving RF absolute gain and receiving RF absolute phase of the n channels; Based on the frequency conversion absolute gain and frequency conversion absolute phase of the n channels and the receiving RF absolute gain and receiving RF absolute phase of the n channels, the relative gain and relative phase of the signal receiving process of the frequency conversion microwave link of the n channels are determined.

7. The method for testing a multi-channel frequency-converting microwave link according to claim 6, characterized in that: The method of determining the relative gain and relative phase of the signal receiving process of the frequency conversion microwave link of the n channels based on the frequency conversion absolute gain and frequency conversion absolute phase of the n channels and the receiving radio frequency absolute gain and receiving radio frequency absolute phase of the n channels comprises: Select one of the n channels as a target channel, determine a total absolute gain of a signal receiving process of the target channel of a variable frequency microwave link based on a frequency conversion absolute gain of the target channel and a sum of a receiving radio frequency absolute gain of the target channel, and determine a total absolute phase of a signal receiving process of the target channel of a variable frequency microwave link based on a frequency conversion absolute phase of the target channel and a sum of a receiving radio frequency absolute phase of the target channel; Similarly, based on the frequency conversion absolute gain of each other channel and the sum of the receiving RF absolute gain of each other channel, the total absolute gain of the signal receiving process of each other channel of the frequency conversion microwave link is determined, and based on the frequency conversion absolute phase of each other channel and the sum of the receiving RF absolute phase of each other channel, the total absolute phase of the signal receiving process of each other channel of the frequency conversion microwave link is determined; Determine the relative gains of n channels in the signal receiving process of the variable frequency microwave link based on the difference between the total absolute gain of the signal receiving process of the target channel and the total absolute gain of the signal receiving process of other channels; Based on the difference between the total absolute phase of the signal receiving process of the target channel and the total absolute phase of the signal receiving process of other channels, the relative phases of the n channels of the signal receiving process of the variable frequency microwave link are determined.

8. The method for testing a multi-channel frequency conversion microwave link according to claim 6, characterized in that: The testing method of the multi-channel variable frequency microwave link also includes: The RF output port of the vector network analyzer is connected to the test transmission port, and the n RF transceiver ports are respectively connected to the input port of the vector network analyzer for testing, and the channel calibration circuit is used to control the signal to enter the RF transceiver circuit through the transceiver power selection circuit, and output from the first end to the nth end of the RF transceiver circuit, so as to obtain the transmit RF absolute gain and transmit RF absolute phase of the n channels; Based on the transmission radio frequency absolute gains and transmission radio frequency absolute phases of the n channels, the relative gains and relative phases of the signal transmission process of the variable frequency microwave links of the n channels are determined.

9. The method for testing a multi-channel frequency conversion microwave link according to claim 8, characterized in that: The method of determining the relative gain and relative phase of the signal transmission process of the variable frequency microwave link of the n channels based on the absolute gain and absolute phase of the transmitted radio frequency of the n channels includes: Select one of the n channels as a target channel, and determine the relative gains of the n channels in a signal transmission process of a variable frequency microwave link based on a difference between a transmit radio frequency absolute gain of the target channel and a transmit radio frequency absolute gain of other channels; Based on the difference between the transmission radio frequency absolute phase of the target channel and the transmission radio frequency absolute phase of other channels, the relative phases of the n channels in the signal transmission process of the variable frequency microwave link are determined.

10. A variable frequency microwave link, characterized in that: It comprises the multi-channel variable frequency microwave link measurement circuit as claimed in any one of claims 1 to 5.

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