Digital circuit breaker address automatic distribution system and method

Abstract

The invention discloses a digital circuit breaker address automatic distribution system and method, and the system comprises an intelligent gateway module and a plurality of sub-equipment modules, the intelligent gateway module is in data connection with the plurality of sub-equipment modules, and the two adjacent sub-equipment modules are electrically connected. The method comprises the following steps: step 1, initializing a system; 2, sending an address allocation instruction; step 3, acquiring a voltage signal; step 4, voltage signal processing; step 5, address allocation; according to the invention, the intelligent gateway module obtains the voltage signals of the sub-device modules, and sorts the voltage signals according to the size, thereby automatically allocating a unique address to each sub-device module, enabling the address allocation operation to be simpler, solving the problem of low efficiency caused by manual address allocation, and improving the efficiency of the network. The requirement for the personal ability of an operator is lowered, and the convenience of adding the sub-equipment modules or reallocating the addresses of the sub-equipment modules is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of digital circuit breakers, and in particular to a system and method for automatically allocating addresses of digital circuit breakers. Background Art

[0002] Digital circuit breakers use advanced digital signal processing technology and sensor technology to monitor and analyze parameters such as current and voltage in the circuit in real time. When a circuit fault is detected, the digital circuit breaker can make a quick and accurate judgment, and trigger the circuit breaker action through the electronic control unit to cut off the faulty circuit to protect the safety of electrical equipment and personnel. The existing digital circuit breaker address allocation generally gives priority to assigning fixed addresses to products when networking the products. This means that if there are a large number of products in a distribution box, it will take a lot of time to change the addresses of the products. If there are additional or replaced products, the original products need to be read or recorded before the addresses of the new products can be assigned and networked. This greatly affects the construction efficiency of on-site personnel and requires high personal ability of electricians. Therefore, a digital circuit breaker address automatic allocation system and method are proposed to solve the problem of complex address allocation operation and low efficiency. Summary of the invention

[0003] The object of the present invention is to provide a system and method for automatically allocating addresses of digital circuit breakers to solve the problems raised in the above background technology.

[0004] To achieve the above objectives, the present invention provides the following technical solutions: a digital circuit breaker address automatic allocation system, comprising an intelligent gateway module and a sub-device module, wherein the intelligent gateway module establishes a data connection with multiple sub-device modules, and an electrical connection is established between two adjacent sub-device modules.

[0005] Preferably, the intelligent gateway module includes a first communication unit, a signal processing unit, an address allocation unit and a control unit. The first communication unit, the signal processing unit, the address allocation unit and the control unit establish data connections with the signal processing unit and the control unit respectively, and the signal processing unit establishes a data connection with the address allocation unit.

[0006] Preferably, the first communication unit is used to communicate with the sub-device module, the signal processing unit is used to sort the voltage signal, the address allocation unit is used to allocate addresses according to the sorting result, and the control unit is used to receive the operation instruction.

[0007] Preferably, the sub-device module includes an interface unit, a voltage divider resistor unit, a voltage signal acquisition unit, a second communication unit and a storage unit, and an electrical connection is established between two adjacent sub-device modules through the interface unit, the second communication unit establishes a data connection with the voltage signal acquisition unit and the storage unit respectively, and the voltage divider resistor unit establishes an electrical connection with the voltage signal acquisition unit and the interface unit respectively.

[0008] Preferably, the interface unit is used to connect two adjacent sub-device modules, the voltage divider resistor unit is used for voltage division, the voltage signal acquisition unit uses an analog-to-digital converter to acquire voltage signals, the second communication unit is used to establish communication with the intelligent gateway module, and the storage unit is used to store address information.

[0009] Preferably, the interface unit includes an input interface and an output interface, and the input interface is electrically connected to the voltage divider resistor unit, the input interface is electrically connected to the output interface of the previous-level sub-device module, and the output interface is electrically connected to the input interface of the next-level sub-device module.

[0010] The method for automatically allocating addresses of digital circuit breakers includes the following steps: first, initializing the system; second, issuing an address allocation instruction; third, collecting voltage signals; fourth, processing the voltage signals; and fifth, allocating addresses.

[0011] In the above step 1, a data connection is established between the intelligent gateway module and the plurality of sub-device modules, and an electrical connection is established between two adjacent sub-device modules;

[0012] In the above step 2, the intelligent gateway module sends a voltage signal collection instruction to the sub-device module;

[0013] In the above step 3, the sub-device module collects the voltage signal and sends it to the intelligent gateway module;

[0014] In the above step 4, the intelligent gateway module uses the signal processing unit to sort the voltage signal;

[0015] In the above step 5, the intelligent gateway module allocates a unique address to the sub-device module according to the order of the voltage signal from high to low.

[0016] Preferably, in step 2, specifically: the intelligent gateway module issues a voltage signal acquisition instruction through the control unit, and sends it to the second communication unit through the first communication unit, and the voltage signal acquisition unit receives the voltage signal acquisition instruction through the second communication unit.

[0017] Preferably, in step three, specifically: the voltage signal acquisition unit acquires the voltage signal of the input interface and sends it to the first communication unit through the second communication unit, and the signal processing unit receives the voltage signal through the first communication unit.

[0018] Preferably, in step five, specifically: the address allocation unit allocates addresses according to the order of the voltage signal from high to low, and sends them to the second communication unit through the first communication unit, and the second communication unit sends the addresses to the storage unit for storage.

[0019] Compared with the prior art, the beneficial effects of the present invention are as follows: the present invention obtains the voltage signal of the sub-device module through the intelligent gateway module, and automatically assigns a unique address to each sub-device module by sorting the voltage signal according to size. This design makes the address allocation operation simpler, solves the problem of inefficiency caused by manual address allocation, reduces the personal ability requirements of the operator, and improves the convenience of adding sub-device modules or reallocating the addresses of sub-device modules. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a system structure block diagram of the present invention;

[0021] Figure 2 This is a block diagram of the intelligent gateway module structure of the present invention;

[0022] Figure 3 It is a structural block diagram of the sub-device module of the present invention;

[0023] Figure 4 It is the schematic diagram of the sub-device module of the present invention;

[0024] Figure 5 The present invention is a flow chart of the method.

[0025] In the figure: 1. intelligent gateway module; 11. first communication unit; 12. signal processing unit; 13. address allocation unit; 14. control unit; 2. sub-device module; 21. interface unit; 211. input interface; 212. output interface; 22. voltage-dividing resistor unit; 23. voltage signal acquisition unit; 24. second communication unit; 25. storage unit. DETAILED DESCRIPTION

[0026] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0027] Please refer to the attached Figure 1 -Attached Figure 4, an embodiment provided by the present invention: a digital circuit breaker address automatic allocation system, including an intelligent gateway module 1 and a sub-device module 2, the intelligent gateway module 1 and multiple sub-device modules 2 establish a data connection, and two adjacent sub-device modules 2 establish an electrical connection; the intelligent gateway module 1 includes a first communication unit 11, a signal processing unit 12, an address allocation unit 13 and a control unit 14, the first communication unit 11, the signal processing unit 12, the address allocation unit 13 and the control unit 14, the first communication unit 11 establishes a data connection with the signal processing unit 12 and the control unit 14 respectively, and the signal processing unit 12 establishes a data connection with the address allocation unit 13; the first communication unit 11 is used to communicate with the sub-device module 2, the signal processing unit 12 is used to sort the voltage signal, the address allocation unit 13 is used to allocate the address according to the sorting result, and the control unit 14 is used to receive the operation instruction; the sub-device module 2 includes an interface unit 21, a voltage dividing resistor unit 22, a voltage signal acquisition The interface unit 21 includes an input interface 211 and an output interface 212, and the input interface 211 is electrically connected to the voltage signal acquisition unit 23 and the storage unit 25, and the second communication unit 24 is electrically connected to the voltage signal acquisition unit 23 and the storage unit 25, respectively, and the voltage dividing resistor unit 22 is electrically connected to the voltage signal acquisition unit 23 and the interface unit 21, respectively; the interface unit 21 is used to connect two adjacent sub-device modules 2, the voltage dividing resistor unit 22 is used for voltage division, the voltage signal acquisition unit 23 adopts an analog-to-digital converter for collecting voltage signals, the second communication unit 24 is used to establish communication with the intelligent gateway module 1, and the storage unit 25 is used to store address information; the interface unit 21 includes an input interface 211 and an output interface 212, and the input interface 211 is electrically connected to the voltage dividing resistor unit 22, the input interface 211 is electrically connected to the output interface 212 of the previous sub-device module 2, and the output interface 212 is electrically connected to the input interface 211 of the next sub-device module 2.

[0028] See also Figure 5 , an embodiment provided by the present invention: a method for automatically allocating addresses of digital circuit breakers, comprising step 1, system initialization; step 2, issuing an address allocation instruction; step 3, collecting voltage signals; step 4, voltage signal processing; step 5, address allocation;

[0029] In the above step 1, a data connection is established between the intelligent gateway module 1 and the plurality of sub-device modules 2, and an electrical connection is established between two adjacent sub-device modules 2;

[0030] In the above step 2, the intelligent gateway module 1 sends a voltage signal collection instruction to the sub-device module 2, specifically: the intelligent gateway module 1 sends a voltage signal collection instruction through the control unit 14, and sends it to the second communication unit 24 through the first communication unit 11, and the voltage signal collection unit 23 receives the voltage signal collection instruction through the second communication unit 24;

[0031] In the above step 3, the sub-device module 2 collects the voltage signal and sends it to the intelligent gateway module 1, specifically: the voltage signal acquisition unit 23 collects the voltage signal of the input interface 211, and sends it to the first communication unit 11 through the second communication unit 24, and the signal processing unit 12 receives the voltage signal through the first communication unit 11;

[0032] In the above step 4, the intelligent gateway module 1 uses the signal processing unit 12 to sort the voltage signal;

[0033] In the above step five, the intelligent gateway module 1 assigns a unique address to the sub-device module 2 according to the order of the voltage signal from high to low, specifically: the address allocation unit 13 assigns an address according to the order of the voltage signal from high to low, and sends it to the second communication unit 24 through the first communication unit 11, and the second communication unit 24 sends the address to the storage unit 25 for storage.

[0034] Based on the above, the advantage of the present invention is that when the invention is used, the intelligent gateway module 1 sends a voltage signal acquisition instruction through the control unit 14, and sends it to the second communication unit 24 through the first communication unit 11, the voltage signal acquisition unit 23 receives the voltage signal acquisition instruction through the second communication unit 24, the voltage signal acquisition unit 23 collects the voltage signal of the input interface 211, and sends it to the first communication unit 11 through the second communication unit 24, the signal processing unit 12 receives the voltage signal through the first communication unit 11, the signal processing unit 12 sorts the voltage signal, the address allocation unit 13 allocates addresses according to the order of the voltage signal from high to low, and sends it to the second communication unit 24 through the first communication unit 11, and the second communication unit 24 sends the address to the storage unit 25 for storage, wherein the voltage dividing resistor unit 22 is used to divide the voltage at the input interface 211, the input interface 211 is used to establish an electrical connection with the output interface 212 of the previous-level sub-device module 2, and the output interface 212 is used to establish an electrical connection with the input interface 211 of the next-level sub-device module 2, as shown in the attached Figure 4As shown, resistors R1, R2, R3, .., and RN are connected in series, resistor R1 is connected to V+, resistor RN is connected to V-, an analog-to-digital converter ADC0 is electrically connected between resistor R1 and resistor R2, an analog-to-digital converter ADC1 is electrically connected between resistor R2 and resistor R3, and so on. An analog-to-digital converter ADC is electrically connected between two adjacent resistors. The specific connection method is: a resistor RS1 is connected between two adjacent resistors, the other end of resistor RS1 is connected to a diode D and resistor RS2, the output end of diode D is connected to the analog-to-digital converter ADC, and the other end of resistor RS2 is connected to V-. Diode D is used to protect the analog-to-digital converter ADC, and voltage division is achieved through resistors RS1 and RS2.

[0035] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

Claims

1. A digital circuit breaker address automatic allocation system, comprising an intelligent gateway module (1) and a sub-equipment module (2), characterized in that: The intelligent gateway module (1) establishes a data connection with a plurality of sub-equipment modules (2), and an electrical connection is established between two adjacent sub-equipment modules (2).

2. The digital circuit breaker address automatic allocation system according to claim 1, characterized in that: The intelligent gateway module (1) comprises a first communication unit (11), a signal processing unit (12), an address allocation unit (13) and a control unit (14); the first communication unit (11), the signal processing unit (12), the address allocation unit (13) and the control unit (14); the first communication unit (11) establishes data connections with the signal processing unit (12) and the control unit (14) respectively; and the signal processing unit (12) establishes data connection with the address allocation unit (13).

3. The digital circuit breaker address automatic allocation system according to claim 2, characterized in that: The first communication unit (11) is used to communicate with the sub-equipment module (2), the signal processing unit (12) is used to sort the voltage signal, the address allocation unit (13) is used to allocate addresses according to the sorting processing result, and the control unit (14) is used to receive the operation instruction.

4. The digital circuit breaker address automatic allocation system according to claim 1, characterized in that: The sub-device module (2) comprises an interface unit (21), a voltage-dividing resistor unit (22), a voltage signal acquisition unit (23), a second communication unit (24) and a storage unit (25); two adjacent sub-device modules (2) are electrically connected via the interface unit (21); the second communication unit (24) respectively establishes data connections with the voltage signal acquisition unit (23) and the storage unit (25); and the voltage-dividing resistor unit (22) respectively establishes electrical connections with the voltage signal acquisition unit (23) and the interface unit (21).

5. The digital circuit breaker automatic address allocation system according to claim 4, characterized in that: The interface unit (21) is used to connect two adjacent sub-equipment modules (2), the voltage dividing resistor unit (22) is used to divide the voltage, the voltage signal acquisition unit (23) uses an analog-to-digital converter to acquire the voltage signal, the second communication unit (24) is used to establish communication with the intelligent gateway module (1), and the storage unit (25) is used to store address information.

6. The digital circuit breaker automatic address allocation system according to claim 5, characterized in that: The interface unit (21) comprises an input interface (211) and an output interface (212), wherein the input interface (211) is electrically connected to the voltage-dividing resistor unit (22), the input interface (211) is electrically connected to the output interface (212) of the previous-stage sub-device module (2), and the output interface (212) is electrically connected to the input interface (211) of the next-stage sub-device module (2).

7. A method for automatically allocating addresses of digital circuit breakers, comprising step 1, system initialization; step 2, issuing an address allocation instruction; step 3, collecting voltage signals; step 4, voltage signal processing; step 5, address allocation; characterized in that: In the above step 1, a data connection is established between the intelligent gateway module (1) and the plurality of sub-device modules (2), and an electrical connection is established between two adjacent sub-device modules (2); In the above step 2, the intelligent gateway module (1) sends a voltage signal collection instruction to the sub-device module (2); In the above step 3, the sub-device module (2) collects the voltage signal and sends it to the intelligent gateway module (1); In the above step 4, the intelligent gateway module (1) uses the signal processing unit (12) to sort the voltage signal; In the above step 5, the intelligent gateway module (1) allocates a unique address to the sub-device module (2) according to the order of the voltage signal from high to low.

8. The method for automatically allocating addresses of digital circuit breakers according to claim 7, characterized in that: In the step 2, specifically: the intelligent gateway module (1) issues a voltage signal collection instruction through the control unit (14), and sends it to the second communication unit (24) through the first communication unit (11), and the voltage signal collection unit (23) receives the voltage signal collection instruction through the second communication unit (24).

9. The method for automatically allocating addresses of digital circuit breakers according to claim 7, characterized in that: In the step three, specifically: the voltage signal acquisition unit (23) acquires the voltage signal of the input interface (211) and sends it to the first communication unit (11) through the second communication unit (24), and the signal processing unit (12) receives the voltage signal through the first communication unit (11).

10. The method for automatically allocating addresses of digital circuit breakers according to claim 7, characterized in that: In the step five, specifically: the address allocation unit (13) allocates addresses according to the order of the voltage signal from high to low, and sends them to the second communication unit (24) through the first communication unit (11), and the second communication unit (24) sends the addresses to the storage unit (25) for storage.

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