Semiconductor bonding structure and forming method thereof
By forming bumps of multi-layer conductive layers on the surface of the semiconductor structure and forming bonding layers, the intermetallic compounds are melted and the gap between the bumps is filled by using the hot pressing process, the problem of limited bonding strength in MEMS-level vacuum packaging is solved, and an efficient semiconductor bonding structure is achieved.
Patent Information
- Application Number
- CN202411587658.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-07
- Publication Date
- 2025-02-28
AI Technical Summary
In MEMS-grade vacuum packaging, the brittleness of intermetallic compounds leads to limited bonding strength, and a bonding method that can enhance bonding strength is required.
By forming bumps of multi-layer conductive layers on the surface of the semiconductor structure and forming bonding layers therebetween, the intermetallic compound is melted and the gap between the bumps is filled by a hot pressing process, and a bonding layer with a high contact area is formed to improve bonding strength.
The bonding strength and reliability of the semiconductor bonding structure are improved, and the limitation of intermetallic compound brittleness is overcome by increasing the contact area between the bonding layer and the bump.
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Figure CN119528080A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of semiconductor technology, and in particular to a semiconductor bonding structure and a method for forming the same. Background Art
[0002] In the bonding process, the upper and lower bumps are pressed together at high temperature to form stable intermetallic compounds (IMC). However, due to the inherent brittleness of intermetallic compounds, their bonding strength is limited in MEMS (Micro-Electro-Mechanical System)-level vacuum packaging. Therefore, a bonding method that can enhance the bonding strength is needed. Summary of the invention
[0003] In view of this, an embodiment of the present disclosure provides a semiconductor bonding structure and a method for forming the same.
[0004] To achieve the above objectives, the technical solution of the embodiment of the present disclosure is implemented as follows:
[0005] In a first aspect, an embodiment of the present disclosure provides a semiconductor bonding structure, comprising a first semiconductor structure and a second semiconductor structure stacked and arranged along a first direction, and a bump bonding structure located between the first semiconductor structure and the second semiconductor structure; the bump bonding structure comprises:
[0006] A first bump connected to the first semiconductor structure; the first bump at least comprises a first conductive layer, a second conductive layer and a third conductive layer stacked and arranged in sequence along the first direction; the first conductive layer comprises a first protrusion protruding relative to the second conductive layer in a direction perpendicular to the first direction; the third conductive layer comprises a second protrusion protruding relative to the second conductive layer in a direction perpendicular to the first direction;
[0007] a second bump connected to the second semiconductor structure; the second bump comprising a first portion surrounding the first bump and a second portion connected to the first portion and in contact with the second semiconductor structure;
[0008] A bonding layer is located between the first bump and the second bump; the bonding layer includes a portion located between the first protrusion and the second protrusion in the first direction.
[0009] In an optional implementation, a size of the first conductive layer in the first direction and a size of the third conductive layer in the first direction are both larger than a size of the second conductive layer in the first direction.
[0010] In an optional embodiment, the third conductive layer is located on a side of the second conductive layer that is away from the first semiconductor structure and on two opposite sides along the first direction; a size of the third conductive layer in a direction perpendicular to the first direction is greater than a size of the first conductive layer in a direction perpendicular to the first direction.
[0011] In an optional embodiment, the bonding layer includes an intermetallic compound.
[0012] In an optional implementation, the first bump further includes:
[0013] A fourth conductive layer and a fifth conductive layer; the fourth conductive layer is located between the third conductive layer and the fifth conductive layer; a size of the fifth conductive layer in the first direction and a size of the third conductive layer in the first direction are both larger than a size of the fourth conductive layer in the first direction; the fifth conductive layer includes a third protrusion protruding relative to the fourth conductive layer in a direction perpendicular to the first direction; the bonding layer also includes a portion located between the second protrusion and the third protrusion in the first direction.
[0014] In a second aspect, an embodiment of the present disclosure provides a method for forming a semiconductor bonding structure, comprising:
[0015] providing a first semiconductor structure and a second semiconductor structure;
[0016] A first bump is formed on the surface of the first semiconductor structure; the first bump at least comprises a first conductive layer, a second conductive layer and a third conductive layer which are sequentially stacked and connected along a first direction; the first conductive layer comprises a first protrusion protruding relative to the second conductive layer in a direction perpendicular to the first direction; the third conductive layer comprises a second protrusion protruding relative to the second conductive layer in a direction perpendicular to the first direction;
[0017] Forming a second bump on the surface of the second semiconductor structure; the second bump includes a first portion and a second portion connected to the first portion; the first portion includes a groove, and the groove exposes the second portion;
[0018] The first semiconductor structure and the second semiconductor structure are stacked and arranged along the first direction, and the first bump is placed in the groove;
[0019] A bonding layer is formed between the first bump and the second bump to form a bump bonding structure including the first bump, the second bump and the bonding layer; the bonding layer includes a portion located between the first protrusion and the second protrusion in the first direction.
[0020] In an optional embodiment, the forming method further comprises:
[0021] Before stacking and arranging the first semiconductor structure and the second semiconductor structure along the first direction, an initial bonding layer is formed in the groove; the initial bonding layer covers the bottom and sidewalls of the groove; the initial bonding layer includes an intermetallic compound;
[0022] The forming of a bonding layer between the first bump and the second bump comprises:
[0023] A thermal pressing process is performed on the first semiconductor structure and the second semiconductor structure, and the initial bonding layer is melted and fills the gap between the first bump and the second bump to form the bonding layer.
[0024] In an optional implementation, a size of the groove in the first direction is smaller than a size of the first protrusion in the first direction.
[0025] In an optional implementation, the forming of the first bump includes:
[0026] forming a first mask layer including a first opening on the surface of the first semiconductor structure; the first opening exposing a portion of the surface of the first semiconductor structure;
[0027] forming the first conductive layer in the first opening;
[0028] forming a second mask layer including a second opening on the first mask layer and the first conductive layer; the second opening exposes a portion of the first conductive layer;
[0029] forming the second conductive layer in the second opening;
[0030] forming a third mask layer including a third opening on the second mask layer and the second conductive layer; the third opening exposing the second conductive layer and a portion of the second mask layer;
[0031] The third conductive layer is formed in the third opening; a size of the first conductive layer in the first direction and a size of the third conductive layer in the first direction are both larger than a size of the second conductive layer in the first direction.
[0032] In an optional implementation, the forming of the first bump further includes:
[0033] A fourth conductive layer is formed on the third conductive layer, and a fifth conductive layer is formed on the fourth conductive layer; a size of the fifth conductive layer in the first direction and a size of the third conductive layer in the first direction are both larger than a size of the fourth conductive layer in the first direction; the fifth conductive layer includes a third protrusion protruding relative to the fourth conductive layer in a direction perpendicular to the first direction; the bonding layer also includes a portion located between the second protrusion and the third protrusion in the first direction.
[0034] In the technical solution provided in the present disclosure, a first semiconductor structure and a second semiconductor structure stacked and arranged along a first direction are electrically connected through a bump bonding structure. The first bump in the bump bonding structure may include a plurality of conductive layers stacked and arranged along the first direction. For two adjacent conductive layers, a conductive layer with a larger size in a direction perpendicular to the first direction may have a protrusion relative to a conductive layer with a smaller size in a direction perpendicular to the first direction. The bonding layer filled between the first bump and the second bump may include a portion located between two adjacent protrusions in the first direction, so that the bonding layer and the first bump have a larger contact area, thereby improving the bonding strength of the first bump and the second bump to achieve bonding connection through the bonding layer, thereby improving the reliability of the semiconductor bonding structure. BRIEF DESCRIPTION OF THE DRAWINGS
[0035] Figure 1 A schematic structural diagram of a semiconductor bonding structure provided in an embodiment of the present disclosure;
[0036] Figure 2 A schematic diagram of the structure of the first bump provided in the embodiment of the present disclosure Figure 1 ;
[0037] Figure 3 A schematic diagram of the structure of a second bump provided in an embodiment of the present disclosure;
[0038] Figure 4 A schematic diagram of the structure of the first bump provided in the embodiment of the present disclosure Figure 2 ;
[0039] Figure 5 A schematic diagram of a process for forming a semiconductor bonding structure provided by an embodiment of the present disclosure;
[0040] Figures 6 to 21 A structural schematic diagram of the formation process of a semiconductor bonding structure provided in an embodiment of the present disclosure. DETAILED DESCRIPTION
[0041] The exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the specific embodiments set forth herein. On the contrary, these embodiments are provided in order to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.
[0042] In the following description, a large number of specific details are given to provide a more thorough understanding of the present disclosure. However, it is obvious to those skilled in the art that the present disclosure can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present disclosure, some technical features known in the art are not described; that is, all features of actual embodiments are not described here, and well-known functions and structures are not described in detail.
[0043] In the drawings, like reference numerals refer to like elements throughout.
[0044] It should be understood that spatial relationship terms such as "under", "below", "below", "under", "above", "above", etc., may be used here for convenience of description to describe the relationship between an element or feature shown in the figure and other elements or features. It should be understood that in addition to the orientation shown in the figure, the spatial relationship terms are intended to also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is turned over, then the elements or features described as "under other elements" or "under it" or "under it" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device can be oriented otherwise (rotated 90 degrees or other orientations) and the spatial description terms used herein are interpreted accordingly.
[0045] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be a limitation of the present disclosure. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.
[0046] In the bonding process, the upper and lower bumps are pressed together at high temperature to form stable intermetallic compounds (IMC). However, due to the inherent brittleness of intermetallic compounds, their bonding strength is limited in MEMS (Micro-Electro-Mechanical System)-level vacuum packaging. Therefore, a bonding method that can enhance the bonding strength is needed.
[0047] In this regard, the present disclosure proposes the following implementation modes.
[0048] The present disclosure provides a semiconductor bonding structure. Figure 1 A schematic diagram of a semiconductor bonding structure provided in an embodiment of the present disclosure is shown in FIG. Figure 1 As shown, the semiconductor bonding structure includes a first semiconductor structure 101 and a second semiconductor structure 102 stacked and arranged along a first direction, and a bump bonding structure located between the first semiconductor structure 101 and the second semiconductor structure 102. The bump bonding structure includes: a first bump 200 connected to the first semiconductor structure 101; a second bump 300 connected to the second semiconductor structure 102; and a bonding layer 310 located between the first bump 200 and the second bump 300. Here, the first direction is the Z direction.
[0049] In some specific examples, the first semiconductor structure 101 and the second semiconductor structure 102 are both wafers, and the bump bonding structure is used to achieve electrical connection and integration between wafers. In other specific examples, one of the first semiconductor structure 101 and the second semiconductor structure 102 is a chip and the other is a wafer, and the bump bonding structure is used to achieve electrical connection and integration between the chip and the wafer. In some other specific examples, the first semiconductor structure 101 and the second semiconductor structure 102 are both chips, and the bump bonding structure is used to achieve electrical connection and integration between chips.
[0050] It should be noted that, a bump bonding structure is taken as an example in the figure. In the embodiment of the present disclosure, a plurality of bump bonding structures may be included between the first semiconductor structure 101 and the second semiconductor structure 102, and the plurality of bump bonding structures may be arranged between the first semiconductor structure 101 and the second semiconductor structure 102 along a direction perpendicular to the first direction.
[0051] Figure 2 A schematic diagram of the structure of the first bump provided in the embodiment of the present disclosure is shown in FIG. Figure 2As shown, the first bump 200 at least includes a first conductive layer 201, a second conductive layer 202, and a third conductive layer 203 stacked and arranged in sequence along a first direction; the first conductive layer 201 includes a first protrusion 211 protruding relative to the second conductive layer 202 in a direction perpendicular to the first direction; the third conductive layer 203 includes a second protrusion 212 protruding relative to the second conductive layer 202 in a direction perpendicular to the first direction. Here, the dotted lines in the figure are only used to mark the conductive layers and the protrusions of the conductive layers, and there may be no corresponding dividing lines in the first bump 200.
[0052] Figure 3 A schematic diagram of the structure of the second bump provided in the embodiment of the present disclosure, combined with reference to Figure 1 and Figure 3 The second bump 300 includes a first portion 301 surrounding the first bump 200 and a second portion 302 connected to the first portion 301 and in contact with the second semiconductor structure 102. Here, the dotted line in the figure is only used to mark the first portion and the second portion, and there may be no corresponding dividing line in the second bump 300.
[0053] In some embodiments, in conjunction with reference Figures 1 to 3 , the bonding layer 310 is filled between the first bump 200 and the second bump 300, and includes a portion located between the first protrusion 211 and the second protrusion 212 in the first direction, a portion located between the protrusion and the second portion 302 of the second bump 300 in a direction perpendicular to the first direction, and a portion located between the bottom surface of the first bump 200 and the second portion 301 of the second bump 300 in the first direction, so as to achieve bonding between the first bump 200 and the second bump 300. Thus, a large contact area can be provided between the bonding layer 310 and the first bump 200, and between the bonding layer 310 and the second bump 300, so as to improve the bonding strength between the first bump 200 and the second bump 300.
[0054] In some specific examples, the first bump 200 and the second bump 300 include a metal material, such as one of copper, aluminum, nickel, tin, etc. The bonding layer 310 includes an intermetallic compound, which may include a metal element and a non-metal element, and whose melting point is lower than the melting point of the first bump 200 and the second bump 300. When the first bump 200 and the second bump 300 are bonded by a hot pressing process, the intermetallic compound layer can be melted and filled between the first bump 200 and the second bump 300, and the bonding layer 310 and the first bump 200 and the bonding layer 310 and the second bump 300 are electrically connected through metal bonds.
[0055] In some specific examples, the protrusion in the conductive layer can surround the remaining portion of the conductive layer. For example, in the first conductive layer 201, the first protrusion 211 can surround the portion of the first conductive layer 201 except the first protrusion 211, and in the third conductive layer 203, the second protrusion 212 can surround the portion of the third conductive layer 203 except the second protrusion 212. Then, the bottom surface of the first protrusion 211, the side surface of the second conductive layer 202, and the top surface of the second protrusion 212 can constitute a groove surrounding the second conductive layer 202, and the bonding layer 310 can completely fill the groove, so that there is a larger contact area between the bonding layer 310 and the first bump 200.
[0056] In some specific examples, combined with reference Figure 1 and Figure 2 , the size of the first conductive layer 201 in the first direction and the size of the third conductive layer 203 in the first direction are both larger than the size of the second conductive layer 202 in the first direction. Therefore, when the intermetallic compound is melted and fills the gap between the first protrusion 211 and the second protrusion 212 by the hot pressing process, the intermetallic compound can more easily fill the gap completely, so as to improve the reliability of the bonding layer 310 connecting the first bump 200 and the second bump 300 on the basis of increasing the contact area between the bonding layer 310 and the first bump 200.
[0057] In some specific examples, combined with reference Figure 1 and Figure 2 , the third conductive layer 203 is located on one side of the second conductive layer 202 that is opposite to each other along the first direction and is away from the first semiconductor structure 101; the size of the third conductive layer 203 in the direction perpendicular to the first direction is greater than the size of the first conductive layer 201 in the direction perpendicular to the first direction. Thus, on the basis of increasing the contact area between the side surface of the first bump 200 and the bonding layer 310, the bottom surface of the first bump 200 and the bonding layer 310 also have a larger contact area, thereby further improving the bonding strength between the first bump 200 and the second bump 300.
[0058] In some embodiments, reference Figure 2, the first bump 200 further includes: a fourth conductive layer 204 and a fifth conductive layer 205; the fourth conductive layer 204 is located between the third conductive layer 203 and the fifth conductive layer 205; the size of the fifth conductive layer 205 in the first direction and the size of the third conductive layer 203 in the first direction are both larger than the size of the fourth conductive layer 204 in the first direction; the fifth conductive layer 205 includes a third protrusion 213 protruding relative to the fourth conductive layer 204 in a direction perpendicular to the first direction; the bonding layer 310 also includes a portion located between the second protrusion 212 and the third protrusion 213 in the first direction. Thus, the contact area between the first bump 200 and the bonding layer 310 can be further increased, thereby further improving the bonding strength between the first bump 200 and the second bump 300.
[0059] In some embodiments, Figure 4 A schematic diagram of the structure of the first bump provided in the embodiment of the present disclosure Figure 2 ,like Figure 4 As shown, the sizes of the second conductive layer 202 and the fourth conductive layer 204 in the direction perpendicular to the first direction may be different, for example, the size of the second conductive layer 202 in the X direction may be smaller than the size of the fourth conductive layer 204 in the X direction. In addition, the size of the fifth conductive layer 205 in the direction perpendicular to the first direction may be larger than the size of the third conductive layer 203 in the direction perpendicular to the first direction, and the size of the third conductive layer 203 in the direction perpendicular to the first direction may be larger than the size of the first conductive layer 201 in the direction perpendicular to the first direction.
[0060] It should be noted that the above embodiments are described using the example that the first bump includes three conductive layers or five conductive layers, but the present disclosure is not limited to this. In the embodiments of the present disclosure, the first bump may also include a larger number of conductive layers to further increase the contact area between the first bump and the bonding layer.
[0061] In an embodiment of the present disclosure, the first bump may include a plurality of conductive layers stacked and arranged along a first direction. For two adjacent conductive layers, the conductive layer with a larger size in a direction perpendicular to the first direction may have a protrusion relative to the conductive layer with a smaller size in a direction perpendicular to the first direction. The bonding layer filled between the first bump and the second bump may include a portion located between two adjacent protrusions in the first direction, so that the bonding layer and the first bump have a larger contact area, thereby improving the bonding strength of the first bump and the second bump through the bonding layer to achieve bonding connection, thereby improving the reliability of the semiconductor bonding structure.
[0062] Based on a concept similar to the above-mentioned semiconductor bonding structure, the present disclosure also provides a method for forming a semiconductor bonding structure. Figure 5A schematic diagram of a process for forming a semiconductor bonding structure provided by an embodiment of the present disclosure is shown in FIG. Figure 5 As shown, the method for forming a semiconductor bonding structure includes the following steps:
[0063] Step S10: providing a first semiconductor structure and a second semiconductor structure;
[0064] Step S20: forming a first bump on the surface of the first semiconductor structure; the first bump at least comprises a first conductive layer, a second conductive layer and a third conductive layer which are sequentially stacked and connected along a first direction; the first conductive layer comprises a first protrusion protruding relative to the second conductive layer in a direction perpendicular to the first direction; the third conductive layer comprises a second protrusion protruding relative to the second conductive layer in a direction perpendicular to the first direction;
[0065] Step S30: forming a second bump on the surface of the second semiconductor structure; the second bump includes a first portion and a second portion connected to the first portion; the first portion includes a groove, and the groove exposes the second portion;
[0066] Step S40: stacking and arranging the first semiconductor structure and the second semiconductor structure along the first direction, and placing the first bump in the groove;
[0067] Step S50: forming a bonding layer between the first bump and the second bump to form a bump bonding structure including the first bump, the second bump and the bonding layer; the bonding layer includes a portion located between the first protrusion and the second protrusion in the first direction.
[0068] Figures 6 to 21 The structural diagram of the formation process of the semiconductor bonding structure provided by the embodiment of the present disclosure is as follows. Figures 5 to 21 A method for forming a semiconductor bonding structure provided in an embodiment of the present disclosure is introduced.
[0069] In some embodiments, the specific process of performing step S20 may include: referring to Figure 6 , forming a first mask layer 400 including a first opening 401 on the surface of the first semiconductor structure 101, wherein the first opening 401 exposes a portion of the surface of the first semiconductor structure 101; Figure 6 and Figure 7 , forming a first conductive layer 201 in the first opening 401; referring to Figure 8 , forming a second mask layer 402 including a second opening 403 on the first mask layer 400 and the first conductive layer 201, wherein the second opening 403 exposes a portion of the first conductive layer 201; Figure 8 and Fig. 9, forming a second conductive layer 202 in the second opening 403; referring to Fig.10 , a third mask layer 404 including a third opening 405 is formed on the second mask layer 402 and the second conductive layer 202, wherein the third opening 405 exposes the second conductive layer 202 and a portion of the second mask layer 402; Fig.10 and Fig.11 , a third conductive layer 203 is formed in the third opening 405. Thus, a first bump including a first conductive layer 201, a second conductive layer 202 and a third conductive layer 203 stacked and arranged along the first direction can be formed.
[0070] In some specific examples, the specific process of forming the mask layer including the opening may include: forming an initial mask layer by a deposition process, and forming the opening in the initial mask layer by photolithography and etching processes. The specific process of forming the conductive layer in the opening may include: forming an initial conductive layer on the opening and the mask layer by a deposition process, and removing excess metal material by a chemical mechanical polishing process so that the top surface of the conductive layer is flush with the top surface of the mask layer.
[0071] By using a method similar to that of forming the first conductive layer 201, the second conductive layer 202 and the third conductive layer 203 in the above embodiment, the fourth conductive layer 204 and the fifth conductive layer 205 may be further formed on the third conductive layer 203. Fig.12 , forming a fourth mask layer 406 including a fourth opening 407 on the third conductive layer 203 and the third mask layer 404, wherein the fourth opening 407 exposes a portion of the third conductive layer 203; Fig.12 and Fig.13 , forming a fourth conductive layer 204 in the fourth opening 407; referring to Fig.14 , forming a fifth mask layer 408 including a fifth opening 409 on the fourth conductive layer 204 and the fourth mask layer 406, wherein the fifth opening 409 exposes the fourth conductive layer 204 and a portion of the fourth mask layer 406; Fig.14 and Fig.15 , a fifth conductive layer 205 is formed in the fifth opening 409 .
[0072] In some specific examples, the size of the first mask layer 400 in the first direction and the size of the third mask layer 404 in the first direction are both larger than the size of the second mask layer 402 in the first direction, and the size of the third mask layer 404 in the first direction and the size of the fifth mask layer 408 in the first direction are both larger than the size of the fourth mask layer 406 in the first direction, thereby, the size of the first conductive layer 201 in the first direction and the size of the third conductive layer 203 in the first direction are both larger than the size of the second conductive layer 202 in the first direction, and the size of the third conductive layer 203 in the first direction and the size of the fifth conductive layer 205 in the first direction are both larger than the size of the fourth conductive layer 204 in the first direction.
[0073] In some embodiments, in conjunction with reference Fig.15 and Fig.16 , multiple mask layers can be removed to form a first bump 200 connected to the first semiconductor structure 101, the first bump 200 includes a first conductive layer 201, a second conductive layer 202, a third conductive layer 203, a fourth conductive layer 204 and a fifth conductive layer 205 stacked and arranged along a first direction, and the first conductive layer 201 includes a first protrusion 211 protruding relative to the second conductive layer 202 in a direction perpendicular to the first direction; the third conductive layer 203 includes a second protrusion 212 protruding relative to the second conductive layer 202 in a direction perpendicular to the first direction; the fifth conductive layer 205 includes a third protrusion 213 protruding relative to the fourth conductive layer 204 in a direction perpendicular to the first direction.
[0074] In some embodiments, the specific process of performing step S30 may include: referring to Fig.17 , forming an initial bump 500 on the surface of the second semiconductor structure 102; Fig.17 and Fig.18 , the initial bump 500 is etched to form a second bump 300 , wherein the second bump 300 includes a first portion 301 and a second portion 302 connected to the first portion 301 , the first portion 301 includes a groove 501 , and the groove 501 exposes the second portion 302 .
[0075] In some embodiments, reference Fig.19 Before executing step S40, the method for forming a semiconductor bonding structure further includes: forming an initial bonding layer 600 in the groove 501; the initial bonding layer 600 covers the bottom and sidewalls of the groove 501; and the initial bonding layer 600 includes an intermetallic compound.
[0076] In some embodiments, in conjunction with reference Fig.16 , Fig.19 and Fig. 20The specific process of performing step S40 may include: stacking and arranging the first semiconductor structure 101 and the second semiconductor structure 102 along the first direction, and placing the first bump 200 in the groove 501 .
[0077] It should be noted that executing step S20 may include forming a plurality of first bumps 200 on the surface of the first semiconductor structure 101, executing step S30 may include forming a plurality of second bumps 300 on the surface of the second semiconductor structure 102, one first bump 200 may correspond to one second bump 300, and executing step S40 may include placing the first bump 200 in the groove 501 of the corresponding second bump 300.
[0078] In some specific examples, combined with reference Fig.16 and Fig.18 , the size of the groove 501 in the first direction should be smaller than the size of the corresponding first protrusion 200 in the first direction.
[0079] In some embodiments, in conjunction with reference Fig. 20 and Fig.21 , the specific process of performing step S50 may include: performing a hot pressing process on the first semiconductor structure 101 and the second semiconductor structure 102, including melting the initial bonding layer 600 of the intermetallic compound and filling the gap between the first bump 200 and the second bump 300 to form a bonding layer 310. In the process of performing the hot pressing process, under the action of heat and mechanical force along the first direction, the distance between the first semiconductor structure 101 and the second semiconductor structure 102 can be further shortened, the molten intermetallic compound can fill the gap between the first bump 200 and the second bump 300, and a metal bond can be formed between the finally formed bonding layer 310 and the first bump 200 and between the bonding layer 310 and the second bump 300 to achieve bonding between the first bump 200 and the second bump 300, and electrical connection between the first semiconductor structure 101 and the second semiconductor structure 102.
[0080] In the embodiment of the present disclosure, in the semiconductor structure formed by the method for forming a semiconductor bonding structure in the above embodiment, there is a large contact area between the first bump 200 and the bonding layer 310, and between the second bump 300 and the bonding layer 310, thereby improving the bonding strength between the first bump 200 and the second bump 300.
[0081] In the embodiment of the present disclosure, the size of the first conductive layer 201 in the first direction and the size of the third conductive layer 203 in the first direction are both larger than the size of the second conductive layer 202 in the first direction, and the size of the third conductive layer 203 in the first direction and the size of the fifth conductive layer 205 in the first direction are both larger than the size of the fourth conductive layer 204 in the first direction. In the process of performing the hot pressing process, the molten intermetallic compound can relatively easily and completely fill the gap between two adjacent protrusions in the first bump 200, thereby improving the bonding reliability on the basis of improving the bonding strength.
[0082] The features disclosed in several device embodiments provided in the present disclosure may be arbitrarily combined without conflict to obtain new device embodiments.
[0083] The methods disclosed in several method embodiments provided in the present disclosure can be arbitrarily combined without conflict to obtain new method embodiments.
[0084] The above description is only a specific implementation mode of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure.
Claims
1. A semiconductor bonding structure, characterized in that: It includes a first semiconductor structure and a second semiconductor structure stacked and arranged along a first direction, and a bump bonding structure located between the first semiconductor structure and the second semiconductor structure; The bump bonding structure comprises: A first bump connected to the first semiconductor structure; the first bump at least comprises a first conductive layer, a second conductive layer and a third conductive layer stacked and arranged in sequence along the first direction; the first conductive layer comprises a first protrusion protruding relative to the second conductive layer in a direction perpendicular to the first direction; the third conductive layer comprises a second protrusion protruding relative to the second conductive layer in a direction perpendicular to the first direction; a second bump connected to the second semiconductor structure; the second bump comprising a first portion surrounding the first bump and a second portion connected to the first portion and in contact with the second semiconductor structure; A bonding layer is located between the first bump and the second bump; the bonding layer includes a portion located between the first protrusion and the second protrusion in the first direction.
2. The semiconductor bonding structure according to claim 1, characterized in that: A size of the first conductive layer in the first direction and a size of the third conductive layer in the first direction are both larger than a size of the second conductive layer in the first direction.
3. The semiconductor bonding structure according to claim 1, characterized in that: The third conductive layer is located on one side of the second conductive layer opposite to each other along the first direction and away from the first semiconductor structure; the size of the third conductive layer in a direction perpendicular to the first direction is greater than the size of the first conductive layer in a direction perpendicular to the first direction.
4. The semiconductor bonding structure according to claim 3, characterized in that: The bonding layer includes an intermetallic compound.
5. The semiconductor bonding structure according to claim 1, characterized in that: The first convex block further comprises: A fourth conductive layer and a fifth conductive layer; the fourth conductive layer is located between the third conductive layer and the fifth conductive layer; a size of the fifth conductive layer in the first direction and a size of the third conductive layer in the first direction are both larger than a size of the fourth conductive layer in the first direction; the fifth conductive layer includes a third protrusion protruding relative to the fourth conductive layer in a direction perpendicular to the first direction; the bonding layer also includes a portion located between the second protrusion and the third protrusion in the first direction.
6. A method for forming a semiconductor bonding structure, characterized in that: include: providing a first semiconductor structure and a second semiconductor structure; A first bump is formed on the surface of the first semiconductor structure; the first bump at least comprises a first conductive layer, a second conductive layer and a third conductive layer which are sequentially stacked and connected along a first direction; the first conductive layer comprises a first protrusion protruding relative to the second conductive layer in a direction perpendicular to the first direction; the third conductive layer comprises a second protrusion protruding relative to the second conductive layer in a direction perpendicular to the first direction; Forming a second bump on the surface of the second semiconductor structure; the second bump includes a first portion and a second portion connected to the first portion; the first portion includes a groove, and the groove exposes the second portion; The first semiconductor structure and the second semiconductor structure are stacked and arranged along the first direction, and the first bump is placed in the groove; A bonding layer is formed between the first bump and the second bump to form a bump bonding structure including the first bump, the second bump and the bonding layer; the bonding layer includes a portion located between the first protrusion and the second protrusion in the first direction.
7. The method for forming a semiconductor bonding structure according to claim 6, characterized in that: The forming method further comprises: Before stacking and arranging the first semiconductor structure and the second semiconductor structure along the first direction, an initial bonding layer is formed in the groove; the initial bonding layer covers the bottom and sidewalls of the groove; the initial bonding layer includes an intermetallic compound; The forming of a bonding layer between the first bump and the second bump comprises: A thermal pressing process is performed on the first semiconductor structure and the second semiconductor structure, and the initial bonding layer is melted and fills the gap between the first bump and the second bump to form the bonding layer.
8. The method for forming a semiconductor bonding structure according to claim 6, characterized in that: A size of the groove in the first direction is smaller than a size of the first bump in the first direction.
9. The method for forming a semiconductor bonding structure according to claim 6, characterized in that: The forming of the first bump comprises: forming a first mask layer including a first opening on the surface of the first semiconductor structure; the first opening exposing a portion of the surface of the first semiconductor structure; forming the first conductive layer in the first opening; forming a second mask layer including a second opening on the first mask layer and the first conductive layer; the second opening exposes a portion of the first conductive layer; forming the second conductive layer in the second opening; forming a third mask layer including a third opening on the second mask layer and the second conductive layer; the third opening exposing the second conductive layer and a portion of the second mask layer; The third conductive layer is formed in the third opening; a size of the first conductive layer in the first direction and a size of the third conductive layer in the first direction are both larger than a size of the second conductive layer in the first direction.
10. The method for forming a semiconductor bonding structure according to claim 9, characterized in that: The forming of the first bump further comprises: A fourth conductive layer is formed on the third conductive layer, and a fifth conductive layer is formed on the fourth conductive layer; a size of the fifth conductive layer in the first direction and a size of the third conductive layer in the first direction are both larger than a size of the fourth conductive layer in the first direction; the fifth conductive layer includes a third protrusion protruding relative to the fourth conductive layer in a direction perpendicular to the first direction; the bonding layer also includes a portion located between the second protrusion and the third protrusion in the first direction.