ASIC (application specific integrated circuit)-based multichannel parallel charge detection device for space charged particle detection

Abstract

The invention belongs to the technical field of space environment detection, and relates to an ASIC (application specific integrated circuit)-based multichannel parallel charge detection device for space charged particle detection, which comprises an anode plate, a front placing plate and a digital acquisition and processing plate, and signal transmission is performed between the anode plate and the front placing plate as well as between the front placing plate and the digital acquisition and processing plate through inter-plate connectors; the anode plate is an annular anode and is divided into a plurality of anodes, the output of each anode is connected with a current-limiting resistor in series, and a charge signal output by each anode is transmitted to the front amplifier plate through the inter-plate connector; the pre-amplification board adopts an integrated charge sensitive amplifier ASIC to amplify multiple paths of charge signals output by the anode plate, and outputs multiple paths of digital pulses to be input into the digital acquisition processing board through an inter-board connector; and the digital acquisition and processing board is used for detecting and counting multiple paths of digital pulses output by the pre-amplification board in parallel, and periodically packaging and outputting the digital pulses to a PC (Personal Computer) end.

Description

Technical Field

[0001] The present invention belongs to the technical field of space environment detection, and in particular relates to an ASIC-based multi-channel parallel charge detection device for space charged particle detection. Background Art

[0002] The space charged particle detector is one of the important components of the space environment detector. Its detection principle is to obtain the energy, direction and flux of charged particles in the space environment by measuring, and to obtain the space environment parameters by analyzing and calculating. Most of the particle receivers in the space particle detector use semiconductor sensors, and their output is a weak charge signal. The signal processing circuit of the detector is difficult to measure it directly, and it needs to be amplified by a charge sensitive amplifier. After amplification, the pulse is detected and counted by the digital acquisition circuit.

[0003] Direction measurement is an important detection factor of space charged particle detectors, and the directional parameters include azimuth and elevation. Figure 1 As shown, the azimuth angle measurement method is: the charged particles in space pass through the grid, are pitch-deflected by the upper deflection plate and the lower deflection plate, and then enter the electrostatic analyzer. After completing energy screening, they are output to the microchannel plate. The microchannel plate performs primary amplification and then outputs to a 360° annular anode plane. The annular anode is a metal charge receiving electrode. The annular anode is divided into N equal parts. Each small anode represents an azimuth angle. Each anode output is connected to a charge-sensitive amplifier. After the charge-sensitive amplifier amplifies the received charge, the digital acquisition circuit detects and counts the pulses, thereby finally realizing azimuth angle detection.

[0004] The azimuth detection accuracy is mainly determined by the angle of the annular anode plane. The charge sensitive amplifier A121 currently used is a single-channel independent charge sensitive amplifier with a large volume and weight. Due to the small angle of the anode division and the short distance, the channels are prone to errors such as Figure 2 As shown in the figure, the current azimuth detection that can be achieved uses a maximum of 16 A121s, and the azimuth detection accuracy is 22.5°, so the azimuth measurement accuracy is low. Summary of the invention

[0005] In view of the technical defects of the existing technology that the single-channel independent charge sensitive amplifier is large in size and weight and crosstalk interference is easy to occur between channels, a multi-channel parallel charge detection device based on ASIC for space charged particle detection is proposed. Multi-channel charge detection can be achieved by adopting an integrated 16-channel charge sensitive amplifier ASIC (Application-Specific Integrated Circuit); through circuit modular design and reasonable layout and wiring of the printed circuit board, the interference problem between channels is effectively avoided.

[0006] In view of this, the present invention discloses an ASIC-based multi-channel parallel charge detection device for space charged particle detection, comprising: an anode plate, a front-end amplifier board and a digital acquisition processing board, wherein inter-board connectors are used for signal transmission between the anode plate and the front-end amplifier board, and between the front-end amplifier board and the digital acquisition processing board; The anode plate is a ring-shaped anode and is divided into a plurality of anodes. Each anode output is connected in series with a current limiting resistor. The charge signal output by each anode is transmitted to the front-end amplifier board through an inter-board connector. The preamplifier board adopts an integrated charge sensitive amplifier ASIC to amplify the multi-channel charge signals output by the anode board, and outputs multi-channel digital pulses to be input to the digital acquisition and processing board through the inter-board connector; The digital acquisition and processing board performs parallel detection and counting on the multiple digital pulses output by the front-end amplifier board, and periodically packages and outputs them to the PC end.

[0007] Preferably, the annular anode is divided into 48 anodes, and each anode output is connected in series with a 20Ω current-limiting resistor.

[0008] Preferably, the preamplifier board uses three integrated charge sensitive amplifier ASICs, each ASIC having 16 preamplifiers.

[0009] Preferably, the digital acquisition and processing board includes: FPGA and SRAM, wherein the FPGA works periodically, counts the 48 digital pulses input by the front-end board in each working cycle, and packs the data into SRAM, and packs the count value and outputs it to the PC for analysis and processing at the end of the working cycle; The SRAM is used to buffer pulse counts.

[0010] Preferably, the FPGA controls the ASIC through SPI communication to configure the ASIC threshold parameters.

[0011] Preferably, the digital acquisition and processing board includes EEPORM, which is used to store configuration parameters of the detection device.

[0012] Preferably, the digital acquisition and processing board includes a crystal oscillator and a refresh circuit, wherein: The crystal oscillator is used to provide a 20 MHz clock signal to the FPGA; The refresh circuit is used to refresh the configuration signal of the FPGA.

[0013] Preferably, the digital acquisition and processing board communicates with the PC via an RS422 bus.

[0014] Compared with the prior art, the advantages of the present invention are: 1. The present invention utilizes a 16-channel integrated charge sensitive amplifier ASIC to realize 48-channel parallel azimuth detection, thereby achieving high-precision azimuth detection. At the same time, 48-channel parallel detection can effectively improve the azimuth detection sensitivity.

[0015] 2. The present invention adopts a modular circuit design, and separates the anode plate, the front-end amplifier board, and the data processing circuit board into separate boards, which can effectively avoid the problem of crosstalk / interference between channels.

[0016] 3. The use of integrated ASIC effectively reduces the weight of the detection device and reduces the power consumption of the detection device. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a schematic diagram of the direction measurement principle; Figure 2 It is the crosstalk phenomenon between adjacent azimuths; Figure 3 It is a circuit modular design block diagram; Figure 4 It is anode circuit design; Figure 5 This is the principle block diagram of the front amplifier circuit; Figure 6 It is the schematic diagram of the ASIC circuit; Figure 7 It is the circuit diagram of the digital acquisition and processing board; Figure 8 is the azimuth response curve. DETAILED DESCRIPTION

[0018] The present invention uses 3 ASIC integrated charge sensitive amplifiers to achieve 48-channel parallel charge detection. The device includes: an anode plate, a preamplifier board and a digital acquisition processing board, wherein the anode plate and the preamplifier board, and the preamplifier board and the digital acquisition processing board are connected by inter-board connectors for signal transmission; The anode plate is a ring anode and is divided into multiple anodes. Each anode output is connected in series with a current limiting resistor. The charge signal output by each anode is transmitted to the front-end amplifier board through the inter-board connector. The preamplifier board uses an integrated charge sensitive amplifier ASIC to amplify the multi-channel charge signals output by the anode board, and outputs multi-channel digital pulses to the digital acquisition and processing board through the inter-board connector; The digital acquisition and processing board performs parallel detection and counting of the multiple digital pulses output by the preamplifier board, and periodically packages and outputs them to the PC.

[0019] The technical solution of the present invention is described in detail below with reference to the accompanying drawings and embodiments.

[0020] Example

[0021] The embodiment of the present invention provides an ASIC-based multi-channel parallel charge detection device for space charged particle detection.

[0022] The present invention adopts modular design, such as Figure 3 As shown in the figure, the anode circuit, charge sensitive amplifier circuit, and digital acquisition and processing circuit in the detection device are divided into three printed boards, namely the anode board, the preamplifier board, and the digital acquisition and processing board. The three boards use inter-board connectors for signal transmission, and the weak charge signal output by the anode is prevented from being interfered by the digital signal by physical isolation.

[0023] like Figure 4 As shown, in one embodiment, the anode plate is designed with a ring anode with an inner diameter of 66 mm and an outer diameter of 85 mm, and is divided into 48 anodes. Each anode output is connected in series with a 20Ω current limiting resistor, and the charge signals output by the 48 anodes are transmitted to the front-end amplifier board through the inter-board connector.

[0024] The preamplifier board needs to amplify the 48 charge signals output by the anode, and after amplification, it outputs 48 digital pulses to the digital acquisition and processing board. In order to amplify the trace charge signal, it is necessary to select a high-sensitivity preamplifier; in order to achieve miniaturization and low power consumption of the instrument, it is necessary to avoid using discrete devices (48 amplifiers are required). Figure 5 As shown, in one embodiment, three ASICs are selected, and each ASIC has 16 preamplifiers. The circuit principle of each ASIC is as follows Figure 6 shown.

[0025] The digital acquisition and processing board performs parallel detection and counting on the 48 digital pulses output by the preamplifier board and periodically packages and outputs them. Figure 7 As shown, the digital acquisition and processing board includes FPGA (Field-Programmable Gate Array) minimum unit circuit, SRAM (Static Random-Access Memory) and EEPROM (Electrically Erasable Programmable Read-Only Memory). FPGA works periodically. In each working cycle, it counts the 48 digital pulses input by the front-end board and packs the data into SRAM. At the end of the working cycle, the count value is packed and output to the PC for analysis and processing. FPGA also controls ASIC through SPI communication to configure ASIC threshold and other parameters. SRAM in the detection device is used to cache pulse counts, and EEPROM is used to store the configuration parameters of this detection device.

[0026] By adopting a multi-channel parallel charge detection device based on ASIC for space charged particle detection, the charge is injected at 48 azimuth angles in sequence, and the azimuth angle measurement data is obtained after analyzing the output data, such as Figure 8 The test curves shown are for 48 azimuth angles. The device of the present invention can achieve an azimuth angle resolution of 7.5°.

[0027] The device of the present invention improves the azimuth detection accuracy from 22.5° to 7.5°, and the weight of the ASIC integrated charge sensitive amplifier is only 1 / 3 of that of A121. After adopting the present invention, the weight of the detector is reduced by 60g, and the power consumption of a single machine is reduced by 1W. The specific parameter comparison is shown in Table 1: Table 1

[0028] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the present invention. Although the present invention is described in detail with reference to the embodiments, it should be understood by those skilled in the art that any modification or equivalent replacement of the technical solutions of the present invention does not depart from the spirit and scope of the technical solutions of the present invention and should be included in the scope of the claims of the present invention.

Claims

1. An ASIC-based multi-channel parallel charge detection device for space charged particle detection, characterized in that: include: Anode board, front-end amplifier board and digital acquisition and processing board, wherein the anode board and the front-end amplifier board, as well as the front-end amplifier board and the digital acquisition and processing board are connected by inter-board connectors for signal transmission; The anode plate is a ring-shaped anode and is divided into a plurality of anodes. Each anode output is connected in series with a current limiting resistor. The charge signal output by each anode is transmitted to the front-end amplifier board through an inter-board connector. The preamplifier board adopts an integrated charge sensitive amplifier ASIC to amplify the multi-channel charge signals output by the anode board, and outputs multi-channel digital pulses to be input to the digital acquisition and processing board through the inter-board connector; The digital acquisition and processing board performs parallel detection and counting on the multiple digital pulses output by the front-end amplifier board, and periodically packages and outputs them to the PC end.

2. The ASIC-based multi-channel parallel charge detection device for space charged particle detection according to claim 1, characterized in that: The annular anode is divided into 48 anodes, and each anode output is connected in series with a 20Ω current limiting resistor.

3. The ASIC-based multi-channel parallel charge detection device for space charged particle detection according to claim 1, characterized in that: The preamplifier board adopts three integrated charge sensitive amplifier ASICs, and each ASIC has 16 preamplifiers.

4. The ASIC-based multi-channel parallel charge detection device for space charged particle detection according to claim 1, characterized in that: The digital acquisition and processing board includes: FPGA and SRAM; wherein, The FPGA works periodically, counting the 48 digital pulses input by the front-end amplifier board in each working cycle, and packing the data into SRAM, and packing the count value and outputting it to the PC for analysis and processing at the end of the working cycle; The SRAM is used for caching pulse counts.

5. The ASIC-based multi-channel parallel charge detection device for space charged particle detection according to claim 4, characterized in that: The FPGA also controls the ASIC through the SPI communication mode to configure the ASIC threshold parameters.

6. The ASIC-based multi-channel parallel charge detection device for space charged particle detection according to claim 4, characterized in that: The digital acquisition and processing board includes EEPORM, which is used to store configuration parameters of the detection device.

7. The ASIC-based multi-channel parallel charge detection device for space charged particle detection according to claim 4, characterized in that: The digital acquisition and processing board includes: a crystal oscillator and a refresh circuit, wherein: The crystal oscillator is used to provide a 20 MHz clock signal to the FPGA; The refresh circuit is used to refresh the configuration signal of the FPGA.

8. The ASIC-based multi-channel parallel charge detection device for space charged particle detection according to claim 4, characterized in that: The digital acquisition and processing board communicates with the PC via an RS422 bus.

Images