Method and system for upgrading ZYNQ processor based on SPI

Abstract

The invention discloses a method and a system for upgrading a ZYNQ processor based on an SPI (Serial Peripheral Interface). The ZYNQ processor executes the following steps: sending a heartbeat message to an upper computer, and establishing serial port communication based on an SPI protocol with the upper computer; receiving an update preparation message sent by the upper computer, and then sending a preparation completion message to the upper computer; receiving an update data message sent by the upper computer, wherein the update data message comprises a data packet number, a data packet total number and a check code; analyzing the update data message to obtain and store a data segment of the upgrade program file, verifying the data segment, and sending a return message to the upper computer if the verification is passed; and based on the data segment of the stored upgrade program file, executing an upgrade update program, and sending an update message to the upper computer. According to the method, the problem of code upgrading of the ZYNQ processor is solved based on the SPI, and the correctness of data transmission is ensured through a specific data interaction mode.

Description

Technical Field

[0001] The present invention relates to the technical field of ZYNQ system upgrade and update, and in particular to an upgrade method and system of a ZYNQ processor based on SPI. Background Art

[0002] ZYNQ-7000 is based on Xilinx's fully programmable and scalable processing platform structure. Normally, ZYNQ's program updates are completed using JTAG, which has the advantages of fast download speed, stability and reliability; however, the JTAG download method has certain limitations, such as it cannot be updated over a long distance or some devices cannot be opened after the product is delivered due to confidentiality and reliability requirements. Only the power and communication interfaces are reserved, and JTAG cannot be used for updating.

[0003] The Chinese patent with publication number CN105573800B and titled "A single-board or multi-board system based on ZYNQ and online update method" discloses a solution for using an Ethernet interface to implement program upgrades for one or more ZYNQ boards, which improves the update efficiency compared to traditional methods. However, in some special usage scenarios, the device can only interact with the outside world through SPI, and cannot perform network communication, serial port communication, or the traditional downloader method to update the device. Summary of the invention

[0004] Technical purpose: In view of the above technical problems, the present invention proposes an upgrade method and system for a ZYNQ processor based on SPI, which solves the problem of upgrading the ZYNQ processor code when the device cannot use the serial port and only uses the SPI protocol to interact with the outside world, and ensures the correctness of data transmission through a specific data interaction method.

[0005] Technical solution: To achieve the above technical objectives, the present invention adopts the following technical solution: An upgrade method of a ZYNQ processor based on SPI, the ZYNQ processor performs the following steps: After power-on, it sends heartbeat messages to the host computer and establishes interactive communication with the host computer based on the SPI protocol; Receive the update preparation message sent by the host computer, and then send a preparation completion message to the host computer; Receive the update data message sent by the host computer, the update data message includes the data packet number, the total number of data packets and the check code, the host computer divides the upgrade program file into multiple data segments, and checks each data separately and packages them into a preset format respectively; Parse the update data message, obtain the data segment of the upgrade program file and store it, verify the data segment, and if the verification passes, send a reply message to the upper computer, otherwise, receive the update instruction message again; Based on the data segment of the stored upgrade program file, the upgrade program is executed. If the update process is correct, an update completion message is sent to the host computer. Otherwise, an update failure message is sent to the host computer.

[0006] Preferably, the ZYNQ processor is configured in QSPI FLASH mode, and the upgrade program file is a BIN file.

[0007] Preferably, the host computer performs the following steps: Receive the heartbeat message sent by the ZYNQ processor and establish serial communication based on the SPI protocol; Update preparation message sent to ZYNQ processor; After receiving the preparation completion message sent by the ZYNQ processor, the upgrade program file is divided into multiple data segments, and each data segment is individually verified, and then packaged into a preset format to obtain an update data message including a data packet number, a total number of data packets and a check code; Sending the update data message to the ZYNQ processor; Determine whether the reply message sent by the ZYNQ processor is received: if the reply message is not received, the update fails and the process ends; if the reply message is received, proceed to the next step; Parse the reply message and determine whether all data messages of the upgrade program file have been sent: if there are unsent data messages, send the next data message to ZYNQ; if all data messages have been sent, proceed to the next step; Determine whether the update completion message sent by the ZYNQ processor has been received. If the update completion message has been received, the update is completed and the process ends.

[0008] Preferably, the update data message is configured to include: a message header, a device number, a message type, a total number of data packets, a data packet number, data, and a check code; The reply message is configured to include: a message header, a device number, a message type, a reply status, a packet number and a check code.

[0009] An upgrade system for a ZYNQ processor based on SPI comprises a host computer and one or more ZYNQ processors, wherein the PL end of the ZYNQ processor and the host computer are respectively provided with SPI receiving and transmitting modules, and the ZYNQ processor executes the upgrade method.

[0010] Preferably, the host computer executes the upgrading method.

[0011] Beneficial effects: Due to the adoption of the above technical solution, the present invention has the following beneficial effects: The present invention is based on SPI transmission of BIN file data and data interaction flow, and can realize the program update function of the ZYNQ processor when only SPI is communicable; an interactive mode for updating data is designed, and data verification is performed on each packet of subpackaged data as well as verification of the entire BIN file, which can effectively prevent partial subpackaged data errors due to link problems, thereby causing upgrade data abnormalities, and ensure that data is not lost during transmission, and the correctness of the update data is guaranteed by data verification, ultimately achieving reliable transmission of upgrade data under unreliable links. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 A data flow chart of a ZYNQ system based on the SPI protocol proposed by the present invention; Figure 2 It is a flowchart of the message interaction between the ZYNQ chip and the host computer in the method of the present invention; Figure 3 This is a schematic diagram of the update message interaction between the ZYNQ chip and the host computer; Figure 4 Flowchart updated for the host computer; Figure 5 Updated flowchart for ZYNQ; Figure 6 A schematic diagram of the BIN data message format. DETAILED DESCRIPTION

[0013] The embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0014] The present invention discloses a ZYNQ system based on SPI protocol, including a host computer and one or more ZYNQ boards, wherein the ZYNQ board includes at least one ZYNQ chip, and the ZYNQ chip includes a PL terminal, an AXI terminal, and a PS terminal. The ZYNQ chip is configured with an IO port, a DDR3 controller, and a QSPI FLASH controller for SPI protocol transmission, a 1GB DDR3 memory is externally mounted on the DDR3 controller, and a single-chip 128Mb QSPI FLASH is externally mounted on the QSPI FLASH controller; an SPI receiving and transmitting module is added to the PL terminal of the ZYNQ chip, and the host computer is connected with the SPI receiving and transmitting module, so that the ZYNQ chip establishes communication with the host computer, and the data flow is as follows: Figure 1 shown.

[0015] SPI (Serial Peripheral Interface) is a serial peripheral interface. The SPI protocol has low overhead because data transmission is synchronous and does not require additional start bits, stop bits, or parity bits. It can reduce the redundancy of data transmission and improve communication efficiency. The SPI protocol supports full-duplex communication, that is, the master device and the slave device can send and receive data at the same time, improving communication efficiency. Compared with the UART protocol, the SPI protocol has unique advantages in data transmission rate, communication mode, hardware connection and number of pins, protocol overhead and implementation complexity, and applicable scenarios.

[0016] The present invention also proposes an upgrade method for the ZYNQ system based on the SPI protocol. After the ZYNQ chip is powered on and operates normally and establishes serial port communication with the host computer, the host computer sends the BIN file to be updated to the ZYNQ chip via SPI for erasing.

[0017] The message interaction process between the host computer and each ZYNQ chip is as follows: Figure 2 and Figure 3 As shown, it includes the following processes: (1) The host computer receives the heartbeat message sent by the ZYNQ chip; (2) The host computer updates the preparation message and sends it to the ZYNQ chip; (3) The ZYNY chip sends a preparation completion message to the host computer; (4) The host computer updates the data message and sends it to the ZYNQ chip; (5) After the ZYNQ chip receives the data message, the PS side determines whether the reception is complete based on the data length in the data message: If there is no new data within N seconds and the length of the received data is not equal to the length of the data in the message, the data reception fails and the N value is assigned according to the actual effect; If the data is received successfully, it needs to be verified. After the verification is successful, a data reception completion message is sent to the host computer. At the same time, the ZYNQ chip starts to update and perform FLASH write operations. After writing, it reads and compares the data. If the data comparison is normal, an update completion message is sent to the host computer. If the data comparison is abnormal, an update failure message is sent to the host computer. (6) Repeat step (5) until the ZYNQ chip completes all updates.

[0018] like Figure 4 As shown in the figure, the specific steps of the ZYNQ chip upgrade process include: A1. Set the BOOTMODE of the ZYNQ board to QSPI FLASH mode and power on to start, then enter A2. A2. After the ZYNQ chip is powered on and operates normally, the host computer waits for the heartbeat message transmitted by the ZYNQ chip and makes a communication connection judgment. If a heartbeat message is received, it enters A3, otherwise it enters A4; A3. After receiving the heartbeat message, the host computer sends an update preparation instruction and enters A5; A4. Communication connection failed, update failed; A5. After receiving the preparation instruction, ZYNQ sends the preparation completion instruction. If the specified message is not received, no data is sent; A6. After the host computer receives the ZYNQ preparation completion instruction, it splits the BIN file to be updated and the BIN file verification data (added after the BIN file number) into several data packets according to the message format, and transmits the packets to the ZYNQ chip one by one, and enters A7; if no instruction is received within the specified time, enter A8; A7, after ZYNQ receives a packet of update data message, it performs message parsing and verification. If the parsing and verification are correct, the data is stored in the DDR specified address, and a data reply message is sent to enter A9; if the update data message is not received for a certain period of time, and the total received data length is less than the BIN update file length, enter A8; if the update data message is not received for a certain period of time, and the total received data length is equal to the BIN update file length, enter A10; A8. Update failed. A9, check and compare the data reply message. If the packet number is consistent with the current packet number, send the next packet of data. If the data reply message is not received for a long time, go to A8. A10, BIN file is received successfully, the BIN file data is verified and compared with the checksum at the end of the BIN file. If the verification data is correct, the lower computer executes the FLASH erase command to erase the QSPIFLASH data on the ZYNQ board and enter A11, otherwise enter A8; A11, execute the FLASH write command, the BIN file cached in DDR3 will be written into the QSPI FLASH, the ZYNQ system online update process is completed, and enter A12; A12. ZYNQ uploads the update completion instruction to the host computer.

[0019] The interactive process for BIN data transmission is as follows Figure 5 As shown, the BIN data message format is as follows Figure 6 As shown: B1. The host computer verifies the BIN file and adds a check code at the end of the data; B2. Divide the BIN file into packets according to the message format; B3. The host computer sends the same update data message at regular intervals; the update data message includes a message header, device number, message type, total number of data packets, data packet number, data and checksum; B4. ZYNQ receives the BIN file data, performs parsing and verification, and if the parsing is correct, it will report the packet data back, that is, send a report message to the host computer. The report message contains the message header, device number, message type, report status, package number and check code; B5. The host computer receives the reply message of the current sending package. If the host computer fails to receive and parse the reply message of the current sending package for a long time, the update fails. If the reception and parsing are successful, enter B6. B6: Determine whether the current message has been sent. If not, the packet number is increased by 1, and a new packet of message data is sent, and enter B4.

[0020] The present invention is based on SPI transmission of BIN file data and data interaction process. When only SPI is available for communication, the program update function of the ZYNQ processor can be realized. The SPI transmission mode allows data to be transmitted bit by bit, and even allows pause, so the transmission efficiency is higher.

[0021] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the above embodiments do not limit the present invention in any form, and any technical solution obtained by equivalent replacement or equivalent transformation falls within the protection scope of the present invention.

Claims

1. A method for upgrading a ZYNQ processor based on SPI, characterized in that: The Zynq processor performs the following steps: After power-on, it sends heartbeat messages to the host computer and establishes serial communication based on the SPI protocol with the host computer; Receive the update preparation message sent by the host computer, and then send a preparation completion message to the host computer; Receive an update data message sent by the host computer, wherein the update data message includes a data packet number, a total number of data packets and a check code, and the host computer divides the upgrade program file into multiple data segments, and performs a separate check on each data segment and packages them into a preset format respectively; Parse the update data message, obtain and store the data segment of the upgrade program file, verify the data segment, and if the verification passes, send a reply message to the upper computer, and execute the upgrade program based on the stored data segment of the upgrade program file, otherwise, receive the update data message again; During the execution of the upgrade program, if the update process is correct, an update completion message is sent to the host computer, otherwise, an update failure message is sent to the host computer.

2. The method for upgrading a ZYNQ processor based on SPI according to claim 1, characterized in that: The ZYNQ processor is set to QSPI FLASH mode, and the upgrade program file is a BIN file.

3. The method for upgrading a ZYNQ processor based on SPI according to claim 1, characterized in that: The host computer performs the following steps: Receive the heartbeat message sent by the ZYNQ processor and establish serial communication based on the SPI protocol; Update preparation message sent to ZYNQ processor; After receiving the preparation completion message sent by the ZYNQ processor, the upgrade program file is divided into multiple data segments, and each data segment is individually checked and packaged into a preset format to obtain an update data message including a data packet number, a total number of data packets and a check code; Sending the update data message to the ZYNQ processor; Determine whether the reply message sent by the ZYNQ processor is received: if the reply message is not received, the update fails and the process ends; if the reply message is received, proceed to the next step; Parse the reply message and determine whether all data messages of the upgrade program file have been sent: if there are unsent data messages, send the next data message to ZYNQ; if all data messages have been sent, proceed to the next step; Determine whether the update completion message sent by the ZYNQ processor has been received. If the update completion message has been received, the update is completed and the process ends.

4. A method for upgrading a ZYNQ processor based on SPI according to any one of claims 1 or 3, characterized in that: The update data message is set to include: a message header, a device number, a message type, a total number of data packets, a data packet number, data and a message format of a check code; The reply message is configured to include: a message header, a device number, a message type, a reply status, a packet number and a check code.

5. An upgrade system for a ZYNQ processor based on SPI, characterized in that: It comprises a host computer and one or more ZYNQ processors, wherein the PL end of the ZYNQ processor and the host computer are respectively provided with SPI receiving and transmitting modules, and the ZYNQ processor executes the upgrading method described in claim 1.

6. The SPI-based ZYNQ processor upgrade system according to claim 5, characterized in that: The host computer executes the upgrade method described in claim 3.

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