Capturing and demodulating method and system based on VDE signal

Abstract

The invention belongs to the field of spacecraft receiving equipment, and particularly relates to a VDE signal-based capturing and demodulation method and system. The VDE-based signal capturing and demodulating method provided by the invention has the advantages that the occupied equipment complexity is low, the same process is adopted for different Link, and the equipment complexity is reduced according to different parameter selection. Compared with the prior art, whether pilot frequency exists in the data frames or not is not distinguished, and both the data frames with the pilot frequency and the data frames without the pilot frequency can be captured and demodulated; according to the invention, the selection of the maximum M path and the continuous iteration judgment can be adjusted according to system requirements and hardware resource conditions. According to the difference between the noise mean value and the peak value, the maximum peak value is captured in different signal-to-noise ratio environments.

Description

Technical Field

[0001] The invention belongs to the field of spacecraft receiving equipment, and in particular relates to a capture and demodulation method and system based on VDE signals. Technical Background

[0002] As the core of VDES, VDE is used to transmit large amounts of complex and multi-structured information to achieve high-bandwidth data communication of VDES. VDE's various Link modes include different frame header lengths, different encoding and decoding methods, different modulation methods, different channel rates, different lengths of pilot insertion methods, whether to insert a pilot, etc. The existence of multiple Link modes makes the demodulation equipment complex. The existing VDE has many types of capture and tracking in different modes, and conventional capture and tracking methods cannot cover the two main application scenarios of inserting a pilot or not adding a pilot. In order to reduce the resource usage of the receiver equipment, the various Link modes of the VDE signal are analyzed, and the same capture and demodulation process is used to adapt to multiple Link modes by configuring different parameters. Summary of the invention

[0003] In view of the above problems, the present application proposes a capture and demodulation method based on VDE signals, which can unify the commonly used VDE multiple Link modes by using the same capture and demodulation process.

[0004] To this end, the present application adopts the following technical solution to solve the above problem: a capture and demodulation method based on VDE signal, comprising:

[0005] S1. Receive the VDE signal, perform digital-to-analog conversion by ADC sampling, and perform N times channel rate accumulation on I and Q channels to form input signals;

[0006] S2. Perform frame header conjugate complex multiplication on the input signal, perform a first peak search on the complex multiplication result, and obtain a coarse frequency deviation;

[0007] S3. Based on the coarse frequency deviation, the frequency deviation is divided into bins, and the frequency deviation compensation is performed on the result of the conjugate multiplication of the frame header according to the divided frequency deviation;

[0008] S4. Perform a second peak search on the compensation signal, obtain a fine frequency deviation, and record the second peak occurrence time as the timing time; at the same time, compare the maximum value of the second peak search result with the multiple gear values ​​after the frequency deviation is divided into bins to determine the maximum M path;

[0009] S5. Compensate the maximum M channels with N times the frequency and phase rate, and add them to the data rate;

[0010] S6. Select data according to the data format of Link mode, unify the data format containing pilot and non-pilot;

[0011] S7. Descramble and decode the selected data, and then use CRC to check and restore the data.

[0012] Furthermore, the N times channel rate is accumulated to 4 times.

[0013] Furthermore, the first peak search for the complex multiplication result in S2 is specifically performed as follows: the search result is padded with zeros and then FFT is calculated. When the maximum peak of the FFT exceeds a threshold, the frequency corresponding to the maximum peak is the coarse frequency deviation.

[0014] Furthermore, the frequency deviation classification in S3 is based on the cached data of the conjugate complex multiplication result in S2.

[0015] Furthermore, the second peak search in S4 is specifically as follows: after zero padding the compensation signal, calculate FFT, determine that the FFT exceeding the threshold is the peak, the peak result is recorded as the fine frequency deviation, and the time when the peak occurs is the timing time.

[0016] Furthermore, in the compensation frequency and phase in S5, fine frequency offset is used to compensate the I-channel and Q-channel data, and the data are accumulated according to the data rate.

[0017] Furthermore, S6 described data selection according to the data format of the Link mode is to select the I-channel and Q-channel data after compensating for the fine frequency deviation in sequence from the timing moment according to the selected Link mode. If there is a pilot, the pilot point needs to be skipped, and the pilot and non-pilot modes of the VDE signal are unified to select the data before being sent to the descrambling and decoder.

[0018] Furthermore, the CRC verification method described in S7 is: if the verification passes, the data is directly restored; if the verification fails, M paths are reselected from the remaining frequency deviation bins, and it is iterated for a maximum of K times.

[0019] The second technical solution of the present application provides a VDE signal-based capture and demodulation system for completing the above method, including a VDE signal capture module and a VDE signal demodulation module;

[0020] Among them, the VDE signal capture module includes:

[0021] ADC sampling module: used to convert the VDE signal received by the receiver into an input signal;

[0022] I-channel and Q-channel N-times channel rate accumulation module: used to accumulate the I-channel and Q-channel channel rates to preliminarily improve the signal-to-noise ratio;

[0023] Frame header conjugation module: used to generate local frame header conjugation data and multiply it with the I-channel and Q-channel signals accumulated to N times the channel rate;

[0024] Calculate FFT after zero padding: Used to calculate FFT after zero padding of the complex multiplication result of the frame header conjugate module, search for the first peak, and obtain the frequency corresponding to the peak exceeding the threshold as the coarse frequency deviation;

[0025] Data cache module: used to cache the signal after the frame header conjugate multiplication;

[0026] Frequency binning module: used to bin the signal frequency, read the cache (the conjugate result of the frame header after multiplication with the signal), and perform frequency offset compensation on the cache data according to the frequency offset gear value. Perform a second peak search on the signal after frequency offset compensation, compare the peak values ​​of multiple gears, and the frequency corresponding to the second peak is the fine frequency offset. The second peak appears as the timing moment, and the fine frequency offset controls the DDS to generate compensation and signal multiplication.

[0027] Maximum value comparison module and maximum M-path selection module: used for maximum value comparison and maximum M-path selection;

[0028] Compensation frequency and phase module: used to generate DDS real and imaginary signals according to the captured correct frequency deviation, multiply the received data I and Q, and complete the frequency deviation and phase compensation after binning;

[0029] Accumulation to data rate module: used to accumulate the N times rate of compensation frequency deviation and phase to the data rate, so as to further improve the signal-to-noise ratio;

[0030] The VDE signal demodulation module includes:

[0031] Link mode parameter selection module: used to select data according to the data format of the Link mode, and unify the data formats with and without pilots;

[0032] Descrambling module: used to complete data descrambling;

[0033] Decoding module: used to send the data to the corresponding decoder according to the decoding format used to complete the decoding;

[0034] CRC check module: determines whether the data passes the check. If it passes the check, the data is directly restored. If it fails the check, M paths are reselected from the remaining frequency deviation bins, with a maximum of K iterations.

[0035] Beneficial effects: The VDE-based signal capture and demodulation method provided by the present invention is a method that occupies less equipment complexity, and adopts the same process for different links, based on different parameter selections, thereby reducing equipment complexity. In addition, the present invention has the following advantages over the prior art:

[0036] (1) The present invention does not distinguish whether a data frame has a pilot. Both data frames with and without a pilot can be captured and demodulated.

[0037] (2) The maximum M-path selection module and the whether to continue iteration judgment module of the present invention can be adjusted according to system requirements and hardware resource conditions.

[0038] (3) The present invention completes the maximum peak capture under different signal-to-noise ratio environments based on the difference between the noise mean and the peak. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 Schematic diagram of the VDE signal capture and demodulation method of the present invention.

[0040] Figure 2 This is a schematic diagram of the working principle of Link mode data selection of the present invention. DETAILED DESCRIPTION

[0041] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0042] To this end, the present application adopts the following technical solution to solve the above problem: a capture and demodulation method based on VDE signal, comprising:

[0043] The second technical solution of the present application provides a VDE signal-based capture and demodulation system for completing the above method, including a VDE signal capture module and a VDE signal demodulation module;

[0044] like Figure 1 As shown: The embodiment of the present application provides a capture and demodulation method based on a VDE signal, comprising:

[0045] S1. Receive the VDE signal, sample it with the ADC for digital-to-analog conversion, and then perform N times channel rate accumulation on the I and Q channels to form the input signal.

[0046] Among them, the ADC sampling adopts AD9361 digital-to-analog converter, the accumulation calculation module adopts ZYNQ 7035 FPGA chip, and N times the channel rate is accumulated to 4 times, that is, the I channel and Q channel accumulate modules at N times the channel rate respectively. Considering the timing accuracy of burst signals, accumulation at a channel rate of N=4 is sufficient; a higher accumulation rate can bring higher timing accuracy, but it will consume more resources, therefore, 4 times the signal rate is selected for accumulation.

[0047] S2. Perform frame header conjugate complex multiplication on the input signal, perform a first peak search on the complex multiplication result, and obtain a coarse frequency deviation.

[0048] In the frame header conjugate complex multiplication, the VDE signal Link mode has frame headers of 27 and 48 bits in length, and its conjugate sequence is stored as a local code group. The input signal is correlated and matched, and the search result is padded with zeros and then the FFT is calculated. The value of the FFT exceeding the threshold is determined and recorded as the maximum peak value, and the frequency corresponding to the maximum peak value is recorded as the coarse frequency deviation.

[0049] It should be noted that the number of FFT points is P, which is generally 8192; the maximum peak value obtained exceeds the threshold (D times the noise mean value is used as the threshold, and D is generally 2 to 4).

[0050] It can be understood that after the conjugate complex multiplication of the frame header is performed, the conjugate complex multiplication result needs to be cached to facilitate fast reading of the cache during subsequent frequency offset binning.

[0051] S3. Based on the coarse frequency deviation, the frequency deviation is divided into different grades, and the frequency deviation compensation is performed on the result of the conjugate complex multiplication of the frame header according to the divided frequency deviation.

[0052] The basis for the frequency deviation classification is the cached data of the conjugate complex multiplication result in S2. The data cache and frequency classification are classified according to the channel rate * 4 / P, generally divided into 9 grades (-4*channel rate * 4 / P, -3*channel rate * 4 / P, -2*channel rate * 4 / P, -1*channel rate * 4 / P, coarse frequency deviation, 1*channel rate * 4 / P, 2*channel rate * 4 / P, 3*channel rate * 4 / P, 4*channel rate * 4 / P). After reading the cached data, the frequency deviation is compensated according to the 9 grades to obtain the compensated data.

[0053] S4. Perform a second peak search on the compensation signal, and the obtained frequency deviation is the fine frequency deviation, and the time when the second peak occurs is recorded as the timing time; at the same time, compare the maximum value of the second peak search result with the multiple gear values ​​after the frequency deviation is divided into grades to determine the largest M path; specifically, calculate FFT after zero padding the compensation signal, determine that the FFT exceeding the threshold is the peak, and the peak result is recorded as the fine frequency deviation, and the time when the peak occurs is the timing time.

[0054] Specifically, the maximum value comparison module and the maximum M-channel selection module compare the maximum value of the peak value found in the second search after frequency binning, and select the maximum M-channel data. Generally, the M value is selected to be 3. The judgment condition is that the peak value of the middle gear ≥ the peak value of the gears on both sides. At this time, the frequency deviation is captured correctly, and the moment when the maximum value appears is used as the timing moment.

[0055] S5. Compensate the maximum M channels with a frequency and phase at N times the rate, and add the rate to the data rate.

[0056] In the compensation frequency and phase, the maximum value found in the second search is used as the timing, and the M-channel fine frequency deviation is obtained according to the binning situation to generate DDS, which is compensated to the I-channel and Q-channel data. The compensation frequency and phase module determines the fine frequency deviation and phase, which is the prerequisite for the Link mode parameter selection module to select the I-channel and Q-channel data to be demodulated.

[0057] The module for accumulating to the data rate accumulates N times the rate of the compensation frequency deviation and phase to the data rate, thereby achieving the effect of improving the signal-to-noise ratio.

[0058] S6. Select data according to the data format of the Link mode, and unify the data formats with and without pilots.

[0059] The data selection according to the data format of the Link mode is to select the I-channel and Q-channel data after compensating the fine frequency offset in sequence from the timing moment according to the selected Link mode. If there is a pilot, the pilot point needs to be skipped, and the pilot-containing and non-pilot modes of the VDE signal are unified to select the data before being sent to the descrambling and decoder. The Link mode parameter selection module unifies the data formats containing and without pilots, which is convenient for subsequent descrambling and decoding processing and simplifies the receiver equipment.

[0060] The compensation frequency and phase module preferably adopts AD9361 digital-to-analog converter of AD company and ZYNQ 7035 of AMD company, which converts the received RF signal to 110M sampling baseband I and Q channels; the accumulated data rate of the baseband signal adopts NCO frequency division, and the enable signal is tightly coupled with the 110M master clock. The entire receiver module uses a master clock, and the remaining divided clocks use pulse enable signals as trigger signals. The position where the maximum value calculated by zero-filled FFT appears corresponds to the coarse frequency deviation, and on the basis of the coarse frequency deviation, the frequency grading and compensation are completed, and the fine frequency deviation is continued to be searched to meet the input conditions to be demodulated. Afterwards, according to different Link modes, an enable signal is generated, corresponding to the I and Q data to be demodulated. The compensation frequency and phase module can be independent of the extraction of pilot data in subsequent data.

[0061] like Figure 2 The figure shows the working principle of Link mode data selection, which adds the N times rate of compensation fine frequency deviation and phase to the data rate to achieve the effect of improving the signal-to-noise ratio. The data is selected according to the data format of the Link mode to generate the corresponding enable signal (corresponding to the I and Q paths of the data accumulated to the data rate). The data containing the pilot needs to skip the pilot point; the data without the pilot is selected according to the data length.

[0062] S7. Descramble and decode the selected data, and then use CRC to check and restore the data.

[0063] Specifically, the descrambling is to first store the data into a cache, read it according to the length of a serial frame, and send it to the descrambling to complete the descrambling.

[0064] Specifically, the decoding is to send the data to a corresponding decoder according to the decoding format used to complete the decoding.

[0065] Specifically, the CRC verification method is: if the verification is passed, the data is directly restored; if the verification is not passed, M paths are reselected from the remaining frequency deviation bins, and it is iterated for a maximum of K times.

[0066] The second embodiment of the present application discloses a system for implementing the above-mentioned VDE signal capture and demodulation method, including a VDE signal capture module and a VDE signal demodulation module;

[0067] Among them, the VDE signal capture module includes:

[0068] ADC sampling module: used to convert the VDE signal received by the receiver into an input signal;

[0069] I-channel and Q-channel N-times channel rate accumulation module: used to accumulate the I-channel and Q-channel channel rates to preliminarily improve the signal-to-noise ratio;

[0070] Frame header conjugation module: used to generate local frame header conjugation data and multiply it with the I-channel and Q-channel signals accumulated to N times the channel rate;

[0071] Calculate FFT after zero padding: Used to calculate FFT after zero padding of the complex multiplication result of the frame header conjugate module, search for the first peak, and obtain the frequency corresponding to the peak exceeding the threshold as the coarse frequency deviation;

[0072] Data cache module: used to cache the signal after the frame header conjugate multiplication;

[0073] Frequency binning module: used to bin the signal frequency, read the cache (the conjugate result of the frame header after multiplication with the signal), and perform frequency offset compensation on the cache data according to the frequency offset gear value. Perform a second peak search on the signal after frequency offset compensation, compare the peak values ​​of multiple gears, and the frequency corresponding to the second peak is the fine frequency offset. The second peak appears as the timing moment, and the fine frequency offset controls the DDS to generate compensation and signal multiplication.

[0074] Maximum value comparison module and maximum M-path selection module: used for maximum value comparison and maximum M-path selection;

[0075] Compensation frequency and phase module: used to generate DDS real and imaginary signals according to the captured correct frequency deviation, multiply the received data I and Q, and complete the frequency deviation and phase compensation after binning;

[0076] Accumulation to data rate module: used to accumulate the N times rate of compensation frequency deviation and phase to the data rate, so as to further improve the signal-to-noise ratio;

[0077] The VDE signal demodulation module includes:

[0078] Link mode parameter selection module: used to select data according to the data format of the Link mode, and unify the data formats with and without pilots;

[0079] Descrambling module: used to complete data descrambling;

[0080] Decoding module: used to send the data to the corresponding decoder according to the decoding format used to complete the decoding;

[0081] CRC check module: determines whether the data passes the check. If it passes the check, the data is directly restored. If it fails the check, M paths are reselected from the remaining frequency deviation bins, with a maximum of K iterations.

[0082] This application takes a VDE signal received by a receiver as an example to explain the working process in detail:

[0083] Taking Link26 signal as an example, the received VDE signal is 110M through the ADC sampling module of AD9361;

[0084] The I and Q channel rates are accumulated through the I and Q channel N-times channel rate accumulation modules. The accumulated rate is 33600*4=134400Hz. The accumulated rate is generated by 110M in the form of NCO and used as an enable signal to align with the data accumulated to 134400Hz.

[0085] The frame header conjugation module generates local frame header conjugation data (4 times the sampling point), and multiplies it with the I-channel and Q-channel signals accumulated to 134400Hz, and then passes through the data buffering module to buffer the data;

[0086] The result of the complex multiplication is supplemented with 8084 zeros (8192-27*4=1940) to 8192 points, and the FFT is calculated to search for the peak value exceeding the threshold. The corresponding frequency is the coarse frequency deviation, and the first peak search is completed;

[0087] According to the coarse frequency deviation, the signal frequency is divided into 9 levels (coarse frequency deviation, coarse frequency deviation ±16.4Hz, coarse frequency deviation ±32.8Hz, coarse frequency deviation ±65.6Hz, and coarse frequency deviation ±131.25Hz), the cache is read (the conjugate result of the frame header after complex multiplication with the signal), and the cache data is compensated for the frequency deviation according to the frequency deviation level value. A second peak search is performed on the signal after frequency deviation compensation, and the sizes of multiple level peaks are compared. The frequency corresponding to the second peak is the fine frequency deviation. The occurrence of the second peak is used as the timing moment, and the maximum 3 channels are selected to complete the frequency deviation and phase compensation after division; then, it is accumulated to a data rate of 33600Hz to further improve the signal-to-noise ratio.

[0088] The Link26 pilot interval is 27, the pilot point is skipped, and the data is selected for subsequent processing; the selected data is converted into serial data through parallel-to-serial conversion and sent to the descrambling module to complete the data descrambling; according to the decoding format used, it is sent to the corresponding decoder to complete the decoding; the decoded data is sent to the CRC check module. If the check passes, the data is directly restored. If the check fails, 3 channels are reselected from the remaining frequency deviation bins, and a maximum of 3 iterations are performed.

[0089] The above description is only a specific implementation mode of the present invention, but the protection scope of the present invention is not limited thereto. Any modification, equivalent substitution and improvement made by any technician familiar with the technical field within the technical scope disclosed by the present invention and within the spirit and principle of the present invention should be covered by the protection scope of the present invention.

Claims

1. A capture and demodulation method based on VDE signal, characterized in that: The following steps are involved: S1. Receive the VDE signal, perform digital-to-analog conversion by ADC sampling, and perform N times channel rate accumulation on I and Q channels to form input signals; S2. Perform frame header conjugate complex multiplication on the input signal, perform a first peak search on the complex multiplication result, and obtain a coarse frequency deviation; S3. Based on the coarse frequency deviation, the frequency deviation is divided into bins, and the frequency deviation compensation is performed on the conjugate multiplication result of the frame header according to the divided frequency deviation; S4. Perform a second peak search on the compensation signal, obtain a fine frequency deviation, and record the second peak occurrence time as the timing time; at the same time, compare the maximum value of the second peak search result with the frequency deviation after the multiple gear values ​​are divided to determine the maximum M path; S5. Compensate the maximum M channels with N times the frequency and phase rate, and add them to the data rate; S6. Select data according to the data format of Link mode, unify the data format containing pilot and non-pilot; S7. Descramble and decode the selected data, and then use CRC to check and restore the data.

2. The method according to claim 1, characterized in that: The N times channel rate is accumulated to 4 times.

3. The method according to claim 1, characterized in that: The first peak search for the complex multiplication result described in S2 is specifically: after the search result is padded with zeros, FFT is calculated. When the maximum peak of FFT exceeds the threshold, the frequency corresponding to the maximum peak is the coarse frequency deviation.

4. The method according to claim 1, characterized in that: The second peak search described in S4 is specifically as follows: after zero padding the compensation signal, calculate FFT, determine that the FFT result exceeding the threshold is the peak, the frequency value corresponding to the peak result is recorded as the fine frequency deviation, and the time when the peak occurs is the timing time.

5. The method according to claim 1, characterized in that: In the compensation frequency and phase of S5, the I-channel and Q-channel data are compensated with a fine frequency offset and accumulated according to the data rate.

6. The method according to claim 1, characterized in that: S6 described data selection according to the data format of the Link mode is to select the I-channel and Q-channel data after compensating the fine frequency deviation in sequence from the timing moment according to the selected Link mode. If there is a pilot, the pilot point needs to be skipped, and the pilot and non-pilot modes of the VDE signal are unified to select the data before being sent to the descrambling and decoder.

7. The method according to claim 1, characterized in that: The verification method using CRC described in S7 is: if the verification passes, the data is directly restored; if the verification fails, M paths are reselected from the remaining frequency deviation bins, and it is iterated for a maximum of K times.

8. A VDE signal capture and demodulation system, used to implement the VDE signal capture and demodulation method according to any one of claims 1 to 8, characterized in that: It includes a VDE signal capture module and a VDE signal demodulation module; Among them, the VDE signal capture module includes: ADC sampling module: used to convert the VDE signal received by the receiver into an input signal; I-channel and Q-channel N-times channel rate accumulation module: used to accumulate the I-channel and Q-channel channel rates to preliminarily improve the signal-to-noise ratio; Frame header conjugation module: used to generate local frame header conjugation data and multiply it with the I-channel and Q-channel signals accumulated to N times the channel rate; Calculate FFT after zero padding: Used to calculate FFT after zero padding of the complex multiplication result of the frame header conjugate module, and search for the first peak. The frequency corresponding to the peak value exceeding the threshold is obtained as the coarse frequency deviation; Data cache module: used to cache the signal after the frame header conjugate multiplication; Frequency binning module: used to bin the signal frequency, read the cache (the conjugate result of the frame header after multiplication with the signal), and perform frequency offset compensation on the cache data according to the frequency offset gear value. Perform a second peak search on the signal after frequency offset compensation, compare the peak values ​​of multiple gears, and the frequency corresponding to the second peak is the fine frequency offset. The second peak appears as the timing moment, and the fine frequency offset controls the DDS to generate compensation and signal multiplication. Maximum value comparison module and maximum M-path selection module: used for maximum value comparison and maximum M-path selection; Compensation frequency and phase module: used to generate DDS real and imaginary signals based on the captured correct frequency deviation. Multiply the received data I and Q to complete the frequency deviation and phase compensation after the binning; Accumulation to data rate module: used to accumulate the N times rate of compensation frequency deviation and phase to the data rate, so as to further improve the signal-to-noise ratio; The VDE signal demodulation module includes: Link mode parameter selection module: used to select data according to the data format of the Link mode, and unify the data formats with and without pilots; Descrambling module: used to complete data descrambling; Decoding module: used to send the data to the corresponding decoder according to the decoding format used to complete the decoding; CRC check module: determines whether the data passes the check. If it passes the check, the data is directly restored. If it fails the check, M paths are reselected from the remaining frequency deviation bins, with a maximum of K iterations.

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