Ultrathin circuit board and processing method thereof
By forming a metal layer on the surface of the insulating substrate and combining electroplating, etching and insulation treatment, the problems of complex and high cost of ultra-thin circuit board processes in the prior art are solved, and efficient and low-cost ultra-thin circuit board processing is achieved.
Patent Information
- Application Number
- CN202411701454.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-26
- Publication Date
- 2025-02-28
AI Technical Summary
The prior art when manufacturing ultra-thin circuit boards, the process is complex and the cost is high, making it difficult to meet the thinner and smaller needs of electronic products.
The metal layer is formed on the surface of the insulating substrate by the IVD process, and ultra-thin circuit boards are prepared in combination with electroplating, etching and insulation treatment. This method does not require a separate production of conductive layers, reducing process and cost.
It realizes efficient processing of ultra-thin circuit boards, with few processes, low costs, and high production efficiency and yield, making them suitable for mass production.
Smart Images
Figure CN119545677A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of circuit boards, and in particular to an ultra-thin circuit board and a processing method thereof. Background Art
[0002] Circuit board, the full name is printed circuit board (Printed Circuit Board), English abbreviation PCB. Circuit board includes rigid circuit board and flexible circuit board (Flexible Printed Circuit abbreviation FPC).
[0003] Circuit boards are one of the important components of electronic products. Some existing electronic products are constantly developing in the direction of thinner and smaller. In order to adapt to this development trend, circuit boards are designed and manufactured in an ultra-thin manner.
[0004] One method is to use FCCL (Flexible Copper Clad Laminate) as the substrate of the circuit board. Limited by the size specifications of the current materials, in order to manufacture ultra-thin circuit boards, FCCL needs to be treated by copper reduction or micro-etching to reduce the thickness of the copper layer, so as to make the overall thickness of the circuit board thinner. However, this method will increase the number of processes and production costs, which is not conducive to mass production.
[0005] Another method is to use ultra-thin copper foil as the conductive layer. However, ultra-thin copper foil is very expensive, and only a few material suppliers can process it, resulting in a small supply and high cost. Summary of the invention
[0006] The purpose of the present application is to overcome the defects of the prior art and provide an ultra-thin circuit board and a processing method thereof to solve the problems in the prior art.
[0007] In order to solve the above problems, a first aspect of the embodiment of the present application provides a method for processing an ultra-thin circuit board, comprising:
[0008] Metallization treatment: forming a metal layer on the surface of the insulating substrate through IVD process;
[0009] Circuit making, used to obtain circuit graphics;
[0010] Insulation treatment, performing insulation setting on the circuit pattern;
[0011] Wherein, the circuit production includes: electroplating treatment, electroplating on the surface of the metal layer to form a plated layer; etching treatment, etching the plated layer to form the circuit pattern, and etching the metal layer between adjacent circuit patterns;
[0012] Alternatively, the circuit production includes: electroplating treatment, electroplating on the surface of the metal layer to form the circuit pattern; etching treatment, etching the metal layer between adjacent circuit patterns.
[0013] In an optional implementation, the insulating substrate includes a first surface and a second surface, and the first surface and the second surface are disposed on both sides of the insulating substrate in a thickness direction; wherein the metal layer is formed on the first surface or the second surface.
[0014] In an optional implementation, the insulating substrate includes a first surface and a second surface, and the first surface and the second surface are disposed on both sides of the insulating substrate in a thickness direction; wherein the metal layer is formed on the first surface and the second surface.
[0015] In an optional implementation, before the metallization treatment is performed, a through hole is opened on the insulating substrate, and the through hole passes through the first surface and the second surface;
[0016] When the metallization treatment is performed, the inner wall of the through hole forms the metal wall, wherein the metal layer on the first surface and the metal layer on the second surface are both connected to the metal wall on the inner wall of the through hole.
[0017] In an optional implementation, the insulation treatment includes covering the circuit pattern with an insulating covering layer to obtain a semi-finished product.
[0018] In an optional implementation, an adhesive is provided between the covering layer and the metal layer, wherein the covering layer is connected to the circuit pattern and the exposed insulating substrate through the adhesive.
[0019] An optional implementation method further includes:
[0020] Hot pressing treatment, hot pressing the semi-finished product;
[0021] Surface treatment, treating the surface of the semi-finished product after hot pressing;
[0022] The semi-finished product after the surface treatment is divided to obtain a plurality of circuit boards with independent functions.
[0023] In an optional implementation, before the metallization treatment is performed, a positioning hole is opened on the insulating substrate; the positioning hole is used to position the insulating substrate.
[0024] In an optional implementation, the insulating substrate includes a PI film, a PET film, a CPI film, an MPI film or an LCP film.
[0025] In a second aspect of the embodiments of the present application, an ultra-thin circuit board is provided, which is manufactured by the processing method described above.
[0026] The beneficial effects of this application include:
[0027] The present application proposes a processing method for an ultra-thin circuit board, including metallization, electroplating, etching and insulation. The processing method forms a metal layer on the surface of an insulating substrate through an IVD process, thereby metallizing the insulating substrate, thereby eliminating the need to separately produce a conductive layer; when performing electroplating, the thickness of the plating layer or circuit pattern can be controlled as required, without the need for additional copper reduction or micro-etching.
[0028] The processing method has the advantages of fewer processes, low cost, and high yield rate. In addition, no expensive raw materials are needed in the production process, which effectively reduces the manufacturing cost. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0030] Figure 1 A flow chart showing a method for processing an ultra-thin circuit board in the first embodiment;
[0031] Figure 2 A schematic cross-sectional view of an insulating substrate in Example 1 is shown;
[0032] Figure 3 A schematic cross-sectional view of a first semi-finished product in Embodiment 1 is shown;
[0033] Figure 4 A cross-sectional schematic diagram of a second semi-finished product manufactured by using the first circuit manufacturing process in the first embodiment is shown;
[0034] Figure 5 A cross-sectional schematic diagram of a second semi-finished product manufactured by a second circuit manufacturing process in Embodiment 1 is shown;
[0035] Figure 6 A schematic cross-sectional view of a third semi-finished product in Embodiment 1 is shown;
[0036] Figure 7 A schematic cross-sectional view of a fourth semi-finished product in Embodiment 1 is shown;
[0037] Figure 8A flow chart showing a method for processing an ultra-thin circuit board in Embodiment 2;
[0038] Fig. 9 A schematic cross-sectional view of an insulating substrate with through holes in the second embodiment is shown;
[0039] Fig.10 A schematic cross-sectional view of a first semi-finished product in Embodiment 2 is shown;
[0040] Fig.11 A cross-sectional schematic diagram of a second semi-finished product manufactured by using the first circuit manufacturing process in the second embodiment is shown;
[0041] Fig.12 A cross-sectional schematic diagram of a second semi-finished product manufactured by a second circuit manufacturing process in Embodiment 2 is shown;
[0042] Fig.13 A schematic cross-sectional view of a third semi-finished product in the second embodiment is shown;
[0043] Fig.14 A schematic cross-sectional view of a fourth semi-finished product in the second embodiment is shown.
[0044] Description of main component symbols:
[0045] 100 - insulating substrate; 101 - through hole; 110 - first surface; 120 - second surface; 200 - metal layer; 300 - plating layer; 400 - covering layer; 500 - adhesive; 1100 - first semi-finished product; 1200 - second semi-finished product; 1300 - third semi-finished product; 1400 - fourth semi-finished product. DETAILED DESCRIPTION
[0046] The embodiments of the present application are described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application. The following is a description of the relevant English abbreviations that appear in the embodiments of the present application:
[0047] PI, the full name is Polyimide, the Chinese name is polyimide;
[0048] PET refers to polyethylene terephthalate;
[0049] CPI refers to transparent polyimide;
[0050] MPI, refers to modified polyimide;
[0051] LCP refers to liquid crystal polymer;
[0052] IVD, the full name of which is Ion Implant Vapor Deposition, literally means ion implantation vapor deposition. The IVD process is a method of combining ion implantation with vapor deposition to attach ions to the surface of a substrate material, thereby forming a film layer or structure with corresponding functions on the surface of the substrate material. In this embodiment, the IVD process is used to achieve metallization of the surface of a non-metallic material.
[0053] In the present application, two circuit manufacturing processes are provided: a first circuit manufacturing process and a second circuit manufacturing process. Both the first circuit manufacturing process and the second circuit manufacturing process include electroplating and etching. The first circuit manufacturing process is to obtain a circuit pattern through etching, and the second circuit manufacturing process is to obtain a circuit pattern through electroplating.
[0054] Embodiment 1
[0055] See also Figure 1-Figure 7 In this embodiment, a method for processing an ultra-thin circuit board is proposed, comprising:
[0056] S11, metallization treatment;
[0057] S12, electroplating treatment;
[0058] S13, etching treatment;
[0059] S14, insulation treatment;
[0060] S15, hot pressing treatment;
[0061] S16, surface treatment;
[0062] S17, segmentation processing.
[0063] like Figure 2 and Figure 3 As shown, in step S11 , a metallization treatment is used to form a metal layer 200 on the surface of the insulating substrate 100 through an IVD process, thereby obtaining a first semi-finished product 1100 .
[0064] like Figure 4 and Figure 6 As shown, when the first circuit manufacturing process is adopted, in step S12, the electroplating treatment is used to electroplate the surface of the metal layer 200 and form a coating 300, thereby obtaining a second semi-finished product 1200; in step S13, the etching treatment is used to etch the coating 300 to form a circuit pattern, and to etch the metal layer 200 between adjacent circuit patterns, thereby obtaining a third semi-finished product 1300.
[0065] like Figure 5 and Figure 6As shown, when the second circuit manufacturing process is adopted, in step S12, electroplating is performed on the surface of the metal layer 200 to form a circuit pattern, thereby obtaining a second semi-finished product 1200; in step S13, etching is used to etch the metal layer 200 between adjacent circuit patterns, thereby obtaining a third semi-finished product 1300.
[0066] By etching the metal layer 200 between adjacent circuit patterns, different circuits are insulated to avoid short circuits.
[0067] like Figure 7 As shown, in step S14, the insulation treatment is used to perform insulation setting on the circuit pattern, thereby obtaining a fourth semi-finished product 1400.
[0068] In step S15 , a hot pressing process is used to hot press the fourth semi-finished product 1400 .
[0069] In step S16, the surface treatment is used to treat the surface of the fourth semi-finished product 1400 after hot pressing.
[0070] In step S17, the segmentation process is used to segment the fourth semi-finished product 1400 after the surface treatment to obtain a plurality of circuit boards with independent functions.
[0071] Before the metallization treatment, a positioning hole is opened on the insulating substrate 100, wherein the positioning hole is used to position the insulating substrate 100. The positioning hole can be opened in the waste area at the edge of the insulating substrate 100, and when the circuit board is completed, the waste area can be cut. The positioning hole is not shown in the drawings.
[0072] Surface treatment includes OSP (Organic solderability preservative), chemical nickel gold, etc.
[0073] After completing all the above processes, reinforcement bonding, electrical testing and finished product inspection can be carried out in sequence to obtain qualified finished products.
[0074] The insulating substrate 100 includes a PI film, a PET film, a CPI film, an MPI film or an LCP film, etc. In addition, other insulating materials may be selected as required.
[0075] The materials used in the IVD process may include one or more of titanium ions, nickel ions or copper ions. The above ions are attached to corresponding portions of the insulating substrate 100 to achieve metallization of the portion.
[0076] like Figure 2As shown, the insulating substrate 100 includes a first surface 110 and a second surface 120, and the first surface 110 and the second surface 120 are disposed on both sides of the thickness direction of the insulating substrate 100. The metal layer 200 is formed on the first surface 110 or the second surface 120. In the figure, the metal layer 200 is formed on the first surface 110.
[0077] After the metallization treatment is completed, it is convenient to carry out the subsequent electroplating treatment. When the electroplating treatment is carried out, the electroplating material used can be a metal with excellent conductivity, such as copper.
[0078] In actual operation, the thickness of electroplating can be controlled as needed to obtain an ultra-thin circuit board, which is more convenient to operate and does not require additional copper reduction or micro-etching treatments.
[0079] When the first circuit manufacturing process is adopted, after the electroplating process is completed, a plating layer 300 is formed on the metal layer 200. Subsequently, the plating layer 300 is etched to form a desired circuit pattern.
[0080] When the second circuit manufacturing process is adopted, after the electroplating process is completed, the required circuit pattern will be formed on the metal layer 200. Subsequently, the metal layer 200 between adjacent circuit patterns is etched.
[0081] Etching is an important process in the process of preparing a circuit board. There are many etching processes. In this embodiment, the etching of the plating layer 300 can be achieved by a flash etching process, that is, the plating layer 300 or the metal layer 200 in the non-pattern area is quickly etched.
[0082] When the first circuit manufacturing process is adopted, when etching the plating layer 300, the non-patterned area on the plating layer 300 will be etched. In addition, the metal layer between adjacent circuit patterns will also be etched, so that the insulating substrate 100 of this part is exposed.
[0083] When the second circuit manufacturing process is adopted, the metal layer 200 between adjacent circuit patterns is directly removed by etching, so that the insulating substrate 100 of this part is exposed.
[0084] After the circuit pattern is formed, the circuit pattern is subjected to insulation treatment, which includes covering the circuit pattern with an insulating cover layer 400 , thereby obtaining a fourth semi-finished product 1400 .
[0085] The main function of the cover layer 400 is to protect the circuit pattern, prevent oxidation and pollution, and provide the necessary mechanical strength and temperature resistance. The material selection of the cover layer 400 directly affects the performance and reliability of the circuit board, so it is necessary to select a suitable material according to the specific application scenario.
[0086] Common materials for the cover layer 400 include polyimide (PI), polyester (PET), polybutylene terephthalate (PBT), and polyphenylene sulfide (PPS).
[0087] All of the above materials have insulation properties. Among them, PI has higher reliability and is suitable for occasions with higher reliability requirements; PET has lower cost and is suitable for occasions with strict cost requirements; PBT and PPS have excellent temperature resistance and are suitable for high temperature environments.
[0088] like Figure 6 As shown, an adhesive 500 is disposed between the cover layer 400 and the metal layer 200 , wherein the cover layer 400 is connected to the circuit pattern and the insulating substrate 100 exposed after etching through the adhesive 500 .
[0089] The processing method of the ultra-thin circuit board proposed in this embodiment can flexibly process the thickness of the plating layer 300 according to the requirements. In addition, the thickness of the cover layer 400 and the adhesive 500 can also be further thinned according to the requirements, thereby achieving the effect of thinning the entire circuit board, and having more significant advantages in narrow, ultra-thin and other related applications. In particular, when manufacturing a flexible circuit board (FPC), the circuit board can be made softer.
[0090] In addition, the above processing method has fewer steps and higher production efficiency and yield rate.
[0091] In this embodiment, an ultra-thin circuit board is also provided, which is made by the above processing method.
[0092] Embodiment 2
[0093] The main difference between this embodiment and the first embodiment is that both the first surface 110 and the second surface 120 of the insulating film are metallized to realize the manufacture of a double-sided circuit board.
[0094] like Figure 7 As shown, in this embodiment, the insulating substrate 100 includes a first surface 110 and a second surface 120, and the first surface 110 and the second surface 120 are disposed on both sides of the thickness direction of the insulating substrate 100. The metal layer 200 is formed on the first surface 110 and the second surface 120.
[0095] like Figure 8-Figure 14 As shown, the processing method of the ultra-thin circuit board includes:
[0096] S21, opening a through hole;
[0097] S22, metallization treatment;
[0098] S23, electroplating treatment;
[0099] S23, etching treatment;
[0100] S25, insulation treatment;
[0101] S26, hot pressing treatment;
[0102] S27, surface treatment;
[0103] S28, segmentation processing.
[0104] like Fig. 9 As shown, in step S21 , a through hole is formed to form a through hole 101 on the insulating substrate 100 , and the through hole 101 passes through the first surface 110 and the second surface 120 .
[0105] like Fig. 9 and Fig.10 As shown, in step S22 , the metallization treatment is used to form a metal layer 200 on the surface of the insulating substrate 100 through an IVD process, thereby obtaining a first semi-finished product 1100 .
[0106] like Fig.11 and Fig.13 As shown, when the first circuit manufacturing process is adopted, in step S23, the electroplating treatment is used to electroplate the surface of the metal layer 200 and form a coating 300, thereby obtaining a second semi-finished product 1200; in step S24, the etching treatment is used to etch the coating 300 to form a circuit pattern, and to etch the metal layer 200 between adjacent circuit patterns, thereby obtaining a third semi-finished product 1300.
[0107] like Fig.12 and Fig.13 As shown, when the second circuit manufacturing process is adopted, in step S23, electroplating is performed on the surface of the metal layer 200 to form a circuit pattern, thereby obtaining a second semi-finished product 1200; in step S24, etching is used to etch the metal layer 200 between adjacent circuit patterns, thereby obtaining a third semi-finished product 1300.
[0108] By etching the metal layer 200 between adjacent circuit patterns, different circuits are insulated to avoid short circuits.
[0109] like Fig.14 As shown, in step S25, the insulation treatment is used to perform insulation setting on the circuit pattern, thereby obtaining a fourth semi-finished product 1400.
[0110] In step S26 , a hot pressing process is used to hot press the fourth semi-finished product 1400 .
[0111] In step S27, the surface treatment is used to treat the surface of the fourth semi-finished product 1400 after hot pressing.
[0112] In step S28, the segmentation process is used to segment the fourth semi-finished product 1400 after the surface treatment to obtain a plurality of circuit boards with independent functions.
[0113] During the metallization process, the inner wall of the through hole 101 forms a metal wall, wherein the metal layer 200 on the first surface 110 and the metal layer 200 on the second surface 120 are both connected to the metal wall on the inner wall of the through hole 101 .
[0114] When opening the through hole 101, a positioning hole may be opened on the insulating substrate 100, wherein the positioning hole is used to position the insulating substrate 100. The positioning hole may be opened in the waste area at the edge of the insulating substrate 100, and when the circuit board is completed, the waste area can be cut.
[0115] After the circuit pattern is made, the circuit pattern is subjected to insulation treatment. The insulation treatment includes covering the circuit pattern with an insulating cover layer 400. An adhesive 500 is provided between the cover layer 400 and the metal layer 200, and the cover layer 400 is connected to the circuit pattern and the insulating substrate 100 exposed after etching through the adhesive 500.
[0116] After completing all the above processes, reinforcement bonding, electrical testing and finished product inspection can be carried out in sequence to obtain qualified finished products.
[0117] In this embodiment, after the through hole 101 is opened, the insulating substrate 100 is directly metallized so that the hole surface is electroplated in one piece, without the need to make a separate conductive layer and circuit surface shielding, the process is streamlined, the etching difficulty is reduced, and the cost is lower. At the same time, the risk of side corrosion and hole breakage caused by the thickness difference in the hole area due to the film bubble is avoided.
[0118] The principles and implementation methods of the present application are described in detail using specific embodiments. The description of the above embodiments is only used to help understand the method and core idea of the present application. It should be noted that, for those skilled in the art, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.
Claims
1. A method for processing an ultra-thin circuit board, characterized in that: include: Metallization treatment: forming a metal layer on the surface of the insulating substrate through IVD process; Circuit making, used to obtain circuit graphics; Insulation treatment, performing insulation setting on the circuit pattern; Wherein, the circuit production includes: electroplating treatment, electroplating on the surface of the metal layer to form a plated layer; etching treatment, etching the plated layer to form the circuit pattern, and etching the metal layer between adjacent circuit patterns; Alternatively, the circuit production includes: electroplating treatment, electroplating on the surface of the metal layer to form the circuit pattern; etching treatment, etching the metal layer between adjacent circuit patterns.
2. The method for processing an ultra-thin circuit board according to claim 1, characterized in that: The insulating substrate includes a first surface and a second surface, wherein the first surface and the second surface are disposed on two sides of the insulating substrate in a thickness direction; wherein the metal layer is formed on the first surface or the second surface.
3. The method for processing an ultra-thin circuit board according to claim 1, characterized in that: The insulating substrate includes a first surface and a second surface, wherein the first surface and the second surface are disposed on two sides in a thickness direction of the insulating substrate; wherein the metal layer is formed on the first surface and the second surface.
4. The method for processing an ultra-thin circuit board according to claim 3, characterized in that: Before performing the metallization treatment, a through hole is formed on the insulating substrate, wherein the through hole passes through the first surface and the second surface; When the metallization treatment is performed, the inner wall of the through hole forms the metal wall, wherein the metal layer on the first surface and the metal layer on the second surface are both connected to the metal wall on the inner wall of the through hole.
5. The method for processing an ultra-thin circuit board according to claim 1, characterized in that: The insulation process includes covering the circuit pattern with an insulating covering layer to obtain a semi-finished product.
6. The method for processing an ultra-thin circuit board according to claim 5, characterized in that: An adhesive is provided between the cover layer and the metal layer, wherein the cover layer is connected to the circuit pattern and the exposed insulating substrate through the adhesive.
7. The method for processing an ultra-thin circuit board according to claim 5, characterized in that: Also includes: Hot pressing treatment, hot pressing the semi-finished product; Surface treatment, treating the surface of the semi-finished product after hot pressing; The semi-finished product after the surface treatment is divided to obtain a plurality of circuit boards with independent functions.
8. The method for processing an ultra-thin circuit board according to claim 1, characterized in that: Before the metallization treatment is performed, a positioning hole is opened on the insulating substrate; the positioning hole is used to position the insulating substrate.
9. The method for processing an ultra-thin circuit board according to claim 1, characterized in that: The insulating substrate includes a PI film, a PET film, a CPI film, an MPI film or an LCP film.
10. An ultra-thin circuit board, characterized in that: Made by the processing method described in any one of claims 1 to 9.