Wafer position calibration system and method and wafer detection device

Abstract

The invention provides a wafer position calibration system and method and wafer detection equipment, and the system comprises a position detection unit which is used for detecting the actual position information of a wafer on a carrying platform; the levelness detection unit is used for carrying out levelness detection on the carrying platform; the wafer calibration unit is used for calibrating the position of the wafer; the control unit is used for determining whether the current position of the wafer is within a position deviation threshold value or not according to the actual position information and preset target position information, controlling the levelness detection unit to perform levelness detection on the carrying table when the current position of the wafer is not within the position deviation threshold value, and judging whether the levelness of the carrying table is within a levelness deviation threshold value or not; and when the levelness of the carrying table is within the horizontal deviation threshold value, controlling the wafer calibration unit to calibrate the position of the wafer so as to move the wafer to a target position. According to the wafer position calibration system and method and the wafer detection device provided by the invention, the wafer position can be automatically calibrated.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor processing technology, and in particular to a wafer position calibration system and method, and a wafer detection device. Background Art

[0002] During the semiconductor processing, when inspecting the wafer morphology, the wafer position on the carrier may be abnormal due to wafer size problems, poor teaching parameters, etc., causing the wafer inspection equipment to be unable to start inspection, or after the inspection, the robot arm cannot normally move the wafer. In addition, in the case of abnormal wafer position, the wafer position needs to be calibrated, and operations such as resetting or removing the wafer require opening the equipment chamber, resulting in a certain degree of contamination of the wafer or the equipment chamber. Summary of the invention

[0003] The embodiments of the present disclosure provide a wafer position calibration system and method, and a wafer detection device, which can automatically calibrate the wafer position to avoid problems caused by abnormal wafer position, and there is no need to open the equipment chamber to avoid contamination of the wafer or the equipment chamber.

[0004] The technical solutions provided by the embodiments of the present disclosure are as follows:

[0005] In a first aspect, an embodiment of the present disclosure provides a wafer position calibration system, comprising:

[0006] A position detection unit, used to detect the actual position information of the wafer on the stage;

[0007] A level detection unit, used for detecting the level of the platform;

[0008] a wafer calibration unit, used to calibrate the position of the wafer; and

[0009] A control unit is used to determine whether the current position of the wafer is within a position deviation threshold based on the actual position information and the preset target position information, and when the current position of the wafer is not within the position deviation threshold, control the level detection unit to perform level detection on the carrier and determine whether the level of the carrier is within a level deviation threshold; when the level of the carrier is within the level deviation threshold, control the wafer calibration unit to calibrate the position of the wafer to move the wafer to the target position.

[0010] Exemplarily, the wafer calibration unit includes:

[0011] An acquisition module, used to acquire the actual center position information of the wafer;

[0012] A wafer moving module is used to move the wafer; the control unit is also connected to the acquisition module and the wafer moving module, and the control unit is also used to obtain the offset information of the actual center position of the wafer relative to the preset wafer center reference position based on the actual center position information of the wafer and the preset wafer center reference position; and based on the offset information, control the wafer moving module to move the wafer to the target position.

[0013] Exemplarily, the wafer moving module includes:

[0014] A top column mechanism, the top column mechanism comprising a base and a top column connected to the base, the base being arranged below the platform, the top column being able to pass through the platform and perform lifting and lowering motion relative to the platform in a direction perpendicular to the platform;

[0015] A lifting mechanism connected to the base and configured to lift the top column mechanism in a direction perpendicular to the platform;

[0016] A translation mechanism, the translation mechanism is connected to the base, and the translation mechanism is configured to translate the top column mechanism along a direction horizontal to the carrier;

[0017] A driving mechanism, the driving mechanism being connected to the translation mechanism and being used for driving the translation mechanism and the lifting mechanism to move the top column mechanism based on the calibration stroke parameter;

[0018] The control unit is specifically configured to calculate a calibration stroke parameter of the wafer based on the offset information, and control the wafer moving module to move the wafer to the target position based on the calibration stroke parameter.

[0019] Exemplarily, the top end of the top column mechanism is a supporting end for supporting a wafer, and the supporting end is provided with an electrostatic chuck and an anti-slip component, wherein a plurality of connecting columns are provided on the electrostatic adsorption surface of the electrostatic chuck, and the plurality of connecting columns are distributed in sequence at intervals along the circumference of the electrostatic adsorption surface, and the anti-slip component is ring-shaped and connected to the top ends of the plurality of connecting columns.

[0020] Exemplarily, the acquisition module includes: an image acquisition module, disposed on the stage, for acquiring images of the edges around the wafer;

[0021] The control unit is specifically used to generate a contour image of the wafer based on the images of the edges of the wafer captured by the image acquisition module, and analyze the contour image to determine the actual position of the center of the wafer.

[0022] Exemplarily, the image acquisition unit includes a camera disposed at the center of the carrying surface of the carrier, and the camera is configured to be able to rotate at least along the circumferential direction of the wafer to scan and obtain images of the four edges of the wafer.

[0023] Exemplarily, the system also includes: a stage horizontality adjustment unit for adjusting the horizontality of the stage; wherein the control unit is also connected to the stage horizontality adjustment unit, and the control unit is used to control the stage horizontality adjustment unit to adjust the horizontality of the stage when the stage horizontality exceeds a horizontal deviation threshold until the stage horizontality is within the horizontal deviation threshold.

[0024] Exemplarily, the position detection unit includes:

[0025] A plurality of first distance sensors, wherein the first distance sensors are disposed on the carrying surface of the carrier, and the plurality of first distance sensors are sequentially spaced apart along the circumference of the carrying surface of the carrier, and the first distance sensors are used to obtain first distance data between the wafer and the first distance sensors in the radial direction of the wafer;

[0026] A plurality of second distance sensors, wherein the second distance sensors are disposed on the carrying surface of the carrier, and the plurality of second distance sensors are sequentially spaced apart along the circumference of the carrying surface of the carrier, and the second distance sensors are used to obtain second distance data between the wafer and the second distance sensors in a direction perpendicular to the carrying surface;

[0027] The control unit is specifically configured to obtain actual position information of the wafer on the stage based on the first distance data and the second distance data.

[0028] In a second aspect, an embodiment of the present disclosure provides a wafer position calibration method, comprising:

[0029] Detect the actual position information of the wafer on the stage;

[0030] Determining whether the wafer is currently within a position deviation threshold according to the actual position information and the preset target position information;

[0031] When the wafer is not currently at the position deviation threshold, performing a levelness detection on the stage to determine whether the levelness of the stage is within the level deviation threshold;

[0032] When the levelness of the stage is within a level deviation threshold, the position of the wafer is calibrated to move the wafer to a target position.

[0033] Exemplarily, when the levelness of the stage is within the level deviation threshold, calibrating the position of the wafer specifically includes:

[0034] Obtaining the actual center position information of the wafer;

[0035] According to the actual center position information of the wafer and the preset wafer center reference position, the offset information of the actual center position of the wafer relative to the preset wafer center reference position is obtained;

[0036] Based on the offset information, the wafer is moved to the target position.

[0037] Exemplarily, the obtaining of the actual center position information of the wafer specifically includes:

[0038] Collect images around the edges of the wafer;

[0039] Based on the images of the edges of the wafer captured by the image acquisition module, a contour image of the wafer is generated, and the contour image is analyzed to determine the actual position of the center of the wafer.

[0040] In a third aspect, an embodiment of the present disclosure further provides a wafer inspection device, comprising a memory and a processor, wherein the memory stores a computer program, and wherein the processor implements the steps of the above-described method when executing the computer program.

[0041] The beneficial effects brought by the embodiments of the present disclosure are as follows:

[0042] In the above scheme, after the wafer is placed on the stage, the actual position information of the wafer on the stage can be detected, and the actual position information of the wafer can be compared with the preset target position information to determine whether the wafer is currently within the position offset threshold. If the wafer is not on the position offset threshold, the levelness of the stage is first detected to determine whether the levelness of the stage is within the horizontal deviation threshold. If the levelness of the stage is within the horizontal deviation threshold, the position of the wafer is accurately calibrated to move the wafer to the target position. In this way, the purpose of automatically calibrating the wafer position can be achieved, avoiding problems caused by abnormal wafer position, and there is no need to open the equipment chamber to avoid contamination of the wafer or the equipment chamber. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 A top view of a wafer inspection device provided in an embodiment of the present disclosure is shown;

[0044] Figure 2 A schematic diagram showing the three-dimensional structure of a wafer inspection device provided in an embodiment of the present disclosure;

[0045] Figure 3 A schematic diagram showing the structure of the top column mechanism in an embodiment of the present disclosure;

[0046] Figure 4A flowchart showing a wafer position calibration method in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0047] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0048] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantity restrictions, but indicate that there is at least one. Similar words such as "include" or "comprise" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Similar words such as "connect" or "connected" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0049] The features such as "parallel", "perpendicular", and "same" used in the embodiments of the present disclosure include the features such as "parallel", "perpendicular", and "same" in a strict sense, as well as the cases where "approximately parallel", "approximately perpendicular", "approximately the same", etc. include certain tolerances, taking into account the tolerances associated with the measurement of specific quantities (e.g., the limitations of the measurement system), and represent the acceptable deviation range for a specific value determined by ordinary technicians in the field. For example, "approximately" can mean within one or more standard deviations, or within 3% or 5% of the value.

[0050] In addition, in this document, unless otherwise defined, the terms "substantially", "substantially", "approximately" and "about" are used to describe and explain small changes. When used with an event or situation, these terms can cover situations where the event or situation occurs exactly, and can also cover situations where the event or situation occurs approximately. For example, when used with a numerical value, these terms can include a range of variation of less than or equal to 10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, less than or equal to ±0.05%. The term "substantially coplanar" can refer to two surfaces being arranged along the same plane in the micrometer range, for example, arranged along the same plane within 40μm, 30μm, 20μm, 10μm or 1μm.

[0051] The present disclosure provides a wafer position calibration system that can be used to calibrate the position of a wafer on a stage. For example, the wafer position calibration system can be applied to a wafer detection device to calibrate the position of a wafer on a stage in the wafer detection device. However, this is not limited to this. The wafer position calibration system can also be applied to any other suitable wafer processing equipment.

[0052] like Figure 1 and Figure 2 As shown, the wafer position calibration system provided by the embodiment of the present disclosure includes:

[0053] The position detection unit 100 is used to detect the actual position information of the wafer 20 on the carrier 10;

[0054] A levelness detection unit 200, used for detecting the levelness of the carrier 10;

[0055] A wafer calibration unit 300, used to calibrate the position of the wafer 20; and

[0056] A control unit is used to determine whether the current position of the wafer 20 is within a position deviation threshold based on the actual position information and the preset target position information, and when the current position of the wafer 20 is not within the position deviation threshold, control the level detection unit 200 to perform level detection on the carrier 10 and determine whether the level of the carrier 10 is within a level deviation threshold, and when the level of the carrier 10 is within the level deviation threshold, control the wafer calibration unit 300 to calibrate the position of the wafer 20 to move the wafer 20 to the target position.

[0057] In the above scheme, after the wafer 20 is placed on the carrier 10, the actual position information of the wafer 20 on the carrier 10 can be detected, and the actual position information of the wafer 20 can be compared with the preset target position information to determine whether the wafer 20 is currently within the position deviation threshold. If the wafer 20 is not on the position deviation threshold, the level of the carrier 10 is first detected to determine whether the level of the carrier 10 is within the level deviation threshold. If the level of the carrier 10 is within the level deviation threshold, the position of the wafer 20 is accurately calibrated to move the wafer 20 to the target position. In this way, the purpose of automatically calibrating the position of the wafer 20 can be achieved, avoiding problems caused by abnormal position of the wafer 20, and there is no need to open the equipment chamber to avoid contamination of the wafer 20 or the equipment chamber.

[0058] In some exemplary embodiments, the system further includes: a stage horizontality adjustment unit 400 for adjusting the horizontality of the stage 10; wherein the control unit is also connected to the stage horizontality adjustment unit 400, and the control unit is used to control the stage horizontality adjustment unit 400 to adjust the horizontality of the stage 10 when the horizontality of the stage 10 exceeds a horizontal deviation threshold, until the horizontality of the stage 10 is within the horizontal deviation threshold.

[0059] With the above scheme, when it is detected that the wafer 20 is not at the target position, firstly detect whether the level of the stage 10 is within the level deviation threshold. If the level of the stage 10 is not within the level deviation threshold, first adjust the level of the stage 10 until the level of the stage 10 reaches the level deviation threshold. In this way, after the level of the stage 10 is adjusted to the level deviation threshold, the position of the wafer 20 is calibrated, which can eliminate the abnormal position of the wafer 20 caused by the excessive deviation of the level of the stage 10, avoid calibration failure due to the level problem of the stage 10, reduce the probability of failed operation, and use the adjustment of the level of the stage 10 to achieve the purpose of synchronously adjusting the level of the wafer 20. Among them, the stage level adjustment unit 400 can be implemented by using the level adjustment structure of the stage 10 known in the art, which is not limited to this.

[0060] In some exemplary embodiments, Figure 1 As shown, the position detection unit 100 includes a plurality of first distance sensors 101 and a plurality of second distance sensors 102 .

[0061] The first distance sensor 101 can be arranged on the carrying surface of the carrier 10, and a plurality of the first distance sensors 101 are arranged in sequence and spaced apart along the circumference of the carrying surface of the carrier 10, and the first distance sensor 101 is located at the periphery of the wafer 20, and the distance between the first distance sensor 101 and the center position of the carrier 10 is greater than the radius of the wafer 20.

[0062] For example, a clamp 11 for clamping and fixing the wafer 20 is provided on the stage 10, and the first distance sensor 101 can be disposed adjacent to the clamp 11. The first distance sensor 101 is used to obtain first distance data between the wafer 20 and the first distance sensor 101 in the radial direction of the wafer 20.

[0063] For example, the first distance sensor 101 may be an ultrasonic sensor, which sends ultrasonic waves to the edge of the wafer 20 to obtain the distance data between the edge of the wafer 20 and the wafer 20 in the radial direction.

[0064] The second distance sensor 102 may be disposed on the carrying surface of the stage 10, and a plurality of the second distance sensors 102 are sequentially spaced along the circumferential direction of the carrying surface of the stage 10, and the distance between the second distance sensor 102 and the center position of the stage 10 is less than the radius of the wafer 20. The first distance sensor 101 is used to detect the distance data between the wafer 20 and the first distance sensor 101 in a direction perpendicular to the carrying surface.

[0065] For example, the first distance sensor 101 may be an ultrasonic sensor, which transmits ultrasonic waves to the bottom surface of the wafer 20 to obtain distance data from the bottom surface of the wafer 20 in a direction perpendicular to the carrying surface.

[0066] The control unit is specifically configured to obtain actual position information of the wafer 20 on the stage 10 based on the first distance data and the second distance data.

[0067] Specifically, the distance data acquired by the plurality of first distance sensors 101 can be used to calculate the position of the wafer 20 in the direction parallel to the carrying surface; and the distance data acquired by the plurality of second distance sensors 102 can be used to calculate the horizontality of the wafer 20 .

[0068] It should be noted that in the above scheme, the position of the wafer 20 on the carrier 10 can be allowed to have a certain offset relative to the target position, and this offset is the position offset threshold. When the offset of the wafer 20 relative to the target position is within the position offset threshold, the next step can be continued, and the wafer 20 can be clamped and fixed by the clamp for subsequent testing.

[0069] Therefore, the position detection unit 100 can use a plurality of first distance sensors 101 and a plurality of second distance sensors 102 provided on the stage 10 to perform preliminary detection of the position of the wafer 20. This preliminary detection does not need to accurately detect the offset of the wafer 20, but only needs to preliminarily determine whether the wafer 20 is too far away from the target position and exceeds the allowable position offset threshold. It should be noted that the specific implementation of the position detection unit 100 is not limited thereto.

[0070] When the wafer 20 detection unit detects that the wafer 20 currently exceeds the allowable position deviation range, the levelness detection unit 200 is used to determine whether the levelness of the stage 10 is within the level allowable deviation threshold. When the levelness of the stage 10 is within the level allowable deviation threshold, the wafer calibration unit 300 is used to accurately detect the position of the wafer 20 to accurately calculate the deviation state of the actual position of the wafer 20 relative to the target position.

[0071] In some exemplary embodiments, Figure 1 and Figure 2 As shown, the wafer calibration unit 300 includes:

[0072] An acquisition module 310 is used to acquire the actual center position information of the wafer 20;

[0073] A wafer moving module 320, used for moving the wafer 20;

[0074] The control unit is also connected to the acquisition module 310 and the wafer moving module 320, and the control unit is also used to compare the actual center position information of the wafer 20 with the preset center reference position of the wafer 20 to obtain the offset information of the actual center position of the wafer 20 relative to the preset center reference position of the wafer 20; and based on the offset information, control the wafer moving module 320 to move the wafer 20 to the target position.

[0075] In the above solution, the actual center position of the wafer 20 and the center reference position of the wafer 20 are used for calculation, so that the exact offset of the wafer 20 can be accurately calculated.

[0076] Exemplarily, the acquisition module 310 includes: an image acquisition module, disposed on the carrier 10, for acquiring images of the edges around the wafer 20; wherein the control unit is specifically used to generate a contour image of the wafer 20 based on the images of the edges around the wafer 20 acquired by the image acquisition module, and analyze the contour image to determine the actual position of the center of the wafer 20.

[0077] In the above scheme, the image acquisition module can select a camera arranged at the center of the carrying surface of the carrier 10, wherein the camera is configured to be able to rotate at least along the circumferential direction of the wafer 20 to scan and obtain the edge images of the wafer 20 on all four sides; the image processing module can splice the edge images of the wafer 20 scanned by the image acquisition module to obtain the contour image of the entire wafer 20, so that the actual position information of the center of the wafer 20 can be accurately obtained according to the contour image of the wafer 20.

[0078] It should be noted that the camera needs to perform image scanning on the edge of the wafer 20 , and therefore, the camera may be configured to rotate at least along the circumferential direction of the wafer 20 .

[0079] Furthermore, the camera can also be configured to realize multi-directional rotation scanning by using structures such as universal joints, so as to perform panoramic shooting. The specific installation method of the camera is not limited here.

[0080] Furthermore, in some exemplary embodiments, Figure 3 As shown, the wafer moving module 320 includes:

[0081] A top column mechanism 321, the top column mechanism 321 includes a base and a top column connected to the base, the base is arranged below the platform 10, the top column can pass through the platform 10, and perform lifting and lowering motion relative to the platform 10 in a direction perpendicular to the platform 10;

[0082] A lifting mechanism connected to the base and configured to lift the top column mechanism 321 in a direction perpendicular to the carrier 10;

[0083] A translation mechanism, the translation mechanism is connected to the base, and the translation mechanism is configured to translate the top column mechanism 321 along a direction horizontal to the carrier 10;

[0084] A driving mechanism, the driving mechanism is connected to the translation mechanism, and is used to drive the translation mechanism and the lifting mechanism to move the top column mechanism 321 based on the calibration stroke parameter.

[0085] The control unit is specifically configured to calculate a calibration stroke parameter of the wafer 20 based on the offset information, and control the wafer moving module 320 to move the wafer 20 to the target position based on the calibration stroke parameter.

[0086] In the above scheme, a base is arranged under the platform 10, and the base is connected to the lifting mechanism. A top column mechanism 321 that can pass through the platform 10 is arranged in the platform 10, so that the top column mechanism 321 can protrude or retract into the platform 10, and the base of the top column mechanism 321 is also connected to the translation mechanism, so that the top column mechanism 321 can be translated.

[0087] When the position of the wafer 20 needs to be calibrated, the lifting mechanism is driven to raise the top column mechanism 321 and protrude from the carrier 10 to lift the wafer 20; after the wafer 20 is lifted, the translation mechanism is controlled to move the wafer 20 to the target position based on the offset information; then, the lifting mechanism is driven to lower the top column mechanism 321 so that the wafer 20 is carried on the carrier 10.

[0088] The specific structures of the lifting mechanism and the translation mechanism are not limited herein. For example, the lifting mechanism can be implemented by a cylinder, etc., and the translation mechanism can be implemented by a lead screw, etc.

[0089] Furthermore, in some exemplary embodiments, Figure 3 As shown, the top end of the top column mechanism 321 is a supporting end for supporting the wafer 20 , and the supporting end is provided with an electrostatic chuck 3211 and an anti-slip component 3212 .

[0090] Among them, the electrostatic chuck 3211 can adsorb and fix the wafer 20, and a plurality of connecting columns 3213 are provided on the electrostatic adsorption surface of the electrostatic chuck 3211, and the plurality of connecting columns 3213 are distributed in sequence at intervals along the circumference of the electrostatic adsorption surface. The anti-slip component 3212 is ring-shaped, and the anti-slip component 3212 is connected to the top ends of the plurality of connecting columns 3213.

[0091] In this way, not only can the electrostatic chuck 3211 be used to adsorb and fix the wafer 20, but the anti-slip component 3212 can also be used to support the wafer 20, and the friction force can be used to prevent the wafer 20 from sliding or deflecting.

[0092] The anti-slip component 3212 may include but is not limited to a rubber ring or the like.

[0093] Also, see Figure 4 As shown, the embodiment of the present disclosure also provides a wafer position calibration method, which includes the following steps:

[0094] Step S01, detecting the actual position information of the wafer 20 on the carrier 10;

[0095] Step S02: determining whether the wafer 20 is currently within a position deviation threshold according to the actual position information and the preset target position information;

[0096] Step S03: when the wafer 20 is not currently at the position deviation threshold, the levelness of the stage 10 is detected to determine whether the levelness of the stage 10 is within the level deviation threshold;

[0097] Step S04: When the levelness of the stage 10 is within the level deviation threshold, the position of the wafer 20 is calibrated.

[0098] In the above scheme, after the wafer 20 is placed on the carrier 10, the actual position information of the wafer 20 on the carrier 10 can be detected, and the actual position information of the wafer 20 can be compared with the preset target position information to determine whether the wafer 20 is currently within the position deviation threshold. If the wafer 20 is not on the position deviation threshold, the level of the carrier 10 is first detected to determine whether the level of the carrier 10 is within the level deviation threshold. If the level of the carrier 10 is within the level deviation threshold, the position of the wafer 20 is accurately calibrated to move the wafer 20 to the target position. In this way, the purpose of automatically calibrating the position of the wafer 20 can be achieved, avoiding problems caused by abnormal position of the wafer 20, and there is no need to open the equipment chamber to avoid contamination of the wafer 20 or the equipment chamber.

[0099] Exemplarily, the wafer position calibration method provided by the present disclosure further includes the following steps:

[0100] Step S05: When the levelness of the platform 10 is not within the level deviation threshold, the levelness of the platform 10 is adjusted until it is detected that the levelness of the platform 10 is within the level deviation threshold, thereby completing the calibration of the levelness of the platform 10.

[0101] With the above scheme, when it is detected that the wafer 20 is not at the target position, firstly detect whether the level of the stage 10 is within the level deviation threshold. If the level of the stage 10 is not within the level deviation threshold, first adjust the level of the stage 10 until the level of the stage 10 reaches the level deviation threshold. In this way, after the level of the stage 10 is adjusted to the level deviation threshold, the position of the wafer 20 is calibrated, which can eliminate the abnormal position of the wafer 20 caused by the excessive deviation of the level of the stage 10, avoid calibration failure due to the level problem of the stage 10, reduce the probability of failed operation, and use the adjustment of the level of the stage 10 to achieve the purpose of synchronously adjusting the level of the wafer 20. Among them, the stage level adjustment unit 400 can be implemented by using the level adjustment structure of the stage 10 known in the art, which is not limited to this.

[0102] In the above scheme, the position of the wafer 20 on the carrier 10 can be allowed to have a certain offset relative to the target position, and this offset is the position offset threshold. When the offset of the wafer 20 relative to the target position is within the position offset threshold, the next step can be continued, and the wafer 20 can be clamped and fixed by the clamp for subsequent detection. Therefore, the position detection unit 100 can use a number of first distance sensors 101 and a number of second distance sensors 102 set on the carrier 10 to perform a preliminary detection of the position of the wafer 20. This preliminary detection does not require the precise detection of the offset of the wafer 20, but only needs to preliminarily determine that the wafer 20 is too offset relative to the target position and exceeds the allowable position offset threshold. It should be noted that the specific implementation of the position detection unit 100 is not limited to this.

[0103] When the wafer 20 detection unit detects that the wafer 20 currently exceeds the allowable position deviation range, the levelness detection unit 200 is used to determine whether the levelness of the stage 10 is within the level allowable deviation threshold. When the levelness of the stage 10 is within the level allowable deviation threshold, the wafer calibration unit 300 is used to accurately detect the position of the wafer 20 to accurately calculate the deviation state of the actual position of the wafer 20 relative to the target position.

[0104] Specifically, the above step S04 specifically includes:

[0105] Step S041, obtaining the actual center position information of the wafer 20;

[0106] Step S042, according to the actual center position information of the wafer 20 and the preset center reference position of the wafer 20, to obtain the offset information of the actual center position of the wafer 20 relative to the preset center reference position of the wafer 20;

[0107] Step S043: moving the wafer 20 to the target position based on the offset information.

[0108] In the above solution, the actual center position of the wafer 20 and the center reference position of the wafer 20 are used for calculation, so that the exact offset of the wafer 20 can be accurately calculated.

[0109] Exemplarily, the above step S041 specifically includes:

[0110] Collecting images of the edges around the wafer 20;

[0111] Based on the images of the edges of the wafer 20 captured by the image acquisition module, a contour image of the wafer 20 is generated, and the contour image is analyzed to determine the actual position of the center of the wafer 20 .

[0112] In the above scheme, the images of the four edges of the wafer 20 scanned by the image acquisition module can be spliced ​​to obtain a contour image of the entire wafer 20. In this way, the actual position information of the center of the wafer 20 can be accurately obtained based on the contour image of the wafer 20.

[0113] In addition, it should be noted that, in the method of the embodiment of the present disclosure, after the above step S04, the following steps may also be included:

[0114] Step S06, after calibrating the position of the wafer 20, fix the wafer 20 by clamping the clamps for testing;

[0115] Step S07 , after the detection is completed, repeat the above steps S01 to S05 to calibrate the position of the wafer 20 to avoid operation failure when the robot takes out the wafer 20 .

[0116] In addition, the embodiment of the present disclosure also provides a wafer detection device, including a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the above method when executing the computer program. The above wafer detection device can implement the above methods when its processor executes the computer program. Similarly, the calibration of the wafer position can be automatically completed without opening the equipment chamber for operation, thereby avoiding chamber or wafer contamination.

[0117] In one embodiment, the present disclosure further provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are implemented.

[0118] The above-mentioned computer-readable storage medium, because the computer program stored in its memory is executed by the processor to implement the steps in the above-mentioned method embodiments, similarly, the calibration of the wafer position can be automatically completed without opening the equipment chamber for operation, thereby avoiding contamination of the chamber or wafer.

[0119] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory or optical memory, etc. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM).

[0120] There are a few points to note:

[0121] (1) The drawings of the embodiments of the present disclosure only relate to the structures related to the embodiments of the present disclosure, and other structures may refer to the general design.

[0122] (2) For the sake of clarity, in the drawings used to describe the embodiments of the present disclosure, the thickness of layers or regions is exaggerated or reduced, that is, these drawings are not drawn according to the actual scale. It is understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "under" another element, the element may be "directly" "on" or "under" the other element or there may be intermediate elements.

[0123] (3) In the absence of conflict, the embodiments of the present disclosure and the features therein may be combined with each other to obtain new embodiments.

[0124] The above are only specific implementations of the present disclosure, but the protection scope of the present disclosure is not limited thereto, and the protection scope of the present disclosure shall be based on the protection scope of the claims.

Claims

1. A wafer position calibration system, characterized in that: include: A position detection unit, used to detect the actual position information of the wafer on the stage; A level detection unit, used for detecting the level of the platform; A wafer calibration unit, used for calibrating the position of the wafer; and A control unit is used to determine whether the current position of the wafer is within a position deviation threshold based on the actual position information and the preset target position information, and when the current position of the wafer is not within the position deviation threshold, control the level detection unit to perform level detection on the carrier and determine whether the level of the carrier is within a level deviation threshold; when the level of the carrier is within the level deviation threshold, control the wafer calibration unit to calibrate the position of the wafer to move the wafer to the target position.

2. The wafer position calibration system according to claim 1, characterized in that: The wafer calibration unit comprises: An acquisition module, used to acquire the actual center position information of the wafer; A wafer moving module is used to move the wafer; the control unit is also connected to the acquisition module and the wafer moving module, and the control unit is also used to obtain the offset information of the actual center position of the wafer relative to the preset wafer center reference position based on the actual center position information of the wafer and the preset wafer center reference position; and based on the offset information, control the wafer moving module to move the wafer to the target position.

3. The wafer position calibration system according to claim 2, characterized in that: The wafer moving module comprises: A top column mechanism, the top column mechanism comprising a base and a top column connected to the base, the base being arranged below the platform, the top column being able to pass through the platform and perform lifting and lowering motion relative to the platform in a direction perpendicular to the platform; A lifting mechanism connected to the base and configured to lift the top column mechanism in a direction perpendicular to the platform; A translation mechanism, the translation mechanism is connected to the base, and the translation mechanism is configured to translate the top column mechanism along a direction horizontal to the carrier; A driving mechanism, the driving mechanism being connected to the translation mechanism and being used to drive the translation mechanism and the lifting mechanism to move the top column mechanism based on a calibration stroke parameter; The control unit is specifically configured to calculate a calibration stroke parameter of the wafer based on the offset information, and control the wafer moving module to move the wafer to the target position based on the calibration stroke parameter.

4. The wafer position calibration system according to claim 3, characterized in that: The top end of the top column mechanism is a supporting end for supporting the wafer, and the supporting end is provided with an electrostatic chuck and an anti-slip component, wherein a plurality of connecting columns are provided on the electrostatic adsorption surface of the electrostatic chuck, and the plurality of connecting columns are distributed in sequence at intervals along the circumference of the electrostatic adsorption surface, and the anti-slip component is ring-shaped and connected to the top ends of the plurality of connecting columns.

5. The wafer position calibration system according to claim 2, characterized in that: The acquisition module includes: an image acquisition module, which is arranged on the stage and is used to acquire images of the edges around the wafer; The control unit is specifically used to generate a contour image of the wafer based on the images of the edges of the wafer captured by the image acquisition module, and analyze the contour image to determine the actual position of the center of the wafer.

6. The wafer position calibration system according to claim 5, characterized in that: The image acquisition unit includes a camera disposed at the center of the carrying surface of the carrier, and the camera is configured to be able to rotate at least along the circumferential direction of the wafer to scan and obtain images of the four edges of the wafer.

7. The wafer position calibration system according to claim 1, characterized in that: The system also includes: a platform horizontality adjustment unit for adjusting the horizontality of the platform; wherein the control unit is also connected to the platform horizontality adjustment unit, and the control unit is used to control the platform horizontality adjustment unit to adjust the horizontality of the platform when the platform horizontality exceeds a horizontal deviation threshold, until the platform horizontality is within the horizontal deviation threshold.

8. The wafer position calibration system according to claim 1, characterized in that: The position detection unit comprises: A plurality of first distance sensors, wherein the first distance sensors are disposed on the carrying surface of the carrier, and the plurality of first distance sensors are sequentially spaced apart along the circumference of the carrying surface of the carrier, and the first distance sensors are used to obtain first distance data between the wafer and the first distance sensors in the radial direction of the wafer; A plurality of second distance sensors, wherein the second distance sensors are disposed on the carrying surface of the carrier, and the plurality of second distance sensors are sequentially spaced apart along the circumference of the carrying surface of the carrier, and the second distance sensors are used to obtain second distance data between the wafer and the second distance sensors in a direction perpendicular to the carrying surface; The control unit is specifically configured to obtain actual position information of the wafer on the stage based on the first distance data and the second distance data.

9. A wafer position calibration method, characterized in that: include: Detect the actual position information of the wafer on the stage; Determining whether the wafer is currently within a position deviation threshold according to the actual position information and the preset target position information; When the wafer is not currently at the position deviation threshold, performing a levelness detection on the stage to determine whether the levelness of the stage is within the level deviation threshold; When the levelness of the carrier is within a level deviation threshold, the position of the wafer is calibrated to move the wafer to a target position.

10. The wafer position calibration method according to claim 9, characterized in that: When the levelness of the stage is within the level deviation threshold, calibrating the position of the wafer specifically includes: Obtaining the actual center position information of the wafer; According to the actual center position information of the wafer and the preset wafer center reference position, the offset information of the actual center position of the wafer relative to the preset wafer center reference position is obtained; Based on the offset information, the wafer is moved to the target position.

11. The wafer position calibration method according to claim 9, characterized in that: The obtaining of the actual center position information of the wafer specifically includes: Collect images around the edges of the wafer; Based on the images of the edges of the wafer captured by the image acquisition module, a contour image of the wafer is generated, and the contour image is analyzed to determine the actual position of the center of the wafer.

12. A wafer inspection device, comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 9 to 11 are implemented.

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