Solar cell, manufacturing method thereof and photovoltaic module

Abstract

The invention provides a solar cell, a manufacturing method thereof and a photovoltaic module, and relates to the field of photovoltaic technology. The nano silicon oxide layer is formed on the first tunneling layer on the surface of the silicon substrate, so that the first tunneling layer can be protected from being damaged in the high-temperature annealing process, the open-circuit voltage Voc and the influence factor FF of the battery are improved, and the performance of the battery is improved.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic technology, and in particular to a solar cell and a manufacturing method thereof, and a photovoltaic module. Background Art

[0002] In recent years, people have paid more and more attention to the development and utilization of renewable energy. Solar energy has gradually become one of the main forms of energy supply due to its clean, safe, high energy and wide distribution. Solar cells are semiconductor components that can effectively absorb solar energy and convert it into electrical energy.

[0003] Tunnel Oxide Passivated Contact (TOPCon) solar cells are based on tunnel oxide passivation structures, have good passivation properties, and have been widely used. At present, TOPCon solar cells usually use n-type silicon wafers, and their back structures usually include tunnel oxide layers, n-type doped polysilicon layers, and passivation layers. The back metal electrode passes through the passivation layer and contacts the n-type doped polysilicon layer. The tunnel oxide layer prevents the metal electrode from contacting the semiconductor silicon wafer and reduces the recombination on the cell surface. However, during the manufacturing process of solar cells, the local tunnel oxide layer may be destroyed, thereby reducing the diffusion barrier performance and affecting the performance of the cell. Summary of the invention

[0004] In order to alleviate, mitigate or eliminate the above-mentioned technical problems, the present application provides a solar cell and a manufacturing method thereof, and a photovoltaic module to improve the performance of the cell.

[0005] In a first aspect, the present application provides a method for manufacturing a solar cell, comprising:

[0006] introducing laughing gas into the process chamber to form a first tunneling layer on the surface of the silicon substrate;

[0007] A first working gas is introduced into the process chamber to form a nano silicon oxide layer on the first tunneling layer, wherein the first working gas comprises one of laughing gas and carbon dioxide, and silane and optionally phosphine, wherein the flow rate of the phosphine in the first working gas is 0-230 sccm;

[0008] A second working gas is introduced into the process chamber to form a doping layer on the nano silicon oxide layer, wherein the second working gas includes silane and phosphine.

[0009] In a possible implementation, the first working gas includes nitrous oxide, and the flow rate of the nitrous oxide in the first working gas is 5700-5800 sccm.

[0010] In a possible implementation, the nano silicon oxide layer is deposited at a deposition rate of 0.2-0.4 nm / s, and the deposition time is 10-20 s.

[0011] In a possible implementation, the thickness of the nano silicon oxide layer is 2-8 nm.

[0012] In a possible implementation, the flow rate of phosphine in the second working gas is 450-950 sccm.

[0013] In a possible implementation, the second working gas further includes one of nitrous oxide and carbon dioxide.

[0014] In a possible implementation, the second working gas includes nitrous oxide, and the flow rate of the nitrous oxide in the second working gas is 5700-5800 sccm.

[0015] In a possible implementation, the thickness of the doping layer is 40-90 nm.

[0016] In a possible implementation, before the second working gas is introduced into the process chamber to form a doping layer on the nano silicon oxide layer, the process further includes:

[0017] Laughing gas is introduced into the process chamber to form a second tunneling layer on the nano silicon oxide layer.

[0018] In a possible implementation, the switching ratio of the RF power supply during the deposition of the first tunneling layer is smaller than the switching ratio of the RF power supply during the deposition of the second tunneling layer.

[0019] In a possible implementation, the switching ratio of the radio frequency power supply during the deposition of the first tunneling layer is 20 / 2000-20 / 1500.

[0020] In a possible implementation, the power during the deposition of the nano silicon oxide layer is 7800-11400W.

[0021] A possible implementation also includes:

[0022] Annealing is performed to crystallize the nano silicon oxide layer and the doping layer, wherein the crystallization rates of the nano silicon oxide layer and the doping layer are greater than or equal to 70%.

[0023] A possible implementation also includes:

[0024] forming a passivation layer on the doped layer;

[0025] An electrode is formed through the passivation layer and in contact with the doping layer.

[0026] In a second aspect, the present application provides a solar cell, comprising a silicon substrate, wherein at least one surface of the silicon substrate is sequentially formed with a first tunneling layer, a nano silicon oxide layer and a doping layer from the inside to the outside, wherein the phosphorus doping concentration in the nano silicon oxide layer is 0-8E20 atoms / cm 3 .

[0027] In a possible implementation, the thickness of the nano silicon oxide layer is 2-8 nm.

[0028] In a possible implementation, the doping concentration of phosphorus in the doping layer is 0.9E21-1.3E21atoms / cm 3 .

[0029] In a possible implementation, the doped layer is a doped nano-silicon oxide layer.

[0030] In a possible implementation, the crystallization rates of the nano silicon oxide layer and the doping layer are greater than or equal to 70%.

[0031] In a possible implementation, a passivation layer is further formed on the doping layer, and the solar cell further includes:

[0032] An electrode passes through the passivation layer and contacts the doping layer.

[0033] In a possible implementation manner, a second tunneling layer is further formed between the nano silicon oxide layer and the doping layer.

[0034] In a third aspect, the present application provides a photovoltaic assembly, comprising a plurality of solar cell strings, wherein the solar cell strings include the solar cells described in the second aspect.

[0035] Compared with the prior art, this application has the following advantages:

[0036] The manufacturing method of the solar cell provided by the present application includes: introducing nitrous oxide into a process chamber to form a first tunneling layer on the surface of a silicon substrate; introducing a first working gas into the process chamber to form a nano silicon oxide layer on the first tunneling layer, wherein the first working gas includes one of nitrous oxide and carbon dioxide, as well as silane and optionally present phosphine, and the flow rate of phosphine in the first working gas is 0-230 sccm; introducing a second working gas into the process chamber to form a doped layer on the nano silicon oxide layer, wherein the second working gas includes silane and phosphine. The present application forms a nano silicon oxide layer on the first tunneling layer on the surface of the silicon substrate, thereby protecting the first tunneling layer from being destroyed during high temperature annealing, increasing the open circuit voltage Voc and the impact factor FF of the battery, and thus improving the battery performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The accompanying drawings are included to provide a further understanding of the present application. They are included and constitute a part of the present application. The accompanying drawings illustrate embodiments of the present application and together with the present specification serve to explain the principles of the present application. In the accompanying drawings:

[0038] Figure 1 is a partial cross-sectional schematic diagram of a solar cell provided in an embodiment of the present application;

[0039] Figure 2 It is a schematic flow chart of a method for manufacturing a solar cell provided in an embodiment of the present application. DETAILED DESCRIPTION

[0040] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for the description of the embodiments. Obviously, the drawings described below are only some examples or embodiments of the present application. For ordinary technicians in this field, the present application can also be applied to other similar scenarios based on these drawings without creative work. Unless it is obvious from the language environment or otherwise explained, the same reference numerals in the figures represent the same structure or operation.

[0041] As shown in this application, unless the context clearly indicates an exception, the words "a", "an", "a kind" and / or "the" do not refer to the singular, but also include the plural. Generally speaking, the terms "include" and "comprise" only indicate the inclusion of the steps and elements that have been clearly identified, and these steps and elements do not constitute an exclusive list. The method or device may also include other steps or elements.

[0042] Unless otherwise specifically stated, the relative arrangement, numerical expressions and numerical values ​​of the parts and steps set forth in these embodiments do not limit the scope of the application. Meanwhile, it should be understood that, for ease of description, the sizes of the various parts shown in the accompanying drawings are not drawn according to actual proportional relationships. The technology, methods and equipment known to those of ordinary skill in the relevant art may not be discussed in detail, but in appropriate cases, the technology, methods and equipment should be considered as a part of the specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters represent similar items in the following drawings, and therefore, once a certain item is defined in an accompanying drawing, it does not need to be further discussed in subsequent drawings.

[0043] In the description of the present application, it should be understood that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the device or element referred to must have a specific direction or be constructed and operated in a specific direction, and therefore cannot be understood as limiting the scope of protection of the present application; the directional words "inside and outside" refer to the inside and outside relative to the contours of each component itself.

[0044] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used here to describe the spatial positional relationship between a device or feature and other devices or features as shown in the figure. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figure. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" can include both "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.

[0045] In addition, it should be noted that the use of words such as "first" and "second" to define components is only for the convenience of distinguishing the corresponding components. If not otherwise stated, the above words have no special meaning and cannot be understood as limiting the scope of protection of this application. In addition, although the terms used in this application are selected from well-known and commonly used terms, some terms mentioned in the specification of this application may be selected by the applicant at his or her discretion, and their detailed meanings are explained in the relevant parts of the description of this article. In addition, it is required to understand this application not only by the actual terms used, but also by the meaning implied by each term.

[0046] It should be understood that when a component is referred to as being “on another component,” “connected to another component,” “coupled to another component,” or “contacting another component,” it can be directly on, connected to, coupled to, or contacting the other component, or intervening components may be present. In contrast, when a component is referred to as being “directly on another component,” “directly connected to,” “directly coupled to,” or “directly contacting” another component, there are no intervening components present.

[0047] Flowcharts are used in the present application to illustrate the operations performed by the methods according to the embodiments of the present application. It should be understood that the preceding or following operations are not necessarily performed accurately in order. On the contrary, various steps may be processed in reverse order or simultaneously. At the same time, other operations may be added to these processes, or one or more operations may be removed from these processes.

[0048] Figure 1 is a partial cross-sectional schematic diagram of a solar cell provided in an embodiment of the present application. Figure 1 As shown, the solar cell 100 includes a silicon substrate 101, which can be an N-type silicon wafer or a P-type silicon wafer. The silicon substrate 101 has two opposite surfaces, such as the front and back surfaces in the thickness direction thereof. When the solar cell is working, the front surface faces the sun. Multiple solar cells 100 can form a solar cell string, and multiple solar cell strings can further form a photovoltaic module.

[0049] The surface (back and / or front) of the silicon substrate 101 is sequentially formed with a first tunneling layer 102, a nano silicon oxide layer 103, a second tunneling layer 104, a doping layer 105 and a passivation layer 106 from the inside to the outside. The crystallization rate of the nano silicon oxide layer 103 and the doping layer 105 after annealing is greater than or equal to 70%. In some embodiments, an electrode 107 is also formed on the surface, and the electrode 107 passes through the passivation layer 106 and contacts the doping layer 105.

[0050] The nano-silicon oxide layer 103 may be an intrinsic nano-silicon oxide layer, or may be an N-type or P-type doped nano-silicon oxide layer. For example, the phosphorus doping concentration in the nano-silicon oxide layer 103 is 0-8E20 atoms / cm 3 , such as 0, 2E19atoms / cm 3 、5E19atoms / cm 3 、6E19atoms / cm 3 、1E20 atoms / cm 3 、5E20atoms / cm 3 、8E20 atoms / cm 3 In some embodiments, the phosphorus doping concentration in the nano-silicon oxide layer 103 is 0, that is, the nano-silicon oxide layer 103 is an intrinsic nano-silicon oxide layer, in which phosphorus is not doped. In some other embodiments, the phosphorus doping concentration in the nano-silicon oxide layer 103 is 0.3E20-8E20atoms / cm 3 , that is, the nano-silicon oxide layer 103 is a phosphorus-doped nano-silicon oxide layer.

[0051] The first tunneling layer 102 and the second tunneling layer 104 may be silicon oxide (SiOx) layers. In some embodiments, the thickness of the first tunneling layer 102 is approximately 0.75-1.15 nm, such as 0.75 nm, 1 nm, or 1.15 nm. The thickness of the second tunneling layer 104 is approximately 0.3-0.6 nm, such as 0.3 nm, 0.4 nm, 0.5 nm, or 0.6 nm.

[0052] The solar cell provided in the embodiment of the present application includes two tunneling layers, a first tunneling layer 102 and a second tunneling layer 104, and a nano silicon oxide layer 103 is formed between the two tunneling layers. The nano silicon oxide layer 103 can protect the first tunneling layer 102 from being damaged during the high temperature annealing process, thereby improving the open circuit voltage Voc and the impact factor FF of the battery, thereby improving the battery performance. At the same time, the second tunneling layer 104 can improve the diffusion rate of the doping layer 105, so that the doping atoms of the doping layer 105 diffuse more evenly during the high temperature annealing.

[0053] In some embodiments, the thickness of the nano silicon oxide layer 103 is 2-8 nm, such as 4-6 nm, specifically 2 nm, 4 nm, 6 nm or 8 nm, etc., which protects the first tunneling layer 102 from being damaged during high temperature annealing and avoids blocking carrier transport.

[0054] The doping layer 105 may be an N-type or P-type doping layer, and the thickness is about 40-90nm, such as 40nm, 60nm, 80nm, 90nm, etc. When the nano-silicon oxide layer 103 is a doped nano-silicon oxide layer, the doping type of the doping layer 105 and the nano-silicon oxide layer 103 is the same. Furthermore, the doping concentration of the doping layer 105 is greater than that of the nano-silicon oxide layer 103, forming a doping gradient difference, improving the passivation effect, and improving the impact factor FF, thereby improving the battery performance. For example, the doping concentration of phosphorus in the doping layer 105 is 0.9E21-1.3E21 atoms / cm 3 By doping the doping layer 105 with a high concentration, the surface concentration is increased, the contact is increased, and the influence factor FF is increased. At the same time, the thickness is above 40nm, which can prevent the burn-through of metal ions from causing an increase in metal contact recombination, thereby increasing the open circuit voltage Voc.

[0055] In some embodiments, the doped layer 105 may be a doped nano-silicon oxide layer. Since the doped nano-silicon oxide layer has a wider bandgap than the doped polysilicon layer, parasitic absorption can be reduced. At the same time, since the doped nano-silicon oxide layer has a greater blocking effect on metal ions than the doped polysilicon layer, the sintering window can be increased and the open circuit voltage Voc can be improved.

[0056] The passivation layer 106 may be composed of one or more passivation layers. In some embodiments, the passivation layer 106 may include only one silicon nitride layer. In some other embodiments, the passivation layer 106 may include multiple silicon nitride layers. Further, the passivation layer 106 may also include an aluminum oxide layer. For example, the passivation layer 106 includes one aluminum oxide layer and five silicon nitride layers.

[0057] The solar cell 100 can be manufactured using existing equipment, and the present embodiment does not limit the manufacturing method of the solar cell 100. The manufacturing method of the solar cell 100 is described in detail below by taking the silicon substrate 101 as an n-type silicon wafer and the doping layer 105 as a phosphorus doping layer as an example.

[0058] Please refer to Figure 1 and Figure 2 , the manufacturing method of the solar cell includes the following contents:

[0059] Step 210 , introducing nitrous oxide (N 2 O) into the process chamber to form a first tunneling layer 102 on the surface of the silicon substrate 101 .

[0060] The first tunneling layer 102 may be a silicon oxide (SiOx) layer. For example, after cleaning the silicon substrate 101, a plasma enhanced chemical vapor deposition (PECVD) process is used to deposit the first tunneling layer 102 with a thickness of about 0.75-1.15 nm on the surface of the silicon substrate 101. The specific implementation process is as follows: the laughing gas flow rate is 10800-12800 sccm, the deposition time is 75-115s, the deposition temperature is 415-450°C, the pressure is 1840-2040mtorr, the power is 13000-16000W, and the switching ratio of the RF power supply is 20 / 2000-20 / 1500, such as 20 / 2000, 20 / 1900, 20 / 1800, 20 / 1700, 20 / 1500, etc. The on / off ratio of the RF power supply in this step is relatively small, such as smaller than the on / off ratio in step 230, which can reduce plasma damage and accurately control the thickness of the tunneling layer by the deposition time.

[0061] In some embodiments, before forming the first tunneling layer 102 on the surface of the silicon substrate 101 , the surface of the silicon substrate 101 may be textured.

[0062] Step 220, introducing a first working gas into the process chamber to form a nano silicon oxide layer 103 on the first tunneling layer 102, wherein the first working gas includes one of nitrous oxide (N2O) and carbon dioxide (CO2), and silane (SiH4) and optionally phosphine (PH3), wherein the flow rate of phosphine in the first working gas is 0-230sccm, such as 0, 50sccm, 80sccm, 130sccm, 200sccm, 230sccm, etc.

[0063] The laughing gas and carbon dioxide in the first working gas are replaceable. If laughing gas is used, since laughing gas is needed in other steps, such as step 210 and step 230, the gas source of these steps can be directly used without adding a new gas source, thereby reducing production costs. Optionally, the first working gas also includes hydrogen (H2), and the nano silicon oxide layer 103 is a hydrogenated nano silicon oxide layer to improve the passivation effect.

[0064] In some embodiments, the flow rate of phosphine in the first working gas is 0, that is, there is no phosphine in the first working gas, and the nano silicon oxide layer 103 is an intrinsic nano silicon oxide layer. For example, a PECVD process can be used to deposit a nano silicon oxide layer 103 with a thickness of about 2-8nm (such as 2nm, 7nm, 8nm, etc.) on the first tunneling layer 102. Optionally, the nano silicon oxide layer 103 is 4-6nm, such as 4nm, 5nm, 6nm, etc. The specific implementation process is as follows: the deposition time is 10-20s, the deposition temperature is 415-450°C, the silane flow rate is 1100-1300sccm, the hydrogen flow rate is 5700-5800sccm, the laughing gas flow rate is 5700-5800sccm, the pressure is 2600-2800mtorr, the power is 7800-11400W, and the switching ratio of the RF power supply is 40 / 520.

[0065] In some other embodiments, the flow rate of phosphine in the first working gas is 130-230sccm, that is, the first working gas contains phosphine, and the nano silicon oxide layer 103 is a phosphorus-doped nano silicon oxide layer. For example, a PECVD process can be used to deposit a nano silicon oxide layer 103 with a thickness of about 2-8nm (such as 2nm, 7nm, 8nm, etc.) on the first tunneling layer 102. Optionally, the nano silicon oxide layer 103 is 4-6nm, such as 4nm, 5nm, 6nm, etc. The specific implementation process is as follows: deposition time is 10-20s, deposition temperature is 415-450°C, silane flow rate is 1100-1300sccm, hydrogen flow rate is 5700-5800sccm, nitrous oxide flow rate is 5700-5800sccm, phosphine flow rate is 130-230sccm, pressure is 2600-2800mtorr, power is 7800-11400W, and the switching ratio of the RF power supply is 40 / 520.

[0066] In this step, the flow rate of phosphine is small, or there is no flow rate, which reduces the penetration of phosphorus atoms into the first tunnel layer 102 to increase the recombination in the silicon substrate 101, and reduces the damage to the passivation of the first tunnel layer 102. In addition, the power used in this step is relatively small, which can also reduce the penetration of phosphorus atoms into the first tunnel layer 102 to increase the recombination in the silicon substrate 101, and reduce the damage to the passivation of the first tunnel layer 102.

[0067] In the embodiment of the present application, the nano silicon oxide layer 103 is deposited at a deposition rate of about 0.2-0.4 nm / s, and the deposition rate can be specifically 0.2 nm / s, 0.26 nm / s, 0.3 nm / s, 0.36 nm / s, 0.4 nm / s, etc., and the deposition time is about 10-20 s, thereby forming a nano silicon oxide layer 103 with a thickness of about 2-8 nm on the first tunneling layer 102. The deposition rate of the material is linearly correlated with time, and its thickness can be directly controlled by the deposition time, and the control of the deposition thickness has a high accuracy rate.

[0068] Step 230 , introducing nitrous oxide into the process chamber to form a second tunneling layer 104 on the nano silicon oxide layer 103 .

[0069] The second tunneling layer 104 may be a silicon oxide (SiOx) layer. For example, the second tunneling layer 104 with a thickness of about 0.3-0.6 nm is deposited on the nano silicon oxide layer 103 using a PECVD process, and the specific implementation process is as follows: the laughing gas flow rate is 10800-12800sccm, the deposition time is 30-60s, the deposition temperature is 415-450°C, the pressure is 1840-2040mtorr, the power is 13000-16000W, and the switching ratio of the RF power supply is 20 / 600.

[0070] Step 240 , introducing a second working gas into the process chamber to form a doping layer 105 on the second tunneling layer 104 , wherein the second working gas includes silane and phosphine.

[0071] For example, the flow rate of phosphine in the second working gas is 450-950sccm, such as 450sccm, 600sccm, 750sccm, 800sccm, and 950sccm. The flow rate of phosphine in the second working gas is greater than the flow rate of phosphine in the first working gas, so that the doping concentration of the doping layer 105 is greater than that of the nano silicon oxide layer 103. In some embodiments, the second working gas may further include hydrogen (H2), and the doping layer 105 is a hydrogenated doping layer to improve the passivation effect.

[0072] For example, a PECVD process can be used to deposit a doping layer 105 with a thickness of approximately 60-80 nm (such as 60 nm, 70 nm, 80 nm, etc.) on the second tunneling layer 104. The specific implementation process is as follows: deposition time is 480-640 s, deposition temperature is 415-450°C, silane flow rate is 2800-3000 sccm, hydrogen flow rate is 8800-10800 sccm, phosphine flow rate is 750-950 sccm, pressure is 2600-2800 mtorr, power is 8400-12000 W, and the switching ratio of the RF power supply is 40 / 520.

[0073] In some embodiments, the second working gas also includes one of laughing gas and carbon dioxide, that is, the doped layer 105 is a doped nano-silicon oxide layer. For example, laughing gas is introduced into the process chamber to deposit the doped nano-silicon oxide layer to reduce costs. Specifically, a PECVD process can be used to deposit a doped layer 105 with a thickness of approximately 40-90nm (such as 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, etc.) on the second tunneling layer 104. The specific implementation process is as follows: the deposition time is 100-260s, the deposition temperature is 415-450°C, the silane flow rate is 1100-1300sccm, the hydrogen flow rate is 5700-5800sccm, the laughing gas flow rate is 5700-5800sccm, the phosphine flow rate is 450-550sccm, the pressure is 2600-2800mtorr, the power is 8400-12000W, and the switching ratio of the RF power supply is 40 / 520.

[0074] It should be noted that the same process chamber or different process chambers may be used for steps 210 to 240.

[0075] Step 250 , annealing to crystallize the nano silicon oxide layer 103 and the doping layer 105 , wherein the crystallization rate of the nano silicon oxide layer 103 and the doping layer 105 is greater than or equal to 70%.

[0076] For example, the silicon substrate 101 after step 240 is placed in a diffusion furnace for annealing, the annealing time is 1500-3200 seconds, and the annealing temperature is 900-920°C.

[0077] Step 260 : forming a passivation layer 106 on the doped layer 105 .

[0078] One or more passivation layers may be formed on the doping layer 105, that is, the passivation layer 106 may be composed of one or more passivation layers. The following is a detailed description using the example that the passivation layer 106 includes one aluminum oxide (AlOx) layer and five silicon nitride (SiNx) layers.

[0079] (1) Using the atomic layer deposition (ALD) process, an aluminum oxide layer with a thickness of about 4.5-6.5 nm is deposited on the doping layer 105, which acts as a capping layer to block the hydrogen (H) atoms in the light and heavy doping layers from overflowing, so that the probability of hydrogen atoms and defects in the tunneling layer 105 are higher, the surface passivation is improved, and the open circuit voltage Voc is improved. The specific implementation process is as follows: the deposition temperature is 270-295°C, the water vapor (H2O) pretreatment, the pretreatment cycle number is 4-6 cycles, the water vapor flow rate is 19-21sccm, the AlOx deposition cycle number is 30-34 cycles, the water vapor flow rate is 21-24sccm, the purge time is 11-13s, the pulse time is 6-8s, the trimethylaluminum (TMA) flow rate is 22-24sccm, the purge time is 10-12s, and the pulse time is 5.5-7.5s.

[0080] (2) Use PECVD process for pre-deposition treatment to increase the hydrogen (H) content in the stacked passivation film. The specific implementation process is as follows: time is 50-60s, temperature is 480-530℃, pressure is 220-240bar, ammonia (NH3) flow rate is 8600-9600sccm, power is 8000-9700W, and the switching ratio of the RF power supply is 3 / 54.

[0081] (3) Using the PECVD process to deposit a first silicon nitride layer with a high refractive index, increase the hydrogen content, and provide a passivation effect. The specific implementation process is as follows: deposition time is 90-110s, deposition temperature is 480-530°C, pressure is 220-240bar, ammonia flow rate is 8600-9600sccm, silane flow rate is 2200-3200sccm, power is 9500-12000W, and the switching ratio of the RF power supply is 3 / 54.

[0082] (4) Use the PECVD process to deposit a second silicon nitride layer with a higher refractive index, which plays a partial passivation role and reduces the parasitic absorption caused by the high refractive index. The specific implementation process is as follows: deposition time is 80-100s, deposition temperature is 480-530℃, pressure is 220-240bar, ammonia flow rate is 9000-11000sccm, silane flow rate is 1500-2500sccm, power is 10000-14000W, and the switching ratio of the RF power supply is 3 / 54.

[0083] (5) Using the PECVD process to deposit a third silicon nitride layer with a lower refractive index, and stacking it with the fourth silicon nitride layer and the fifth silicon nitride layer to increase light absorption and reduce reflectivity. The specific implementation process is as follows: deposition time is 90-110s, deposition temperature is 480-530°C, pressure is 220-240bar, ammonia flow rate is 11000-13000ccm, silane flow rate is 1000-2000sccm, power is 9500-12000W, and the switching ratio of the RF power supply is 3 / 36.

[0084] (6) Using the PECVD process to deposit a fourth silicon nitride layer with a slightly lower refractive index, and stacking it with the third silicon nitride layer and the fifth silicon nitride layer to increase light absorption and reduce reflectivity. The specific implementation process is as follows: the deposition time is 130-150s, the deposition temperature is 480-530°C, the pressure is 220-240bar, the ammonia flow rate is 11000-13000sccm, the silane flow rate is 900-1900sccm, the power is 11000-14000W, and the switching ratio of the RF power supply is 3 / 54.

[0085] (7) A fifth silicon nitride layer with a low refractive index is deposited using a PECVD process, which is stacked with the third silicon nitride layer and the fourth silicon nitride layer to increase light absorption and reduce reflectivity. The specific implementation process is as follows: the deposition time is 165-185s, the deposition temperature is 480-530°C, the pressure is 220-240bar, the ammonia flow rate is 12500-14500sccm, the silane flow rate is 850-1850sccm, the power is 10000-14000W, and the switching ratio of the RF power supply is.

[0086] Step 270 : forming an electrode 107 penetrating through the passivation layer 106 and contacting the doping layer 105 .

[0087] For example, silver paste may be printed on the surface of the silicon substrate 101 after step 260 , and then sintered to form the electrode 107 .

[0088] The basic concepts have been described above. Obviously, for those skilled in the art, the above disclosure is only an example and does not constitute a limitation of the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to the present application. Such modifications, improvements and amendments are suggested in the present application, so such modifications, improvements and amendments still belong to the spirit and scope of the exemplary embodiments of the present application.

[0089] At the same time, the present application uses specific words to describe the embodiments of the present application. For example, "one embodiment", "an embodiment", and / or "some embodiments" refer to a certain feature, structure or characteristic related to at least one embodiment of the present application. Therefore, it should be emphasized and noted that "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or more in different positions in this specification does not necessarily refer to the same embodiment. In addition, some features, structures or characteristics in one or more embodiments of the present application can be appropriately combined.

[0090] Similarly, it should be noted that in order to simplify the description disclosed in this application and thus help understand one or more embodiments, in the above description of the embodiments of this application, multiple features are sometimes merged into one embodiment, figure or description thereof. However, this disclosure method does not mean that the subject of this application requires more features than the features mentioned. In fact, the features of the embodiment are less than all the features of the single embodiment disclosed above.

[0091] In some embodiments, numbers describing the number of components and attributes are used. It should be understood that such numbers used in the description of the embodiments are modified by the modifiers "about", "approximately" or "substantially" in some examples. Unless otherwise specified, "about", "approximately" or "substantially" indicate that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in the specification are approximate values, which may change according to the required features of individual embodiments. In some embodiments, the numerical parameters should take into account the specified significant digits and adopt the general method of retaining the digits. Although the numerical domains and parameters used to confirm the breadth of the range in some embodiments of the present application are approximate values, in specific embodiments, the setting of such numerical values ​​is as accurate as possible within the feasible range.

[0092] Although the present application has been described with reference to the current specific embodiments, ordinary technicians in this technical field should recognize that the above embodiments are only used to illustrate the present application, and various equivalent changes or substitutions may be made without departing from the spirit of the present application. Therefore, as long as the changes and modifications to the above embodiments are within the essential spirit of the present application, they will fall within the scope of the present application.

Claims

1. A method for manufacturing a solar cell, characterized in that: include: introducing laughing gas into the process chamber to form a first tunneling layer on the surface of the silicon substrate; A first working gas is introduced into the process chamber to form a nano silicon oxide layer on the first tunneling layer, wherein the first working gas comprises one of laughing gas and carbon dioxide, and silane and optionally phosphine, wherein the flow rate of the phosphine in the first working gas is 0-230 sccm; A second working gas is introduced into the process chamber to form a doping layer on the nano silicon oxide layer, wherein the second working gas includes silane and phosphine.

2. The manufacturing method according to claim 1, characterized in that The first working gas includes nitrous oxide, and the flow rate of the nitrous oxide in the first working gas is 5700-5800 sccm.

3. The manufacturing method according to claim 1 or 2, characterized in that: The nano silicon oxide layer is deposited at a deposition rate of 0.2-0.4 nm / s and the deposition time is 10-20 s.

4. The manufacturing method according to claim 1 or 2, characterized in that: The thickness of the nano silicon oxide layer is 2-8 nm.

5. The manufacturing method according to claim 1, characterized in that: The flow rate of phosphine in the second working gas is 450-950 sccm.

6. The manufacturing method according to claim 1, 2 or 5, characterized in that: The second working gas also includes one of nitrous oxide and carbon dioxide.

7. The manufacturing method according to claim 6, characterized in that: The second working gas includes nitrous oxide, and the flow rate of the nitrous oxide in the second working gas is 5700-5800 sccm.

8. The manufacturing method according to claim 1, characterized in that: The thickness of the doping layer is 40-90 nm.

9. The manufacturing method according to claim 1, characterized in that: Before the second working gas is introduced into the process chamber to form a doped layer on the nano silicon oxide layer, the method further includes: Laughing gas is introduced into the process chamber to form a second tunneling layer on the nano silicon oxide layer.

10. The manufacturing method according to claim 9, characterized in that: The on / off ratio of the radio frequency power supply during the first tunneling layer deposition process is smaller than the on / off ratio of the radio frequency power supply during the second tunneling layer deposition process.

11. The manufacturing method according to claim 10, characterized in that: During the deposition of the first tunneling layer, the switching ratio of the radio frequency power supply is 20 / 2000-20 / 1500.

12. The manufacturing method according to claim 1, characterized in that: The power during the deposition of the nano silicon oxide layer is 7800-11400W.

13. The manufacturing method according to claim 1, characterized in that: Also includes: Annealing is performed to crystallize the nano silicon oxide layer and the doping layer, wherein the crystallization rates of the nano silicon oxide layer and the doping layer are greater than or equal to 70%.

14. The manufacturing method according to claim 1 or 13, characterized in that: Also includes: forming a passivation layer on the doped layer; An electrode is formed through the passivation layer and in contact with the doping layer.

15. A solar cell comprising a silicon substrate, characterized in that: At least one surface of the silicon substrate is sequentially formed with a first tunneling layer, a nano silicon oxide layer and a doping layer from the inside to the outside, wherein the phosphorus doping concentration in the nano silicon oxide layer is 0-8E20 atoms / cm 3 .

16. The solar cell according to claim 15, characterized in that The thickness of the nano silicon oxide layer is 2-8 nm.

17. The solar cell according to claim 15, wherein: The phosphorus doping concentration in the doping layer is 0.9E21-1.3E21 atoms / cm 3 .

18. The solar cell according to any one of claims 15 to 17, characterized in that: The doped layer is a doped nano silicon oxide layer.

19. The solar cell according to claim 15, wherein: The crystallization rates of the nano silicon oxide layer and the doping layer are greater than or equal to 70%.

20. The solar cell according to claim 15, wherein: A passivation layer is also formed on the doping layer, and the solar cell further comprises: An electrode passes through the passivation layer and contacts the doping layer.

21. The solar cell according to claim 15, wherein: A second tunneling layer is also formed between the nano silicon oxide layer and the doping layer.

22. A photovoltaic module, characterized in that: The invention comprises a plurality of solar cell strings, wherein the solar cell strings comprise the solar cell according to any one of claims 15-21.

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