Wiring detection method, device and equipment of inverter parallel system and medium

Abstract

The invention discloses a wiring detection method, device and equipment of an inverter parallel system and a medium, the inverter parallel system comprises a host and at least one slave, the wiring detection method comprises the following steps: when the voltage of the host reaches a target phase, obtaining a test phase of the voltage of the slave, and then according to the target phase and the test phase, determining the voltage of the slave according to the target phase and the test phase; a master-slave voltage phase difference is obtained; according to the voltage phase difference of the master and slave machines, the wiring result between the master machine and the slave machine is determined, whether the plurality of inverters in the inverter parallel system have the condition of dislocation wiring or not is judged, interphase short circuit caused by inconsistent phases of the inverters is avoided, and therefore it is ensured that the whole inverter parallel system can operate stably.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and in particular to a wiring detection method, device, equipment and medium for a parallel inverter system. Background Art

[0002] The accuracy of wiring detection in the inverter parallel system is crucial to ensure the stable operation of the system. For example, the current inverter parallel system usually uses two-phase or three-phase power supply, with a large number of phase lines, and the phase line interfaces of the inverter and the grid-connected relay are the same or similar in appearance, which easily leads to phase mismatch between multiple inverters. When the inverter is connected to the grid, the inconsistent phases between the inverters will form a phase-to-phase short circuit through the grid-connected port connected to the grid-connected relay, thereby damaging the inverter, which has a serious impact on the safety and reliability of the system. Summary of the invention

[0003] The purpose of the present invention is to solve at least one of the technical problems existing in the prior art and to provide a wiring detection method, device, equipment and medium for an inverter parallel system, which can accurately determine the wiring conditions between multiple inverters in a parallel state.

[0004] In a first aspect, an embodiment of the present invention provides a wiring detection method for an inverter parallel system, the inverter parallel system comprising a master and at least one slave, the wiring detection method comprising: When the voltage of the host reaches the target phase, obtaining the test phase of the voltage of the slave; Obtaining a voltage phase difference between a master and a slave according to the target phase and the test phase; The connection result between the host and the slave is determined according to the voltage phase difference between the host and the slave.

[0005] The wiring detection method for the inverter parallel system provided in accordance with the embodiment of the present invention has at least the following beneficial effects: when the host and the slave are connected in parallel, when the voltage of the host reaches a preset target phase, by obtaining the test phase of the voltage of the slave and calculating the phase difference between the two, it is possible to accurately identify whether there is a phase line wiring error between the master and the slave, such as a grid phase mismatch problem, so that the wiring result based on the phase difference can promptly detect the wiring error, avoid phase-to-phase short circuit in the inverter caused by phase inconsistency, and thus ensure that the entire inverter parallel system can operate stably.

[0006] In the wiring detection method provided in an embodiment of the present invention, the host includes a first interface group for connecting to an AC power grid, and the slave includes a second interface group for connecting to the AC power grid; when the voltage of the host reaches a target phase, obtaining a test phase of the voltage of the slave includes: When the first phase sequence of the first interface group and the second phase sequences of all the second interface groups match the phase sequence of the AC power grid, and the voltage of the host reaches the target phase, the test phase of the voltage of the slave is obtained.

[0007] In the wiring detection method provided in the embodiment of the present invention, determining the wiring result between the host and the slave according to the voltage phase difference between the master and the slave includes: The connection result between the host and the slave is determined according to the voltage phase difference between the host and the slave and a preset phase difference threshold.

[0008] In the wiring detection method provided by the embodiment of the present invention, when the voltage phase difference between the master and slave is greater than a preset phase difference threshold, it is determined that the master and slave are wired out of phase.

[0009] In the wiring detection method provided by the embodiment of the present invention, when the voltage phase difference between the master and slave is less than or equal to a preset phase difference threshold, it is determined that the wiring between the host and the slave is normal.

[0010] In the wiring detection method provided in the embodiment of the present invention, when the voltage phase difference between the master and slave is greater than a preset phase difference threshold, determining that the master and slave are wired out of phase includes: When the voltage phase difference between the master and slave machines is greater than a preset phase difference threshold, the value of the number of abnormalities is increased by one, and the initial value of the number of abnormalities is zero; When the value of the abnormal number reaches a preset number threshold, it is determined that the host and the slave are connected in wrong phase.

[0011] In the wiring detection method provided in the embodiment of the present invention, the wiring detection method further includes: When the voltage phase difference between the master and slave machines is less than or equal to a preset phase difference threshold, the number of abnormal times is cleared.

[0012] In the wiring detection method provided in the embodiment of the present invention, the wiring detection method further includes: When the value of the abnormal number of times does not reach the preset number threshold, the test phase of the slave voltage is obtained again when the voltage of the host reaches the target phase, and a new master-slave voltage phase difference is obtained based on the target phase and the test phase.

[0013] In the wiring detection method provided in the embodiment of the present invention, when the voltage of the host reaches the target phase, obtaining the test phase of the voltage of the slave includes: When the voltage of the host reaches the target phase, the host sends a synchronous detection signal to all the slaves, so that the slaves obtain the test phase of the voltage of the slaves according to the synchronous detection signal.

[0014] In a second aspect, an embodiment of the present invention provides an operation control device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the wiring detection method for the inverter parallel system as described in the embodiment of the first aspect above.

[0015] The operation control device provided in accordance with the embodiment of the present invention has at least the following beneficial effects: in the case where the host and the slave are connected in parallel, when the voltage of the host reaches a preset target phase, by obtaining the test phase of the voltage of the slave and calculating the phase difference between the two, it is possible to accurately identify whether there is a phase line wiring error between the master and the slave, such as a grid phase mismatch problem, so that the wiring result based on the phase difference can promptly discover the wiring error, avoid phase-to-phase short circuit in the inverter caused by phase inconsistency, and thus ensure that the entire inverter parallel system can operate stably.

[0016] In a third aspect, an embodiment of the present invention provides a wiring detection device, comprising an operation control device as described in the embodiment of the second aspect above.

[0017] The wiring detection device provided in accordance with the embodiment of the present invention has at least the following beneficial effects: when the host and the slave are connected in parallel, when the voltage of the host reaches a preset target phase, by obtaining the test phase of the voltage of the slave and calculating the phase difference between the two, it is possible to accurately identify whether there is a phase line wiring error between the master and the slave, such as a grid phase mismatch problem, so that the wiring result based on the phase difference can promptly discover the wiring error, avoid phase-to-phase short circuit in the inverter caused by phase inconsistency, and thus ensure that the entire inverter parallel system can operate stably.

[0018] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to enable a computer to execute the wiring detection method for the inverter parallel system as described in the embodiment of the first aspect.

[0019] The computer-readable storage medium provided in accordance with the embodiment of the present invention has at least the following beneficial effects: in the case where the host and the slave are connected in parallel, when the voltage of the host reaches a preset target phase, by obtaining the test phase of the voltage of the slave and calculating the phase difference between the two, it is possible to accurately identify whether there is a phase line wiring error between the master and the slave, such as a grid phase mismatch problem, so that the wiring result based on the phase difference can promptly discover the wiring error, avoid phase-to-phase short circuits in the inverter caused by phase inconsistency, and thereby ensure that the entire inverter parallel system can operate stably.

[0020] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the description, claims and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The accompanying drawings are used to provide a further understanding of the technical solution of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the technical solution of the present invention and do not constitute a limitation on the technical solution of the present invention.

[0022] The present invention is further described below in conjunction with the accompanying drawings and embodiments; Figure 1 is a structural schematic diagram of an inverter parallel system provided by an embodiment of the present invention; Figure 2 is a flow chart of a wiring detection method for an inverter parallel system provided by an embodiment of the present invention; Figure 3 It is a schematic diagram of a specific flow of obtaining a test phase of a slave provided by an embodiment of the present invention; Figure 4 Schematic diagram of a grid-connected port wiring fault of an inverter parallel system provided by an embodiment of the present invention; Figure 5 is a schematic diagram of a grid-connected port wiring fault of an inverter parallel system provided by another embodiment of the present invention; Figure 6 is a schematic diagram of a specific flow of obtaining a test phase of a slave provided by another embodiment of the present invention; Figure 7 is a schematic diagram of a specific process for determining a wiring result provided by an embodiment of the present invention; Figure 8 is a schematic diagram of a specific process for determining a wiring result provided by another embodiment of the present invention; Fig. 9 It is a schematic diagram of voltage phases corresponding to different phase sequences at a grid-connected port of an inverter provided by an embodiment of the present invention; Fig.10 is a schematic diagram of a specific process for determining a wiring result provided by another embodiment of the present invention; Fig.11 It is a schematic diagram of the overall process of a wiring detection method for an inverter parallel system provided by an embodiment of the present invention; Fig.12 It is a structural schematic diagram of the operation control device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0023] This section will describe in detail the specific embodiments of the present invention. The preferred embodiments of the present invention are shown in the accompanying drawings. The purpose of the accompanying drawings is to supplement the description of the text part of the specification with graphics, so that people can intuitively and vividly understand each technical feature and the overall technical solution of the present invention, but it cannot be understood as a limitation on the scope of protection of the present invention.

[0024] In the description of the present invention, "several" means one or more, "more" means more than two, "greater than", "less than", "exceed", etc. are understood to exclude the number itself, "above", "below", "within", etc. are understood to include the number itself, "any one" means one or more, "at least one of the following" and similar expressions refer to any combination of these items, including any combination of single or plural items. If there is a description of the first and the second, it is only used for the purpose of distinguishing the technical features, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0025] It should be noted that the terms such as setting, installing, and connecting in the embodiments of the present invention should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above terms in the embodiments of the present invention in combination with the specific content of the technical solution. For example, the term "connection" can be a mechanical connection, an electrical connection, or mutual communication; it can be directly connected or indirectly connected through an intermediate medium.

[0026] It should be noted that the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0027] The accuracy of wiring detection in the inverter parallel system is crucial to ensure the stable operation of the system. For example, the current inverter parallel system usually uses two-phase or three-phase power supply, with a large number of phase lines, and the phase line interfaces of the inverter and the grid-connected relay are the same or similar in appearance. It is easy to have a phase line wiring error such as grid mismatch between multiple inverters. When the inverter is connected to the grid, the inconsistent phases between the inverters will form a phase-to-phase short circuit through the grid-connected port connected to the grid-connected relay, thereby damaging the inverter, which has a serious impact on the safety and reliability of the system.

[0028] Based on this, an embodiment of the present invention proposes a wiring detection method, device, equipment and medium for an inverter parallel system. When the host and the slave are connected in parallel, when the voltage of the host reaches a preset target phase, by obtaining the test phase of the voltage of the slave and calculating the phase difference between the two, it is possible to accurately identify whether there is a phase line wiring error between the master and the slave, such as a grid phase mismatch problem, so that the wiring result based on the phase difference can promptly detect the wiring error, avoid phase-to-phase short circuits caused by phase inconsistency between inverters, and thus ensure that the entire inverter parallel system can operate stably.

[0029] The embodiments of the present invention are further described below in conjunction with the accompanying drawings.

[0030] Reference Figure 1 , Figure 1 It is a structural diagram of the inverter parallel system provided by an embodiment of the present invention. It can be understood that the inverter parallel system includes multiple inverters and a corresponding number of grid-connected relays, each inverter includes a grid-connected port group and an off-grid port group, each grid-connected port in the grid-connected port group is connected to the grid-connected relay through a phase line, and then the grid-connected relay is connected to the AC power grid. At the same time, each off-grid port of each inverter off-grid port group is also connected to the load side through a phase line. At this time, it is equivalent to multiple inverters in parallel. Since the inverter is connected to the power grid through the grid-connected relay, the grid-connected and off-grid connection of the corresponding inverter can be achieved by controlling the grid-connected relay to be closed or disconnected. When the grid-connected relays corresponding to the inverter are all in a closed state, the inverter is connected to the power grid.

[0031] It is worth noting that the number of grid-connected ports and off-grid ports can be determined based on the power supply method adopted by the inverter and the power grid. For example, a three-phase four-wire power supply method can be adopted, and four grid-connected ports and four off-grid ports are set, corresponding to the A phase line, the B phase line, the C phase line and the N phase line. Similarly, a three-phase three-wire power supply method can also be adopted, and the number of grid-connected ports and off-grid ports is set to three. Taking the inverter parallel system adopting a three-phase four-wire power supply method as an example, RST is used to represent the phase sequence of the three-phase power supply, where R represents the red line, S represents the blue line, and T represents the green line. Ports of the same color are usually represented as the same phase, such as Figure 1As shown, the first grid-connected port group of the first inverter PCS1 includes R1 grid-connected port, S1 grid-connected port, T1 grid-connected port and N1 grid-connected port, i.e., neutral line port, and the first off-grid port group correspondingly includes Reps1 off-grid port, Seps1 off-grid port, Teps1 off-grid port and Neps1 off-grid port. Similarly, the second grid-connected port group of the second inverter PCS2 includes R2 grid-connected port, S2 grid-connected port, T2 grid-connected port and N2 grid-connected port, and the second off-grid port group correspondingly includes Reps2 off-grid port, Seps2 off-grid port, Teps2 off-grid port and Neps2 off-grid port, and the power grid is also correspondingly provided with R port, S port, T port and N port, and the load is also correspondingly provided with Reps port, Seps port, Teps port and Neps port. When the wiring is normal, the R1 grid-connected port and the R2 grid-connected port are connected to the R port of the power grid through the grid-connected relay, the S1 grid-connected port and the S2 grid-connected port are connected to the S port, the T1 grid-connected port and the T2 grid-connected port are connected to the T port, the N1 port and the N2 grid-connected port are connected to the N port, and similarly, the Reps1 port and the Reps2 port are connected to the Reps port of the load, the Seps1 port and the Seps2 port are connected to the Seps port of the load, the Teps1 port and the Teps2 port are connected to the Teps port of the load, and the Neps1 port and the Neps2 port are connected to the Neps port of the load. At this time, the line sequence of the first inverter PCS1 and the second inverter PCS2 at the grid-connected port and the off-grid port is the same RST. Among them, inside the inverter, the grid-connected port will be connected to the off-grid port of the same phase, that is, Figure 1 As shown, the grid-connected port of R1 will be connected to the off-grid port of Reps1.

[0032] It should be noted that the host in the inverter parallel system can be any inverter in the inverter parallel system, and the remaining inverters are slaves. In the inverter parallel system, the voltage phase of the host is used as a reference, that is, the line sequence of the host at the grid-connected port and the off-grid port is used as a reference to judge the voltage phase and wiring conditions of all slaves. When the voltage phases between the host and the slave are different, that is, the phases between the grid-connected port or the off-grid port are inconsistent, therefore, it is possible to promptly identify whether there is a wiring error problem of misaligned phase between the master and the slave.

[0033] It can be understood by those skilled in the art that Figure 1 The structure of the inverter parallel system shown in the figure does not constitute a limitation on the embodiments of the present invention, and may include more or less components than those shown in the figure, or combine certain components, or arrange the components differently.

[0034] Reference Figure 2 , Figure 2is a flow chart of a wiring detection method for an inverter parallel system provided by an embodiment of the present invention. The wiring detection method for an inverter parallel system can be applied to Figure 1 The inverter parallel system shown in the figure, the wiring detection method includes but is not limited to the following steps: Step S110: when the voltage of the master reaches the target phase, obtaining the test phase of the voltage of the slave; Step S120: obtaining a voltage phase difference between the master and slave machines according to the target phase and the test phase; Step S130: Determine the connection result between the master and the slave according to the voltage phase difference between the master and the slave.

[0035] It is understandable that when the inverter parallel system is connected to the grid and started, the master and the slave are connected to the grid, and at this time, the master and the slave can obtain power from the grid. When the voltage of the master reaches the predetermined target phase, the test phase of the voltage of the slave is measured and obtained. It should be noted that the target phase can be any phase in the voltage vector phase. Since the voltage and current will show periodic changes in each grid cycle, and there will be a target phase in each grid cycle, therefore, in each grid cycle, the phase difference between the target phase of the master and the test phase of the slave can be used to detect the wiring condition between the master and the slave.

[0036] For example, Figure 1 As shown, the first inverter PCS1 is used as the host, and the second inverter PCS2 connected in parallel with the first inverter PCS1 is used as the slave. When the voltage phase of the host PCS1 reaches 0 degrees (i.e., the target phase), the voltage phase of the slave PCS2 is measured, and the voltage phase (i.e., the test phase) of the slave PCS2 is synchronously acquired through the built-in phase detection device of the inverter or an external phase measurement tool.

[0037] After obtaining the test phase of the slave corresponding to the target phase of the master at the same time, the master-slave voltage phase difference between the two can be calculated. The master-slave voltage phase difference can be used to indicate the degree of difference between the voltage phases of the host and the slave at the same time. The master-slave voltage phase difference can be the absolute value of the voltage phase difference between the host and the slave at the same time. The voltage phase difference between the master and the slave can be used to determine whether the wiring between the master and the slave is accurate. If the wiring between the master and the slave is correct, the two are completely matched in each phase. At this time, the voltage phase of the host should be consistent with the voltage phase of the slave at the same time; if the voltage phase of the host is inconsistent with the voltage phase of the slave at the same time, it can be considered that the phase wiring between the host and the slave is inconsistent. For example, the line sequence of the host PCS1 at the grid-connected port is RST, and the line sequence of the slave at the grid-connected port PCS2 is STR. At this time, when the voltage of the host PCS1 reaches 0 degrees, that is, the target phase, the test phase of the slave PCS2 is -120 degrees, that is, the voltage phase of the slave lags behind the voltage phase of the host by 120 degrees, and the voltage phase difference between the master and the slave is 120 degrees. Therefore, the voltage phase difference between the master and the slave can be used to determine whether the wiring between the master and the slave is correct. If the voltage phase difference between the master and the slave is within the allowable range, it can be considered that the wiring between the master and the slave is correct, otherwise, it can be considered that the wiring between the master and the slave is incorrect.

[0038] Reference Figure 3 In the wiring detection method provided by an embodiment of the present invention, in the process of obtaining the test phase of the slave, the wiring detection method further includes step S210: Step S210: When the first phase sequence of the first interface group and the second phase sequences of all second interface groups match the phase sequence of the AC power grid, and the voltage of the host reaches the target phase, the test phase of the voltage of the slave is obtained.

[0039] It is understandable that in a three-phase power system, the phase sequence refers to the arrangement order of the three-phase electricity (usually R, S, T or A, B, C). In the inverter wiring detection method in the related art, in the inverter parallel system with multiple inverters connected in parallel, it can only measure whether the wiring phase sequence of a single inverter at the grid-connected port matches the phase sequence of the grid. For example, the phase sequence of the grid is RST, and the phase sequence that matches the grid phase sequence can be STR and TRS, because the phase sequence of the inverter when connected to the grid is arranged in a positive sequence. From the perspective of the grid, each inverter is connected in a standard phase sequence. Although the phase sequence of each inverter connected to the AC grid is positive, the phase sequence between multiple inverters may be inconsistent. If the phases of multiple inverters on the grid-connected port are inconsistent, a phase-to-phase short circuit will be formed at the off-grid port, thereby damaging the inverter. The wiring detection method in the related art cannot detect the fault of wrong-phase wiring between multiple inverters by judging the phase sequence of the grid-connected port by a single inverter.

[0040] Reference Figure 4, Figure 4 FIG. 1 is a schematic diagram of a grid-connected port wiring fault of an inverter parallel system provided by an embodiment of the present invention. Figure 4 As shown, the phase sequence of the first interface group of the first inverter PCS1, i.e., the grid-connected port, connected to the AC grid is RST, while the phase sequence of the second interface group of the second inverter PCS2, i.e., the grid-connected port, connected to the AC grid is STR. Therefore, the first phase sequence of the first interface group and the second phase sequence of the second interface group are both positive phase sequences of the AC grid, matching the phase sequence of the AC grid, but the phase sequence between the host and the slave is not consistent. At the same time, since the phase sequence of the off-grid ports of the two inverters connected to the load is RST, at this time, the two inverters will have a phase-to-phase short circuit, such as Figure 4 As shown by the dotted line in , a current loop is formed in which the R phase of the first inverter PCS1 and the S phase of the second inverter PCS2 are short-circuited.

[0041] Similarly, refer to Figure 5 , Figure 5 FIG. 1 is a schematic diagram of a grid-connected port wiring fault of an inverter parallel system provided by another embodiment of the present invention. Figure 5 As shown, the phase sequence of the first interface group of the first inverter PCS1, i.e., the grid-connected port, connected to the AC grid is RST, while the phase sequence of the second interface group of the second inverter PCS2, i.e., the grid-connected port, connected to the AC grid is TRS. At this time, the first phase sequence of the first interface group and the second phase sequence of the second interface group are both positive phase sequences of the AC grid, matching the phase sequence of the AC grid, but the phase sequence between the host and the slave is not consistent. At the same time, since the phase sequence of the off-grid ports of the two inverters connected to the load is RST, at this time, the two inverters will have a phase-to-phase short circuit, such as Figure 5 As shown by the dotted line in , a current loop is formed in which the R phase of the first inverter PCS1 and the T phase of the second inverter PCS2 are short-circuited.

[0042] Therefore, on the basis of detecting that the grid-connected port (i.e., the first interface group or the second interface group) of a single inverter matches the wiring phase sequence of the AC power grid, the wiring detection method provided in the embodiment of the present invention can be used. When the voltage of the host reaches a preset target phase, the test phase of the voltage of the slave is obtained and the phase difference between the two is calculated to further determine whether the wiring of each phase between multiple parallel inverters is accurate, thereby ensuring that the wiring of multiple inverters is correct when they are connected in parallel and avoiding inconsistent phase sequences between multiple parallel inverters.

[0043] Reference Figure 6 In the wiring detection method provided by an embodiment of the present invention, in the process of obtaining the test phase of the slave, the wiring detection method further includes step S310 and step S320: Step S310: When the voltage of the host reaches the target phase, the host sends a synchronization detection signal to all slaves; Step S320: the slave obtains a test phase of the voltage of the slave according to the synchronous detection signal.

[0044] It is understandable that the host can choose a variety of communication methods to send the synchronization detection signal to the slave, including but not limited to communication through I / O (Input / Output) bus, controller area network (CAN) communication, RS-485 communication, wireless communication, etc., and the synchronization detection signal can be a rising edge, a falling edge or a specific digital pulse signal, or an analog signal, or a coded signal, or a time synchronization signal. The specific communication method and signal method can be adjusted based on the specific needs of the inverter parallel system.

[0045] When the voltage of the host reaches the target phase, the host will send a synchronization detection signal to all slaves. The synchronization detection signal means that the voltage of the host has reached the target phase. It is necessary to detect the phase reached by the voltage of each slave when the voltage of the host reaches the target phase, so as to compare the voltage phase difference between the master and slave at the same time. After the slave receives the synchronization detection signal, the slave will obtain the test phase of the voltage of the slave based on the synchronization detection signal. Specifically, the slave can detect the phase of its own voltage according to the timestamp of the synchronization detection signal obtained, and use the detected phase as the test phase; or, the synchronization detection signal can carry the timestamp of the host voltage reaching the target phase, and the slave can record the phase of its own voltage at each moment, so that when the slave receives the synchronization detection signal, it can use the timestamp carried in the synchronization detection signal to find the phase at the corresponding moment and use the phase as the test phase.

[0046] It is worth noting that if the slave does not receive the synchronization detection signal sent by the master, the slave may not execute the step of acquiring the test phase and wait to receive the synchronization detection signal sent by the master when the voltage of the next grid cycle reaches the target phase.

[0047] It should be noted that after obtaining the test phase of the slave, the slave can return the test phase to the host, and the host will perform subsequent calculations of the master-slave voltage phase difference and wiring condition detection between the master and the slave; or, the target phase is a fixed phase pre-set by the host and the slave through communication. Therefore, the slave can also directly use the local test phase to calculate the master-slave voltage phase difference and perform subsequent wiring condition detection steps between the master and the slave. That is to say, the wiring detection method provided in the embodiment of the present invention can be applied to the host or slave in the inverter parallel system, that is, any inverter in the inverter parallel system. In addition, the inverter parallel system can also include a controller, which can be connected to the host and the slave for communication. The controller can receive the target phase of the host and the test phase uploaded by the slave, so that the controller can perform subsequent calculations of the master-slave voltage phase difference and wiring condition detection steps between the master and the slave.

[0048] Reference Figure 7 In the process of determining the wiring result, the wiring detection method provided by an embodiment of the present invention further includes step S410: Step S410: Determine the connection result between the master and the slave according to the voltage phase difference between the master and the slave and a preset phase difference threshold.

[0049] It is understandable that in the inverter parallel system, the host and the slave need to maintain synchronous operation to ensure that the waveforms of the output current and voltage are consistent, and to avoid problems such as current shock, voltage fluctuation or harmonics. By comparing the voltage phase difference between the master and the slave with the preset phase difference threshold, it can be determined whether the two are in a synchronous state and whether the wiring between the two is correct, and then the wiring result is determined. Among them, the preset phase difference threshold can refer to the maximum phase difference value allowed when the master and the slave are in an acceptable phase synchronization state. The phase error range for judging the phase synchronization of the master and the slave is generally 0.5rad, that is, the allowable range of the phase error is 28 degrees, that is, the preset phase difference threshold can be set to 28 degrees. Therefore, the preset phase difference threshold can be used to construct a judgment condition for judging whether the master and the slave are in a synchronous state. When the voltage phase difference between the master and the slave meets the judgment condition constructed by the preset phase difference threshold (for example, whether the voltage phase difference between the master and the slave is less than 28 degrees), it can be considered that the master and the slave are in a synchronous state, that is, the phase between the two is consistent and the wiring is correct. If the voltage phase difference between the master and the slave does not meet the judgment condition, it can be considered that the wiring between the two is wrong and the phase is inconsistent.

[0050] Reference Figure 8 In the wiring detection method provided by an embodiment of the present invention, in the process of determining the wiring result, the wiring detection method further includes step S510 or S520: Step S510: When the voltage phase difference between the master and slave is greater than a preset phase difference threshold, it is determined that the master and slave are wired in a wrong phase; or, Step S520: When the voltage phase difference between the master and slave devices is less than or equal to a preset phase difference threshold, it is determined that the connection between the master and slave devices is normal.

[0051] It can be understood that the master-slave voltage phase difference is compared with the preset phase difference threshold, and the connection condition between the host and the slave is judged by the size relationship between the master-slave voltage phase difference and the preset phase difference threshold. Specifically, when the host and the slave are connected in phase, the first phase sequence of the host in the first interface group is inconsistent with the second phase sequence of the slave in the second interface group, that is, the phase sequence of the host and the slave at the grid-connected port is inconsistent. Since the three-phase AC power provided by the AC power grid is a combination of three symmetrical sinusoidal AC power with a phase difference of 120 degrees, at this time, the phase of the host voltage will be close to or equal to 120 degrees with the phase difference of the slave voltage, and the master-slave voltage phase difference is greater than the preset phase difference threshold (such as 28 degrees); and when the connection between the host and the slave is correct, that is, the phase between the host and the slave is consistent, the master-slave voltage phase difference is approximately equal to 0 degrees, so when the connection is normal, the master-slave voltage phase difference will be less than or equal to the preset phase difference threshold. Therefore, it is possible to judge whether the host and the slave are connected in phase by the size relationship between the master-slave voltage phase difference and the preset phase difference threshold.

[0052] Reference Fig. 9 , Fig. 9 Schematic diagram of voltage vector phases corresponding to different phase sequences at the grid-connected port of the inverter provided by an embodiment of the present invention. Fig. 9 As shown, the phase sequence of the inverter at the grid-connected port can be RST, STR and TRS respectively, and these three phase sequences are all positive sequences of the AC power grid phase sequence. If the phase sequence of each parallel inverter is consistent, then the phase of the voltage of each inverter should be consistent. If there are inverters with inconsistent phase sequences, the phase difference of the voltage between the inverters with inconsistent phase sequences will be large. The first inverter PCS1 is taken as the host, and the second inverter PCS2 is taken as the slave. The target phase is set to zero. Therefore, when the voltage of the host reaches phase zero, a synchronization detection signal is sent to the slave. At this time, the voltage phase difference between the slave and the host is the voltage phase difference between the master and the slave, expressed as Figure 2 Taking the inverter phase sequence shown in FIG. 1 as an example, the phase sequence of the first inverter PCS1 is RST, and the phase sequence of the second inverter PCS2 is STR. The target phase of the host (phase sequence RST) corresponds to Fig. 9 At point A in the figure, the test phase of the slave (phase sequence STR) at the same time corresponds to Fig. 9From point B in the figure, we can see that the phase corresponding to point B is not zero, and the absolute value of the phase difference between the phase corresponding to point B (phase sequence STR) and the phase corresponding to point A (phase sequence RST) is 4π / 3. Figure 3 Taking the inverter phase sequence shown in FIG. 1 as an example, the phase sequence of the first inverter PCS1 is RST, and the phase sequence of the second inverter PCS2 is TRS. The target phase of the host (phase sequence RST) also corresponds to Fig. 9 At point A in the figure, the test phase of the slave (phase sequence TRS) at the same time corresponds to Fig. 9 From point C in the figure, it can be seen that the phase corresponding to point C is not zero either, and the absolute value of the phase difference between the phase corresponding to point C of (phase sequence TRS) and the phase corresponding to point A of (phase sequence RST) is 2π / 3; That is to say, in Figure 4 In the case of the inverter phase sequence shown in the figure, or in the case of Figure 5 Taking the inverter phase sequence shown as an example, when the host (first inverter PCS1) reaches the target phase zero, if the test phase of the slave (second inverter PCS2) is not zero, it can be considered that the phase sequence between the host (first inverter PCS1) and the slave (second inverter PCS2) is inconsistent, that is, the two are connected in the wrong phase. Even considering factors such as control and signal transmission delay, the absolute value of the master-slave voltage phase difference between the host and the slave is not exactly equal to 4π / 3 or 2π / 3, but is obviously greater than 0. Therefore, it can be compared and judged by the size relationship between the master-slave voltage phase difference and the preset phase difference threshold.

[0053] Reference Fig.10 In the process of determining the wiring result, the wiring detection method provided by an embodiment of the present invention further includes steps S610, S620, S630, S640, S650 and S660: Step S610: Determine whether the voltage phase difference between the master and slave is greater than a preset phase difference threshold. If the voltage phase difference between the master and slave is greater than the preset phase difference threshold, execute step S620; otherwise, execute step S630; Step S620: When the voltage phase difference between the master and slave devices is greater than the preset phase difference threshold, the value of the number of abnormalities is increased by one, and step S640 is executed; Step S630: When the voltage phase difference between the master and slave devices is less than or equal to the preset phase difference threshold, the number of abnormalities is reset, and the process returns to step S110; Step S640: Determine whether the value of the number of abnormalities reaches the preset number threshold. If the value of the number of abnormalities reaches the preset number threshold, execute step S650; otherwise, execute step S660; Step S650: When the value of the number of abnormalities reaches a preset number threshold, it is determined that the master and the slave are wired in the wrong phase; Step S660: When the value of the number of abnormalities does not reach the preset number threshold, the value of the number of abnormalities is retained and the process returns to step S110.

[0054] It is understandable that in order to prevent accidental misjudgment, a counting method of the number of abnormal times can be added to count the number of times the phase difference between the master and slave voltages continuously exceeds the preset phase difference threshold. When the count of the number of abnormal times reaches the set count value, that is, the preset number threshold, it can be determined that the phase sequence between the master and slave at the grid-connected port is inconsistent, that is, the wiring is wrong. Specifically, the initial value of the number of abnormal times is set to zero. When the host voltage reaches the target phase, the test phase of the slave voltage is obtained, and then the phase difference between the target phase and the test phase is calculated to obtain the master-slave voltage phase difference. Then, the relationship between the master-slave voltage phase difference and the preset phase difference threshold is judged. If the master-slave voltage phase difference is greater than the preset phase difference threshold, one is added to the current value of the number of abnormal times, and then it is determined whether the value of the number of abnormal times reaches the preset number threshold. If the value of the number of abnormal times reaches the preset number threshold, it can be considered that the phase sequence between the master and slave is inconsistent. At the same time, the value of the number of abnormal times is The detection result of the wiring of the wrong phase connection between the master and the slave is cleared and returned; if the value of the number of abnormal times has not reached the preset number threshold, the value of the number of abnormal times is retained, and the new master-slave voltage phase difference is calculated when the host voltage of the next grid cycle reaches the target voltage, and the wiring detection is performed again in the new grid cycle; wherein, if the master-slave voltage phase difference is less than or equal to the preset phase difference threshold, it can be considered that there is a misjudgment, the number of abnormal times is cleared, and the new master-slave voltage phase difference is calculated when the host voltage of the next grid cycle reaches the target voltage, and the wiring detection is performed again in the new grid cycle. By adding a count to count the number of times the master-slave voltage phase difference exceeds the preset phase difference threshold continuously, and using this as the basis for determining whether the phase sequence of the grid-connected ports between multiple inverters is consistent, the accuracy of the wiring detection can be improved, and a clearer fault indication can be provided.

[0055] The following is a specific example to illustrate the connection detection method of the inverter parallel system provided by the embodiment of the present invention.

[0056] The wiring detection method provided in the embodiment of the present invention can be executed by the host in the inverter parallel system, can also be executed by the slave in the inverter parallel system, or can also be executed by the host and the slave in the inverter parallel system. Fig.11 , Fig.11 FIG. 1 is a schematic diagram of the overall flow of the wiring detection method for the inverter parallel system provided by an embodiment of the present invention. Fig.11As shown, in step S701, when the phase sequence of the host and the slave at the grid-connected port matches the phase sequence of the AC power grid, in response to the synchronous detection signal sent by the host, the slave obtains the test phase of the slave voltage, wherein the synchronous detection signal indicates that the host voltage reaches the target phase in a power grid cycle, and the synchronous detection signal may carry the phase information of the target phase, or the host and the slave communicate in advance to determine a fixed voltage phase as the target phase. In step S702, the phase difference between the target phase and the test phase is calculated to obtain the master-slave voltage phase difference. In step S703, the magnitude relationship between the master-slave voltage phase difference and the preset phase difference threshold is determined. If the master-slave voltage phase difference is greater than the preset phase difference threshold, step S704 is executed, otherwise step S705 is executed. In step S704, the current value of the number of abnormalities is increased by one, wherein the initial value of the number of abnormalities is zero, and then step S706 is executed. In step S705, the current value of the number of abnormalities is cleared, and step S701 is returned to wait for the synchronous detection signal of the next power grid cycle. In step S706, it is determined whether the value of the number of abnormalities reaches the preset number threshold. If the value of the number of abnormalities reaches the preset number threshold, step S707 is executed, otherwise step S708 is executed. In step S707, it is determined that the master and slave are connected in wrong phases, the current value of the number of abnormalities is cleared, and the wiring detection is ended. In step S708, the current value of the number of abnormalities is retained, and the execution returns to step S701 to wait for the synchronization detection signal of the next power grid cycle.

[0057] Therefore, when the phase sequence of the grid-connected ports of each inverter in the inverter parallel system is the positive sequence of the grid phase sequence, the voltage phase difference between the master and the slave can be detected to determine whether the wiring is wrong-phase. When the voltage of the master reaches the preset target phase, the test phase of the voltage of the slave is obtained to calculate the phase difference between the two, and introduce a counting mechanism to count the number of times the voltage phase difference between the master and the slave exceeds the preset phase difference threshold continuously. This is then used as the basis for determining whether the phase sequence of the grid-connected ports of multiple inverters is consistent. This can improve the accuracy of wiring detection and effectively detect whether there is a wrong-phase wiring situation in the inverter in the inverter parallel system.

[0058] Second, refer to Fig.12 The embodiment of the present invention provides an operation control device 1200, including a memory 1220, a processor 1210, and a computer program stored in the memory 1220 and executable on the processor 1210. The processor 1210 executes the program to implement the wiring detection method of the first embodiment as described above, for example, executing Figure 2 In the method steps S110 to S130, Figure 3 In step S210 of the method, or executing Figure 6 In step S510 or S520 of the method, or executing Figure 7In step S410 of the method, or executing Figure 8 In the method steps S510, S520 and S530, or executing Fig.10 Method steps S610 to S660 in.

[0059] According to the operation control device provided by the embodiment of the present invention, when the host and the slave are connected in parallel, when the voltage of the host reaches a preset target phase, by obtaining the test phase of the voltage of the slave and calculating the phase difference between the two, it is possible to accurately identify whether there is a phase line wiring error between the master and the slave, such as a grid phase error problem, so that the wiring result based on the phase difference can promptly discover the wiring error, avoid phase-to-phase short circuits caused by phase inconsistency between inverters, and thus ensure that the entire inverter parallel system can operate stably.

[0060] In a third aspect, an embodiment of the present invention provides a wiring detection device, comprising an operation control device as described in the embodiment of the second aspect above.

[0061] According to the wiring detection device provided in the embodiment of the present invention, when the host and the slave are connected in parallel, when the voltage of the host reaches a preset target phase, by obtaining the test phase of the voltage of the slave and calculating the phase difference between the two, it is possible to accurately identify whether there is a phase line wiring error between the master and the slave, such as a grid phase mismatch problem, so that the wiring result based on the phase difference can promptly discover the wiring error, avoid phase-to-phase short circuits caused by phase inconsistency between inverters, and thus ensure that the entire inverter parallel system can operate stably.

[0062] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to enable a computer to execute the wiring detection method of the first aspect embodiment, for example, to execute Figure 2 In the method steps S110 to S130, Figure 3 In step S210 of the method, or executing Figure 6 In step S510 or S520 of the method, or executing Figure 7 In step S410 of the method, or executing Figure 8 In the method steps S510, S520 and S530, or executing Fig.10 Method steps S610 to S660 in.

[0063] According to the computer-readable storage medium provided in an embodiment of the present invention, when the host and the slave are connected in parallel, when the voltage of the host reaches a preset target phase, by obtaining the test phase of the voltage of the slave and calculating the phase difference between the two, it is possible to accurately identify whether there is a phase line wiring error between the master and the slave, such as a grid phase error problem, so that the wiring result based on the phase difference can promptly discover the wiring error, avoid phase-to-phase short circuits caused by phase inconsistency between inverters, and thereby ensure that the entire inverter parallel system can operate stably.

[0064] It will be appreciated by those skilled in the art that all or some of the steps and systems in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. Some physical components or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or may be implemented as hardware, or may be implemented as an integrated circuit, such as an application-specific integrated circuit. The integrated physical components may be stored in a computer-readable storage medium if implemented in the form of software functional units and sold or used as independent products. Based on such an understanding, the technical solution of the present invention may be essentially or partly or all or partly in the form of a software product that contributes to the prior art, and the computer software product may be stored in a storage medium, including several instructions for enabling a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods of various embodiments of the present invention. As a term well known to those skilled in the art, computer storage media include volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information such as computer-readable instructions, data structures, program modules, or other data. Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk DVD or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those skilled in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0065] The embodiments of the present invention are described in detail above with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge scope of ordinary technicians in the technical field without departing from the purpose of the present invention.

Claims

1. A wiring detection method for an inverter parallel system, wherein the inverter parallel system comprises a master and at least one slave, characterized in that: The wiring detection method comprises: When the voltage of the host reaches the target phase, obtaining the test phase of the voltage of the slave; Obtaining a voltage phase difference between a master and a slave according to the target phase and the test phase; The connection result between the host and the slave is determined according to the voltage phase difference between the host and the slave.

2. The wiring detection method according to claim 1, characterized in that: The host includes a first interface group for connecting to an AC power grid, and the slave includes a second interface group for connecting to the AC power grid; when the voltage of the host reaches a target phase, obtaining a test phase of the voltage of the slave includes: When the first phase sequence of the first interface group and the second phase sequences of all the second interface groups match the phase sequence of the AC power grid, and the voltage of the host reaches the target phase, the test phase of the voltage of the slave is obtained.

3. The wiring detection method according to claim 1, characterized in that: The step of determining the connection result between the host and the slave according to the voltage phase difference between the master and the slave includes: The connection result between the host and the slave is determined according to the voltage phase difference between the host and the slave and a preset phase difference threshold.

4. The wiring detection method according to claim 3, characterized in that: When the voltage phase difference between the master and slave is greater than a preset phase difference threshold, it is determined that the master and slave are wired in a wrong phase.

5. The wiring detection method according to claim 3, characterized in that: When the voltage phase difference between the master and slave is less than or equal to a preset phase difference threshold, it is determined that the connection between the master and the slave is normal.

6. The wiring detection method according to claim 4, characterized in that: When the voltage phase difference between the master and slave is greater than a preset phase difference threshold, determining that the master and slave are wired in phase error includes: When the voltage phase difference between the master and slave machines is greater than a preset phase difference threshold, the value of the number of abnormalities is increased by one, and the initial value of the number of abnormalities is zero; When the value of the abnormal number reaches a preset number threshold, it is determined that the host and the slave are connected in wrong phase.

7. The wiring detection method according to claim 6, characterized in that: The wiring detection method further comprises: When the voltage phase difference between the master and slave machines is less than or equal to a preset phase difference threshold, the number of abnormal times is cleared.

8. The wiring detection method according to claim 6 or 7, characterized in that: The wiring detection method further comprises: When the value of the abnormal number of times does not reach the preset number threshold, the test phase of the slave voltage is obtained again when the voltage of the host reaches the target phase, and a new master-slave voltage phase difference is obtained based on the target phase and the test phase.

9. The wiring detection method according to claim 1, characterized in that: When the voltage of the host reaches the target phase, obtaining the test phase of the voltage of the slave includes: When the voltage of the host reaches the target phase, the host sends a synchronous detection signal to all the slaves, so that the slaves obtain the test phase of the voltage of the slaves according to the synchronous detection signal.

10. An operation control device, characterized in that: The invention comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the wiring detection method for the inverter parallel system according to any one of claims 1 to 9.

11. A wiring detection device, applied to an inverter parallel system, characterized in that: It comprises the operation control device as claimed in claim 10.

12. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to enable a computer to execute the wiring detection method for the inverter parallel system according to any one of claims 1 to 9.

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