Preparation method of back metal of semiconductor wafer
The abnormal back metal layer on the back of the semiconductor wafer is removed by the etching method of the first and second etching liquids, which solves the problems of complex, long and high cost of back metal reprocessing in the prior art, and realizes high-quality back metal re-preparation, ensuring the electricality, yield and reliability of the wafer.
Patent Information
- Application Number
- CN202311147852.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-06
- Publication Date
- 2025-03-07
AI Technical Summary
In the prior art, the steps of back metal reprocessing are complicated, the process time is long and the cost is high, making it difficult to ensure the yield and reliability of the metal layer on the back of the wafer.
The back metal layer on the back of the wafer is etched by the first etching liquid, the first back metal layer is removed and the back of the semiconductor wafer is exposed. Then the exposed back of the wafer is etched using the second etching liquid to remove residual and surface defects, and finally the second back metal layer is prepared on the back.
The metal layer on the back of the abnormal wafer is completely removed, and a flat wafer back is obtained without filming, grinding and thinning, etc. The reprocessed back metal layer has a good morphology and high quality, ensuring that the electrical properties, yield and reliability of the reprocessed wafer are consistent with that of normal products.
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Figure CN119581315A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of semiconductor integrated circuit design and manufacturing, and in particular relates to a method for preparing a semiconductor wafer back metal. Background Art
[0002] After the product is back-metallized, the manufacturing process of the semiconductor chip is basically completed. If the product is abnormal during or after back-metallization, the abnormality may eventually lead to the scrapping of the entire product and cause losses to the company. The abnormality of the back metal usually includes discoloration abnormality, such as Figure 1 and Figure 2 How to reprocess wafers with abnormal back gold layer so that the reworked wafers can maintain the yield and reliability is a difficult problem in the industry.
[0003] When the product shows abnormal back discoloration, it indicates that there is something wrong with the chip. However, the chip has been treated with back metal at this time and there is a back metal layer. The back metal of the wafer needs to be reprocessed. The method is to remove the original back metal and then re-treat the chip with back gold.
[0004] In the semiconductor manufacturing process, it is usually necessary to thin the wafer and then perform back metallization, the main purpose of which is to reduce contact resistance. The commonly used back metallization process includes wafer front film lamination, wafer back thinning, film removal, wafer cleaning, and forming back metal on the back of the wafer.
[0005] When the back metal is abnormal and needs to be reprocessed, the general processing flow includes: re-filming the front of the wafer, soaking in an acid solution to remove the back metal, cleaning the wafer, grinding and thinning the back of the wafer, and re-forming the back metal on the back of the wafer. The above back metal reprocessing process steps are relatively complicated, the process time is long and the cost is high.
[0006] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present application and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because they are described in the background technology section of the present application. Summary of the invention
[0007] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a method for preparing a semiconductor wafer back metal, so as to solve the problems of complicated steps, long process time and high cost in the prior art for reprocessing the back metal.
[0008] To achieve the above-mentioned purpose and other related purposes, the present invention provides a method for preparing a back metal of a semiconductor wafer, the preparation method comprising: providing a semiconductor wafer, the semiconductor wafer being provided with a first back metal layer, the first back metal layer having defects; etching the first back metal layer using a first etching solution to remove the first back metal layer and expose the back side of the semiconductor wafer; etching the exposed back side of the semiconductor wafer using a second etching solution to remove the residue of the first back metal layer and the wafer surface defects of the semiconductor wafer; and preparing a second back metal layer on the back side of the semiconductor wafer.
[0009] Optionally, the first back metal layer includes one of Ti, Ni, NiV and Ag, a combined stack of any two of them, or a combined stack of multiple of them.
[0010] Optionally, the first etching solution comprises a mixture of H2SO4, HNO3 and HF, wherein the mass ratio of H2SO4 is 75-85%, the mass ratio of HNO3 is 5-10%, and the mass ratio of HF is 1-5%.
[0011] Optionally, the etching time of the first etching solution is adjusted according to the thickness of the first back metal layer so that the etching stops on the exposed back side of the semiconductor wafer.
[0012] Optionally, the thickness of the first back metal layer is 1 to 2 micrometers, and the etching time of etching the first back metal layer with the first etching solution is 100 seconds to 250 seconds.
[0013] Optionally, the first etching solution is used to etch the first back metal layer at a rotation speed of 450 rpm-550 rpm and a temperature of 28° C.-32° C.
[0014] Optionally, the second etching solution comprises a mixture of 49% HF and H2O, wherein the volume ratio of 49% HF to H2O is 1:80-1:120, and the etching time of etching the exposed back side of the semiconductor wafer using the second etching solution is 25 seconds-35 seconds.
[0015] Optionally, the rotation speed of etching the exposed back side of the semiconductor wafer with the second etching solution is 550 rpm-650 rpm and the temperature is 20° C.-30° C.
[0016] Optionally, etching the first back metal layer with the first etching solution and etching the exposed back side of the semiconductor wafer with the second etching solution are performed in situ in the same chamber.
[0017] Optionally, the second back metal layer has the same material and structure as the first back metal layer.
[0018] As described above, the method for preparing the semiconductor wafer back metal of the present invention has the following beneficial effects:
[0019] The present invention etches the back metal layer on the back side of the wafer with a first etching solution and etches the exposed back side of the wafer with a second etching solution, so that the abnormal metal layer on the back side of the wafer can be completely removed and a smooth back side of the wafer can be obtained. The back metal layer can be re-prepared without the need for film lamination, grinding and thinning and other process steps. The re-processed back metal layer has good morphology and high quality. Furthermore, the present invention can not only remove the abnormality of the back metal layer of the wafer, but also ensure that the electrical properties, yield and reliability of the re-processed wafer are consistent with those of normal products.
[0020] The method for preparing the wafer back metal of the present invention is easy to implement, repeatable, and highly reliable. It does not affect the progress of other process steps of the machine and does not require additional processing equipment. It has the advantages of simple steps, low process cost, and low time cost. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] The included drawings are used to provide a further understanding of the embodiments of the present application, which constitute a part of the specification, are used to illustrate the implementation of the present application, and together with the text description, explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application.
[0022] Figure 1 and Figure 2 Schematic diagram showing the discoloration anomaly of the back metal.
[0023] Figure 3 to Figure 8 It is a schematic structural diagram showing the steps of a method for preparing a semiconductor wafer back metal according to an embodiment of the present invention.
[0024] Fig. 9 A scanning electron microscope image (left) shows a back metal layer of a normal semiconductor wafer and a scanning electron microscope image (right) shows a back metal layer of a reprocessed semiconductor wafer.
[0025] Fig.10 The figure shows the test results of a wafer after it is reprocessed to form a new back metal layer using the method for preparing a semiconductor wafer back metal according to an embodiment of the present invention.
[0026] Component number description
[0027] 101 Semiconductor Wafer
[0028] 102 first back metal layer
[0029] 103 Defects
[0030] 104 First Etching Solution
[0031] 105 Liquid spray pipe
[0032] 106 Wafer surface defects
[0033] 107 Residue of the first back metal layer
[0034] 108 second etching solution
[0035] 109 Second back metal layer DETAILED DESCRIPTION
[0036] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.
[0037] It should be emphasized that the term “include / comprises” when used herein refers to the presence of features, integers, steps or components, but does not exclude the presence or addition of one or more other features, integers, steps or components.
[0038] Features described and / or illustrated with respect to one embodiment may be used in the same or similar manner in one or more other embodiments, combined with features in other embodiments, or substituted for features in other embodiments.
[0039] For example, when describing the embodiments of the present invention in detail, for the sake of convenience, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic view is only an example, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional space dimensions of length, width and depth should be included.
[0040] For ease of description, spatially relative terms such as "under", "below", "below", "below", "above", "on", etc. may be used herein to describe the relationship of one element or feature shown in the drawings to other elements or features. It will be understood that these spatially relative terms are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the drawings. In addition, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.
[0041] In the context of the present application, a structure in which a first feature is described as being "above" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
[0042] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and therefore the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.
[0043] like Figure 3 to Figure 8 As shown, this embodiment provides a method for preparing a back metal of a semiconductor wafer 101, and the preparation method comprises the following steps:
[0044] like Figure 3 First, step 1) is performed to provide a semiconductor wafer 101 . The semiconductor wafer 101 is provided with a first back metal layer 102 . The first back metal layer 102 has defects 103 .
[0045] In some embodiments, the material of the semiconductor wafer 101 may be silicon, silicon germanium, germanium, silicon carbide or a III-V compound, etc. In a specific example, the material of the semiconductor wafer 101 is silicon. The semiconductor wafer 101 may be an intrinsic semiconductor or a doped semiconductor. Depending on the conductivity type, the doped ions may be, for example, phosphorus, arsenic, boron, etc. The concentration of the ion doping may be set according to the required resistivity of the semiconductor wafer 101.
[0046] In some embodiments, the first back metal layer 102 includes one of Ti, Ni, NiV and Ag, a combination of any two, or a combination of multiple. In a specific example, the first back metal layer 102 is a Ti / NiV / Ag stack.
[0047] like Figure 3 As shown, the first back metal layer 102 has defects 103, such as abnormal discoloration, surface roughness, surface depression, surface protrusion, and surface oxidation. Whether the first back metal layer 102 has defects 103 can be determined by direct observation with the naked eye or by optical detection equipment.
[0048] like Figure 4-5 As shown, step 2 is then performed to etch the first back metal layer 102 using a first etching solution 104 to remove the first back metal layer 102 and expose the back side of the semiconductor wafer 101 .
[0049] In one embodiment, the first etching solution 104 comprises a mixture of H2SO4, HNO3 and HF, wherein the mass ratio of H2SO4 is 75-85%, the mass ratio of HNO3 is 5-10%, and the mass ratio of HF is 1-5%, wherein the mass ratio is the proportion of the corresponding components to the total mass of the first etching solution 104. In a specific example, the first etching solution 104 comprises 80% H2SO4, 8% HNO3, and 3% HF, and the first etching solution 104 may further comprise H2O.
[0050] In one embodiment, the etching time of the first etchant 104 is adjusted according to the thickness of the first back metal layer 102 so that the etching stops on the exposed back side of the semiconductor wafer 101. For example, the thickness of the first back metal layer 102 is 1 to 2 microns, and the etching time of the first etchant 104 for etching the first back metal layer 102 is 100 seconds to 250 seconds. In a specific example, the thickness of the first back metal layer 102 is 1.4 microns, and the etching time of the first etchant 104 for etching the first back metal layer 102 is 140 seconds to 160 seconds.
[0051] For example, the first etching liquid 104 can be sprayed onto the back side of the semiconductor wafer 101 through the liquid spray pipe 105, and the first etching liquid 104 can be made to cover the back side of the semiconductor wafer 101 more evenly by rotating the semiconductor wafer 101 to ensure that the etching rate of the first back metal layer 102 in each area remains consistent.
[0052] In one embodiment, the first etching solution 104 is used to etch the first back metal layer 102 at a rotation speed of 450-550 rpm and a temperature of 28-32° C. The etching in this example can be performed at room temperature without additional heating and temperature control of the chamber, which can effectively reduce process costs.
[0053] like Figure 6-7 As shown, step 3 is then performed to etch the exposed back side of the semiconductor wafer 101 with a second etching solution 108 to remove the residue 107 of the first back metal layer and the wafer surface defects 106 of the semiconductor wafer 101 .
[0054] In a specific example, when the etching in step 2) stops on the exposed back side of the semiconductor wafer 101, the back side of the semiconductor wafer 101 usually has a small amount of metal residue and wafer surface defects 106, such as Figure 5 shown.
[0055] In one embodiment, the second etching solution 108 comprises a mixture of 49% HF and H2O, wherein the volume ratio of 49% HF to H2O is 1:80-1:120, for example, 1:100, and the etching time of etching the exposed back side of the semiconductor wafer 101 with the second etching solution 108 is 25 seconds to 35 seconds.
[0056] In one embodiment, the second etching solution 108 is used to etch the exposed back side of the semiconductor wafer 101 at a rotation speed of 550-650 rpm and a temperature of 20-30° C. The etching in this example can be performed at room temperature, without the need for additional heating and temperature control of the chamber, which can effectively reduce process costs.
[0057] In one embodiment, the first etching solution 104 is used to etch the first back metal layer 102 and the second etching solution 108 is used to etch the exposed back side of the semiconductor wafer 101 in situ in the same chamber. In the present invention, the back metal layer on the back side of the wafer is etched by the first etching solution 104 and the exposed back side of the wafer is etched by the second etching solution 108, so that the abnormal back metal layer of the wafer can be completely removed and a flat back side of the wafer can be obtained. Moreover, the first etching solution 104 is used to etch the first back metal layer 102 and the second etching solution 108 is used to etch the exposed back side of the semiconductor wafer 101 in situ in the same chamber, and the back metal layer can be prepared again without the need for film lamination, grinding and thinning and other process steps, which has the advantages of simple steps, low process cost and low time cost.
[0058] like Figure 8 As shown, step 4) is finally performed to prepare a second back metal layer 109 on the back side of the semiconductor wafer 101 .
[0059] In one embodiment, the second back metal layer 109 may be prepared on the back side of the semiconductor wafer 101 by using a sputtering process, an evaporation process, etc. In this embodiment, steps such as annealing may also be included to enhance the strength of the second back metal layer 109 .
[0060] In one embodiment, the second back metal layer 109 has the same material and structure as the first back metal layer 102. For example, when the first back metal layer 102 is a Ti / NiV / Ag stack, the second back metal layer 109 can also be a Ti / NiV / Ag stack, and the thickness of each layer is also consistent before and after, so that the properties of the back metal layer before and after reprocessing are consistent.
[0061] Fig. 9 The scanning electron microscope image (left) of the back metal layer of the normal semiconductor wafer 101 and the scanning electron microscope image (right) of the back metal layer of the semiconductor wafer 101 after reprocessing are shown. Fig. 9 It can be seen that the method for preparing the back metal of the semiconductor wafer 101 in this example can reprocess the back metal layer of the semiconductor wafer 101 and can repeat the operation. For example, the above-mentioned reprocessing can be repeated 2 times, 3 times or more times, that is, it can be reworked twice or more times and ensure that the surface morphology and electrical parameters of the wafer are consistent with the baseline material parameters (Baseline Match).
[0062] At the same time, the reprocessed back metal layer can maintain normal product morphology and quality.
[0063] Fig.10 The wafer test results after the preparation method of the back metal of the semiconductor wafer 101 of this example is reprocessed to form a new back metal layer, wherein Yield in the figure represents the yield of the wafer test, IDSS1 represents the sum of the drain-source saturation current anomaly in the wafer test, BVDSS1 represents the sum of the drain-source breakdown voltage anomaly in the wafer test, VTH1 represents the sum of the threshold voltage anomaly in the wafer test, and Ron represents the sum of the on-resistance anomaly in the wafer test. Fig.10 It can be seen that with the progress of the process of this application and the gradual improvement and adjustment of various process parameters, the yield of the reprocessed semiconductor wafer 101 gradually increases, and the sum of various abnormal terms gradually decreases. The preparation method of the wafer back metal of this application has the advantages of easy implementation, repeatability and high reliability.
[0064] As described above, the method for preparing the back metal of the semiconductor wafer 101 of the present invention has the following beneficial effects:
[0065] The present invention etches the back metal layer on the back side of the wafer by the first etching solution 104, and etches the exposed back side of the wafer by the second etching solution 108, so that the abnormal metal layer on the back side of the wafer can be completely removed and a flat back side of the wafer can be obtained. The back metal layer can be re-prepared without the need for film lamination, grinding and thinning and other process steps. The re-processed back metal layer has good morphology and high quality. Furthermore, the present invention can not only remove the abnormality of the back metal layer of the wafer, but also ensure that the electrical properties, yield and reliability of the re-processed wafer are consistent with those of normal products.
[0066] The method for preparing the wafer back metal of the present invention is easy to implement, repeatable, and highly reliable. It does not affect the progress of other process steps of the machine and does not require additional processing equipment. It has the advantages of simple steps, low process cost, and low time cost.
[0067] Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.
[0068] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.
Claims
1. A method for preparing a semiconductor wafer back metal, characterized in that: The preparation method comprises: A semiconductor wafer is provided, wherein the semiconductor wafer is provided with a first back metal layer, and the first back metal layer has defects; Etching the first back metal layer using a first etching solution to remove the first back metal layer and expose the back side of the semiconductor wafer; Etching the exposed back side of the semiconductor wafer using a second etching solution to remove residues of the first back metal layer and wafer surface defects of the semiconductor wafer; A second back metal layer is prepared on the back side of the semiconductor wafer.
2. The method for preparing a semiconductor wafer back metal according to claim 1, characterized in that: The first back metal layer includes one of Ti, Ni, NiV and Ag, a combination of any two of them, or a combination of multiple ones.
3. The method for preparing a semiconductor wafer back metal according to claim 2, characterized in that: The first etching solution comprises a mixture of H2SO4, HNO3 and HF, wherein the mass ratio of H2SO4 is 75-85%, the mass ratio of HNO3 is 5-10%, and the mass ratio of HF is 1-5%.
4. The method for preparing a semiconductor wafer back metal according to claim 2, characterized in that: The etching time of the first etching solution is adjusted according to the thickness of the first back metal layer so that the etching stops on the exposed back side of the semiconductor wafer.
5. The method for preparing a semiconductor wafer back metal according to claim 3, characterized in that: The thickness of the first back metal layer is 1 to 2 micrometers, and the etching time of the first back metal layer using the first etching solution is 100 seconds to 250 seconds.
6. The method for preparing a semiconductor wafer back metal according to claim 1, characterized in that: The first back metal layer is etched with the first etching solution at a rotation speed of 450 rpm-550 rpm and a temperature of 28° C.-32° C.
7. The method for preparing a semiconductor wafer back metal according to claim 1, characterized in that: The second etching solution comprises a mixture of 49% HF and H2O, wherein the volume ratio of 49% HF to H2O is 1:80-1:120, and the etching time of the exposed back side of the semiconductor wafer etched by the second etching solution is 25 seconds-35 seconds.
8. The method for preparing a semiconductor wafer back metal according to claim 1, characterized in that: The rotation speed of etching the exposed back side of the semiconductor wafer using the second etching solution is 550 rpm-650 rpm and the temperature is 20° C.-30° C.
9. The method for preparing a semiconductor wafer back metal according to claim 1, characterized in that: The first back metal layer is etched with a first etching solution, and the exposed back side of the semiconductor wafer is etched with a second etching solution in situ in the same chamber.
10. The method for preparing a semiconductor wafer back metal according to claim 1, characterized in that: The second back metal layer has the same material and structure as the first back metal layer.