A bipolar output high-voltage synchronous buck circuit and its control method

Abstract

The present invention discloses a high-voltage synchronous buck circuit with bipolar output and a control method thereof, which relates to the field of circuit technology. The circuit comprises: a drain of a switch tube Q1 is connected to the positive electrode of a voltage input terminal, and a source is connected to the drain of Q3; the source of Q3 is connected to one end of an inductor L, and the other end of the inductor L is connected to the voltage output terminal; the drain of Q2 is connected between the source of Q1 and the drain of Q3, and the source of Q2 is connected to the negative electrode of the voltage input terminal; the source of Q4 is connected to the source of Q2, and the drain is connected to the voltage output terminal; the drain of Q5 is connected between the drain of Q2 and the drain of Q3, and the source is connected between the drain of Q4 and the voltage output terminal; the source of Q6 is connected between the source of Q4 and the source of Q2, and the drain is connected between the source of Q3 and the inductor L. The circuit meets special application scenarios of high power density, high voltage and bipolar output.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit control, and in particular to a high-voltage synchronous BUCK circuit with bipolar output and a control method thereof. Background Art

[0002] With the widespread application of piezoelectric ceramics in the micro-actuation field, scholars at home and abroad have conducted in-depth research on piezoelectric ceramic drive power supplies and developed a variety of piezoelectric drive power supplies. High-voltage drive power supplies are widely used due to their simple structure and stable performance. Low-voltage drive power supplies are characterized by their small size, light weight, and high reliability. Voltage-type piezoelectric drive power supplies and current / charge-type piezoelectric drive power supplies are currently the most widely used, but they still have problems such as low power density, low conversion efficiency, and low drive voltage that need to be addressed.

[0003] At present, some scholars have proposed: (1) a high dynamic driving power supply for inertial stick-slip, which significantly improves the switching speed of power MOSFET by optimizing the charging and discharging loop parameters of power MOSFET, thereby improving the response performance of the driving power supply. When driving a 0.5uF inertial stick-slip load, the step response time of the driving power supply is 40us; in terms of stability, the phase margin of the power amplifier circuit is 80°, and the circuit has good static characteristics and dynamic response performance; (2) a simulation model of a piezoelectric bending driver and its amplifier circuit is proposed for the piezoelectric bending driver, and the influence of the current limit of the amplifier circuit on the performance of the piezoelectric bending driver is tested. An audio amplifier is developed, which can provide a high voltage output of 200V under a capacitive load of 1uF; when driving a 0.1uF load, its corner frequency can reach 10KHz; (3) based on the error amplification principle, a method of amplifying the output voltage of the dynamic power amplifier by using a high voltage operational amplifier connected in series with the power amplifier part is proposed and analyzed. A method for connecting multiple power boost units in parallel in a complementary symmetrical power amplifier circuit to increase the output current and output power peak. Using the proposed principle and method, a high-voltage high-power amplifier for driving a piezoelectric stack actuator was developed and simulated and tested. When driving a 4.7uF capacitive load, the power amplifier circuit can output a 150V, 100Hz frequency sinusoidal square wave triangle wave signal without distortion, and the step-up and step-down times are both less than 500us; (4) A 15W power amplifier. The power amplifier circuit mainly consists of a flyback converter and a power operational amplifier. The flyback converter generates a variable DC voltage to power the P-OPA. The P-OPA outputs an amplified sinusoidal signal with a DC bias of 100V to drive the piezoelectric actuator. The power amplifier circuit can output a 0-10kHz, 200V sinusoidal signal without distortion when no-load. When driving a 1uF load, the output sinusoidal signal frequency can reach 200Hz; the step-up time of the no-load output 200V high voltage is less than 15us.

[0004] Currently, piezoelectric drivers have a step response time significantly greater than 40µs when driving a 0.5µF load. As demand for fast piezoelectric ceramic drive applications increases, driver performance must match this. However, currently available capacitive high-voltage drivers cannot address bipolar output requirements while also meeting certain load power requirements. Drivers built with high-power devices also have low power density, making capacitive load drivers unsuitable for specialized applications requiring high power density, high voltage, and bipolar output. Summary of the Invention

[0005] In view of the fact that the power density of the driving power supply made of high-power devices in the existing technology is low, resulting in the inability of the capacitive load driving power supply to meet the special application scenarios of high power density, high voltage and bipolar output, the present invention proposes a high-voltage synchronous buck circuit with bipolar output and its control method, thereby solving the problems existing in the existing technology.

[0006] A bipolar output high-voltage synchronous buck circuit includes main switch tubes Q1 and Q2, reversing switch tubes Q3, Q4, Q5 and Q6, and a front-stage voltage stabilizing capacitor C1, a filter capacitor C2, a filter inductor L and a resistor Rload;

[0007] The drain of Q1 is connected to the positive electrode of the voltage input terminal, and the source is connected to the drain of Q3; the source of Q3 is connected to one end of the inductor L, and the other end of the inductor L is connected to the voltage output terminal; the drain of Q2 is connected between the source of Q1 and the drain of Q3, and the source of Q2 is connected to the negative electrode of the voltage input terminal; the source of Q4 is connected to the source of Q2, and the drain is connected to the voltage output terminal; the drain of Q5 is connected between the drain of Q2 and the drain of Q3, and the source is connected between the drain of Q4 and the voltage output terminal; the source of Q6 is connected between the source of Q4 and the source of Q2, and the drain is connected between the source of Q3 and the inductor L; one end of Rload is connected to one end of the inductor connected to the voltage output terminal, and the other end is connected to the source of Q5 and the drain of Q4 respectively; C2 is connected in parallel to both ends of Rload.

[0008] Furthermore, the operating modes of the bipolar output high-voltage synchronous BUCK circuit include:

[0009] When Q1 is turned on, Q2 is turned off, Q3 and Q4 are turned on, Q5 and Q6 are turned off, and the current flows through Q1 and Q3, then through the inductor L, Rload, and Q4 back to the negative pole of the power supply. At the same time, the inductor L and capacitor C2 begin to charge;

[0010] When Q1 is turned off, Q2 is turned on, Q3 and Q4 are turned on, and Q5 and Q6 are turned off. At this time, the inductor L and capacitor C2 begin to discharge and continue to supply power to the output end.

[0011] When Q1 is turned on, Q2 is turned off, Q5 and Q6 are turned on, and Q3 and Q4 are turned off. The current flows through the switch tubes Q1, Q5, Rload, and then through the inductor L and the switch tube Q6 back to the negative pole of the power supply. At the same time, the inductor L and capacitor C2 begin to charge.

[0012] When Q1 is turned off, Q2 is turned on, Q5 and Q6 are turned on, and Q3 and Q4 are turned off. At this time, the inductor L and capacitor C2 begin to discharge and continue to supply power to the output end.

[0013] Furthermore, a capacitor C1 is connected in parallel between both ends of the voltage input terminal.

[0014] Furthermore, the capacitor C2 is connected in series with a resistor R.

[0015] The present invention also includes a control method for a bipolar output high-voltage synchronous buck circuit, comprising the following steps:

[0016] A high-voltage signal is input into a high-voltage synchronous buck circuit with bipolar outputs to generate a pulse wave with adjustable duty cycle. Simultaneously, three PWM waves are generated through the FPGA. One PWM wave is used to control the main switches Q1 and Q2 for synchronous rectification, while the other two PWM waves are used to control the current direction by controlling the commutation switches Q3, Q4, Q5, and Q6.

[0017] The pulse wave with adjustable duty cycle is filtered by an LC filter to obtain low-voltage direct current. The output voltage amplitude is controlled by adjusting the duty cycle of the PWM wave, and the output voltage polarity is controlled by reversing the switch tubes Q3, Q4, Q5 and Q6. When Q3 and Q4 are turned on and Q5 and Q6 are turned off, a positive polarity voltage is output. When Q3 and Q4 are turned off and Q5 and Q6 are turned on, a negative polarity voltage is output.

[0018] The present invention provides a bipolar output high-voltage synchronous buck circuit and a control method thereof, which have the following beneficial effects:

[0019] The present invention proposes a high-voltage synchronous buck circuit topology with bipolar output. Synchronous rectification is achieved by controlling the main switches Q1 and Q2. The output voltage polarity is controlled by commutation switches Q3, Q4, Q5, and Q6. This produces a continuously adjustable and directionally controllable DC voltage, providing a stable, continuously adjustable bidirectional DC voltage. This circuit meets the needs of special applications requiring high power density, high voltage, and bipolar output. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 Three basic topologies of DC-DC converters in the embodiments of the present invention: (a) a Buck DC-DC topology, (b) a Buck DC-DC topology, and (c) a Buck-Boost DC-DC topology.

[0021] Figure 2 Schematic diagram of a synchronous rectification type Buck circuit according to an embodiment of the present invention;

[0022] Figure 3 A schematic diagram of a bidirectional Buck topology structure in an embodiment of the present invention;

[0023] Figure 4Schematic diagram of the topology of a high-voltage synchronous buck circuit with bipolar output in working state 1 according to an embodiment of the present invention;

[0024] Figure 5 Schematic diagram of the topology of a high-voltage synchronous buck circuit with bipolar output in working state 2 according to an embodiment of the present invention;

[0025] Figure 6 Schematic diagram of the topology of the high-voltage synchronous buck circuit with bipolar output in working state 3 according to an embodiment of the present invention;

[0026] Figure 7 Schematic diagram of the topology of the high-voltage synchronous buck circuit with bipolar output in working state 4 according to an embodiment of the present invention;

[0027] Figure 8 This is a block diagram of the overall structure of the hardware circuit in an embodiment of the present invention;

[0028] Figure 9 This is a flow chart of voltage loop design in an embodiment of the present invention;

[0029] Figure 10 This is a flow chart of current loop design in an embodiment of the present invention;

[0030] Figure 11 This is a PID structure diagram in an embodiment of the present invention;

[0031] Figure 12 This is a Buck circuit simulation diagram in an embodiment of the present invention;

[0032] Figure 13 Schematic diagram of a modulation signal wave in an embodiment of the present invention;

[0033] Figure 14 Schematic diagram of output load voltage simulation in an embodiment of the present invention. DETAILED DESCRIPTION

[0034] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0035] This invention proposes a bipolar-output, high-voltage synchronous buck converter (BUCK) circuit. This circuit uses an FPGA to output PWM waves to control the on and off of gallium nitride (GaN) switches, causing the power circuit to output a corresponding voltage to a piezoelectric ceramic. Based on the forward and reverse piezoelectric effects of a piezoelectric macrofiber composite (MFC), the MFC serves as both an actuator and a sensor. The converter employs current-mode control to improve transient response speed. To avoid subharmonic oscillations caused by peak current mode when the circuit duty cycle exceeds 50%, the circuit employs fixed-slope slope compensation technology while ensuring that the load capacity meets the required requirements. The converter is equipped with multiple protection circuits, including a soft-start circuit, a dead-time control circuit, and a snubber circuit, improving converter reliability. The novel bipolar-output, high-voltage synchronous buck converter (BUCK) circuit designed in this invention offers advantages such as simple structure, excellent performance, and low failure rate. Suitable for applications such as portable electronic devices, aerospace, and medical equipment, the converter features high power density and a compact size, providing a stable, continuously adjustable bidirectional DC voltage to each module in the system. To solve the problem of stable output of fixed voltage, a PID control algorithm was used to establish the parameters fed back to the FPGA, achieving the goal of high-precision control of the piezoelectric fiber composite material MFC.

[0036] This article analyzes the three basic topologies of DC-DC converters. A DC-DC converter converts an input DC voltage into an output DC voltage, either stepping up or stepping down. A DC-DC converter is a switching power supply that modulates the input DC voltage into a controllable square wave through a control circuit. This converter utilizes different connection methods for the energy storage components, inductors and capacitors, to achieve energy conversion. Depending on how the inductor is connected within the topology, it can achieve three different functions: stepping down, stepping up, or stepping up / down. When the inductor is connected to the circuit's output load, it forms a buck converter, stepping down the output voltage relative to the input voltage. When the inductor is connected to the circuit's input power supply, it forms a boost converter, stepping up the output voltage relative to the input voltage. When the inductor is connected to the circuit's reference ground (i.e., the negative terminal of the power supply), it forms a buck-boost converter, stepping up / down the output voltage relative to the input voltage.

[0037] Figure 1 These are the three basic topologies of DC-DC converters. To analyze the converter's topology, we can start from the characteristics of the inductor. Since the current on the inductor does not change suddenly, the rate of change of the inductor current follows the equation described by equation (1):

[0038]

[0039] Where V represents the voltage difference across the inductor, L is the value of the inductor, and ΔI / Δt is the rate of change of the inductor current. The switching process of the DC-DC converter corresponds to the charging and freewheeling process of the inductor. In one clock cycle T, the charging time of the converter is Δt on , the continuous flow time is Δt off , and T = Δt on +Δt off The inductance equations in the charging phase and the freewheeling phase are obtained by equation (1):

[0040]

[0041] Among them, V ON and V OFF Represents the voltage across the inductor during the charging and freewheeling phases, ΔI ON and ΔI OFF Represent the change in inductor current during the charging and freewheeling phases, respectively. Assuming that the inductor current does not change at the start and end of a cycle, combining Equations (2) and (3), we obtain the volt-second balance theorem. The product of the voltage on the inductor and the duration is the volt-second, and the duty cycle D represents the proportion of conduction time within a cycle.

[0042]

[0043] Analysis of Buck topology, Boost topology and Buck-Boost topology:

[0044] exist Figure 1 In the Buck topology shown in (a), the forward voltage drop of the freewheeling diode is ignored, and V ON =V in -V out , V OFF =V out , according to the volt-second balance theorem of formula (4), we can get:

[0045] (V in -V out )·D·T=V out ·(1-D)·T (6)

[0046] After simplification, the relationship between input and output voltage and duty cycle D is obtained:

[0047] V out =D·V in (7)

[0048] exist Figure 1 In the Boost topology shown in (b), V ON =V in , V OFF=V out -V in , according to the volt-second balance theorem:

[0049] V in ·D·T=(V out -V in )·(1-D)·T(8)

[0050] After simplification, the relationship between input and output voltage and duty cycle D is obtained:

[0051]

[0052] exist Figure 1 In the Buck-Boost topology shown in (c), unlike the Buck and Boost types, the output voltage in the Buck-Boost topology has the opposite polarity to the input voltage. ON =V in , V OFF =-V out , according to the volt-second balance theorem:

[0053] V in ·D·T=-V out ·(1-D)·T (10)

[0054] After simplification, the relationship between input and output voltage and duty cycle D is obtained:

[0055]

[0056] Since the duty cycle D varies between 0 and 1, the voltage conversion function of each of the above topologies can be seen from the input and output relationships. Table 1 summarizes the above topologies.

[0057] Table 1 Basic topology of converter

[0058]

[0059] Synchronous Rectification: Buck power supplies are step-down switching power supplies that convert high-voltage DC power to low-voltage DC power. Buck power supplies are widely used in automotive, industrial, telecommunications, networking, and consumer electronics. Traditional buck power supplies use Schottky diodes for freewheeling. This operating method improves the output-to-input ratio compared to linear voltage regulators, but the Schottky diodes generate significant conduction losses, significantly reducing power supply efficiency. To improve power supply efficiency, buck power supplies are designed using synchronous rectification, using synchronous rectifier MOSFETs instead of Schottky diodes. MOSFETs typically have an on-resistance of only milliohms, resulting in far lower losses than Schottky diodes when outputting high currents.

[0060] The present invention uses FPGA to generate PWM wave with adjustable duty cycle and synchronous rectification circuit structure, and collects the voltage fed back in real time by the main control FPGA for PID closed loop control, so that the output voltage reaches the set threshold, which improves the overall performance of the Buck power supply to a certain extent. Figure 2 As shown in the figure, a MOS tube is used instead of a freewheeling diode. In this circuit, when Q is turned on, D is turned off; when Q is turned off, D is turned on, avoiding the dead zone voltage caused by the freewheeling diode, greatly improving the power supply efficiency and reducing the ripple.

[0061] The present invention proposes a novel bidirectional synchronous DC-DC BUCK circuit, such as Figure 3 As shown in the figure, the hardware of the Buck power supply circuit mainly consists of switch tubes Q1, Q2, Q3, Q4, Q5, Q6, and the pre-stage voltage stabilization capacitor C1, resistor R, resistor Rload, capacitor C2 and inductor L. Each switch tube is controlled by the PWM wave output by the FPGA, as shown in the figure. Figure 3 As shown. The drain of Q1 is connected to the positive electrode of the voltage input terminal, and the source is connected to the drain of Q3; the source of Q3 is connected to one end of the inductor L, and the other end of the inductor L is connected to the voltage output terminal; the drain of Q2 is connected between the source of Q1 and the drain of Q3, and the source of Q2 is connected to the negative electrode of the voltage input terminal; the source of Q4 is connected to the source of Q2, and the drain is connected to the voltage output terminal; the drain of Q5 is connected between the drain of Q2 and the drain of Q3, and the source is connected between the drain of Q4 and the voltage output terminal; the source of Q6 is connected between the source of Q4 and the source of Q2, and the drain is connected between the source of Q3 and the inductor L; one end of Rload is connected to one end of the inductor connected to the voltage output terminal, and the other end is connected to the source of Q5 and the drain of Q4 respectively; C2 is connected in parallel with both ends of Rload.

[0062] Circuit switch status analysis:

[0063] like Figure 4 As shown, when the main switch tube Q1 is turned on, the freewheeling switch tube Q2 is turned off, the switch tubes Q3 and Q4 are turned on, and the switch tubes Q5 and Q6 are turned off. The current flows through the switch tubes Q1 and Q3, then to the inductor L and Rload, and the switch tube Q4 returns to the negative pole of the power supply. At the same time, the inductor L and capacitor C2 begin to charge.

[0064] like Figure 5 As shown, when the main switch tube Q1 is turned off, the freewheeling switch tube Q2 is turned on, the switch tubes Q3 and Q4 are turned on, and the switch tubes Q5 and Q6 are turned off. At this time, the inductor L and the capacitor C2 begin to discharge and freewheel to supply power to the output load.

[0065] like Figure 6As shown, when the main switch tube Q1 is turned on, the freewheeling switch tube Q2 is turned off, the switch tubes Q5 and Q6 are turned on, and the switch tubes Q3 and Q4 are turned off. The current flows through the switch tubes Q1, Q5, Rload, and then to the inductor L. The switch tube Q6 returns to the negative pole of the power supply. At the same time, the inductor L and the capacitor C2 begin to charge.

[0066] like Figure 7 As shown, when the main switch tube Q1 is turned off, the freewheeling switch tube Q2 is turned on, the switch tubes Q5 and Q6 are turned on, and the switch tubes Q3 and Q4 are turned off. At this time, the inductor L and the capacitor C2 begin to discharge and freewheel to supply power to the output load.

[0067] Based on the above-mentioned bipolar output high-voltage synchronous buck circuit topology, the present invention further proposes a control method for a bipolar output high-voltage synchronous buck circuit, comprising the following steps:

[0068] A high-voltage signal is input into a high-voltage synchronous buck circuit with bipolar output to generate a pulse wave with adjustable duty cycle. At the same time, three PWM waves are generated through the FPGA. One PWM wave is used to control the main switches Q1 and Q2 to complete synchronous rectification, and the other two PWM waves are used to control the current direction by controlling the commutation switches Q3, Q4, Q5 and Q6.

[0069] The pulse wave with adjustable duty cycle is filtered by an LC filter to obtain low-voltage direct current. The output voltage amplitude is controlled by adjusting the duty cycle of the PWM wave, and the output voltage polarity is controlled by reversing the switch tubes Q4, Q5 and Q6. When Q3 and Q4 are turned on and Q5 and Q6 are turned off, a positive polarity voltage is output. When Q3 and Q4 are turned off and Q5 and Q6 are turned on, a negative polarity voltage is output.

[0070] The hardware of the synchronous bidirectional Buck power supply circuit mainly consists of FPGA main control unit, auxiliary power supply circuit, bidirectional Buck circuit, voltage and current sampling circuit and drive circuit. Figure 8As shown in the figure, this circuit uses an FPGA to generate an independent PWM wave to control the main MOSFET for synchronous rectification. Two other PWM waves control the remaining switching transistors to control current direction. Because the FPGA-generated PWM wave has low voltage and current and weak load capacity, it cannot start and shut down the MOSFETs. Therefore, the FPGA-generated PWM wave must be driven by a dedicated driver circuit to generate a PWM wave with high load capacity, which in turn controls the high-voltage MOSFETs Q1 and Q2. In the main power topology, the high-voltage signal is chopped by a buck circuit to generate a pulse wave with adjustable duty cycle. This is then filtered by an LC filter to produce low-voltage DC power. The output voltage amplitude is controlled by adjusting the duty cycle of the PWM wave, resulting in a continuously adjustable DC voltage. The branch switching transistors Q3-Q6 control the output voltage polarity. When Q3 and Q4 are on and Q5 and Q6 are off, a positive voltage is output; when Q3 and Q4 are off and Q5 and Q6 are on, a negative voltage is output. This results in a continuously adjustable DC voltage with controllable direction.

[0071] PID control technology: The PID algorithm incorporates key past, present, and future information from the dynamic control process. The proportional (P) factor represents current information, correcting deviations and ensuring rapid process response. The integral (I) factor represents accumulated information, eliminating static errors and improving the system's static characteristics. The differential (D) factor provides forward control during signal changes and represents future information. It forces the process to accelerate at the start and reduces overshoot at the end, overcoming oscillations, improving system stability, and accelerating system transitions. Proper coordination of these three factors ensures fast, smooth, and accurate dynamic control, achieving excellent results. The control algorithm is designed to be independent of system parameters, minimizing the impact of changes in these parameters on control effectiveness. The control system exhibits excellent adaptability and robustness. Consequently, PID control is widely used in engineering due to its simplicity and ease of parameter tuning. However, early linear power supplies were mostly analog PID controllers, relying solely on instantaneous output voltage feedback. This performance, particularly in dynamic conditions and with nonlinear loads, was unsatisfactory. Extensive research has been conducted to address this issue, and the instantaneous values ​​of the output inductor and filter capacitor currents have been incorporated into the control system, significantly improving the output characteristics of linear power supplies. However, the bulky analog control circuitry reduced control system reliability, complicated debugging, and made tuning difficult. The advent of FPGAs has rapidly addressed this issue. Various compensation measures are now readily applicable to digital PID control of linear power supplies. The introduction of voltage and current control has significantly improved the effectiveness of digital PID control in linear power supplies.

[0072] Digital PI controller: After years of development, PID has seen continuous performance improvements and accumulated experience, leading to its widespread application in industrial control. The application of microcomputers and microprocessors in PID control has further advanced PID control, resulting in the emergence of nonlinear PID control algorithms, selective PID control algorithms, and adaptive PID control algorithms. All of these algorithms are based on the basic PID algorithm.

[0073] Basic PI algorithm: The output of the regulator is the sum of two components, which are proportional to the input of the regulator (error) and proportional to the integral of the input. Its continuous expression is:

[0074]

[0075] Where: e is the error between the feedback value and the given value, T I is the integration time, K p is the amplification factor of the regulator, and u is the output signal of the regulator.

[0076] By performing a pull-type transformation on both sides of the above equation, the transfer function of the PI regulator can be obtained:

[0077]

[0078] where U(s) and E(s) are the Latent transformations of u and e respectively.

[0079] The proportional term in PI control is used to correct the deviation, and the integral term is used to eliminate the system steady-state error. The performance of the PI regulator depends on K p 、T I The task of designing and adjusting the digital PI regulator is to select the appropriate PI model according to the controlled object and system requirements, and to discretize the model using appropriate methods, so that it can be realized by computer, and finally determine K p 、T I and sampling period T0.

[0080] By using different methods to discretize D(s), we can obtain a variety of digital PI regulator algorithms. The following briefly introduces the basic digital PI position algorithm and the more commonly used digital PI control incremental algorithm.

[0081] Positional PI algorithm: Replace the integral term with the rectangular method numerical integration, and we can get:

[0082]

[0083] in u0 is the initial output of the regulator. If the initial control condition is zero, then u0 = 0; e kt k Error value at the moment; u k t k The output of the regulator at that moment;

[0084] Using the trapezoidal method to numerically integrate the integral term, we can obtain:

[0085]

[0086] The trapezoidal method is more accurate than the rectangular method, but when the sampling period is small enough, the difference between the two is not significant.

[0087] Incremental PI algorithm: From formula (15), we can get:

[0088]

[0089] From equations (15) and (16), the increment of the regulator output can be obtained as:

[0090]

[0091] The incremental calculation error has little effect on the control quantity. The incremental algorithm only needs to calculate, store and output Δu. The number of bits in computers and microprocessors is limited, so higher accuracy can be achieved. The impact on the system is small when switching between automatic and manual. Whether it is computer automatic control or manual control, the control quantity Δu of the incremental algorithm is very small, and the previous control quantity u k-1 It has been stored in the integral device, so the switching will not cause a big impact on the system. The incremental calculation has high reliability. Even if the computer or microprocessor fails and Δu=0, the system can still k-1 Under the action of , it can keep working in the original state, thus improving the reliability of the system.

[0092] Anti-integral saturation: When the system is disturbed or the given input changes step, the system will have a large deviation. After the integral term is accumulated, the control quantity may exceed the limit determined by the mechanical or physical performance. This phenomenon is called "saturation". The saturation of the control quantity is mainly caused by the saturation of the integral term. Integral saturation will cause the controlled quantity to have a large overshoot and long-term fluctuation, which is not good for the control system. One way to solve this problem is to limit the control quantity of the PI output. Assume that the upper limit value of the voltage of the bidirectional Buck output is u max , the lower limit is u min , you can perform the following operations:

[0093] When u(k)>u max When u(k)=u max , cancel the integral operation; when u(k)<u max When u(k)=u max, cancel the integral operation; when u min ≤u(k)≤u max When , the integral operation is performed and the calculated value u(k) is output.

[0094] Parameter tuning of digital PI: The task of parameter tuning of digital PID regulator is to determine k p 、T I And parameters such as sampling period T0.

[0095] For simple systems, theoretical calculations can be used to determine these parameters, but for slightly more complex systems, theoretical calculations are more difficult. Generally, engineering methods are used to adjust parameters, such as the empirical method, the attenuation curve method, the critical proportion method, and the response curve method. Regardless of the PI parameter adjustment method used, the parameters should be further verified and corrected in the closed-loop system to achieve better system performance. During the correction process, attention should always be paid to the impact of the PI parameters on system performance: (1) Increase the proportional coefficient k p , will speed up the system response and reduce the static error, but the overshoot will increase and the stability will deteriorate; (2) Increase the integral time T I , which weakens the integral effect, reduces the overshoot, and improves the system stability, but takes longer to eliminate the system static error.

[0096] System Software Structure: The system software primarily consists of a main program and an interrupt service subroutine. Because this system requires high real-time processing capabilities, the vast majority of functional modules are implemented in the interrupt subroutine. In the main program, the program first sets registers and initializes all variables. It then enables the required interrupts, starts the timer, and then loops to wait. The interrupt service subroutine is the periodic interrupt routine for Timer 2. Within the interrupt subroutine, the FPGA primarily performs output voltage and inductor current sampling, executes the voltage and current loop control algorithms, generates PWM waveforms, and initiates the next A / D conversion.

[0097] Reference sine wave generation: The reference sine wave is tabulated. After setting a timer, the FPGA program retrieves the corresponding digital value from the reference sine wave table using a lookup pointer during each switching cycle (timer interrupt period). Simultaneously, the lookup pointer increments by one and resets to the first address in the reference sine wave table at the end of each sine wave cycle.

[0098] Voltage loop design: The DSP instruction cycle is 33ns, and most instructions are single-cycle instructions. The AD conversion time is 375ns. These characteristics enable the DSP to fully control the inverter output voltage point by point. Therefore, the voltage outer loop uses the instantaneous value feedback of the output voltage and compares it with the reference sinusoidal voltage to stabilize the output voltage at the set value and suppress output voltage distortion. The voltage regulator samples the proportional integral (PI) regulation. The program flow chart is as follows: Figure 9 shown.

[0099] Current loop design: The feedback signal of the current loop is the inductor current, which is proportionally regulated. The inductor current is equal to the load current plus the filter capacitor current, and the filter capacitor current is the differential of the output voltage. Therefore, the current loop feedback is equivalent to adding a proportional differential lead correction network to the voltage feedback, which can make the system more stable. At the same time, the inductor current includes the load current, thus playing a current limiting role. The program flow chart is as follows Figure 10 shown.

[0100] PWM PID closed-loop circuit design: fundamental frequency is F s With the carrier amplitude F c The ratio is called the carrier ratio and is represented by P:

[0101]

[0102] However, in actual applications, due to switching losses, unstable power supply pressure and other reasons, the actual output voltage will deviate from the theoretical value. This system uses PID control to quickly eliminate the deviation and make the output reach the desired voltage. Because changing the size of the modulation can change the amplitude of the output voltage, the modulation signal is used as the control object of the PID controller. The closed-loop control structure is shown in the figure below. Figure 11 shown.

[0103] MATLAB / Simulink simulation: Build a power circuit on MATLAB. Its overall structure is as follows Figure 12 Here, a triangular carrier and a modulation signal are used to generate a PWM wave, as shown in Figure 13 After the setup is complete, start the simulation and measure the voltage waveform of the capacitive load, as shown in Figure 14 shown.

[0104] The above description is only a preferred specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any technician familiar with the technical field, within the technical scope disclosed by the present invention, who makes equivalent replacements or changes based on the technical solution and inventive concept of the present invention, should be covered by the scope of protection of the present invention.

Claims

1. A bipolar output high voltage synchronous buck circuit, characterized in that: It includes main switch tubes Q1 and Q2, reversing switch tubes Q3, Q4, Q5 and Q6, as well as the front-stage voltage stabilizing capacitor C1, filter capacitor C2, filter inductor L and resistor Rload; The drain of Q1 is connected to the positive electrode of the voltage input terminal, and the source is connected to the drain of Q3; the source of Q3 is connected to one end of the inductor L, and the other end of the inductor L is connected to the voltage output terminal; the drain of Q2 is connected between the source of Q1 and the drain of Q3, and the source of Q2 is connected to the negative electrode of the voltage input terminal; the source of Q4 is connected to the source of Q2, and the drain is connected to the voltage output terminal; the drain of Q5 is connected between the drain of Q2 and the drain of Q3, and the source is connected between the drain of Q4 and the voltage output terminal; the source of Q6 is connected between the source of Q4 and the source of Q2, and the drain is connected between the source of Q3 and the inductor L; one end of Rload is connected to one end of the inductor connected to the voltage output terminal, and the other end is connected to the source of Q5 and the drain of Q4 respectively; C2 is connected in parallel to both ends of Rload; Among them, when Q1 is turned on, Q2 is turned off, Q3 and Q4 are turned on, Q5 and Q6 are turned off, and the current flows through Q1 and Q3, and then passes through the inductor L, Rload, and Q4 to return to the negative pole of the power supply. At the same time, the inductor L and the capacitor C2 start to charge; when Q1 is turned off, Q2 is turned on, Q3 and Q4 are turned on, and Q5 and Q6 are turned off. At this time, the inductor L and the capacitor C2 start to discharge and continue to supply power to the output end; when Q1 is turned on, Q2 is turned off, Q5 and Q6 are turned on, and Q3 and Q4 are turned off. The current flows through the switch tube Q1, Q5, and Rload, and then passes through the inductor L and the switch tube Q6 to return to the negative pole of the power supply. At the same time, the inductor L and the capacitor C2 start to charge; when Q1 is turned off, Q2 is turned on, Q5 and Q6 are turned on, and Q3 and Q4 are turned off. At this time, the inductor L and the capacitor C2 start to discharge and continue to supply power to the output end; A control method for a high-voltage synchronous buck circuit with bipolar output includes the following steps: inputting a high-voltage signal into the high-voltage synchronous buck circuit with bipolar output to generate a pulse wave with an adjustable duty cycle; simultaneously generating three PWM waves through an FPGA, wherein one PWM wave is used to control main switches Q1 and Q2 to complete synchronous rectification, and the other two PWM waves are used to control current direction by controlling commutation switches Q3, Q4, Q5, and Q6; filtering the pulse wave with adjustable duty cycle through an LC filter to obtain low-voltage direct current; wherein the output voltage amplitude is controlled by adjusting the duty cycle of the PWM wave, and the output voltage polarity is controlled by commutation switches Q3, Q4, Q5, and Q6; when Q3 and Q4 are on and Q5 and Q6 are off, a positive voltage is output; and when Q3 and Q4 are off and Q5 and Q6 are on, a negative voltage is output.

2. The high-voltage synchronous buck circuit with bipolar output according to claim 1, characterized in that: The two ends of the voltage input terminal are connected in parallel with a capacitor C1.

3. The high-voltage synchronous buck circuit with bipolar output according to claim 1, characterized in that: The capacitor C2 is connected in series with a resistor R.

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