Miniature light-emitting structure, manufacturing method thereof and miniature light-emitting device
By denaturing the light emitting layer on the epitaxial stack of the Micro-LED chip, denaturation areas and multiple light emitting areas are formed, the problem of low light output efficiency of the existing Micro-LED chip is solved, and higher light output efficiency and better device performance are achieved.
Patent Information
- Application Number
- CN202411780637.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-05
- Publication Date
- 2025-03-07
AI Technical Summary
Existing Micro-LED chips have the problem of low light output efficiency.
By denaturing the light emitting layer in part of the epitaxial stack, a denaturation region and a plurality of light emitting regions are formed. The light emitting layer in the denaturation region loses its luminous function and the undenaturation light emitting layers in the plurality of light emitting regions are spaced apart.
The pixel position is defined by the denaturated light emitting layer in the denaturated area, which avoids damage to the side wall of the pixel mesa by etching, improves the light output efficiency of the micro-light emitting diode chip, and improves the performance of the micro-light emitting diode device.
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Figure CN119584739A_ABST
Abstract
Description
[Technical field]
[0001] The present application relates to the field of semiconductor light emitting technology, and in particular to a micro light emitting structure and a manufacturing method thereof, as well as a micro light emitting device. [Background technology]
[0002] Micro-LED (Micro-Light Emitting Diode) display technology is a display technology that miniaturizes and arrays the traditional LED (Light Emitting Diode) structure, and uses CMOS (Complementary Metal Oxide Semiconductor) or TFT (Thin Film Transistor) to make driving circuits to achieve addressing control and individual drive of each pixel.
[0003] However, the Micro-LED chip in the prior art has the problem of low light extraction efficiency. [Summary of the invention]
[0004] The embodiments of the present application provide a micro light-emitting structure and a manufacturing method thereof, as well as a micro light-emitting device to solve the problem of low light extraction efficiency of existing Micro-LED chips.
[0005] In order to solve the above problems, an embodiment of the present application provides a method for manufacturing a micro-light-emitting structure, which method includes: providing an epitaxial stack, the epitaxial stack including a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked in sequence; performing a denaturation treatment on the light-emitting layer in a partial area of the epitaxial stack so that the epitaxial stack forms a denatured region and a plurality of light-emitting regions, and the denatured light-emitting layer in the denatured region loses its light-emitting function, and the undenatured light-emitting layers in the plurality of light-emitting regions are separated.
[0006] The modification of the light emitting layer in a partial region of the epitaxial stack includes: irradiating the light emitting layer in a partial region of the epitaxial stack with a laser to modify the light emitting layer in the partial region.
[0007] Among them, the light-emitting layer in a partial area of the epitaxial stack is irradiated with a laser to denature the light-emitting layer in the partial area, including: using a laser to irradiate the side of the second semiconductor layer in the partial area of the epitaxial stack away from the light-emitting layer to remove the second semiconductor layer in the partial area and denature the light-emitting layer in the partial area.
[0008] The step of irradiating the light emitting layer in a partial region of the epitaxial stack with a laser comprises: irradiating the light emitting layer in a partial region of the epitaxial stack with a laser having a wavelength of 200 to 700 nm.
[0009] Among them, before using laser to irradiate the light-emitting layer in a partial area of the epitaxial stack, the method for manufacturing the micro-light-emitting structure also includes: forming a black photoresist layer, the black photoresist covers the epitaxial stack; exposing and developing the black photoresist layer based on a mask with a preset pattern to form a patterned black photoresist layer, the patterned black photoresist layer has a hollow area, and the area of the epitaxial stack exposed from the hollow area is a partial area.
[0010] Among them, the epitaxial stack has a pixel array area and a pixel peripheral area arranged around the pixel array area, and the denatured area and the multiple light-emitting areas are all located in the pixel array area; before the light-emitting layer in a partial area of the epitaxial stack is denatured so that the epitaxial stack forms the denatured area and the multiple light-emitting areas, the method for manufacturing the micro-light-emitting structure also includes: etching a groove in the pixel peripheral area of the epitaxial stack, and the groove penetrates into the first semiconductor layer.
[0011] Among them, after the light-emitting layer in a partial area of the epitaxial stack is denatured so that the epitaxial stack forms a denatured area and a plurality of light-emitting areas, the method for manufacturing a micro-light-emitting structure also includes: forming a first electrode on a side of the second semiconductor layer in the light-emitting area away from the light-emitting layer, and forming a second electrode on the bottom wall surface of the groove.
[0012] In order to solve the above problems, an embodiment of the present application also provides a micro-light-emitting structure, which includes: a light-emitting stack, including a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked in sequence, the light-emitting layer is denatured and includes a denatured portion without a light-emitting function and a plurality of undenatured portions with a light-emitting function, wherein the denatured portion separates the plurality of undenatured portions, and the light-emitting stack has a plurality of light-emitting areas, and the plurality of light-emitting areas correspond to the plurality of undenatured portions, respectively.
[0013] The light-emitting stack has an opening in the region corresponding to the degeneration portion, the opening penetrates the second semiconductor layer, and the orthographic projection of the opening on the plane where the first semiconductor layer is located completely overlaps with the orthographic projection of the degeneration portion on the plane where the first semiconductor layer is located.
[0014] In order to solve the above problems, an embodiment of the present application further provides a micro-light-emitting device, which includes a micro-light-emitting structure manufactured by any of the above-mentioned methods for manufacturing micro-light-emitting structures, or includes any of the above-mentioned micro-light-emitting structures.
[0015] The beneficial effects of the present application are as follows: the micro-light-emitting structure and its manufacturing method, as well as the micro-light-emitting device provided by the present application, provide an epitaxial stack, the epitaxial stack includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked in sequence, and then perform a denaturation treatment on the light-emitting layer in a partial area of the epitaxial stack, so that the epitaxial stack forms a denatured region and multiple light-emitting regions, and the denatured light-emitting layer in the denatured region loses its light-emitting function, and the undenatured light-emitting layers in the multiple light-emitting regions are separated, thereby realizing the definition of the pixel position by the denatured light-emitting layer in the denatured region without defining the pixel position by an etching process, thereby avoiding damage to the side wall of the pixel table by etching, so as to improve the light extraction efficiency of the micro-light-emitting diode chip and enhance the performance of the micro-light-emitting diode device.
Brief Description of the Drawings
[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.
[0017] Figure 1 It is a schematic diagram of the process of manufacturing a micro-light-emitting structure provided in an embodiment of the present application;
[0018] Figure 2 is a schematic diagram of the cross-sectional structure of an epitaxial stack provided in an embodiment of the present application;
[0019] Figure 3 This is a schematic diagram of the operation of performing a denaturation treatment on a light-emitting layer in a partial region of an epitaxial stack provided in an embodiment of the present application;
[0020] Figure 4 is a schematic diagram of an operation of using a laser to irradiate a light-emitting layer in a partial region of an epitaxial stack to denature the light-emitting layer in the partial region, as provided in an embodiment of the present application;
[0021] Figure 5 is a schematic diagram of the cross-sectional structure after step A provided in the embodiment of the present application is completed;
[0022] Figure 6 is a schematic diagram of the cross-sectional structure after step B provided in the embodiment of the present application is completed;
[0023] Figure 7 This is a schematic diagram of the operation of using a laser to illuminate a light-emitting layer in a partial area through a hollow area provided in an embodiment of the present application;
[0024] Figures 8a to 8c is a schematic diagram of the cross-sectional structure after step S12 is completed provided in an embodiment of the present application;
[0025] Fig. 9 is a schematic diagram of a cross-sectional structure after forming a first electrode provided in an embodiment of the present application;
[0026] Figures 10a to 10c is a schematic diagram of the cross-sectional structure after step S13 provided in the embodiment of the present application is completed;
[0027] Fig.11 is a schematic diagram of a cross-sectional structure after forming a second electrode provided in an embodiment of the present application;
[0028] Fig.12 is a schematic diagram of a cross-sectional structure after forming a first bonding layer and a second bonding layer provided in an embodiment of the present application;
[0029] Fig.13 It is a schematic diagram of the structure of the micro light-emitting device provided in the embodiment of the present application. [Specific implementation method]
[0030] The following is a further detailed description of the embodiments of the present application in conjunction with the accompanying drawings and examples. It is particularly noted that the following examples are only used to illustrate the embodiments of the present application, but do not limit the scope of the embodiments of the present application. Similarly, the following examples are only some embodiments of the embodiments of the present application rather than all embodiments, and all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the embodiments of the present application.
[0031] In the embodiments of the present application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.
[0032] When describing the structure of a component, when a layer or a region is referred to as being "on" or "above" another layer or another region, it may mean being directly above the other layer or another region, or having other layers or regions between it and the other layer or another region. Also, if the component is turned over, the layer or the region will be "under" or "below" the other layer or another region. In addition, the features, structures, or characteristics described below may be combined in any suitable manner in one or more embodiments.
[0033] In addition, the directional terms mentioned in the embodiments of the present application, such as [up], [down], [front], [back], [left], [right], [inside], [outside], [side], etc., are only referenced to the directions of the attached drawings. Therefore, the directional terms used are used to illustrate and understand the embodiments of the present application, rather than to limit the embodiments of the present application. In each of the accompanying drawings, units with similar structures are represented by the same figure numbers. For clarity, the various parts in the drawings are not drawn to scale. In addition, certain related parts may not be shown in the drawings.
[0034] The following is a detailed description with reference to specific embodiments. It should be noted that the embodiments of the present application can be presented in various forms, some examples of which will be described below.
[0035] See also Figure 1 , Figure 1 : is a schematic diagram of a process of manufacturing a micro-light emitting structure provided in an embodiment of the present application. The specific process of the method for manufacturing a micro-light emitting structure may be as follows:
[0036] Step S11: providing an epitaxial stack, wherein the epitaxial stack includes a first semiconductor layer, a light emitting layer, and a second semiconductor layer stacked in sequence.
[0037] In this embodiment, if Figure 2 As shown, the epitaxial stack can be a light emitting diode epitaxial wafer, and the light emitting diode epitaxial wafer can be purchased commercially.
[0038] Specifically, Figure 2 As shown, the epitaxial stack may include a substrate 101 and a buffer layer 102, a first semiconductor layer 103, a light-emitting layer 104, and a second semiconductor layer 105 stacked in sequence in a direction away from the substrate 101. The substrate 101 is used to support the film layer structure thereon, and may be a sapphire substrate, a silicon substrate, or a silicon carbide substrate. The buffer layer 102 can relieve the stress generated by the lattice mismatch and the thermal expansion coefficient mismatch between the first semiconductor layer 103 and the substrate 101, and the material of the buffer layer 102 may include at least one of buffer materials such as silicon nitride, silicon oxide, gallium nitride, and aluminum nitride. In some examples, such as Figure 2 As shown, the epitaxial stack may further include an undoped semiconductor layer 106, which can further relieve the stress generated by lattice mismatch and thermal expansion coefficient mismatch between the first semiconductor layer 103 and the substrate 101. Exemplarily, the undoped semiconductor layer 106 may be specifically an unintentionally doped gallium nitride (U-GaN) layer.
[0039] Specifically, in the above-mentioned epitaxial stack, the light-emitting layer 104 can be a quantum well layer, for example, it can be an indium gallium nitride quantum well layer, or it can be an indium gallium nitride / gallium nitride multi-quantum well layer. The first semiconductor layer 103 and the second semiconductor layer 105 have different polarities. Specifically, the first semiconductor layer 103 can be one of an N-type semiconductor layer and a P-type semiconductor layer, and the second semiconductor layer 105 can be the other of an N-type semiconductor layer and a P-type semiconductor layer, wherein the N-type semiconductor layer can be specifically an N-type gallium nitride layer or an N-type gallium arsenide layer, and the P-type semiconductor layer can be specifically a P-type gallium nitride layer or a P-type aluminum gallium nitride layer.
[0040] And, in specific implementation, Figure 2 As shown, the buffer layer 102, the undoped semiconductor layer 106, the first semiconductor layer 103, the light emitting layer 104 and the second semiconductor layer 105 can be sequentially formed on one side of the substrate 101 by metal organic chemical vapor deposition (MOCVD) to obtain the epitaxial stack.
[0041] Step S12: denaturing the light-emitting layer in a partial area of the epitaxial stack so that the epitaxial stack forms a denatured area and multiple light-emitting areas, and the denatured light-emitting layer in the denatured area loses its light-emitting function, and the undenatured light-emitting layers in the multiple light-emitting areas are separated.
[0042] In this embodiment, if Figure 3 As shown, after the light emitting layer 104 in the partial region C12 of the epitaxial stack is subjected to the modification process, the partial region C12 becomes a modified region C12, and the modified region C12 can define a plurality of light emitting regions C11 of the epitaxial stack.
[0043] Specifically, the light-emitting layer 104 in the denatured region C12 loses its light-emitting function due to the denaturation treatment and becomes the denatured light-emitting layer 107A, while the light-emitting layer 104 in the light-emitting region C11 can retain its original light-emitting function because it has not undergone the denaturation treatment. Moreover, the denatured light-emitting layer 107A in the denatured region C12 can separate the light-emitting layer 104 in each light-emitting region C11 (i.e., the undenatured light-emitting layer 107B) from the undenatured light-emitting layer 107B in other light-emitting regions C11 located around it. In this way, the pixel position is defined by the denatured light-emitting layer 107A in the denatured region C12, and the epitaxial stack can form multiple light-emitting regions C11 after the light-emitting layer 104 in the partial region C12 is denatured.
[0044] The partial region C12 of the epitaxial stack may be specifically the first selected region C12 of the epitaxial stack, and the first selected region C12 may be determined according to the number, position and size of the light-emitting regions C11 that are actually required to be set. Specifically, the first selected region C12 may be a spacing region between the plurality of light-emitting regions C11 that are actually required to be set, and is used to separate each light-emitting region C11 from other light-emitting regions C11 located around it.
[0045] Furthermore, it should be noted that compared with the existing Micro-LED manufacturing technology, in which the light-emitting diode epitaxial wafer is etched through the ICP (Inductively Coupled Plasma) etching process to form multiple pixel mesas, thereby realizing the solution of defining the pixel position, the side walls of the pixel mesas are bombarded by plasma and irradiated by ultraviolet photons during the etching process, which will cause serious surface damage and defects on the side walls of the pixel mesas, such as lattice distortion and impurity contamination. These defects act as current leakage paths and non-radiative recombination centers during the use of Micro-LEDs, which will seriously endanger the light efficiency of Micro-LEDs. Moreover, as the size of Micro-LED devices decreases, the adverse effects of plasma etching damage will become more serious, resulting in a significant size dependence of the light efficiency of Micro-LED devices.
[0046] In the present embodiment, the light-emitting layer 104 in the partial area C12 of the epitaxial stack is denatured to achieve a solution of defining the pixel position by the denatured light-emitting layer 107A in the denatured area C12. This eliminates the ICP etching process required for defining the pixel position in the existing Micro-LED manufacturing technology, thereby avoiding damage to the side walls of the pixel table caused by etching, thereby improving the light extraction efficiency of the Micro-LED and enhancing the performance of the Micro-LED device.
[0047] In some embodiments, Figure 4 As shown, the above-mentioned denaturation treatment of the light emitting layer 104 in the partial area C12 of the epitaxial stack may include: irradiating the light emitting layer 104 in the partial area C12 of the epitaxial stack with laser L1 to denature the light emitting layer 104 in the partial area C12.
[0048] Specifically, when the light emitting layer 104 in the partial region C12 of the epitaxial stack is irradiated with the laser L1, the light emitting layer 104 in the partial region C12 absorbs the laser L1 and causes its properties to change, thereby losing its light emitting function.
[0049] Furthermore, it should be noted that the inventors of the present application have found in long-term research and development that the light-emitting material (e.g., semiconductor quantum well material) of the light-emitting layer 104 has poor heat resistance and the light-emitting function is easily degraded. Therefore, by irradiating the light-emitting layer 104 in the partial area C12 with the laser L1, the light-emitting layer 104 in the partial area C12 can be denatured under the heat of the laser L1 and lose its light-emitting function.
[0050] Specifically, the denaturation of the light emitting layer 104 may include: a change in the molecular structure (eg, molecular bonds) of the light emitting material in the light emitting layer 104 .
[0051] Specifically, the wavelength and power of the laser L1 can be determined according to the material of the light-emitting layer 104. In addition, the wavelength and power of the laser L1 should satisfy the following conditions: only the irradiated light-emitting layer 104 can be denatured and lose its light-emitting function, but the irradiated light-emitting layer 104 cannot be evaporated. In this way, it is ensured that the light-emitting layer 104 can still maintain its overall continuity after being irradiated by the laser L1, thereby reducing the pixel sidewall damage caused by the laser L1 irradiation, so as to further improve the light extraction efficiency of the Micro-LED and enhance the performance of the Micro-LED device.
[0052] In some examples, the light emitting layer 104 may be a quantum well layer. Figure 4 As shown, when the light emitting layer 104 in the partial region C12 of the epitaxial stack is irradiated with the laser L1 to denature the light emitting layer 104 in the partial region C12, the laser L1 of a specific wavelength band can be used to irradiate the light emitting layer 104 in the partial region C12 of the epitaxial stack to denature the light emitting layer 104 in the partial region C12. The laser L1 of the specific wavelength band can be a laser with a wavelength of 200 to 700 nm, for example, a laser with a wavelength of 200 to 400 nm (i.e., a laser in the ultraviolet wavelength band), or a laser with a wavelength of 500 to 550 nm (i.e., a laser in the green wavelength band).
[0053] In some specific embodiments, Figure 4 As shown, the above-mentioned use of laser L1 to irradiate the light-emitting layer 104 in the partial area C12 of the epitaxial stack to denature the light-emitting layer 104 in the partial area C12 may include: using laser L1 to irradiate the side of the second semiconductor layer 105 in the partial area C12 of the epitaxial stack away from the light-emitting layer 104 to denature the light-emitting layer 104 in the partial area C12.
[0054] Specifically, in the process of using laser L1 to irradiate the side of the second semiconductor layer 105 in the partial area C12 of the epitaxial stack away from the light-emitting layer 104, after the laser L1 is irradiated to the second semiconductor layer 105 in the partial area C12, at least a portion of the laser L1 can be further irradiated to the light-emitting layer 104 in the partial area C12 through the second semiconductor layer 105 in the partial area C12 and absorbed by the light-emitting layer 104 in the partial area C12. Moreover, after absorbing the laser L1, the light-emitting layer 104 in the partial area C12 will be denatured and lose its light-emitting function to become a denatured light-emitting layer 107A, thereby enabling the definition of the pixel position (i.e., the above-mentioned multiple light-emitting areas C11) by the denatured light-emitting layer 107A in the denatured area C12.
[0055] Furthermore, in a specific implementation, before the light emitting layer 104 in the partial area C12 of the epitaxial stack is irradiated with the laser L1 to denature the light emitting layer 104 in the partial area C12, the method for manufacturing the micro light emitting structure may further include:
[0056] Step A: forming a black photoresist layer 108, the black photoresist layer 108 covers the epitaxial stack (such as Figure 5 shown).
[0057] Specifically, Figure 5 As shown, a black photoresist can be coated on the upper surface of the epitaxial stack (ie, the side of the second semiconductor layer 105 away from the light emitting layer 104 ) by spin coating, spray coating, roller coating or screen printing to form a black photoresist layer 108 .
[0058] The black photoresist is black and opaque, thereby ensuring that the black photoresist layer 108 has the function of blocking laser light.
[0059] Step B: Expose and develop the black photoresist layer 108 based on a mask having a preset pattern to form a patterned black photoresist layer 109, wherein the patterned black photoresist layer 109 has a hollow region 109A, and the region of the epitaxial stack exposed from the hollow region 109A is a partial region C12 (e.g. Figure 6 shown).
[0060] Accordingly, the above-mentioned irradiation of the light emitting layer 104 in the partial area C12 of the epitaxial stack with the laser L1 may include: irradiating the light emitting layer 104 in the partial area C12 with the laser L1 through the hollow area 109A (eg Figure 7 The above-mentioned use of the laser L1 to irradiate the side of the second semiconductor layer 105 in the partial area C12 of the epitaxial stack away from the light-emitting layer 104 may include: using the laser L1 through the hollow area 109A to irradiate the side of the second semiconductor layer 105 in the partial area C12 away from the light-emitting layer 104 (as shown in FIG. Figure 7 As shown). Moreover, during the irradiation process of the laser L1, the laser L1 irradiated to the hollow area 109A of the patterned black photoresist layer 109 can completely pass through the hollow area 109A and irradiate to the partial area C12 of the epitaxial stack, while the laser L1 irradiated to other areas (i.e., non-hollow areas) of the patterned black photoresist layer 109 except the hollow area 109A cannot pass through the non-hollow areas of the patterned black photoresist layer 109, thereby avoiding the epitaxial stack located below the non-hollow areas of the patterned black photoresist layer 109 from being damaged by the irradiation of the laser L1, so as to ensure that the light-emitting function of the light-emitting layer 104 in the light-emitting area C11 is not affected.
[0061] Specifically, Figure 6 As shown, the above-mentioned step B may include: placing a mask having a preset pattern (not shown in the figure) above the black photoresist layer 108, and using ultraviolet light (or other light beam energy) of a specific wavelength to pass through the light-transmitting area of the mask to expose the black photoresist layer 108, and then developing the exposed black photoresist layer to obtain a patterned black photoresist layer 109.
[0062] It can be understood that the pattern of the above-mentioned patterned black photoresist layer 109 is used to define the partial area C11 of the above-mentioned epitaxial stack, and the pattern of the above-mentioned patterned black photoresist layer 109 is consistent with the pattern of the above-mentioned mask (that is, the above-mentioned preset pattern), wherein the above-mentioned preset pattern can be determined according to the number, position and size of the above-mentioned light-emitting area C11 that are actually needed to be set.
[0063] Moreover, in a specific implementation, after the light-emitting layer 104 in a partial area C12 is irradiated with laser L1 through the hollow area 109A so that the epitaxial stack forms a denatured area C12 and multiple light-emitting areas C11, the patterned black photoresist layer 109 can be cleaned and removed by chemical or physical methods to carry out subsequent process steps.
[0064] In some specific embodiments, when the laser L1 is used to irradiate the side of the second semiconductor layer 105 in the partial region C12 of the epitaxial stack away from the light emitting layer 104 to denature the light emitting layer 104 in the partial region C12, the second semiconductor layer 105 and the first semiconductor layer 103 in the partial region C12 are not damaged by the laser L1, so that after completing the above step S12, the following can be obtained: Figure 8a The micro-light-emitting structure shown.
[0065] Specifically, in the process of using the laser L1 to irradiate the side of the second semiconductor layer 105 in the partial area C12 of the epitaxial stack away from the light-emitting layer 104, the laser L1 used should meet the following conditions: the laser L1 irradiated to the second semiconductor layer 105 in the partial area C12 can completely pass through the second semiconductor layer 105 in the partial area C12, further irradiate to the light-emitting layer 132 in the partial area C12, and be fully absorbed by the light-emitting layer 132 in the partial area C12, and basically will not pass through the light-emitting layer 132 in the partial area C12. In this way, in the process of using the laser L1 to irradiate the side of the second semiconductor layer 105 in the partial area C12 of the epitaxial stack away from the light-emitting layer 104, it can be ensured that the second semiconductor layer 105 and the first semiconductor layer 103 in the partial area C12 will not be damaged by the laser L1, so as to further reduce the pixel sidewall damage caused by the laser L1 irradiation, thereby further improving the light extraction efficiency of the Micro-LED and improving the performance of the Micro-LED device.
[0066] In other specific embodiments, the above-mentioned step S12 may include: using laser L1 to irradiate the side of the second semiconductor layer 105 in the partial area C12 of the epitaxial stack away from the light-emitting layer 104, so as to remove the second semiconductor layer 105 in the partial area C12, and denature the light-emitting layer 104 in the partial area C12, thereby defining a plurality of light-emitting areas C11 of the epitaxial stack, the light-emitting layer 104 in the light-emitting area C11 is not denatured, and the denatured light-emitting layer 107A in the denatured area C12 loses its light-emitting function, and the undenatured light-emitting layers 107B in the plurality of light-emitting areas C11 are separated.
[0067] In other words, in the process of irradiating the side of the second semiconductor layer 105 in the partial area C12 of the epitaxial stack away from the light emitting layer 104 with the laser L1 to denature the light emitting layer 104 in the partial area C12, the second semiconductor layer 105 in the partial area C12 can be removed, and the first semiconductor layer 103 in the partial area C12 can not be damaged by the laser L1, so that after completing the above step S12, the following can be obtained: Figure 8b The micro-light-emitting structure shown.
[0068] Specifically, in the process of using laser L1 to irradiate the side of the second semiconductor layer 105 in the partial area C12 of the epitaxial stack away from the light-emitting layer 104, the laser L1 used should satisfy the following requirements: a portion of the laser L1 irradiated to the second semiconductor layer 105 in the partial area C12 can be absorbed by the second semiconductor layer 105 in the partial area C12, and the remaining portion can be further irradiated to the light-emitting layer 104 in the partial area C12 through the second semiconductor layer 105 in the partial area C12, and be fully absorbed by the light-emitting layer 104 in the partial area C12, and basically will not pass through the light-emitting layer 104 in the partial area C12.
[0069] In this way, in the process of using laser L1 to irradiate the side of the second semiconductor layer 105 in the partial area C12 of the epitaxial stack away from the light-emitting layer 104, it can not only ensure that the first semiconductor layer 103 in the partial area C12 will not be damaged by the laser L1, so as to reduce the damage to the pixel sidewall caused by the laser L1 irradiation, thereby improving the light extraction efficiency of the Micro-LED and improving the performance of the Micro-LED device, but also disconnect the electrical connection between the second semiconductor layers 105 in the above-mentioned multiple light-emitting areas C11, thereby facilitating the independent control of the light emission of the light-emitting layer 104 in each light-emitting area C11.
[0070] Furthermore, it should be noted that, when the laser light L1 is used to irradiate the side of the second semiconductor layer 105 in the partial region C12 of the epitaxial stack away from the light emitting layer 104, the second semiconductor layer 105 in the partial region C12 becomes hot and evaporates after absorbing the laser light L1, so that the second semiconductor layer 105 forms an opening 105A (such as Figure 8b ). The opening 105A penetrates the second semiconductor layer 105, and the orthographic projection of the opening 105A on the plane where the first semiconductor layer 103 is located can completely overlap with the orthographic projection of the light-emitting layer 107A after modification in the modification region C12 on the plane where the first semiconductor layer 103 is located. In this way, the second semiconductor layers 105 in the plurality of light-emitting regions C11 are separated by the opening 105A, so that the electrical connection between the second semiconductor layers 105 in the plurality of light-emitting regions C11 can be disconnected.
[0071] In other specific embodiments, the above-mentioned step S12 may include: using laser L1 to irradiate the side of the second semiconductor layer 105 in the partial area C12 of the epitaxial stack away from the light-emitting layer 104, so as to remove the second semiconductor layer 105 and part of the first semiconductor layer 103 in the partial area C12, and denature the light-emitting layer 104 in the partial area C12, thereby defining a plurality of light-emitting areas C11 of the epitaxial stack, the light-emitting layer 104 in the light-emitting area C11 is not denatured, and the denatured light-emitting layer 107A in the denatured area C12 loses its light-emitting function, and the undenatured light-emitting layers 107B in the plurality of light-emitting areas C11 are separated.
[0072] In other words, when the laser L1 is used to irradiate the side of the second semiconductor layer 105 in the partial area C12 of the epitaxial stack away from the light emitting layer 104 to denature the light emitting layer 104 in the partial area C12, the second semiconductor layer 105 and part of the first semiconductor layer 103 in the partial area C12 can be removed, so that after completing the above step S12, the following can be obtained: Figure 8c The micro-light-emitting structure shown.
[0073] Specifically, in the process of using the laser L1 to irradiate the side of the second semiconductor layer 105 in the partial area C12 of the epitaxial stack away from the light-emitting layer 104, the laser L1 used should satisfy the following requirements: a portion of the laser L1 irradiated to the second semiconductor layer 105 in the partial area C12 can be absorbed by the second semiconductor layer 105 in the partial area C12, and the remaining portion can be further irradiated to the light-emitting layer 104 in the partial area C12 through the second semiconductor layer 105 in the partial area C12, and a portion of the laser L1 irradiated to the light-emitting layer 104 in the partial area C12 via the second semiconductor layer 105 in the partial area C12 can be absorbed by the light-emitting layer 104 in the partial area C12, and the remaining portion can be further irradiated to the first semiconductor layer 103 in the partial area C12 through the light-emitting layer 104 in the partial area C12 and be completely absorbed by the first semiconductor layer 103 in the partial area C12 without passing through the first semiconductor layer 103 in the partial area C12.
[0074] In this way, in the process of using laser L1 to irradiate the side of the second semiconductor layer 105 in the partial area C12 of the epitaxial stack away from the light-emitting layer 104, not only can the electrical connection between the second semiconductor layers 105 in the above-mentioned multiple light-emitting areas C11 be disconnected, thereby facilitating the independent control of the light emission of the light-emitting layer 104 in each light-emitting area C11, but it can also ensure that the light-emitting layer 104 in the partial area C12 is fully denatured under the irradiation of laser L1, so as to avoid the problem of the light-emitting function of the light-emitting layer 104 in the partial area C12 not being completely lost due to insufficient denaturation, which helps to further improve the performance of Micro-LED devices.
[0075] Furthermore, it should be noted that, in the process of irradiating the side of the second semiconductor layer 105 in the partial region C12 of the epitaxial stack away from the light emitting layer 104 with the laser L1, the second semiconductor layer 105 and the part of the first semiconductor layer 104 in the partial region C12 will become hot and evaporate after absorbing the laser L1, so that the second semiconductor layer 105 and the first semiconductor layer 103 respectively form an opening 105A and an opening 103A in the region corresponding to the denatured region C12 (such as Figure 8c shown).
[0076] In the process of using the laser L1 to irradiate the side of the second semiconductor layer 105 in the partial area C12 of the epitaxial stack away from the light-emitting layer 104, the portion of the first semiconductor layer 104 that is removed can be the portion in the partial area C12 where the first semiconductor layer 103 contacts the light-emitting layer 104 (that is, the top portion of the first semiconductor layer 103 in the partial area C12). Specifically, the opening 103A partially penetrates the first semiconductor layer 103 and can separate the top portions of the first semiconductor layer 103 in the above-mentioned multiple light-emitting areas C11. Moreover, the orthographic projection of the opening 105A on the plane where the first semiconductor layer 103 is located can completely overlap with the orthographic projection of the light-emitting layer 107A after denaturation in the denaturation area C12 on the plane where the first semiconductor layer 103 is located. In this way, Figure 8c As shown, the upper surface and the lower surface of the light emitting layer 107A after the modification in the modification region C12 are exposed at the opening 105A and the opening 103A, respectively.
[0077] In the above embodiment, if Fig. 9 As shown, after the above step S12, the method for manufacturing the above micro-light emitting structure may further include: forming a first electrode 110 on a side of the second semiconductor layer 105 away from the light emitting layer 104 (i.e., the unmodified light emitting layer 107B) in the light emitting region C11. Specifically, a metal material (e.g., Ti, Au, Pt, Ni, and / or Al, etc.) may be deposited on a side of the second semiconductor layer 105 away from the unmodified light emitting layer 107B in the light emitting region C11 through a deposition process to form the above first electrode 110.
[0078] In some embodiments, Fig. 9 As shown, before forming the first electrode 110, the method for manufacturing the micro-light emitting structure may further include: forming a current diffusion layer 111 on a side of the second semiconductor layer 105 away from the unmodified light emitting layer 107B in the light emitting region C11. Accordingly, the first electrode 110 may be specifically formed on a side of the current diffusion layer 111 away from the second semiconductor layer 105.
[0079] Specifically, the current diffusion layer 111 can evenly distribute the current to the second semiconductor layer 105 (eg, P-type gallium nitride layer) in the light emitting region C11, thereby effectively improving the light extraction efficiency of the micro light emitting structure.
[0080] Moreover, in a specific implementation, the above-mentioned current diffusion layer 111 can be obtained by evaporating multiple layers of metal (for example, titanium (Ti), aluminum (Al), gold (Au), platinum (Pt) or nickel (Ni), etc.) or semiconductor oxide (for example, indium tin oxide (ITO) or zinc oxide (ZnO), etc.) on the surface of the second semiconductor layer 105 in the above-mentioned light-emitting area C11 that is away from the unmodified light-emitting layer 107B to form current conduction.
[0081] In some specific embodiments, after forming the current diffusion layer 111 and before forming the first electrode 110, the method for manufacturing the micro-light emitting structure may further include: forming a reflective layer (not shown in the figure) on a side of the current diffusion layer 111 away from the second semiconductor layer 105. Accordingly, the first electrode 110 may be specifically formed on a side of the reflective layer away from the current diffusion layer 111.
[0082] Specifically, during the use of the above-mentioned micro-light-emitting structure, the light emitted by the unmodified light-emitting layer 107B in the light-emitting area C11 and propagated to the reflective layer can be reflected by the reflective layer, and the reflected light will propagate outward to the side of the unmodified light-emitting layer 107B away from the reflective layer (i.e., the light-emitting side), thereby realizing the above-mentioned micro-light-emitting structure to emit light on the side of the unmodified light-emitting layer 107B away from the reflective layer and improving the light-emitting efficiency of the above-mentioned micro-light-emitting structure.
[0083] In some examples, the material of the reflective layer may include any material with high reflectivity (e.g., greater than 50%) to visible light, such as titanium (Ti), aluminum (Al), silver (Ag), platinum (Pt), nickel (Ni), etc. In other examples, the reflective layer may also be formed by stacking multiple layers of materials with different refractive indices.
[0084] Furthermore, in a specific implementation, after forming the current diffusion layer 111 , a reflective metal material (eg, Ag and Al) may be deposited on a side of the current diffusion layer 111 away from the second semiconductor layer 105 through photolithography and deposition processes to form the reflective layer.
[0085] In the above embodiment, after obtaining the above epitaxial stack, the method for manufacturing the above micro-light emitting structure may further include:
[0086] Step S13: etching a groove in a target area of the epitaxial stack, wherein the groove penetrates the first semiconductor layer.
[0087] The cross-sectional structure diagram after the above step S13 is completed can be as follows: Figures 10a to 10c shown.
[0088] Specifically, Figures 10a to 10c As shown, after the epitaxial stack is obtained, the epitaxial stack in the target area C2 may be etched from top to bottom by an etching process (eg, an ICP etching process) to form a groove 112 penetrating the first semiconductor layer 103 .
[0089] Furthermore, it can be understood that the groove 112 is used to define the pixel array region C1 of the epitaxial stack, and can be determined according to the position and size of the pixel array region C1 that is actually required.
[0090] Among them, the area where the above-mentioned groove 112 is located (that is, the above-mentioned target area C2) is the pixel peripheral area that actually needs to be set, and the other areas of the above-mentioned epitaxial stack except the target area C2 are the pixel array area C1. The target area C2 is located around the pixel array area C1. Exemplarily, the target area C2 can be set around the pixel array area C1. In addition, the above-mentioned denaturation area C12 and the above-mentioned multiple light-emitting areas C11 can both be located in the pixel array area C1. Specifically, the pixel array area C1 can be composed of the above-mentioned denaturation area C12 and the above-mentioned multiple light-emitting areas C11, and the above-mentioned multiple light-emitting areas C11 can be arranged in an array.
[0091] Furthermore, during specific implementation, the step S13 may be performed before the step S12 or after the step S12.
[0092] In some specific embodiments, the step S13 may be performed before the step S12. Accordingly, the step of performing a denaturation treatment on the light emitting layer 104 in the partial region C12 of the epitaxial stack so that the epitaxial stack forms the denaturation region C12 and a plurality of light emitting regions C11 may include: performing a denaturation treatment on the light emitting layer 104 in the partial region C12 of the pixel array region C1 of the epitaxial stack so that the pixel array region C1 of the epitaxial stack is divided into the denaturation region C12 and a plurality of light emitting regions C11 (such as Figures 10a to 10c shown).
[0093] Furthermore, the above step S13 may specifically include: depositing an etching mask layer on one side of the epitaxial stack where the second semiconductor layer 105 is provided; patterning the etching mask layer to form a patterned etching mask layer, the patterned etching mask layer is used to expose the pixel peripheral region C2 of the epitaxial stack and cover other regions of the epitaxial stack except the pixel peripheral region C2; and, using the patterned etching mask layer as a mask, etching the pixel peripheral region C2 of the epitaxial stack to form a groove 112. The material of the above etching mask layer may include etching-resistant materials such as photoresist, metal materials or insulating materials. For example, the above etching mask layer may be specifically a hard mask layer (for example, a silicon oxide layer or a silicon nitride layer). Furthermore, after the above groove 112 is formed, the above patterned etching mask layer may be removed cleanly by chemical or physical methods so as to carry out subsequent process steps.
[0094] Furthermore, in a specific implementation, after obtaining the epitaxial stack, the epitaxial stack may be cleaned first to remove impurities such as residual glue and foreign matter on the epitaxial stack, and then an etching mask layer may be deposited on the side of the epitaxial stack where the second semiconductor layer 105 is provided through a deposition process (e.g., a PECVD (Plasma Enhanced Chemical Vapor Deposition) process). Afterwards, the etching mask layer may be patterned to expose the pixel peripheral region C2 of the epitaxial stack, thereby forming a patterned etching mask layer, and then the pixel peripheral region C2 of the epitaxial stack may be etched using an ICP etching process with the patterned etching mask layer as a mask to form a groove 112, which may sequentially penetrate the second semiconductor layer 105 and the light emitting layer 104 in the longitudinal direction Z, and extend to the inside of the first semiconductor layer 103, so as to achieve sufficient etching, thereby ensuring that the first semiconductor layer 103 can be exposed through the groove 112.
[0095] Next, a black photoresist layer 108 (eg, Figure 5 As shown), and based on a mask having a preset pattern, the black photoresist layer 108 is exposed and developed to form a patterned black photoresist layer 109 (as shown Figure 6 Then, the laser L1 can be used to irradiate the side of the second semiconductor layer 105 away from the light emitting layer 104 in the partial area C12 of the epitaxial stack through the hollow area 109A (as shown in FIG. Figure 7 As shown), the light emitting layer 104 in the partial region C12 is denatured to form a light emitting layer 107 after the light emitting layer 104 in the partial region C12 is denatured (as shown Figures 10a to 10c shown).
[0096] In some embodiments, Fig.11 As shown, after forming the groove 112, the method for manufacturing the micro-light emitting structure may further include: forming a second electrode 113 on the bottom wall of the groove 112. Specifically, a metal material (such as Ti, Au, Pt, Ni and / or Al, etc.) may be deposited on the bottom wall of the groove 112 through a deposition process to form the second electrode 113. In addition, during specific implementation, the second electrode 113 and the first electrode 110 may be formed through the same process steps, and the second electrode 113 and the first electrode 110 may be made of the same material.
[0097] In some examples, the second semiconductor layer 105 and the first semiconductor layer 103 may be a P-type semiconductor layer and an N-type semiconductor layer, respectively, and accordingly, the first electrode 110 and the second electrode 113 may be a P-type electrode and an N-type electrode, respectively. In other examples, the second semiconductor layer 105 and the first semiconductor layer 103 may be an N-type semiconductor layer and a P-type semiconductor layer, respectively, and accordingly, the first electrode 110 and the second electrode 113 may be an N-type electrode and a P-type electrode, respectively.
[0098] In some embodiments, Fig.12 As shown, after forming the first electrode 110 and the second electrode 113 , the method for manufacturing the micro light-emitting structure may further include: forming a passivation layer 114 , wherein the passivation layer 114 covers the epitaxial stack, the first electrode 110 and the second electrode 113 .
[0099] Specifically, after forming the first electrode 110 and the second electrode 113, an insulating material (such as silicon oxide, silicon nitride and / or aluminum oxide, etc.) can be deposited on the side of the epitaxial stack where the groove 112 is provided by a deposition process to form a passivation layer 114, and the passivation layer 114 can cover the epitaxial stack, the first electrode 110, the second electrode 113 and the inner wall surface of the groove 112. Moreover, in the above embodiment in which a current diffusion layer 111 and / or a reflective layer are provided between the first electrode 110 and the second semiconductor layer 105, the passivation layer 114 can also cover the current diffusion layer 111 and / or the reflective layer. In this way, the passivation layer 114 can effectively block the corrosion of the first electrode 110, the second electrode 113, the reflective layer, the current diffusion layer 111 and the epitaxial stack by external water and oxygen, thereby improving product reliability.
[0100] In some embodiments, Fig.12As shown, after forming the passivation layer 114, the method for manufacturing the micro-light emitting structure may further include: forming a first electrical connection layer 115 on a side of the first electrode 110 away from the second semiconductor layer 105, and forming a second electrical connection layer 116 on a side of the second electrode 113 away from the bottom wall of the groove 112, wherein the first electrical connection layer 115 penetrates the passivation layer 114 and is electrically connected to the first electrode 110, and the second electrical connection layer 116 penetrates the passivation layer 114 and is electrically connected to the second electrode 113. 13; and forming a first bonding layer 117 on the side of the first electrical connection layer 115 away from the first electrode 110, and forming a second bonding layer 118 on the side of the second electrical connection layer 116 away from the second electrode 113, wherein the first bonding layer 117 is located on the side of the passivation layer 114 away from the epitaxial stack and is electrically connected to the first electrical connection layer 115, and the second bonding layer 118 is located on the side of the passivation layer 114 away from the epitaxial stack and is electrically connected to the second electrical connection layer 116. In this way, the micro-light-emitting structure can be bonded to other device structures through the first bonding layer 117 and the second bonding layer 118.
[0101] Exemplarily, the material of the first electrical connection layer 115 may include conductive materials such as titanium (Ti), aluminum (Al), gold (Au), platinum (Pt) and / or nickel (Ni). The material of the second electrical connection layer 116 may include conductive materials such as titanium (Ti), aluminum (Al), gold (Au), platinum (Pt) and / or nickel (Ni). The material of the first bonding layer 117 may include indium (In), aluminum (Al), tin (Sn) and / or silver (Ag), etc. The material of the second bonding layer 118 may include indium (In), aluminum (Al), tin (Sn) and / or silver (Ag), etc. Moreover, in a specific implementation, the first electrical connection layer 115 and the second electrical connection layer 116 may be made of the same material, and the first bonding layer 117 and the second bonding layer 118 may be made of the same material.
[0102] As can be seen from the above, the method for manufacturing a micro-light-emitting structure provided in an embodiment of the present application provides an epitaxial stack, wherein the epitaxial stack includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked in sequence, and then the light-emitting layer in a partial area of the epitaxial stack is denatured so that the epitaxial stack forms a denatured region and a plurality of light-emitting regions, and the denatured light-emitting layer in the denatured region loses its light-emitting function, and the undenatured light-emitting layers in the plurality of light-emitting regions are separated, thereby realizing the definition of the pixel position by the denatured light-emitting layer in the denatured region without the need to define the pixel position by an etching process, thereby avoiding damage to the side wall of the pixel table by etching, so as to improve the light extraction efficiency of the micro-light-emitting diode chip and enhance the performance of the micro-light-emitting diode device.
[0103] Based on the method described in the above embodiment, this embodiment will be further described from the perspective of a micro-light emitting structure. Figures 8a to 8c , Fig. 9 Figures 10 to 10c Fig.11 and Fig.12 , Figures 8a to 8c , Fig. 9 Figures 10 to 10c Fig.11 and Fig.12 FIG. 1 is a schematic cross-sectional view of a micro-light emitting structure provided by an embodiment of the present invention. Figures 8a to 8c , Fig. 9 Figures 10 to 10c Fig.11 and Fig.12 The micro-light emitting structure includes a light emitting stack (i.e., an epitaxial stack after the light emitting layer 104 in the partial region C12 has been subjected to the denaturation treatment in the above method embodiment), and the light emitting stack includes a first semiconductor layer 103, a light emitting layer 107 (i.e., the light emitting layer 107 after the light emitting layer 104 in the partial region C12 has been subjected to the denaturation treatment in the above method embodiment), and a second semiconductor layer 105, which are sequentially stacked. The light emitting layer 107 has been subjected to the denaturation treatment and includes a denatured portion 107A without a light emitting function (i.e., the denatured light emitting layer 107A in the above method embodiment) and a plurality of undenatured portions 107B with a light emitting function (i.e., the undenatured light emitting layer 107B in the above method embodiment), and the denatured portion 107A separates each undenatured portion 107B from other undenatured portions 107B located around it. Furthermore, the light-emitting stack has a plurality of light-emitting regions C11 , which respectively correspond to the plurality of unmodified portions 107B, and each light-emitting region C11 corresponds to one unmodified portion 107B.
[0104] In some embodiments, Figure 8b and Fig.10b As shown, the light-emitting stack (or the second semiconductor layer 105) may be provided with an opening 105A in the area corresponding to the degeneration portion 107A, the opening 105A passes through the second semiconductor layer 105, and the orthographic projection of the opening 105A on the plane where the first semiconductor layer 103 is located may completely overlap with the orthographic projection of the degeneration portion 107A on the plane where the first semiconductor layer 103 is located.
[0105] Specifically, Figure 8c and Fig.10c As shown, the first semiconductor layer 103 may be provided with an opening 103A in a region corresponding to the modified portion 107A, the opening 103A partially penetrates the first semiconductor layer 103, and the opening direction of the opening 103A faces the modified portion 107A. Moreover, the orthographic projection of the opening 103A on the plane where the first semiconductor layer 103 is located may completely overlap with the orthographic projection of the modified portion 107A on the plane where the first semiconductor layer 103 is located.
[0106] In some embodiments, Fig. 9 As shown, the micro light emitting structure may further include a first electrode 110 , and the first electrode 110 is disposed on a side of the second semiconductor layer 105 away from the unmodified portion 107B in the light emitting region C11 .
[0107] Specifically, Fig. 9 As shown, the above-mentioned micro-light-emitting structure may also include a current diffusion layer 111, which is arranged on the side of the second semiconductor layer 105 away from the unmodified portion 107B in the light-emitting area C11, and the above-mentioned first electrode 110 may be specifically arranged on the side of the current diffusion layer 111 away from the second semiconductor layer 105.
[0108] In some embodiments, Figures 10a to 10c As shown, the light emitting stack may specifically include a pixel peripheral region C2 and a pixel array region C1, wherein the pixel peripheral region C2 is disposed around the pixel array region C1, and the pixel array region C1 includes the plurality of light emitting regions C11. Furthermore, the pixel peripheral region C2 of the light emitting stack may be provided with a groove 112, and the groove 112 penetrates the first semiconductor layer 103.
[0109] Specifically, Fig.11 As shown, the micro light emitting structure may further include a second electrode 113 , and the second electrode 113 is disposed on the bottom wall surface of the groove 112 .
[0110] In some specific embodiments, Fig.12 As shown, the micro light emitting structure may further include a passivation layer 114 , which covers the light emitting stack, the first electrode 110 , the current diffusion layer 111 , the second electrode 113 and the inner wall surface of the groove 112 .
[0111] Specifically, Fig.12As shown, the micro-light emitting structure may further include a first electrical connection layer 115, a second electrical connection layer 116, a first bonding layer 117, and a second bonding layer 118. The first electrical connection layer 115 is disposed on the side of the first electrode 110 away from the second semiconductor layer 105, the second electrical connection layer 116 is disposed on the side of the second electrode 113 away from the bottom wall of the groove 112, and the first electrical connection layer 115 penetrates the passivation layer 114 and is electrically connected to the first electrode 110, and the second electrical connection layer 116 penetrates the passivation layer 114 and is electrically connected to the second electrode 113. The first bonding layer 117 is arranged on the side of the first electrical connection layer 115 away from the first electrode 110, and the second bonding layer 118 is arranged on the side of the second electrical connection layer 116 away from the second electrode 113. In addition, the first bonding layer 117 is located on the side of the above-mentioned passivation layer 114 away from the light-emitting stack and is electrically connected to the first electrical connection layer 115, and the second bonding layer 118 is located on the side of the above-mentioned passivation layer 114 away from the light-emitting stack and is electrically connected to the second electrical connection layer 116.
[0112] Furthermore, it should be noted that the specific structure of the micro-light emitting structure in this embodiment can refer to the specific implementation in the above method embodiment, so it will not be repeated here.
[0113] From the above, it can be seen that the micro-light-emitting structure provided in the embodiment of the present application includes a light-emitting stack, which includes a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked in sequence, and the light-emitting layer is subjected to a denaturation treatment and includes a denatured portion without a light-emitting function and a plurality of undenatured portions with a light-emitting function, wherein the denatured portion separates the plurality of undenatured portions, and the light-emitting stack has a plurality of light-emitting areas, and the plurality of light-emitting areas correspond to the plurality of undenatured portions, respectively, thereby realizing the definition of the pixel position by the denatured portion of the light-emitting layer without the need to define the pixel position by an etching process, thereby avoiding damage to the side wall of the pixel table caused by etching, so as to improve the light extraction efficiency of the micro-light-emitting diode chip and enhance the performance of the micro-light-emitting diode device.
[0114] See also Fig.13 , Fig.13 Schematic diagram of the structure of the micro light-emitting device provided in the embodiment of the present application. Fig.13 As shown, the micro-light emitting device 30 may include a micro-light emitting structure 31 manufactured by the manufacturing method of the micro-light emitting structure of any of the above embodiments, or include the micro-light emitting structure 31 of any of the above embodiments.
[0115] Specifically, the micro-light-emitting structure 31 may include a light-emitting stack, which includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked in sequence, the light-emitting layer is denatured and includes a denatured portion without a light-emitting function and a plurality of undenatured portions with a light-emitting function, wherein the denatured portion separates the plurality of undenatured portions, and the light-emitting stack has a plurality of light-emitting regions, which respectively correspond to the plurality of undenatured portions.
[0116] Exemplarily, the above-mentioned micro-light emitting device 30 can be an electronic device such as an optical projection, a vehicle-mounted head-up display (HUD), or any device with a display screen such as a smart phone, a smart watch, a laptop computer, a tablet computer, a driving recorder, a navigator, a head-mounted device, etc.
[0117] It should be noted that the micro-light-emitting device provided in the embodiment of the present application, since it is provided with the micro-light-emitting structure provided in the embodiment of the present application, can achieve the beneficial effects that can be achieved by any micro-light-emitting structure provided in the embodiment of the present application. Please refer to the previous embodiments for details, which will not be repeated here.
[0118] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.
Claims
1. A method for manufacturing a micro-light emitting structure, characterized in that: include: Providing an epitaxial stack, the epitaxial stack comprising a first semiconductor layer, a light emitting layer, and a second semiconductor layer stacked in sequence; The light-emitting layer in a partial area of the epitaxial stack is subjected to a denaturation treatment so that the epitaxial stack forms a denaturation area and a plurality of light-emitting areas, and the denatured light-emitting layer in the denatured area loses its light-emitting function, and the undenatured light-emitting layers in the plurality of light-emitting areas are separated.
2. The method for manufacturing a micro-light emitting structure according to claim 1, characterized in that: The step of performing a denaturation treatment on the light emitting layer in a partial region of the epitaxial stack includes: The light emitting layer in a partial region of the epitaxial stack is irradiated with laser light to denature the light emitting layer in the partial region.
3. The method for manufacturing a micro-light emitting structure according to claim 2, characterized in that: The step of irradiating the light emitting layer in a partial region of the epitaxial stack with a laser so as to denature the light emitting layer in the partial region comprises: The second semiconductor layer in a partial region of the epitaxial stack is irradiated with a laser on a side away from the light emitting layer to remove the second semiconductor layer in the partial region and to denature the light emitting layer in the partial region.
4. The method for manufacturing a micro-light emitting structure according to claim 2, characterized in that: The step of irradiating the light emitting layer in a partial region of the epitaxial stack with a laser comprises: The light emitting layer in a partial region of the epitaxial stack is irradiated with laser light having a wavelength of 200 to 700 nm.
5. The method for manufacturing a micro-light emitting structure according to claim 2, characterized in that: Before irradiating the light emitting layer in a partial region of the epitaxial stack with laser, the method further comprises: forming a black photoresist layer, wherein the black photoresist covers the epitaxial stack; The black photoresist layer is exposed and developed based on a mask having a preset pattern to form a patterned black photoresist layer, wherein the patterned black photoresist layer has a hollow area, and the area of the epitaxial stack exposed from the hollow area is the partial area.
6. The method for manufacturing a micro-light emitting structure according to claim 1, characterized in that: The epitaxial stack has a pixel array region and a pixel peripheral region arranged around the pixel array region, and the denaturation region and the plurality of light emitting regions are both located in the pixel array region; Before performing a denaturation treatment on the light-emitting layer in a partial region of the epitaxial stack so that the epitaxial stack forms a denaturation region and a plurality of light-emitting regions, the method further includes: A groove is formed by etching in the pixel peripheral region of the epitaxial stack, wherein the groove penetrates into the first semiconductor layer.
7. The method for manufacturing a micro-light emitting structure according to claim 6, characterized in that: After performing a denaturation treatment on the light emitting layer in a partial region of the epitaxial stack so that the epitaxial stack forms a denaturation region and a plurality of light emitting regions, the method further includes: A first electrode is formed on a side of the second semiconductor layer facing away from the light emitting layer in the light emitting region, and a second electrode is formed on a bottom wall surface of the groove.
8. A micro-light emitting structure, characterized in that: include: A light-emitting stack comprises a first semiconductor layer, a light-emitting layer and a second semiconductor layer which are stacked in sequence, wherein the light-emitting layer has been subjected to a denaturation treatment and comprises a denatured portion which does not have a light-emitting function and a plurality of undenatured portions which have a light-emitting function, wherein the denatured portion separates the plurality of undenatured portions, and the light-emitting stack has a plurality of light-emitting regions which respectively correspond to the plurality of undenatured portions.
9. The micro-light emitting structure according to claim 8, characterized in that: The light-emitting stack is provided with an opening in a region corresponding to the degeneration portion, the opening penetrates the second semiconductor layer, and an orthographic projection of the opening on the plane where the first semiconductor layer is located completely overlaps with an orthographic projection of the degeneration portion on the plane where the first semiconductor layer is located.
10. A micro light emitting device, characterized in that: A micro-light-emitting structure manufactured by the method for manufacturing a micro-light-emitting structure according to any one of claims 1 to 7, or a micro-light-emitting structure according to any one of claims 8 to 9.