Data interaction method, data interaction device and storage medium

Abstract

The invention relates to a data interaction method, a data interaction device and a storage medium. The data interaction method comprises the steps of obtaining and analyzing a data interaction instruction sent by a low-level byte code format application, determining a first memory address corresponding to the data interaction instruction, and determining a data interaction mode between an operating system of the electronic equipment and the low-level byte code format application. And in response to the data interaction mode being a first mode and the access range corresponding to the first memory address being greater than an access range threshold, executing the data interaction instruction. By means of the method and device, boundary check when the low-level bytecode format application executes the memory access operation every time is avoided, and the running performance of the low-level bytecode format application can be effectively improved.

Description

Technical Field

[0001] The present disclosure relates to the field of data interaction, and in particular to a data interaction method, a data interaction device and a storage medium. Background Art

[0002] The low-level bytecode format is an intermediate representation that is often used to interact or transfer code between different programming languages, platforms, or execution environments. It is a representation that is closer to the underlying machine language than the source code, and contains lower-level instructions, data, and opcodes, as well as corresponding operands. For example, WebAssembly is a low-level bytecode format for executing high-performance binary code in web browsers. It enables developers to run applications in browsers in a way that is closer to native code than traditional JavaScript.

[0003] In the related technology, low-level bytecode format applications run in a secure virtual machine isolated from the terminal operating system. When low-level bytecode format applications access localized resources, the virtual machine parses the access instructions issued by the low-level bytecode format applications to determine the physical memory address that the low-level bytecode format applications want to access, and the virtual machine will check the legality of the memory access to protect the memory security of the low-level bytecode format applications. However, for some special data in the physical memory that require access to a larger range, the low-level bytecode format application will not affect memory security when accessing, but the memory access to these data will be judged by the virtual machine as illegal out-of-bounds access, resulting in program termination. Summary of the invention

[0004] In order to overcome the problems existing in the related art, the present disclosure provides a data interaction method, a data interaction device and a storage medium.

[0005] According to a first aspect of an embodiment of the present disclosure, a data interaction method is provided, comprising: acquiring and parsing a data interaction instruction issued by a low-level bytecode format application, determining a first memory address corresponding to the data interaction instruction, and determining a data interaction mode between an operating system of an electronic device and the low-level bytecode format application, wherein the first memory address is a physical memory address of the electronic device; in response to the data interaction mode being a first mode and an access range corresponding to the first memory address being greater than an access range threshold, executing the data interaction instruction, wherein the first mode is a data interaction mode that supports the access range being an arbitrary access range.

[0006] In one embodiment, the method of parsing a low-level bytecode format application to issue a data interaction instruction and determining a first memory address corresponding to the data interaction instruction includes: determining an operand of the data interaction instruction and determining a second memory address based on the operand, wherein the second memory address is a linear memory address allocated by the electronic device to the low-level bytecode format application; mapping the second memory address to a first memory address through a preset address mapping relationship, and determining the first memory address contained in the data interaction instruction.

[0007] In one implementation, the address mapping relationship is set based on the same structure between the operating system of the electronic device and the low-level bytecode format application, and the structure is used to unify the interaction structure between the low-level bytecode format application and the operating system.

[0008] In one embodiment, the method also includes: in response to the data interaction mode being a second mode, executing the data interaction instruction according to the size relationship between the access range corresponding to the first memory address and the access range threshold, the second mode being a data interaction mode that supports the access range being less than or equal to the access range threshold.

[0009] In one embodiment, the data interaction instruction is executed according to the size relationship between the access range corresponding to the first memory address and the access range threshold, including: in response to the access range being less than or equal to the access range threshold, executing the data interaction instruction; in response to the access range being greater than the access range threshold, terminating the execution of the data interaction instruction.

[0010] According to a second aspect of an embodiment of the present disclosure, a data interaction device is provided, comprising: a determination unit, configured to obtain and parse a data interaction instruction issued by a low-level bytecode format application, determine a first memory address corresponding to the data interaction instruction, and determine a data interaction mode between an operating system of an electronic device and the low-level bytecode format application, wherein the first memory address is a physical memory address of the electronic device; and an execution unit, configured to execute the data interaction instruction in response to the data interaction mode being a first mode and an access range corresponding to the first memory address being greater than an access range threshold, wherein the first mode is a data interaction mode that supports the access range being an arbitrary access range.

[0011] In one embodiment, the determination unit parses a data interaction instruction issued by a low-level bytecode format application in the following manner to determine a first memory address corresponding to the data interaction instruction: determine an operand of the data interaction instruction, and determine a second memory address based on the operand, wherein the second memory address is a linear memory address allocated by the electronic device to the low-level bytecode format application; and maps the second memory address to a first memory address through a preset address mapping relationship to determine the first memory address contained in the data interaction instruction.

[0012] In one implementation, the address mapping relationship is set based on the same structure between the operating system of the electronic device and the low-level bytecode format application, and the structure is used to unify the interaction structure between the low-level bytecode format application and the operating system.

[0013] In one embodiment, the execution unit is also used to: in response to the data interaction mode being a second mode, execute the data interaction instruction according to the size relationship between the access range corresponding to the first memory address and the access range threshold, the second mode being a data interaction mode that supports the access range being less than or equal to the access range threshold.

[0014] In one embodiment, the execution unit executes the data interaction instruction in the following manner according to the size relationship between the access range corresponding to the first memory address and the access range threshold: in response to the access range being less than or equal to the access range threshold, the data interaction instruction is executed; in response to the access range being greater than the access range threshold, the execution of the data interaction instruction is terminated.

[0015] According to a third aspect of an embodiment of the present disclosure, a data interaction device is provided, comprising: a processor; and a memory for storing processor executable instructions; wherein the processor is configured to: execute the data interaction method described in the first aspect or any one of the implementations of the first aspect.

[0016] According to a fourth aspect of an embodiment of the present disclosure, a storage medium is provided, in which instructions are stored. When the instructions in the storage medium are executed by a processor, the processor is enabled to execute the data interaction method described in the first aspect or any one of the embodiments of the first aspect.

[0017] The technical solution provided by the embodiments of the present disclosure may include the following beneficial effects: obtaining and parsing data interaction instructions issued by a low-level bytecode format application, determining a first memory address corresponding to the data interaction instruction, and determining a data interaction mode between the operating system of the electronic device and the low-level bytecode format application. When the data interaction mode is a data interaction mode that supports an access range of any access range, and the access range corresponding to the first memory address is greater than the access range threshold, the data interaction instruction is executed. Through the present disclosure, the boundary check of the low-level bytecode format application each time the memory access operation is performed is avoided, and the running performance of the low-level bytecode format application can be effectively improved.

[0018] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0020] Figure 1 The figure is a flow chart of a data interaction method according to an exemplary embodiment.

[0021] Figure 2 The present invention is a flowchart of a method for determining a first memory address according to a data interaction instruction according to an exemplary embodiment.

[0022] Figure 3 The present invention is a flowchart of a method for executing a data interaction instruction according to an exemplary embodiment.

[0023] Figure 4 The present invention is a flowchart of a method for executing a data interaction instruction according to another exemplary embodiment.

[0024] Figure 5 The invention is a block diagram of a data interaction device according to an exemplary embodiment.

[0025] Figure 6 It is a block diagram of a device for data interaction according to an exemplary embodiment. DETAILED DESCRIPTION

[0026] Here, exemplary embodiments will be described in detail, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present disclosure.

[0027] The data interaction method provided by the embodiment of the present disclosure is applied to a scenario in which data interaction is performed between an operating system of an electronic device and a low-level bytecode format application based on data interaction instructions, for example, data interaction is performed between a terminal operating system and a Webassembly application.

[0028] The data interaction method provided by the embodiment of the present disclosure may be executed by an electronic device, which may be, for example, a terminal whose operating system is a Linux system.

[0029] The low-level bytecode format is an intermediate representation that is often used to interact or transfer code between different programming languages, platforms, or execution environments. It is a representation that is closer to the underlying machine language than the source code, and contains lower-level instructions, data, and opcodes, as well as corresponding operands. For example, WebAssembly is a low-level bytecode format for executing high-performance binary code in web browsers. It enables developers to run applications in browsers in a way that is closer to native code than traditional JavaScript.

[0030] In the related art, when exchanging memory information between a low-level bytecode format application and an electronic device operating system, a shared memory mechanism is generally used to interact with the memory information, that is, a shared memory segment is created through the shared memory mechanism, and the shared memory segment is mapped to an address space accessible to multiple threads or processes, and multiple threads or processes access the shared memory by accessing the address space. For example, in the Linux operating system, the shmget() system call is used to access physical memory, create a shared memory segment, and map the shared memory segment to the address space of the process, and multiple threads or processes can use the address of the memory segment to access the shared memory. For another example, in the WebAssembly low-level bytecode format, in the Wasm low-level bytecode format application, the WebAssembly.Memory object can be used to allocate and manage memory. When mapping a shared memory segment to the Wasm low-level bytecode format application, an ArrayBuffer object is returned through the buffer property of the WebAssembly.Memory object, and the ArrayBuffer object is passed to other application programming interfaces (Application Programming Interface, API) in the Wasm low-level bytecode format application, thereby mapping the memory to be accessed by the Wasm low-level bytecode format application to the shared memory segment, and realizing information interaction between the Wasm low-level bytecode format application and the Linux host operating system. However, there are some disadvantages in using the shared memory mechanism to copy memory data from the low-level bytecode format application to the operating system. First, the shared memory mechanism requires explicit management of memory, which may increase the complexity of the code; second, the shared memory mechanism needs to ensure that access to the shared memory between multiple processes or threads is synchronized to avoid data competition and other concurrency problems, and locks or other synchronization mechanisms are required, thereby increasing the complexity of the code. Moreover, under the shared memory mechanism, multiple processes or threads can access the shared memory, which may lead to data leakage or other security issues.

[0031] In the related technology, low-level bytecode format applications generally run in a trusted execution environment in a sandbox. For example, wasm applications run in a WebAssembly virtual machine. For a trusted execution environment running in a sandbox, linear memory is generally a section of memory allocated through memory allocation methods such as malloc / calloc. The size of the memory is determined as follows: When a low-level bytecode format application accesses the physical memory of the operating system, it is necessary to perform memory access based on the range of memory access. When interacting between a low-level bytecode format application and a terminal operating system, access instructions are generally used to access physical memory and execute the instruction content. In one example, a low-level bytecode format application running in a virtual machine accesses the physical memory of the terminal based on an access instruction. The execution process of the access instruction is as follows:

[0032] 1. Instruction decoding: The low-level word code format virtual machine decodes the access instruction and determines the operation type, operand, and operand type of the access instruction.

[0033] 2. Memory address calculation: The low-level word code format virtual machine calculates the address OFFSET in the linear memory based on the operand in the access instruction

[0034] 3. Memory access: The low-level word code format virtual machine converts the linear memory address into a physical memory address PA = A + OFFSET, and reads or writes data in the physical memory based on the instruction content contained in the access instruction (such as read load, write store). Among them, PA is the physical memory address, A is the starting memory address, and OFFSET is the address in the linear memory.

[0035] 4. Exception handling: The low-level character code format virtual machine will check whether the memory access is out of bounds: when PA>=A and PA<=A+SA, the access program proceeds normally. When PA>A+SA, it is judged that the access is out of bounds and an illegal access occurs. An exception will be thrown and the execution of the access program will be terminated, where SA is the memory size pre-allocated for the low-level character code format application.

[0036] 5. Instruction execution result: After the access instruction is executed, the low-level word code format virtual machine will store the result in the operand stack for subsequent access instructions.

[0037] The above-mentioned method for interaction between the low-level bytecode format application and the terminal operating system is used to prevent illegal access during the information interaction process. However, when a special structure is used for interaction between the low-level bytecode format application and the terminal operating system, when the low-level bytecode format application accesses data whose memory size is larger than the pre-allocated memory size, the memory access of the low-level bytecode format application will not affect memory security, but the memory access to these data will be judged by the virtual machine as an illegal out-of-bounds access, resulting in program termination and affecting the running performance of the low-level bytecode format application. Furthermore, in the related technology, checking whether the memory access is out of bounds will generate a large number of operation codes (Operation Code, OPCode), resulting in the low-level bytecode format application After being compiled by the Ahead-of-time compiler (AOT), the generated program is larger, which increases the complexity of the code.

[0038] In view of this, the present disclosure proposes a data interaction method, in which a special structure is used for data interaction between the operating system of an electronic device and a low-level bytecode format application, and a data interaction mode that supports a physical memory access range of any access range is set. When the above data interaction mode is selected, the access of the low-level bytecode format application to the physical memory of the electronic device will not be restricted based on the size relationship between the physical memory access range and the access range threshold, thereby avoiding boundary checks each time a memory access operation is performed, and effectively improving the operating performance of the low-level bytecode format application.

[0039] Figure 1 FIG. 1 is a flow chart of a data interaction method according to an exemplary embodiment. Figure 1 As shown, the method includes step S101 to step S102.

[0040] In step S101, a data interaction instruction issued by a low-level bytecode format application is obtained and parsed, a first memory address corresponding to the data interaction instruction is determined, and a data interaction mode between an operating system of an electronic device and the low-level bytecode format application is determined.

[0041] The first memory address is a physical memory address of the electronic device.

[0042] In step S102, in response to the data interaction mode being the first mode and the access range corresponding to the first memory address being greater than the access range threshold, the data interaction instruction is executed.

[0043] Among them, the first mode is a data interaction mode that supports an access range of any access range.

[0044] In the disclosed embodiment, when the operating system of the electronic device and the low-level bytecode format application perform data interaction based on the data interaction instruction, the low-level bytecode format application issues the data interaction instruction, and after the virtual machine running in the operating system sandbox obtains the data interaction instruction, the instruction is parsed and the operation type, operand and operand type contained in the instruction are obtained. The virtual machine calculates the physical memory address (first memory address) to be accessed by the low-level word code format application according to the operand. It can be understood that when the general data interaction mode is used between the operating system of the electronic device and the low-level bytecode format application, the physical memory address range (i.e., the access range threshold) corresponding to the low-level word code format application will be set, and when it is determined that the current access range is greater than the access range threshold, the data interaction process will be terminated. The present disclosure proposes a new data interaction mode, in which the current memory address access range of the low-level word code format application is not monitored during the data interaction process, and even when the memory address access range is greater than the threshold, the data interaction process is still maintained normally, thereby effectively improving the operation performance of the low-level bytecode format application.

[0045] In the disclosed embodiment, the first mode can be used as a data interaction mode in which the entire physical memory is set to be accessible. In the first mode, the access range of the low-level bytecode format application will not be checked when the operating system of the electronic device and the low-level bytecode format application are used, thereby effectively improving the running performance of the low-level bytecode format application. In addition, since the access range check of the low-level bytecode format application is cancelled, the generation of operation codes during the data interaction process is also reduced, the program size of the low-level bytecode format application after being compiled by the precompiler is reduced, and the code complexity is reduced.

[0046] In the embodiments of the present disclosure, the low-level word code format application running in the low-level word code format virtual machine cannot directly access the physical memory of the electronic device, and needs to indirectly access the physical memory of the electronic device through the linear memory allocated by the low-level word code format virtual machine for the low-level word code format application, and the physical memory address (first memory address) to be accessed by the low-level word code format application also needs to be obtained through the linear memory address. The following embodiments of the present disclosure illustrate the method for determining the physical memory address to be accessed by the low-level word code format application.

[0047] Figure 2 FIG. 1 is a flow chart showing a method for determining a first memory address according to a data interaction instruction according to an exemplary embodiment. Figure 2 As shown, the method includes step S201 to step S202.

[0048] In step S201, an operand of a data interaction instruction is determined, and a second memory address is determined according to the operand.

[0049] The second memory address is a linear memory address allocated by the electronic device to the low-level bytecode format application.

[0050] In step S202, the second memory address is mapped to the first memory address through a preset address mapping relationship, and the first memory address included in the data interaction instruction is determined.

[0051] In the disclosed embodiment, the linear memory corresponding to the low-level word code format application is a continuous memory area, which is the main data storage area of ​​the low-level word code format application. The implementation method of the linear memory is: a continuous memory space is allocated in the memory through the low-level word code format virtual machine, and the continuous memory space is mapped to the linear memory address space of the low-level word code format application. There is a mapping relationship between the linear memory address and the physical memory address, and the low-level word code format application can access the data in the linear memory through the linear memory address. The present disclosure can parse the data interaction instructions issued by the low-level word code format application, determine the operands, operation types and operand types contained in the data interaction instructions, determine the linear memory address (second memory address) to be accessed by the low-level word code format application by calculating the operands, and determine the physical memory address (first memory address) to be accessed by the low-level word code format application according to the preset address mapping relationship.

[0052] It is understandable that in the related art, there are differences in the structures of low-level bytecode format applications and operating systems. The size of the linear memory allocated by the low-level word code format virtual machine to the low-level word code format application is specified when the low-level word code format module is loaded. The linear memory size is limited and the memory size cannot be adjusted dynamically. The memory model of the low-level word code format is designed based on security considerations, so the low-level bytecode format application cannot arbitrarily access addresses outside the linear memory. In the data interaction method proposed in the present disclosure, the low-level bytecode format application and the operating system of the electronic device have a special structure. When using the special structure for data interaction, the low-level bytecode format application can access addresses outside the linear memory pre-allocated for the low-level word code format application, and no security issues will arise. The following embodiments of the present disclosure further illustrate the interaction method between the low-level bytecode format application and the operating system of the electronic device.

[0053] In one implementation of the disclosed embodiment, the address mapping relationship is set based on the same structure between the operating system of the electronic device and the low-level bytecode format application, and the structure is used to unify the interaction structure between the low-level bytecode format application and the operating system.

[0054] In the disclosed embodiments, when the same structure is used in the compilation system in the low-level bytecode format application and the operating system, it is ensured that the structure has the same memory layout between the two, including the structure member types, arrangement order, alignment, padding bytes, and the total size of the structure. Among them, the members of the structure can have different data types, such as integers, floating-point numbers, characters, etc. Each member has its own data type, and the structure member type indicates the type of data that the structure can store. The member arrangement order of the structure refers to how the various members of the structure are stored in order in the memory. The arrangement order of the members may affect the layout of the structure in the memory.

[0055] In the disclosed embodiment, data exchange between the operating system and the low-level bytecode format application can be performed by defining the same structure in the operating system and the low-level bytecode format application, and direct memory access can be achieved through memory address pointers and offsets. It can also be performed by directly passing the structure as a function parameter or return value, so as to perform data exchange between the operating system and the low-level bytecode format application through function calls.

[0056] In the disclosed embodiment, based on the use of the same structure between the operating system of the electronic device and the low-level bytecode format application, data can be directly exchanged between the operating system and the low-level bytecode format application, thereby eliminating the process of data serialization and deserialization. The same structure is used between the low-level bytecode format application and the operating system of the electronic device. When the low-level bytecode format application and the operating system of the electronic device exchange data, unnecessary memory application and copying are avoided. The low-level bytecode format application can access addresses outside the linear memory pre-allocated for the low-level bytecode format application without causing security issues.

[0057] In the embodiment of the present disclosure, when the data interaction mode is the first mode (supporting a data interaction mode with an access range of any access range), it is mainly used to access complex data structures. When accessing general simple data structures, a data interaction mode different from the first mode can be used to access the physical memory of the operating system of the electronic device according to a preset access range threshold. The following embodiments of the present disclosure further illustrate the method for low-level bytecode format applications to access physical memory.

[0058] Figure 3 FIG. 1 is a flow chart showing a method for executing a data interaction instruction according to an exemplary embodiment. Figure 3 As shown, the method includes step S301 to step S302.

[0059] In step S301, a first memory address corresponding to a data interaction instruction is determined, and a data interaction mode between an operating system of an electronic device and an application in a low-level bytecode format is determined.

[0060] In step S302, in response to the data interaction mode being the second mode, the data interaction instruction is executed according to the size relationship between the access range corresponding to the first memory address and the access range threshold.

[0061] Among them, the second mode is a data interaction mode that supports an access range that is less than or equal to an access range threshold.

[0062] In the disclosed embodiment, the data interaction process can be executed according to the pre-set system memory address range that allows the low-level word code format application to directly access, and the real-time access range of the low-level word code format application during the data interaction process. When accessing a general simple data structure, the access range of the low-level word code format application is limited to a certain memory address range, thereby effectively protecting the memory security of the low-level word code format application and improving the performance and portability of the low-level word code format application.

[0063] The following embodiments of the present disclosure further illustrate the method for accessing physical memory by a low-level bytecode format application.

[0064] Figure 4 FIG. 1 is a flow chart of a method for executing a data interaction instruction according to another exemplary embodiment. Figure 4 As shown, the method includes step S401, step S402A and step S402B.

[0065] In step S401, a first memory address corresponding to a data interaction instruction is determined, and a data interaction mode between an operating system of an electronic device and an application in a low-level bytecode format is determined to be a second mode.

[0066] In step S402A, in response to the access range being less than or equal to the access range threshold, the data interaction instruction is executed.

[0067] In step S402B, in response to the access range being greater than the access range threshold, execution of the data interaction instruction is terminated.

[0068] In the disclosed embodiment, when accessing a general simple data structure, the access range of the low-level character code format application is limited to a certain memory address range, thereby effectively protecting the memory security of the low-level character code format application, while improving the performance and portability of the low-level character code format application. The data interaction process is executed according to the pre-set system memory address range that allows the low-level character code format application to directly access and the real-time access range of the low-level character code format application during the data interaction process: when the access range is less than or equal to the access range threshold, the data interaction instructions are executed normally, such as reading and writing data according to the read (load) and write (store) instructions. When the access range is greater than the access range threshold and the access range is out of bounds, the execution of the data interaction instructions is terminated, thereby preventing illegal access and ensuring security during the data interaction process.

[0069] In an exemplary embodiment of the present disclosure, a Wasm application running in a WebAssembly virtual machine interacts with an operating system of an electronic device, and the specific implementation steps are as follows:

[0070] 1. Initialize the WebAssembly virtual machine: Set two data interaction modes respectively. In the first interaction mode, set the system memory address range RA that allows the Wasm application to directly access into the virtual machine, and perform address legality checks during the interaction process according to the preset address range, that is, the system memory address range RA that allows the Wasm application to directly access. In the second interaction mode, set the entire memory to be accessible and turn off the address legality check.

[0071] 2. Instruction decoding: After the Wasm application issues a data interaction instruction, the WebAssembly virtual machine decodes the instruction to determine information such as the operation type, operands, and operand types of the instruction. Memory address calculation: The WebAssembly virtual machine calculates the address OFFSET in the linear memory according to the operands in the instruction.

[0072] 3. Memory access: According to the same structure of the low-level bytecode format application and the operating system of the electronic device, the physical memory address value is always converted into an offset value relative to the linear memory at the bottom layer of the Wasm application program, that is, PA = A + OFFSET, and data is read or written in the physical memory, where PA is the physical memory address and A is the starting address of the virtual machine's linear memory space.

[0073] 4. Exception handling: When using the first interaction mode, the WebAssembly virtual machine checks whether the memory access is out of bounds: when PA >= A and PA <= A + SA, it is confirmed that the address PA is within the legal access range set during the virtual machine initialization, that is, within the system memory address range RA that allows the low-level bytecode format application to directly access, then no exception is thrown, and the memory read and write instructions are executed in the normal program execution manner. When PA < A and / or PA > A + SA, it is confirmed that the physical memory address PA is not within the legal access range set during the virtual machine initialization, that is, within the system memory address range RA that allows the Wasm application to directly access, it is confirmed that an access out-of-bounds occurs, an exception is thrown, and the access program is terminated. Among them, the preset address range, that is, the system memory address range RA that allows the Wasm application to directly access = (A, SA), A is the starting address of the virtual machine's linear memory space, and SA is the ending address of the virtual machine's linear memory space: When using the first interaction mode, this step is completely skipped and the check operation is not performed.

[0074] 5. Instruction execution result: After the instruction execution is completed, the WebAssembly virtual machine stores the result in the operand stack for subsequent instructions to use.

[0075] In the disclosed embodiment, different data interaction modes are set for different data structures to be accessed by the low-level word code format application. When accessing complex data structures, the memory returned to the low-level word code format application is always returned as the offset between the physical memory address and the linear memory start space address of the low-level word code format virtual machine. The access range of the low-level word code format application is not monitored, and the data interaction instructions are directly executed, which effectively improves the running performance of the low-level bytecode format application, reduces the generation of operation codes during the data interaction process, reduces the program size of the low-level word code format application after being compiled by the precompiler, and reduces the code complexity. When accessing general simple data structures, the data interaction process is executed according to the pre-set system memory address range that allows the low-level word code format application to directly access and the real-time access range of the low-level word code format application during the data interaction process, so as to ensure the security of the data interaction process.

[0076] Based on the same concept, the embodiment of the present disclosure also provides a data interaction device 100.

[0077] It is understandable that the data interaction device 100 provided in the embodiment of the present disclosure includes hardware structures and / or software modules corresponding to the execution of each function in order to realize the above functions. In combination with the units and algorithm steps of each example disclosed in the embodiment of the present disclosure, the embodiment of the present disclosure can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art may use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the technical solution of the embodiment of the present disclosure.

[0078] Figure 5 is a block diagram of a data interaction device 100 according to an exemplary embodiment. Figure 5 , the device includes a determining unit 101 and an executing unit 102.

[0079] The determination unit 101 is used to obtain and parse the data interaction instruction issued by the low-level bytecode format application, determine the first memory address corresponding to the data interaction instruction, and determine the data interaction mode between the operating system of the electronic device and the low-level bytecode format application.

[0080] The first memory address is a physical memory address of the electronic device.

[0081] The execution unit 102 executes the data interaction instruction in response to the data interaction mode being the first mode and the access range corresponding to the first memory address being greater than the access range threshold.

[0082] Among them, the first mode is a data interaction mode that supports an access range of any access range.

[0083] In one embodiment, the determination unit 101 parses the data interaction instruction issued by the low-level bytecode format application in the following manner to determine the first memory address corresponding to the data interaction instruction: determine the operand of the data interaction instruction, and determine the second memory address according to the operand, the second memory address being the linear memory address allocated by the electronic device to the low-level bytecode format application. The second memory address is mapped to the first memory address through a preset address mapping relationship to determine the first memory address contained in the data interaction instruction.

[0084] In one implementation, the address mapping relationship is set based on the same structure between the operating system of the electronic device and the low-level bytecode format application, and the structure is used to unify the interaction structure between the low-level bytecode format application and the operating system.

[0085] In one embodiment, the execution unit 102 is also used to: in response to the data interaction mode being the second mode, execute the data interaction instruction according to the size relationship between the access range corresponding to the first memory address and the access range threshold, the second mode being a data interaction mode that supports an access range less than or equal to the access range threshold.

[0086] In one implementation, the execution unit 102 executes the data interaction instruction according to the size relationship between the access range corresponding to the first memory address and the access range threshold in the following manner: in response to the access range being less than or equal to the access range threshold, the data interaction instruction is executed. In response to the access range being greater than the access range threshold, the execution of the data interaction instruction is terminated.

[0087] Regarding the device in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

[0088] Figure 6 1 is a block diagram of a device 200 for data interaction according to an exemplary embodiment. The device 200 may be provided as the electronic device. For example, the device 200 may be a mobile phone, a computer, a digital broadcasting electronic device, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0089] Reference Figure 6 , the device 200 may include one or more of the following components: a processing component 202 , a memory 204 , a power component 206 , a multimedia component 208 , an audio component 210 , an input / output (I / O) interface 212 , a sensor component 214 , and a communication component 216 .

[0090] The processing component 202 generally controls the overall operation of the device 200, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component 202 may include one or more processors 220 to execute instructions to perform all or part of the steps of the above-described method. In addition, the processing component 202 may include one or more modules to facilitate interaction between the processing component 202 and other components. For example, the processing component 202 may include a multimedia module to facilitate interaction between the multimedia component 208 and the processing component 202.

[0091] The memory 204 is configured to store various types of data to support operations on the device 200. Examples of such data include instructions for any low-level bytecode format application or method operating on the device 200, contact data, phone book data, messages, pictures, videos, etc. The memory 204 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0092] The power component 206 provides power to the various components of the device 200. The power component 206 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the device 200.

[0093] The multimedia component 208 includes a screen that provides an output interface between the device 200 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 208 includes a front camera and / or a rear camera. When the device 200 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera may receive external multimedia data. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

[0094] The audio component 210 is configured to output and / or input audio signals. For example, the audio component 210 includes a microphone (MIC), and when the device 200 is in an operation mode, such as a call mode, a recording mode, and a speech recognition mode, the microphone is configured to receive an external audio signal. The received audio signal can be further stored in the memory 204 or sent via the communication component 216. In some embodiments, the audio component 210 also includes a speaker for outputting audio signals.

[0095] I / O interface 212 provides an interface between processing component 202 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include but are not limited to: a home button, a volume button, a start button, and a lock button.

[0096] The sensor assembly 214 includes one or more sensors for providing various aspects of the status assessment of the device 200. For example, the sensor assembly 214 can detect the open / closed state of the device 200, the relative positioning of components, such as the display and keypad of the device 200, the sensor assembly 214 can also detect the position change of the device 200 or a component of the device 200, the presence or absence of user contact with the device 200, the orientation or acceleration / deceleration of the device 200 and the temperature change of the device 200. The sensor assembly 214 can include a proximity sensor configured to detect the presence of a nearby object without any physical contact. The sensor assembly 214 can also include an optical sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 214 can also include an accelerometer, a gyroscope sensor, a magnetic sensor, a pressure sensor or a temperature sensor.

[0097] The communication component 216 is configured to facilitate wired or wireless communication between the device 200 and other devices. The device 200 can access a wireless network based on a communication standard, such as WiFi, 2G or 3G, or a combination thereof. In an exemplary embodiment, the communication component 216 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 216 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0098] In an exemplary embodiment, the apparatus 200 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors or other electronic components to perform the above method.

[0099] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 204 including instructions, and the instructions can be executed by the processor 220 of the device 200 to perform the above method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.

[0100] It is to be understood that in the present disclosure, "plurality" refers to two or more than two, and other quantifiers are similar. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. The singular forms "a", "the" and "the" are also intended to include plural forms, unless the context clearly indicates other meanings.

[0101] It is further understood that the terms "first", "second", etc. are used to describe various information, but such information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other, and do not indicate a specific order or degree of importance. In fact, the expressions "first", "second", etc. can be used interchangeably. For example, without departing from the scope of the present disclosure, the first information can also be referred to as the second information, and similarly, the second information can also be referred to as the first information.

[0102] It will be further understood that the terms “center”, “longitudinal”, “lateral”, “front”, “back”, “up”, “down”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inside”, “outside”, etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing the present embodiment and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation.

[0103] It can be further understood that, unless otherwise specified, “connection” includes a direct connection without other components between the two, and also includes an indirect connection with other components between the two.

[0104] It is further understood that, although the operations are described in a specific order in the drawings in the embodiments of the present disclosure, it should not be understood as requiring the operations to be performed in the specific order shown or in a serial order, or requiring the execution of all the operations shown to obtain the desired results. In certain environments, multitasking and parallel processing may be advantageous.

[0105] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. The present disclosure is intended to cover any variations, uses or adaptations of the present solution, which follow the general principles of the present disclosure and include common knowledge or customary technical means in the art that are not disclosed in the present disclosure.

[0106] It should be understood that the present disclosure is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the scope of the appended claims.

Claims

1. A data interaction method, characterized in that: include: Acquire and parse a data interaction instruction issued by a low-level bytecode format application, determine a first memory address corresponding to the data interaction instruction, and determine a data interaction mode between an operating system of an electronic device and the low-level bytecode format application, wherein the first memory address is a physical memory address of the electronic device; In response to the data interaction mode being the first mode and the access range corresponding to the first memory address being greater than an access range threshold, the data interaction instruction is executed, and the first mode is a data interaction mode that supports the access range being any access range.

2. The method according to claim 1, characterized in that The parsing of the low-level bytecode format application issuing a data interaction instruction and determining a first memory address corresponding to the data interaction instruction includes: Determine an operand of the data interaction instruction, and determine a second memory address according to the operand, wherein the second memory address is a linear memory address allocated by the electronic device to the low-level bytecode format application; The second memory address is mapped to the first memory address through a preset address mapping relationship, and the first memory address included in the data interaction instruction is determined.

3. The method according to claim 2, characterized in that The address mapping relationship is set based on the same structure between the operating system of the electronic device and the low-level bytecode format application, and the structure is used to unify the interaction structure between the low-level bytecode format application and the operating system.

4. The method according to claim 1, characterized in that: The method further comprises: In response to the data interaction mode being the second mode, the data interaction instruction is executed according to the size relationship between the access range corresponding to the first memory address and the access range threshold, and the second mode is a data interaction mode that supports the access range being less than or equal to the access range threshold.

5. The method according to claim 4, characterized in that The executing the data interaction instruction according to the size relationship between the access range corresponding to the first memory address and the access range threshold includes: In response to the access range being less than or equal to the access range threshold, executing the data interaction instruction; In response to the access range being greater than the access range threshold, terminating execution of the data interaction instruction.

6. A data interaction device, characterized in that: include: a determining unit, configured to obtain and parse a data interaction instruction issued by a low-level bytecode format application, determine a first memory address corresponding to the data interaction instruction, and determine a data interaction mode between an operating system of an electronic device and the low-level bytecode format application, wherein the first memory address is a physical memory address of the electronic device; An execution unit is used to execute the data interaction instruction in response to the data interaction mode being a first mode and the access range corresponding to the first memory address being greater than an access range threshold, wherein the first mode is a data interaction mode that supports the access range being any access range.

7. The device according to claim 6, characterized in that The determining unit parses the data interaction instruction issued by the low-level bytecode format application and determines the first memory address corresponding to the data interaction instruction in the following manner: Determine an operand of the data interaction instruction, and determine a second memory address according to the operand, wherein the second memory address is a linear memory address allocated by the electronic device to the low-level bytecode format application; The second memory address is mapped to the first memory address through a preset address mapping relationship, and the first memory address included in the data interaction instruction is determined.

8. The device according to claim 7, characterized in that The address mapping relationship is set based on the same structure between the operating system of the electronic device and the low-level bytecode format application, and the structure is used to unify the interaction structure between the low-level bytecode format application and the operating system.

9. The device according to claim 6, characterized in that The execution unit is also used for: In response to the data interaction mode being the second mode, the data interaction instruction is executed according to the size relationship between the access range corresponding to the first memory address and the access range threshold, and the second mode is a data interaction mode that supports the access range being less than or equal to the access range threshold.

10. The device according to claim 9, characterized in that The execution unit executes the data interaction instruction according to the size relationship between the access range corresponding to the first memory address and the access range threshold in the following manner: In response to the access range being less than or equal to the access range threshold, executing the data interaction instruction; In response to the access range being greater than the access range threshold, terminating execution of the data interaction instruction.

11. A data interaction device, characterized in that: include: processor: a memory for storing processor-executable instructions; Wherein, the processor is configured to: execute the data interaction method according to any one of claims 1 to 5.

12. A storage medium, characterized in that: The storage medium stores instructions, and when the instructions in the storage medium are executed by a processor, the processor is enabled to execute the data interaction method according to any one of claims 1 to 5.

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