Fault test method and device, electronic equipment and storage medium
By simulating the data space layout of the automotive electronic control unit and generating and injecting fault data, the problem of data loss in the ECU when the power is out is solved, and the efficiency and accuracy of fault detection are improved.
Patent Information
- Application Number
- CN202411693710.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-25
- Publication Date
- 2025-03-11
AI Technical Summary
During the development of automotive electronic system, the automotive electronic control unit (ECU) may cause data loss or damage to the memory chip when an unexpected power outage is performed, and direct failure injection test is time-consuming and costly.
By obtaining the configuration information of the target electronic control unit and various fault injection methods, it simulates its data spatial layout, generates the target fault data, and injects it into the virtual data layout unit to generate a fault injection file, and finally configures the file to the target electronic control unit for fault detection processing.
This method improves the efficiency and stability of fault injection and fault detection, avoids data corruption caused by direct injection of faults, and enhances the safety and accuracy of tests.
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Figure CN119597661A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of automotive electronic systems, and in particular to a fault testing method, device, electronic equipment and storage medium. Background Art
[0002] In the field of automotive electronic system development, AUTomotive Open System ARchitecture (AUTOSAR) is an open standard architecture that aims to provide a standardized method to build automotive electronic control units (ECUs). The storage protocol stack in the AUTOSAR architecture (such as NvM, Non-Volatile Memory Manager) is responsible for the secure storage and efficient access services of key parameters during system runtime. Although the automotive open system architecture AUTOSAR has built-in multiple protection mechanisms to ensure data integrity and security, it still faces the risk of random power outages during the development, testing or production of vehicles, which may damage the data in the ECU storage module and make the data of the electronic control unit ECU unrecoverable.
[0003] When a vehicle experiences an unexpected power outage, even a brief power outage can cause a series of problems. Minor cases can lead to the loss of user configuration information, while serious cases can even damage the ECU's storage chip and make it impossible to restore normal functions. In addition, since the design of the ECU storage module is complex and usually highly closed, directly performing fault injection testing on it is not only time-consuming and labor-intensive, but also costly. Summary of the invention
[0004] The present application provides a fault testing method, device, electronic device and storage medium to at least solve the problems in the related art such as how to improve the efficiency and stability of fault injection and fault detection. The technical solution of the present application is as follows:
[0005] According to a first aspect of an embodiment of the present application, a fault testing method is provided, including:
[0006] Obtain configuration information corresponding to the target electronic control unit and corresponding multiple fault injection methods;
[0007] According to the configuration information, simulating the data space layout of the target electronic control unit to obtain a virtual data layout unit corresponding to the target electronic control unit;
[0008] generating target fault data according to at least one fault injection method among the multiple fault injection methods;
[0009] Injecting the target fault data into the virtual data layout unit to obtain a fault injection file;
[0010] The fault injection file is configured to the target electronic control unit, and a fault detection process is performed on the target electronic control unit.
[0011] According to a second aspect of an embodiment of the present application, a fault testing device is provided, including:
[0012] An information acquisition module, used to acquire configuration information corresponding to a target electronic control unit and corresponding multiple fault injection methods;
[0013] A data layout unit generation module, used to simulate the data space layout of the target electronic control unit according to the configuration information, and obtain a virtual data layout unit corresponding to the target electronic control unit;
[0014] a target fault data generating module, generating target fault data according to at least one fault injection method among the multiple fault injection methods;
[0015] A fault injection module, used for injecting the target fault data into the virtual data layout unit to obtain a fault injection file;
[0016] The fault detection module is used to configure the fault injection file to the target electronic control unit and perform fault detection processing on the target electronic control unit.
[0017] According to a third aspect of an embodiment of the present application, an electronic device is provided, comprising: a processor; and a memory for storing instructions executable by the processor; wherein the processor is configured to execute the instructions to implement a method as described in any one of the above-mentioned first aspects.
[0018] According to a fourth aspect of an embodiment of the present application, a computer-readable storage medium is provided. When instructions in the computer-readable storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute any method described in the first aspect of the embodiment of the present application.
[0019] According to a fifth aspect of an embodiment of the present application, a computer program product is provided, comprising computer instructions, which, when executed by a processor, enable a computer to execute any one of the methods described in the first aspect of the embodiment of the present application.
[0020] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application.
[0021] The technical solution provided by the embodiments of the present application brings at least the following beneficial effects:
[0022] By simulating the data space layout of the target electronic control unit, a virtual data layout unit corresponding to the target electronic control unit is obtained, and then the target fault data is injected into the virtual data layout unit to obtain a fault injection file, which can avoid directly injecting the fault into the target electronic control unit and causing data damage, thereby improving the safety of the test process;
[0023] Furthermore, by acquiring multiple fault injection modes corresponding to the target electronic control unit and generating target fault data according to at least one fault injection mode among the multiple fault injection modes, multiple fault conditions in the target electronic control unit can be simulated, thereby improving the flexibility of fault detection;
[0024] Then, the fault injection file is configured to the target electronic control unit, and the target electronic control unit is subjected to fault detection processing, thereby improving the accuracy and stability of the fault test on the target electronic control unit.
[0025] Other features and aspects of the present application will become apparent from the following detailed description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] In order to more clearly illustrate the technical solutions and advantages of the embodiments of this specification or the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0027] Figure 1 The figure is a flow chart showing a fault testing method according to an exemplary embodiment.
[0028] Figure 2 The figure is a flow chart of a fault injection method according to an exemplary embodiment.
[0029] Figure 3 The figure is a flow chart of a fault detection and repair method according to an exemplary embodiment.
[0030] Figure 4 It is a block diagram of a fault testing device according to an exemplary embodiment.
[0031] Figure 5 A frame of an electronic device for fault testing according to an exemplary embodiment is shown Figure 1 .
[0032] Figure 6 A frame of an electronic device for fault testing according to an exemplary embodiment is shown Figure 2 . DETAILED DESCRIPTION
[0033] In order to enable ordinary persons in the art to better understand the technical solutions of the present application, the technical solutions in the embodiments of the present application specification will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application specification. Obviously, the described embodiments are only part of the embodiments of the specification, not all of the embodiments. Based on the embodiments in the present specification, all other embodiments obtained by ordinary persons in the art without creative work are within the scope of protection of the present invention.
[0034] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product, or server that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products, or devices.
[0035] Various exemplary embodiments, features and aspects of the present application will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.
[0036] The word "exemplary" used exclusively herein means "serving as an example, embodiment or illustrative". Any embodiment described herein as "exemplary" is not necessarily to be construed as being superior or better than other embodiments. The term "and / or" herein is merely a description of an association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may represent the following three situations: A exists alone, A and B exist at the same time, and B exists alone. In addition, the term "at least one" herein represents any combination of at least two of any one or more of a plurality of types. For example, including at least one of A, B, and C may represent any one or more elements selected from the set consisting of A, B, and C.
[0037] Unless otherwise specified, the directions in this document should be understood as follows: the direction closer to the user is the front, and the direction away from the user is the rear.
[0038] In addition, in order to better illustrate the present application, numerous specific details are given in the specific embodiments below. Those skilled in the art should understand that the present application can also be implemented without certain specific details. In some instances, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the subject matter of the present application. It should be noted that a possible sequence of steps is shown in the following figure, and it is not actually limited to strictly follow this sequence. Some steps can be executed in parallel without relying on each other. The user information (including but not limited to user device information, user personal information, user behavior information, etc.) and data (including but not limited to data for display, training data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties.
[0039] This application is based on the automotive open system architecture AUTOSAR, and simulates various fault conditions of the vehicle electronic control unit ECU during the automobile development process to perform fault testing on the vehicle electronic control unit ECU. The automotive open system architecture AUTOSAR is an open standard designed for automotive electronic systems, dedicated to improving software reusability and interoperability. The AUTOSAR storage protocol stack involves multiple modules, such as Flash EEPROM Emulation (Flash EEPROM Emulation, FEE) and non-volatile memory (Non-Volatile Memory, NVM), which are used to manage non-volatile memories in vehicle electronic control units (Electronic Control Unit, ECU), such as Flash memories.
[0040] Figure 1 FIG. 1 is a flow chart of a fault testing method according to an exemplary embodiment. Figure 1 As shown, the following steps may be included.
[0041] In step S101 , configuration information corresponding to a target electronic control unit and corresponding multiple fault injection modes are obtained.
[0042] In the embodiments of this specification, the target electronic control unit may refer to any vehicle (Target Electronic Control Unit, ECU), which is a microcontroller or microprocessor system used to control various functions inside the vehicle. For example, the engine management system, brake system, airbag control, etc. may all be managed by a dedicated ECU.
[0043] Configuration information may refer to characteristic information describing the target electronic control unit ECU, and may include physical hardware information, data storage model and storage requirement information, which is not limited in this application.
[0044] Among them, the physical hardware information mainly includes the characteristic parameters of the memory, etc. Among them, the physical characteristic parameters may include the minimum erase and programming unit: each chip may have a different minimum erase unit or minimum programming unit, which affects the operation granularity of the memory; the number of erase and write times limit: the number of erase and write times allowed for each chip is different, and the test plan needs to consider how to simulate and evaluate these restrictions; data protection and integrity check: the chip may have different hardware-level data protection and integrity check mechanisms, which affect the security and reliability of the stored data. This application does not limit the content of the physical hardware information.
[0045] The data storage model may refer to the layout, alignment, dependencies and address requirements of the software data model. Among them, the layout of the software data model may refer to the organization of the software data structure in the target electronic control unit ECU, including the definition of data types, the order of data members, etc., which is not limited in this application. Alignment refers to the arrangement of data in memory to meet the hardware read and write requirements of the target electronic control unit (ECU). For example, vehicle processor A may require that data of type B must be located at the target memory address (such as a double word boundary). Dependencies may refer to how the various modules in the target electronic control unit interact with each other; address requirements may refer to the requirements that software components may have on memory addresses in the target electronic control unit, such as fixed address segments, memory protection attributes, etc., which are not limited in this application.
[0046] The storage requirement information may include storage capacity, data partition, user-specified non-volatile storage NVM, user-configured FEE, etc., which is not limited in this application.
[0047] The fault injection method may refer to a method used to simulate the injection of faults into the target electronic control unit ECU. The fault injection method may include a random data destruction method, a specified location data destruction method, a simulated erasure number exhaustion method, and an abnormal data access simulation method, etc., which are not limited in this application.
[0048] The random data destruction method may refer to randomly selecting a data block or page of the memory of the target electronic control unit during operation and modifying its content to verify the data integrity detection and recovery mechanism of the storage protocol stack.
[0049] The designated location data destruction method may refer to destroying a target area or a key data block to test the data protection and recovery capabilities of the storage protocol stack for the target area.
[0050] The simulated erasure times exhaustion method may refer to continuous simulation of erasure operations to reach the erasure times limit of the memory, so as to evaluate the erasure management strategy and data block recovery mechanism of the FEE.
[0051] The abnormal data access simulation mode may refer to simulating illegal data access, for example, access beyond the memory boundary of the target electronic control unit ECU or access to uninitialized data, to verify the error detection and abnormality handling mechanism of the non-volatile storage NVM.
[0052] In a possible implementation, configuration information is obtained from a target electronic control unit of a target vehicle. After the corresponding configuration information is determined, a fault injection method in the target electronic control unit can be further obtained according to user input. There are differences in the design, functional characteristics, and manufacturing standards of the memory of different electronic control units ECU, and the corresponding fault injection methods are also different.
[0053] In step S103, the data space layout of the target electronic control unit is simulated according to the configuration information to obtain a virtual data layout unit corresponding to the target electronic control unit.
[0054] In the embodiment of the present specification, the virtual data layout unit may refer to a simulated data space layout of a target electronic control unit, that is, a virtual electronic control unit corresponding to the target electronic control unit.
[0055] In one possible implementation, the hardware environment of the target electronic control unit can be determined based on the physical hardware information; the system data information and the data storage format of the target electronic control unit can be determined based on the data storage model; the storage data corresponding to the storage area in the target electronic control unit can be determined based on the storage requirement information; and the data space layout of the target electronic control unit can be simulated based on the hardware environment, the system data information, the data storage format and the storage data to obtain a virtual data layout unit corresponding to the target electronic control unit.
[0056] like Figure 2 As shown, according to the hardware model, hardware interface, input / output port, etc. included in the physical hardware information of the target electronic control unit, the hardware environment of the target electronic control unit ECU can be determined. Then, according to the layout, alignment, dependency, and address requirements of the software data model in the data storage model, the system data information of the target electronic control unit ECU and the data storage format corresponding to the system data information are determined. Furthermore, according to the storage capacity, data partition, user-specified non-volatile storage NVM, and user-configured FEE in the storage requirement information, the storage data corresponding to the storage area in the target electronic control unit is determined.
[0057] Furthermore, according to the hardware environment, system data information, data storage format and storage data of the target electronic control unit, the data space layout corresponding to the target electronic control unit can be simulated to obtain a virtual data layout unit corresponding to the target electronic control unit.
[0058] Specifically, according to the requirements of various components in the target electronic control unit, including various systems, middleware, applications and data storage areas in the vehicle, the storage area corresponding to the target electronic control unit is configured to ensure that the data is organized, accessed and stored in the manner in the target electronic control unit. Further, the data layout space corresponding to the target electronic control unit can be simulated to obtain a virtual data layout unit corresponding to the target electronic control unit. According to the above content, it is determined that the layout of the virtual data layout unit is the same as the data layout space of the target electronic control unit. Then, fault injection can be performed on the virtual data layout space to avoid direct fault injection into the vehicle electronic control unit.
[0059] In step S105 , target fault data is generated according to at least one fault injection method among a plurality of fault injection methods.
[0060] In the embodiments of the present specification, target fault data may refer to faults generated according to at least one fault injection method among multiple fault injection methods, and is used to simulate fault conditions that may be encountered by a target electronic control unit.
[0061] In a possible implementation, after obtaining multiple fault injection methods corresponding to the target electronic control unit, at least one fault injection method can be randomly selected from the multiple fault injection methods or determined according to actual user needs. For example, if the user is uncertain about the fault handling after a brake system fault occurs, the position of the brake system can be destroyed according to the specified position data destruction method, thereby verifying whether the fault detection mechanism in the target electronic control unit is complete.
[0062] When the fault injection method is randomly selected as a random data destruction method, the position in the virtual data layout unit can be randomly selected. For example, taking the brake system in the target electronic control unit as an example, the data block of the brake system is randomly selected, and the characteristics or samples of the data block of the brake system can be set as missing values, that is, the data of some data blocks of the brake system are taken out, and the target fault data is generated according to the corresponding content of the missing value.
[0063] Alternatively, extreme or erroneous values in the data block of the braking system are simulated, that is, a part of the features of the data block of the braking system is selected, and the feature values of the corresponding features are replaced with abnormal values, such as maximum values, minimum values or random noise values; and the corresponding target fault data is generated according to the abnormal values after the feature values are replaced.
[0064] Alternatively, the data blocks of the braking system are subjected to repeated value insertion, sequence destruction, etc., which are not limited in this application, and then the corresponding target fault data is generated based on the destroyed data. Accordingly, the random data destruction method can generate the target fault according to at least one of the above-mentioned destruction rules.
[0065] When the randomly selected fault injection method is a designated location data destruction method, data destruction can be performed at a pre-set location according to user needs, and corresponding target fault data can be generated based on the destroyed data.
[0066] When the fault injection method is to simulate the exhaustion of the erase and write times, based on the preset erase and write times of the target electronic control unit, the corresponding algorithm can simulate that the erase and write times reach or exceed the preset erase and write times, set the corresponding preset erase and write times according to the specifications of the memory, and design the corresponding counter. When the counter reaches this value, a fault is simulated and the corresponding target fault data is generated.
[0067] When the fault injection mode is an abnormal data access simulation mode, illegal data access, such as access beyond the memory boundary or uninitialized data, is simulated, and corresponding target fault data is generated according to the access data.
[0068] The present application may be combined with one or more fault injection methods among multiple fault injection methods (including random data destruction method, designated location data destruction method, simulated erasure times exhaustion method, abnormal data access simulation method, etc.), and the present application does not limit the number of fault injection methods. For example, the corresponding target fault data is generated by combining the designated location data destruction method and the simulated erasure times exhaustion method, and the present application does not limit this.
[0069] In step S107 , the target fault data is injected into the virtual data layout unit to obtain a fault injection file.
[0070] In the embodiment of this specification, the fault injection file may refer to a file used to record fault data in the virtual data layout unit.
[0071] In a possible implementation, a target area corresponding to target fault data in a virtual data layout unit is determined; the target fault data is injected into the target area, and data information after the target fault data is injected into the target area is obtained; and the data information is packaged into a file to obtain a fault injection file.
[0072] According to the virtual data layout unit and the target fault data, the data storage area that may be affected by the fault is found. The data storage area is determined as the target area. Then, through the corresponding fault injection program, the simulated target fault data is injected into the predetermined target area. Furthermore, the collected data information is sorted and packaged to form a complete fault injection file.
[0073] Exemplarily, the fault injection method is a designated location data destruction method, the target area is the area storing the brake system, and the target fault data is the destruction of the vehicle brake pedal position sensor data. At this point, the target area corresponding to the vehicle brake system has been determined, and the target fault data is injected into the target area storing the vehicle brake system through the fault injection program. After the target fault data is injected into the target location, the real-time status, log information, etc. of the vehicle brake system are obtained, and all the data information of the target location obtained is packaged into a fault injection file.
[0074] In step S109, the fault injection file is configured to the target electronic control unit, and a fault detection process is performed on the target electronic control unit.
[0075] In a possible implementation, since the data space layout in the virtual data layout unit is the same as that of the target electronic control unit, the fault injection file is written into the target electronic control unit through the corresponding software simulation injection or physical device. Specifically, software simulation injection can be an adaptation and modification of the driver layer in the target electronic control unit. After the adaptation and modification, the driver layer reads the fault injection file; physical device injection can directly use the physical device to write the fault injection file to the storage area corresponding to the target electronic control unit. The present application does not limit the injection method. Preferably, the present application can use software simulation injection to directly adapt and modify the driver layer in the target electronic control unit, which can reduce the frequency of use of physical devices, reduce the cost of use, and improve debugging efficiency. Furthermore, after the fault injection is completed, the target electronic control unit is immediately subjected to fault detection processing.
[0076] Figure 3 FIG. 1 is a flow chart of a fault detection and repair method according to an exemplary embodiment. Figure 3 As shown, a fault detection process is performed on the target electronic control unit to obtain a first fault detection result; when the first fault detection result indicates that there is first fault data in the target electronic control unit and the first fault data matches the target fault data, a fault repair process is performed on the target electronic control unit according to the first fault data.
[0077] In the embodiment of this specification, the first fault detection result may refer to a result obtained by detecting through a fault detection mechanism.
[0078] Wherein, after the target electronic control unit is run, the fault detection mechanism is started, the fault detection mechanism reads the data of the target electronic control unit, and checks whether there is an abnormal situation. After the fault detection mechanism completes the fault detection, the corresponding first fault detection result is obtained. The first fault detection result is analyzed and processed, and the first fault detection result is analyzed to indicate that there is a first fault data in the target electronic control unit, wherein the first fault data may refer to data that does not conform to the normal working state of the target electronic control unit, such as abnormal communication data, erroneous sensor data, etc., which is not limited in this application. When the first fault data is obtained, the first fault data is matched. When the first fault data matches the target fault data, it indicates that the fault detection mechanism can correctly detect the target fault information, that is, the fault injection is successful. Then, according to the first fault data, the target electronic control unit is subjected to fault repair processing.
[0079] In one possible implementation, when the first fault data is repaired, the target electronic control unit is re-detected to obtain a second fault detection result; when the second fault detection result indicates that the target electronic control unit does not have any fault data, it is determined that the fault repair is successful.
[0080] In the embodiment of this specification, the second fault detection result may refer to the result of the second detection of the target electronic control unit.
[0081] When the first fault data is repaired, the fault detection mechanism will re-detect the target electronic control unit and generate a second fault detection result. The second fault detection result is used to determine whether there are other problems in the system. If it is detected that the target electronic control unit can operate normally and the data is consistent with the factory data, it means that there is no fault data in the target electronic control unit. The target electronic control system determines that the fault repair is successful, which further indicates that the target electronic control unit of the target vehicle can accurately process the injected fault data.
[0082] In another possible implementation, if the second fault detection result indicates that other faults exist in the target electronic control unit, it means that there is an abnormality in the fault detection mechanism. At this time, the fault detection mechanism needs to be adjusted according to the initial state of the target electronic control unit.
[0083] In one possible implementation, when a first fault detection result indicates that the first fault data does not match the target fault data, an abnormal analysis is performed on the fault detection mechanism in the target electronic control unit to obtain a detection mechanism analysis result; the fault detection mechanism is used to detect faults in the target electronic control unit; when the detection mechanism analysis result indicates that the fault detection mechanism has an abnormality, the fault detection mechanism is adjusted according to the target fault data.
[0084] When the first fault detection result indicates that the detected first fault data and the target fault data do not match, that is, the fault detection mechanism may have problems or be inaccurate. At this time, the fault detection mechanism is subjected to abnormal analysis and processing to obtain the detection mechanism analysis result. The detection mechanism analysis result is used to describe the health status of the fault detection mechanism and to determine whether the fault detection mechanism needs to be adjusted. If the detection mechanism analysis result indicates that there is a problem with the fault detection mechanism itself (for example, the detection algorithm is wrong, the parameter setting is unreasonable, the fault repair method is single, etc., and this application does not limit the problem of the fault detection mechanism), at this time, according to the injected target fault data and the corresponding fault injection method, the fault detection mechanism is adjusted (the adjustment process may involve the correction and update of the fault detection algorithm, etc.) to ensure that after the subsequent vehicle goes online, the fault can be identified in time and the corresponding fault processing can be performed.
[0085] Figure 4 FIG. 1 is a block diagram of a fault testing device according to an exemplary embodiment. Figure 4 , the device may include:
[0086] An information acquisition module 401 is used to acquire configuration information corresponding to a target electronic control unit and corresponding multiple fault injection methods;
[0087] The data layout unit generation module 403 is used to simulate the data space layout of the target electronic control unit according to the configuration information to obtain a virtual data layout unit corresponding to the target electronic control unit;
[0088] In a possible implementation, the data layout unit generation module 405 includes:
[0089] A hardware environment determination module, used to determine the hardware environment of the target electronic control unit according to the physical hardware information;
[0090] A system data information determination module, used to determine the system data information and data storage format of the target electronic control unit according to the data storage model;
[0091] A storage data determination module, used to determine storage data corresponding to a storage area in a target electronic control unit according to storage demand information;
[0092] The layout simulation module is used to simulate the data space layout of the target electronic control unit according to the hardware environment, system data information, data storage format and storage data, and obtain a virtual data layout unit corresponding to the target electronic control unit.
[0093] A target fault data generating module 405 generates target fault data according to at least one fault injection method among multiple fault injection methods;
[0094] A fault injection module 407, used to inject target fault data into the virtual data layout unit to obtain a fault injection file;
[0095] In a possible implementation, the fault injection module 407 includes:
[0096] A target region determination module, used to determine a target region corresponding to target fault data in a virtual data layout unit;
[0097] A data information acquisition module, used to inject target fault data into the target area and acquire data information after the target fault data is injected into the target area;
[0098] The file packaging module is used to package the data information into files to obtain a fault injection file.
[0099] The fault detection module 409 is used to configure the fault injection file to the target electronic control unit and perform fault detection processing on the target electronic control unit.
[0100] In a possible implementation, the fault testing device further includes:
[0101] A first fault detection result determination module, used for performing fault detection processing on a target electronic control unit to obtain a first fault detection result;
[0102] The matching module is used to perform fault repair processing on the target electronic control unit according to the first fault data when the first fault detection result indicates that the target electronic control unit has the first fault data and the first fault data matches the target fault data.
[0103] In a possible implementation, the fault testing device further includes:
[0104] A second fault detection result determination module is used to re-perform fault detection processing on the target electronic control unit to obtain a second fault detection result when the first fault data is repaired;
[0105] The fault repair module is used to determine that the fault repair is successful when the second fault detection result indicates that the target electronic control unit does not have any fault data.
[0106] In a possible implementation, the fault testing device further includes:
[0107] a detection and analysis module, configured to perform abnormal analysis on a fault detection mechanism in a target electronic control unit to obtain a detection mechanism analysis result when a first fault detection result indicates that the first fault data does not match the target fault data; the fault detection mechanism is configured to detect a fault in the target electronic control unit;
[0108] The fault adjustment module is used to adjust the fault detection mechanism according to the target fault data when the detection mechanism analysis result indicates that the fault detection mechanism is abnormal.
[0109] Regarding the device in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.
[0110] Figure 5 is a block diagram of an electronic device for fault testing according to an exemplary embodiment. The electronic device may be a terminal, and its internal structure diagram may be as shown in FIG. Figure 5 As shown. The electronic device includes a processor, a memory, a network interface, a display screen and an input device connected through a system bus. Among them, the processor of the electronic device is used to provide computing and control capabilities. The memory of the electronic device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the electronic device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a method for fault testing is implemented. The display screen of the electronic device can be a liquid crystal display screen or an electronic ink display screen, and the input device of the electronic device can be a touch layer covering the display screen, or a key, trackball or touchpad set on the housing of the electronic device, or an external keyboard, touchpad or mouse, etc.
[0111] Those skilled in the art will understand that Figure 5 The structure shown in the figure is merely a block diagram of a partial structure related to the scheme of the present application, and does not constitute a limitation on the electronic device to which the scheme of the present application is applied. The specific electronic device may include more or fewer components than shown in the figure, or combine certain components, or have a different arrangement of components.
[0112] Figure 6 is a block diagram of an electronic device for fault testing according to an exemplary embodiment. The electronic device may be a server, and its internal structure diagram may be as shown in FIG. Figure 6As shown. The electronic device includes a processor, a memory and a network interface connected through a system bus. Among them, the processor of the electronic device is used to provide computing and control capabilities. The memory of the electronic device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the electronic device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a fault testing method is implemented.
[0113] Those skilled in the art will understand that Figure 6 The structure shown in the figure is merely a block diagram of a partial structure related to the scheme of the present application, and does not constitute a limitation on the electronic device to which the scheme of the present application is applied. The specific electronic device may include more or fewer components than shown in the figure, or combine certain components, or have a different arrangement of components.
[0114] In an exemplary embodiment, an electronic device is also provided, comprising: a processor; and a memory for storing instructions executable by the processor; wherein the processor is configured to execute the instructions to implement the fault testing method as in the embodiment of the present application.
[0115] In an exemplary embodiment, a computer-readable storage medium is also provided, and when the instructions in the computer-readable storage medium are executed by a processor of an electronic device, the electronic device is enabled to perform the fault testing method in the embodiment of the present application. The computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc.
[0116] In an exemplary embodiment, a computer program product including instructions is also provided. When the computer program product is run on a computer, the computer is enabled to execute the fault testing method in the embodiment of the present application.
[0117] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing related hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.
[0118] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the following claims.
[0119] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.
Claims
1. A fault testing method, characterized in that: Applied to the AUTOSAR storage protocol stack, the method includes: Obtain configuration information corresponding to the target electronic control unit and corresponding multiple fault injection methods; According to the configuration information, simulating the data space layout of the target electronic control unit to obtain a virtual data layout unit corresponding to the target electronic control unit; generating target fault data according to at least one fault injection method among the multiple fault injection methods; Injecting the target fault data into the virtual data layout unit to obtain a fault injection file; The fault injection file is configured to the target electronic control unit, and a fault detection process is performed on the target electronic control unit.
2. The fault testing method according to claim 1, characterized in that: Injecting the target fault data into the virtual data layout unit to obtain a fault injection file includes: Determine a target area corresponding to the target fault data in the virtual data layout unit; Injecting the target fault data into the target area, and acquiring data information after the target fault data is injected into the target area; The data information is packaged into a file to obtain the fault injection file.
3. The fault testing method according to claim 1, characterized in that: The configuration information includes physical hardware information, data storage model and storage requirement information of the target electronic control unit; the data space layout of the target electronic control unit is simulated according to the configuration information to obtain a virtual data layout unit corresponding to the target electronic control unit, including: Determining the hardware environment of the target electronic control unit according to the physical hardware information; Determining system data information and data storage format of the target electronic control unit according to the data storage model; Determining storage data corresponding to a storage area in the target electronic control unit according to the storage requirement information; The data space layout of the target electronic control unit is simulated according to the hardware environment, the system data information, the data storage format and the stored data, so as to obtain the virtual data layout unit corresponding to the target electronic control unit.
4. The fault testing method according to claim 1, characterized in that: The method further comprises: Performing fault detection processing on the target electronic control unit to obtain a first fault detection result; When the first fault detection result indicates that first fault data exists in the target electronic control unit and the first fault data matches the target fault data, a fault repair process is performed on the target electronic control unit according to the first fault data.
5. The fault testing method according to claim 4, characterized in that: The method further comprises: When the first fault data is repaired, re-performing fault detection processing on the target electronic control unit to obtain a second fault detection result; When the second fault detection result indicates that the target electronic control unit does not have any fault data, it is determined that the fault repair is successful.
6. The fault testing method according to claim 4, characterized in that: The method further comprises: When the first fault detection result indicates that the first fault data does not match the target fault data, performing abnormal analysis processing on the fault detection mechanism in the target electronic control unit to obtain a detection mechanism analysis result; the fault detection mechanism is used to detect a fault in the target electronic control unit; When the detection mechanism analysis result indicates that the fault detection mechanism is abnormal, the fault detection mechanism is adjusted according to the target fault data.
7. A fault testing device, characterized in that: include: An information acquisition module, used to acquire configuration information corresponding to a target electronic control unit and corresponding multiple fault injection methods; A data layout unit generation module, used to simulate the data space layout of the target electronic control unit according to the configuration information, and obtain a virtual data layout unit corresponding to the target electronic control unit; a target fault data generating module, generating target fault data according to at least one fault injection method among the multiple fault injection methods; A fault injection module, used for injecting the target fault data into the virtual data layout unit to obtain a fault injection file; The fault detection module is used to configure the fault injection file to the target electronic control unit and perform fault detection processing on the target electronic control unit.
8. An electronic device, characterized in that: include: processor; a memory for storing instructions executable by the processor; The processor is configured to execute the instructions to implement the fault testing method according to any one of claims 1 to 6.
9. A computer-readable storage medium, characterized in that: When the instructions in the computer-readable storage medium are executed by a processor of an electronic device, the electronic device is enabled to perform the fault testing method according to any one of claims 1 to 6.
10. A computer program product comprising computer instructions, characterized in that: When the computer instructions are executed by a processor, the fault testing method according to any one of claims 1 to 6 is implemented.