Driving method of display panel

Abstract

The invention discloses a driving method of a display panel. The display panel comprises a pixel driving circuit, and the pixel driving circuit comprises a light-emitting device. One-frame display time of the display panel comprises a writing frame stage and one or more holding frame stages, the display panel writes and displays a picture in the writing frame stage, and the display panel displays the picture in the holding frame stage. The driving method comprises the following steps: when a light-emitting control signal is a first level, controlling the light-emitting device to be turned off; and when the light-emitting control signal is at the second level, the light-emitting device is controlled to be switched on. Wherein the duration of the first level of the light-emitting control signal in the write-in frame stage is a first duration, the duration of the first level of the light-emitting control signal in the at least one holding frame stage is a second duration, and the first duration is different from the second duration. According to the embodiment of the invention, the degree superposition of a plurality of bright bands which are projected by penetrating through the lower part of the bright strip can be avoided.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a method for driving a display panel. Background Art

[0002] With the development of display technology, users have higher and higher requirements for the display effect of display panels. In order to improve the display effect of low grayscale images, related technologies add a through bright bar at the top of the low grayscale image. Since the light-emitting device in the pixel driving circuit will affect the current change when it enters the bright bar area during the non-light-emitting stage, the load of the high-potential signal will change, affecting the writing of the next frame of the image, resulting in multiple bright bands projected below the through bright bar. Summary of the invention

[0003] The embodiment of the present application provides a method for driving a display panel, wherein the display panel includes a pixel driving circuit, and the pixel driving circuit includes a light-emitting device; a frame display time of the display panel includes a frame writing phase and one or more frame holding phases, in which the display panel writes and displays a picture in the frame writing phase, and in which the display panel displays the picture in the frame holding phase;

[0004] The driving method comprises:

[0005] When the light emitting control signal is at a first level, controlling the light emitting device to be turned off; and

[0006] When the light emitting control signal is at a second level, controlling the light emitting device to be turned on;

[0007] Among them, the duration of the first level of the light-emitting control signal in the writing frame stage is a first duration, and the duration of the first level of the light-emitting control signal in at least one of the holding frame stages is a second duration, and the first duration is different from the second duration.

[0008] The beneficial effects provided by the embodiments of the present application include at least:

[0009] In the driving method provided in the embodiment of the present application, at least one of the turn-off durations of the light-emitting device in the maintaining frame stage is different from the turn-off durations of the light-emitting device in the writing frame stage, so that when the light-emitting device enters the bright bar area during the turn-off time, the degree of influence on the current is different, and the influence on the load of the high-voltage signal is also different, thereby avoiding the superposition of multiple bright bands projected through the bottom of the bright bar. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 is a schematic diagram of a pixel driving circuit;

[0011] Figure 2 It is a schematic diagram of the driving timing;

[0012] Figure 3 This is another schematic diagram of the drive timing;

[0013] Figure 4 is a flow chart of a method for driving a display panel provided in an embodiment of the present application;

[0014] Figure 5 is a schematic diagram of a driving timing provided by an embodiment of the present application;

[0015] Figure 6 is a schematic diagram of another driving timing provided by an embodiment of the present application;

[0016] Figure 7 This is a schematic diagram of the bright band formation process;

[0017] Figure 8 It is a schematic diagram of the relationship between the voltage change value of a high potential signal and the duration of the high level of a light emitting control signal. DETAILED DESCRIPTION

[0018] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. The described technical solutions are only used to explain and illustrate the ideas of the present application and should not be regarded as limiting the scope of protection of the present application.

[0019] In addition, the "plurality" in the embodiments of the present application refers to two or more. The "first" and "second" in the embodiments of the present application are used to distinguish different technical features, and do not indicate any order, quantity or importance.

[0020] The various embodiments provided in this application are similar, and features in different embodiments may be combined with each other.

[0021] The order of description of the following embodiments is not intended to limit the preferred order of the embodiments.

[0022] See also Figure 1 , Figure 1 The present invention is a schematic diagram of a pixel driving circuit. The pixel driving circuit may include a driving transistor T1, a switching transistor T2, a compensation transistor T3, a first reset transistor T4, a first light-emitting control transistor T5, a second light-emitting control transistor T6, a second reset transistor T7, a third reset transistor T8, a storage capacitor Cst, a boost capacitor Cboost, and a light-emitting device.

[0023] The driving transistor T1 includes a first electrode connected to the first node A, a second electrode connected to the second node B, and a control electrode connected to the third node Q. The switching transistor T2 includes a first electrode connected to the data signal DATA, a second electrode connected to the first node A, and a control electrode connected to the first scan control signal PSCAN. The compensation transistor T3 includes a first electrode connected to the second node B, a second electrode connected to the third node Q, and a control electrode connected to the second scan control signal NSCAN_T3. The first reset transistor T4 includes a first electrode connected to the first reset signal Vi_G, a second electrode connected to the third node Q, and a control electrode connected to the third scan control signal NSCAN_T4. The first light-emitting control transistor T5 includes a first electrode connected to the high potential signal VDD, a second electrode connected to the first node A, and a control electrode connected to the light-emitting control signal EM. The second light-emitting control transistor T6 includes a first electrode connected to the second node B, a second electrode connected to the fourth node C, and a control electrode connected to the light-emitting control signal EM. The second reset transistor T7 includes a first electrode connected to the second reset signal VI_ANO, a second electrode connected to the fourth node C, and a control electrode connected to the fourth scan control signal PSCAN2. The third reset transistor T8 includes a first electrode connected to the third reset signal VI_T8, a second electrode connected to the first node A, and a control electrode connected to the fourth scan control signal PSCAN2. The storage capacitor Cst includes an end connected to the high potential signal and the other end connected to the third node Q. The boost capacitor Cboost includes an end connected to the first scan control signal PSCAN and the other end connected to the third node Q. The light emitting device includes an anode end connected to the fourth node C and a cathode end connected to the low potential signal VSS.

[0024] In some embodiments, the control electrode may be a gate electrode, the first electrode may be one of a source electrode and a drain electrode, and the second electrode may be the other of the source electrode and the drain electrode.

[0025] It should be understood that Figure 1 In the example, the switch transistor T2, the driving transistor T1, the second reset transistor T7, the third reset transistor T8, the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are P-type thin film transistors (PTFT), and the compensation transistor T3 and the first reset transistor T4 are N-type thin film transistors (NTFT), but this does not constitute a limitation on the embodiments of the present application. In actual applications, each transistor can be arbitrarily set to an N-type thin film transistor or a P-type thin film transistor in accordance with the driving timing.

[0026] See also Figure 2 , Figure 2It is a schematic diagram of the driving timing. Figure 2 The drive timing shown can be used to drive Figure 1 The corresponding devices in the pixel driving circuit shown.

[0027] like Figure 2 As shown, one frame of picture display time may include one writing frame stage and two holding frame stages. In the writing frame stage, the picture may be written and displayed, and in the holding frame stage, the picture may be displayed. In other words, in the holding frame stage, no new picture needs to be written, but the picture written in the writing frame stage is displayed.

[0028] like Figure 2 As shown, one level cycle of the light emitting control signal EM corresponds to a writing frame stage or a holding frame stage, and one level cycle of the light emitting control signal EM includes a high level duration and a low level duration. If the light emitting control signal EM is at a high level, the first light emitting control transistor T5 and the second light emitting control transistor T6 are turned off, and the light emitting device does not emit light. If the light emitting control signal EM is at a low level, the first light emitting control transistor T5 and the second light emitting control transistor T6 are turned on, and the current flowing through the driving transistor T1 can pass through the second node B and the fourth node C, thereby driving the light emitting device to emit light.

[0029] like Figure 2 As shown, during the high level duration of the light emitting control signal EM, the first scanning control signal PSCAN can be at a low level for a period of time to control the switching transistor T2 to be turned on, so that the data signal DATA can be written into the third node Q. Figure 2 As shown, during the high level duration of the light emitting control signal EM, the fourth scanning control signal PSCAN2 can be at a low level for a period of time to control the second reset transistor T7 to be turned on, thereby resetting the fourth node C. Since the fourth node C is connected to the anode terminal of the light emitting device, resetting the fourth node C is also resetting the anode terminal of the light emitting device.

[0030] Generally, for the writing frame stage, during the high level duration of the light emitting control signal EM, the first scanning control signal PSCAN is set low before the fourth scanning control signal PSCAN2. That is, for the writing frame stage, after the data signal DATA is written into the third node Q, the fourth node C is reset, and then the light emitting device is driven to emit light. For the holding frame stage, after resetting the fourth node C, the light emitting device is driven to emit light.

[0031] See also Figure 3 , Figure 3 This is another schematic diagram of the drive timing. Figure 3 The drive timing shown can be used to drive Figure 1 The corresponding devices in the pixel driving circuit shown.

[0032] Figure 3 Example and Figure 2 The difference between the embodiments is that Figure 2 In the embodiment, the display time of one frame includes one writing frame phase and two holding frame phases. Figure 3 In the embodiment, the display time of one frame includes a writing frame phase and a holding frame phase. Figure 3 For an introduction to each signal in the embodiment, see Figure 2 The embodiments are not described in detail here.

[0033] See also Figure 4 , Figure 4 1 is a flow chart of a method for driving a display panel provided by an embodiment of the present application. The display panel includes a pixel driving circuit, and the pixel driving circuit includes a light emitting device. For example, the pixel driving circuit can be as follows: Figure 1 As shown. The display panel's one-frame display time includes a writing frame phase and one or more holding frame phases. In the writing frame phase, the display panel writes and displays the picture, and in the holding frame phase, the display panel displays the picture. Figure 4 As shown, the driving method may include the following steps:

[0034] Step 410: When the light emitting control signal is at the first level, the light emitting device is controlled to be turned off;

[0035] Step 420: When the light-emitting control signal is at the second level, the light-emitting device is controlled to be turned on.

[0036] In the embodiment of the present application, the pixel driving circuit includes a first light-emitting control transistor T5, a second light-emitting control transistor T6 and a light-emitting device. The first light-emitting control transistor T5 includes a first electrode connected to a high potential signal VDD, a second electrode connected to a first node A, and a control electrode connected to a light-emitting control signal EM. The second light-emitting control transistor T6 includes a first electrode connected to a second node B, a second electrode connected to a fourth node C, and a control electrode connected to a light-emitting control signal EM. The light-emitting device includes an anode terminal connected to the fourth node C and a cathode terminal connected to a low potential signal VSS. The first light-emitting control transistor T5 and the second light-emitting control transistor T6 are turned on or off according to the light-emitting control signal EM. When the light-emitting control signal EM is at a first level, the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are turned off, so that the high potential signal VDD cannot flow into the fourth node C, and the light-emitting device is turned off and does not emit light; when the light-emitting control signal EM is at a second level, the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are turned on, so that the high potential signal VDD can flow through the first node A, the second node B and the fourth node C, and the light-emitting device is turned on to emit light. Therefore, the above step 410 may include: when the light-emitting control signal EM is at the first level, controlling the first light-emitting control transistor T5 and the second light-emitting control transistor T6 to be turned off; the above step 420 may include: when the light-emitting control signal EM is at the second level, controlling the first light-emitting control transistor T5 and the second light-emitting control transistor T6 to be turned on.

[0037] When the first light emission control transistor T5 and the second light emission control transistor T6 are both P-type thin film transistors, the first level of the light emission control signal EM is a high level, and the second level of the light emission control signal EM is a low level. When the first light emission control transistor T5 and the second light emission control transistor T6 are both N-type thin film transistors, the first level of the light emission control signal EM is a low level, and the second level of the light emission control signal EM is a high level.

[0038] In the embodiment of the present application, the duration of the first level of the light emitting control signal EM in the writing frame stage is the first duration, and the duration of the first level of the light emitting control signal EM in at least one holding frame stage is the second duration, and the first duration is different from the second duration. Since the light emitting device is turned off when the light emitting control signal EM is at the first level, the off duration of the light emitting device in the writing frame stage is different from the off duration of the light emitting device in the holding frame stage.

[0039] In some embodiments, the second duration is less than the first duration. That is, the duration of the first level of the light-emitting control signal EM in the frame-holding stage is less than the duration of the first level of the light-emitting control signal EM in the frame-writing stage, so that the off-time of the light-emitting device in the frame-holding stage is less than the off-time of the light-emitting device in the frame-writing stage. The embodiment of the present application reduces the off-time of the light-emitting device in the frame-holding stage. Optionally, the second duration is less than or equal to half of the first duration. That is, the off-time of the light-emitting device in the frame-holding stage is less than or equal to half of the off-time of the light-emitting device in the frame-writing stage. The embodiment of the present application reduces the off-time of the light-emitting device in the frame-holding stage by at least half. Taking the first duration as 60H as an example, that is, the duration of the first level of the light emitting control signal EM in the writing frame stage is 60H, and the off time of the light emitting device in the writing frame stage is 60H, then the second duration is less than or equal to 30H, that is, the duration of the first level of the light emitting control signal EM in the holding frame stage is less than or equal to 30H, and the off time of the light emitting device in the holding frame stage is less than or equal to 30H. Among them, 1H represents the charging time of one row of pixels on the screen.

[0040] In some embodiments, the duration of the second level of the light emitting control signal EM in the writing frame stage is the third duration, and the duration of the second level of the light emitting control signal EM in at least one holding frame stage is the fourth duration, and the third duration is different from the fourth duration. Since the light emitting device is turned on when the light emitting control signal EM is the second level, the turn-on duration of the light emitting device in the writing frame stage is different from the turn-on duration of the light emitting device in the holding frame stage. Optionally, the sum of the first duration and the third duration in the writing frame stage is equal to the sum of the second duration and the fourth duration in a holding frame stage. Since the first duration and the second duration are both the durations of the first level of the light emitting control signal EM, the third duration and the fourth duration are both the durations of the second level of the light emitting control signal EM, and one level cycle of the light emitting control signal EM corresponds to one writing frame stage or one holding frame stage, the duration of one writing frame stage and the duration of one holding frame stage in the embodiment of the present application are the same. The embodiment of the present application increases the on-time of the light-emitting device in the frame holding stage while reducing the off-time of the light-emitting device in the frame holding stage.

[0041] In some embodiments, the duration of the second level of the light emitting control signal EM in the writing frame stage is a third duration, and the duration of the second level of the light emitting control signal EM in at least one holding frame stage is a fourth duration, and the third duration is the same as the fourth duration. Since the light emitting device is turned on when the light emitting control signal EM is at the second level, the turn-on duration of the light emitting device in the writing frame stage and the turn-on duration of the light emitting device in the holding frame stage may also be the same. The embodiment of the present application may also only reduce the turn-off duration of the light emitting device in the holding frame stage, while maintaining the turn-on duration of the light emitting device in the holding frame stage unchanged.

[0042] For the case where one frame display time includes multiple holding frame stages, compared with the writing frame stage, the embodiment of the present application can reduce the duration of the first level of the light-emitting control signal EM in each holding frame stage, thereby reducing the off-time of the light-emitting device in each holding frame stage; or, the duration of the first level of the light-emitting control signal EM in part of the holding frame stages can be reduced, thereby reducing the off-time of the light-emitting device in this part of the holding frame stages, and the off-time of the light-emitting device in other holding frame stages can be consistent with the off-time of the light-emitting device in the writing frame stage.

[0043] In some embodiments, one frame display time of the display panel includes one writing frame stage and at least two holding frame stages; the duration of the first level of the light emitting control signal in each holding frame stage is the second duration. That is, the duration of the first level of the light emitting control signal EM in each holding frame stage can be reduced, thereby reducing the turn-off time of the light emitting device in each holding frame stage.

[0044] In some embodiments, one frame display time of the display panel includes one writing frame stage and at least two holding frame stages; the duration of the first level of the light emitting control signal in the first holding frame stage is the second duration. The first holding frame stage is a holding frame stage adjacent to the writing frame stage. That is, the duration of the first level of the light emitting control signal EM in the holding frame stage adjacent to the writing frame stage can be reduced, thereby reducing the turn-off time of the light emitting device in the holding frame stage adjacent to the writing frame stage.

[0045] Based on the scheme of "the duration of the first level of the light control signal EM in the first holding frame stage is the second duration", the duration of the first level of the light control signal EM in the second holding frame stage may be equal to the duration of the first level of the light control signal EM in the writing frame stage, or may be different from the duration of the first level of the light control signal EM in the writing frame stage, which is not limited in the embodiment of the present application. The second holding frame stage is a holding frame stage that is not adjacent to the writing frame stage.

[0046] In some embodiments, one frame display time of the display panel includes one writing frame stage and at least two holding frame stages; the duration of the first level of the light emitting control signal in the second holding frame stage is the second duration. The second holding frame stage is a holding frame stage that is not adjacent to the writing frame stage. That is, the duration of the first level of the light emitting control signal EM in the holding frame stage that is not adjacent to the writing frame stage can be reduced, thereby reducing the turn-off time of the light emitting device in the holding frame stage that is not adjacent to the writing frame stage.

[0047] Based on the scheme of "the duration of the first level of the light control signal EM in the second holding frame stage is the second duration", the duration of the first level of the light control signal EM in the first holding frame stage may be equal to the duration of the first level of the light control signal EM in the writing frame stage, or may be different from the duration of the first level of the light control signal EM in the writing frame stage, which is not limited in the embodiment of the present application. The first holding frame stage is a holding frame stage adjacent to the writing frame stage.

[0048] In some embodiments, the driving method further includes: resetting the anode end of the light emitting device in a first time period of the writing frame stage; resetting the anode end of the light emitting device in a second time period of at least one holding frame stage; wherein, the start time of the first time period and the start time of the writing frame stage are separated by a first interval time, and the start time of the second time period and the start time of the corresponding holding frame stage are separated by a second interval time, and the first interval time is different from the second interval time. In order to ensure that the anode end reset operation is performed within the off time of the light emitting device and avoid affecting the conduction and light emission of the light emitting device, the embodiment of the present application adjusts the off time of the light emitting device in at least one holding frame stage while also adaptively adjusting the anode end reset time of the light emitting device in at least one holding frame stage. Optionally, the first time period is within the duration of the first level of the light emitting control signal in the writing frame stage, and the second time period is within the duration of the first level of the light emitting control signal in the corresponding holding frame stage.

[0049] In some embodiments, the second duration is shorter than the first duration; the second interval is shorter than the first interval. That is, when the off time of the light emitting device is reduced in at least one holding frame stage, the anode terminal reset time of the light emitting device needs to be adaptively moved forward.

[0050] In summary, in the driving method provided by the embodiment of the present application, the off-time of the light-emitting device in at least one holding frame stage is different from the off-time of the light-emitting device in the writing frame stage, so that the degree of influence on the current when the light-emitting device turns off and enters the bright bar area is different, and the load influence on the high-voltage signal is also different, so as to avoid the superposition of the degree of multiple bright bands projected below the bright bar. Moreover, in the embodiment of the present application, the off-time of the light-emitting device in at least one holding frame stage is less than the off-time of the light-emitting device in the writing frame stage, that is, the embodiment of the present application reduces the off-time of the light-emitting device in at least one holding frame stage, so as to reduce the influence on the current when the light-emitting device turns off and enters the bright bar area, and also reduces the load change of the high-voltage signal, thereby reducing the degree of multiple bright bands projected below the bright bar, and improving the display effect of the display panel.

[0051] The driving method provided in the embodiment of the present application is introduced and explained below in combination with several driving timing examples.

[0052] See also Figure 5 and Figure 6 , Figure 5 and Figure 6 They are respectively schematic diagrams of a driving timing provided in an embodiment of the present application. Figure 5 and Figure 6 The drive timing shown can be used to drive Figure 1 The corresponding devices in the pixel driving circuit shown.

[0053] like Figure 5 and Figure 6 As shown, the display time of one frame of the display panel may include a writing frame stage and one or more holding frame stages. The picture can be written and displayed in the writing frame stage, and the picture can be displayed in the holding frame stage. One level cycle of the light-emitting control signal EM corresponds to one writing frame stage or one holding frame stage, and one level cycle of the light-emitting control signal EM includes a high level duration and a low level duration. Taking the first light-emitting control transistor T5 and the second light-emitting control transistor T6 as P-type thin film transistors as an example, if the light-emitting control signal EM is at a high level, the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are turned off, and the light-emitting device is turned off and does not emit light; if the light-emitting control signal EM is at a low level, the first light-emitting control transistor T5 and the second light-emitting control transistor T6 are turned on, and the light-emitting device is turned on and emits light.

[0054] Take the switch transistor T2 as a P-type thin film transistor as an example. Figure 5 and Figure 6As shown, in the writing frame stage, within the high level duration of the light emitting control signal EM, the first scanning control signal PSCAN can maintain a low level for a period of time to control the switching transistor T2 to be turned on, so that the data signal DATA can be written into the third node Q.

[0055] Taking the second reset transistor T7 as a P-type thin film transistor as an example, Figure 5 and Figure 6 As shown, in the writing frame stage and the holding frame stage, during the high level duration of the light emitting control signal EM, the fourth scanning control signal PSCAN2 can be respectively at a low level for a period of time to control the second reset transistor T7 to be turned on, so as to reset the anode end of the light emitting device. For the writing frame stage, during the high level duration of the light emitting control signal EM, the first scanning control signal PSCAN can be set low before the fourth scanning control signal PSCAN2; that is, for the writing frame stage, after the data signal DATA is written to the third node Q, the fourth node C is reset, and then the light emitting device is driven to emit light.

[0056] like Figure 5 As shown, one frame display time includes one writing frame stage and two holding frame stages. Compared with the writing frame stage, the duration of the high level of the light-emitting control signal EM in each holding frame stage can be shortened, thereby shortening the off time of the light-emitting device. At the same time, the duration of the low level of the light-emitting control signal EM in each holding frame stage is extended, thereby extending the light-emitting time of the light-emitting device. Among them, the off time of the light-emitting device can be shortened by at least one-half. That is, the duration of the high level of the light-emitting control signal EM in the writing frame stage is the first duration, and the duration of the high level of the light-emitting control signal EM in the holding frame stage is the second duration, and the second duration is less than or equal to one-half of the first duration.

[0057] like Figure 6 As shown, one frame display time includes a writing frame stage and a holding frame stage. Compared with the writing frame stage, the duration of the high level of the light emitting device EM in the holding frame stage can be shortened, thereby shortening the off time of the light emitting device. At the same time, the duration of the low level of the light emitting control signal EM in the holding frame stage is extended, thereby extending the light emitting time of the light emitting device.

[0058] like Figure 5 and Figure 6 As shown, for the holding frame phase in which the turn-off time of the light emitting device is adjusted, the anode terminal reset time of the light emitting device is also correspondingly moved forward to ensure that the anode terminal of the light emitting device is reset within the turn-off time of the light emitting device.

[0059] like Figure 7As shown, when the light emitting device enters the bright strip area 710 during the off time, the load of the high potential signal VDD changes, causing the voltage of the high potential signal VDD to increase, and the area lights up to form a bright strip. Figure 8 As shown in FIG. 1 , as the duration of the high level of the light emitting control signal EM is shortened, the load variation of the high potential signal VDD is gradually reduced, thereby reducing the voltage variation of the high potential signal VDD. Figure 8 As shown in the figure, when the duration of the high level of the light emitting control signal EM is shortened from 60H (60 unit time) to 30H (30 unit time), the load change of the high potential signal VDD is reduced, and the voltage change value of the high potential signal VDD is reduced from 4mv (millivolt) to 1mv. It can be seen that as the duration of the high level of the light emitting control signal EM is shortened, the voltage rise of the high potential signal VDD will be reduced, thereby reducing the brightness of the area, reducing the degree of the bright band, and improving the display effect.

[0060] The specific implementation methods and corresponding beneficial effects of the above operations can be found in the above detailed description of the pixel driving circuit, driving timing and display panel driving method, which will not be elaborated here.

[0061] The above is a detailed introduction to a display panel driving method provided in an embodiment of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A method for driving a display panel, characterized in that: The display panel comprises a pixel driving circuit, and the pixel driving circuit comprises a light-emitting device; a frame display time of the display panel comprises a frame writing phase and one or more frame holding phases, in which the display panel writes and displays a picture in the frame writing phase, and in which the display panel displays the picture in the frame holding phase; The driving method comprises: When the light emitting control signal is at a first level, controlling the light emitting device to be turned off; and When the light emitting control signal is at a second level, controlling the light emitting device to be turned on; Among them, the duration of the first level of the light-emitting control signal in the writing frame stage is a first duration, and the duration of the first level of the light-emitting control signal in at least one of the holding frame stages is a second duration, and the first duration is different from the second duration.

2. The driving method according to claim 1, characterized in that: The second duration is shorter than the first duration.

3. The driving method according to claim 2, characterized in that: The second duration is less than or equal to half of the first duration.

4. The driving method according to claim 1, characterized in that: The duration of the second level of the light-emitting control signal in the write frame stage is the third duration, and the duration of the second level of the light-emitting control signal in at least one of the hold frame stages is the fourth duration, and the third duration is different from the fourth duration.

5. The driving method according to claim 4, characterized in that: The sum of the first duration and the third duration in the write frame phase is equal to the sum of the second duration and the fourth duration in one of the hold frame phases.

6. The driving method according to claim 1, characterized in that: The duration of the second level of the light-emitting control signal in the write frame stage is the third duration, and the duration of the second level of the light-emitting control signal in at least one of the hold frame stages is the fourth duration, and the third duration is the same as the fourth duration.

7. The driving method according to claim 1, characterized in that: One frame display time of the display panel includes one frame writing phase and at least two frame holding phases; In each of the holding frame stages, the duration of the first level of the light emitting control signal is the second duration.

8. The driving method according to claim 1, characterized in that: One frame display time of the display panel includes one frame writing phase and at least two frame holding phases; In the first holding frame stage, the duration of the first level of the light emitting control signal is the second duration; The first holding frame phase is the holding frame phase adjacent to the writing frame phase.

9. The driving method according to claim 1, characterized in that: One frame display time of the display panel includes one frame writing phase and at least two frame holding phases; In the second holding frame stage, the duration of the first level of the light emitting control signal is the second duration; The second holding frame phase is the holding frame phase that is not adjacent to the writing frame phase.

10. The driving method according to claim 1, characterized in that: The method further comprises: Resetting the anode terminal of the light emitting device within a first time period of the writing frame phase; Resetting the anode terminal of the light emitting device in a second time period of at least one of the holding frame phases; Among them, there is a first interval between the starting time of the first time period and the starting time of the writing frame phase, and there is a second interval between the starting time of the second time period and the corresponding starting time of the keeping frame phase, and the first interval is different from the second interval.

11. The driving method according to claim 10, characterized in that: The first time period is within the duration of the first level of the light emitting control signal in the writing frame phase, and the second time period is within the duration of the first level of the light emitting control signal in the corresponding holding frame phase.

12. The driving method according to claim 11, characterized in that: The second duration is shorter than the first duration; and the second interval is shorter than the first interval.

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