Improved single-phase phase-locked loop based on generalized second-order integral and wave trap

Abstract

The invention relates to the technical field of single-phase phase-locked loops, and discloses an improved single-phase phase-locked loop based on a generalized second-order integral and a wave trap, which comprises a phase discriminator, the wave trap, a loop filter and a voltage-controlled oscillator which are electrically connected in series in sequence, the input end of the phase discriminator is connected with a power grid voltage sampling signal, and the phase discriminator processes the power grid voltage sampling signal to obtain an error voltage signal; the phase discriminator inputs the error voltage signal into a wave trap for processing to obtain a voltage signal; the wave trap inputs the voltage signal into a loop filter for processing to obtain a control voltage signal; the loop filter inputs the control voltage signal into the voltage-controlled oscillator to obtain a phase-locked loop output signal; and the voltage-controlled oscillator inputs the phase-locked loop output signal into the phase discriminator. The improved phase-locked loop provided by the invention can effectively solve the problem of large phase locking error under low sampling frequency, improves the performance and stability of the system, and avoids the problems of large error and insufficient precision of the existing phase-locked loop.

Description

Technical Field

[0001] The invention relates to the technical field of single-phase phase-locked loops, and in particular to an improved single-phase phase-locked loop based on generalized second-order integration and a notch filter. Background Art

[0002] As energy and environmental issues become increasingly prominent, more and more new energy distributed generation grid-connected inverters are connected to the power grid. As the key interface between distributed generation sub-units and the large power grid, the grid-connected inverter plays an important role in converting the DC power generated by various renewable energy sources into high-quality AC power that can be fed into the public power grid. For grid-connected inverters, the grid synchronization method is an important part of its control, protection and monitoring. It can quickly and accurately obtain the frequency and phase of the grid voltage at the point of common coupling (PCC) and provide a reference for the grid current. Among the many grid synchronization methods, the phase-locked loop (PLL) has been widely used due to its simple structure, fast synchronization speed and high tracking accuracy.

[0003] Among the existing phase-locked loop technologies, the phase-locked loop based on the dq synchronous rotating coordinate system (Synchronous Reference Frame PLL, SRF-PLL) has been widely used in power grid systems because of its advantages such as fast dynamic response and easy software implementation. Its characteristics are that the three-phase voltage is first transformed by Clark to obtain u in the two-phase stationary coordinate system. α and u β , and then through Park transformation, we get the voltage u in the synchronous rotating coordinate system d and u q , with u q = 0 is the control target to achieve the phase-locking function. In the single-phase grid-connected system, since there is only one voltage phasor, the coordinate system cannot be directly transformed, and it is difficult to achieve a synchronous rotating coordinate system. In order to solve this problem, the usual practice is to use an orthogonal signal generator to generate a voltage phasor with equal amplitude and orthogonal to the input voltage, thereby completing the rotating coordinate system transformation.

[0004] At present, there are many schemes for generating orthogonal signals, such as delay method, all-pass filter (APF), Hilbert transform method, differentiation method, second-order generalized integrator (SOGI), etc. Among them, the second-order generalized integrator has a simple structure, certain filtering performance, and higher precision. It is more suitable for constructing two-phase virtual orthogonal signals and is widely used in single-phase phase-locked loops.

[0005] The current generalized second-order integral based phase-locked loop (SOGI-PLL) usually requires a higher sampling frequency to obtain a two-phase completely orthogonal virtual signal. However, it is often difficult to achieve a sampling frequency of tens of K in actual engineering. At low sampling frequencies, existing phase-locked loops have problems such as large errors and insufficient precision, which have a negative impact on the performance and stability of the system. Therefore, we propose an improved single-phase phase-locked loop based on generalized second-order integral and notch filter (SOGI-Notch), which aims to solve the problem of large phase-locked error at low sampling frequencies. This innovative improvement scheme is expected to bring important improvements and improvements to the application of traditional phase-locked loops at low sampling frequencies, and make positive contributions to the technological development of related fields. Summary of the invention

[0006] The present invention aims to at least make up for the technical problem that, at a low sampling frequency, the existing phase-locked loop has large errors and insufficient precision, which has a negative impact on the performance and stability of the system.

[0007] To this end, an object of the present invention is to provide an improved single-phase phase-locked loop based on a generalized second-order integral and a notch filter, comprising a phase detector, a notch filter, a loop filter and a voltage-controlled oscillator which are electrically connected in series in sequence;

[0008] The input end of the phase detector is connected to the grid voltage sampling signal u g (t), the phase detector processes the grid voltage sampling signal to obtain an error voltage signal u i (t); The phase detector inputs the error voltage signal into the notch filter for processing to obtain a voltage signal u d (t); The notch filter inputs the voltage signal into the loop filter for processing to obtain a control voltage signal u c (t); The loop filter inputs the control voltage signal into the voltage-controlled oscillator to obtain a phase-locked loop output signal u o (t); The voltage-controlled oscillator inputs the phase-locked loop output signal into the phase detector.

[0009] Furthermore, the phase detector includes a second-order generalized integrator and a Park transformation module connected to the output end of the second-order generalized integrator; the input grid voltage sampling signal is passed through the second-order generalized integrator to obtain a two-phase orthogonal signal, and then the voltage in the dq synchronous rotating coordinate system is obtained through the Park transformation module, and the error voltage signal is generated through the voltage in the dq synchronous rotating coordinate system.

[0010] Furthermore, the transfer function of the second-order generalized integrator is expressed as follows:

[0011]

[0012] Where: D(s) is the bandpass filter transfer function; Q(s) is the lowpass filter transfer function; ω′ is the frequency estimate of the phase-locked loop; k is the filter gain coefficient; s is the complex frequency variable; u α and u β are the components on the α-axis and β-axis of the stationary coordinate system respectively; u g is the grid voltage;

[0013] The calculation formula of the grid voltage is:

[0014] u g =U m cosθ′

[0015] Where, θ′ is the angle between the grid voltage sampling signal and the α-axis of the stationary coordinate system; U m is the amplitude of the input voltage.

[0016] Furthermore, the calculation formula of the Park transformation module is as follows:

[0017]

[0018] Where, θ is the output phase of the voltage-controlled oscillator; u d and u q They are the components on the d-axis and q-axis of the dq synchronous rotating coordinate system respectively.

[0019] Furthermore, the calculation formulas for the components on the α-axis and β-axis of the stationary coordinate system are:

[0020] u α =U m cosθ′

[0021] u β =U m sinθ′

[0022] The calculation formula of the component on the q axis of the dq synchronous rotating coordinate system is:

[0023] u q =U m sinθ′cosθ-U m cosθ′sinθ=U m sin(θ′-θ)

[0024] sin(θ′-θ)≈θ′-θ.

[0025] Furthermore, the transfer function of the notch filter is:

[0026]

[0027]

[0028] Where: k1 is the first notch coefficient, k2 is the second notch coefficient; ω n is the notch bandwidth in rad / s; Y is the input signal; X is the output signal; n is an integer representing the time index of the sample; T s Represents the time interval between samples during the discretization process.

[0029] Furthermore, the loop filter is implemented by a PI controller, and the PI controller includes a proportional link k p and integral link k i , the transfer function of the PI controller can be expressed as:

[0030]

[0031] Where s is the complex frequency variable and G is the transfer function of the PI controller.

[0032] Furthermore, the voltage-controlled oscillator includes an adder and an integrator electrically connected to the adder, the frequency estimation value of the phase-locked loop is obtained by the adder, and the output phase of the voltage-controlled oscillator is obtained by the integrator.

[0033] The improved single-phase phase-locked loop based on generalized second-order integration and notch filter of the present invention has the following beneficial effects:

[0034] The present invention adopts the structure of generalized second-order integration and three-parameter notch filter, including a phase detector, a notch filter, a loop filter and a voltage-controlled oscillator which are electrically connected in series in sequence. By setting the notch filter, the negative sequence component generated by the second-order generalized integrator due to insufficient sampling frequency can be filtered out. The improved phase-locked loop provided by the present invention can effectively solve the problem of large phase-locked error under low sampling frequency, improve the performance and stability of the system, and avoid the problems of large error and insufficient precision of the existing phase-locked loop. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0036] Figure 1 It is a structural schematic diagram of an improved single-phase phase-locked loop based on generalized second-order integration and notch filter of the present invention;

[0037] Figure 2 The present invention is a phase detector structure diagram of an improved single-phase phase-locked loop based on generalized second-order integration and a notch filter;

[0038] Figure 3 A model diagram based on generalized second-order integral and notch filter of the present invention;

[0039] Figure 4 (a is the phase-locked result of the traditional phase-locked loop at a sampling frequency of 2k;

[0040] Figure 4 (b) is the phase-locked result of the improved single-phase phase-locked loop at a sampling frequency of 2k;

[0041] Figure 5 (a) is the phase-locked result of the traditional phase-locked loop at a sampling frequency of 1k;

[0042] Figure 5 (b) in the figure is the phase-locked result of the improved single-phase phase-locked loop at a sampling frequency of 1k. DETAILED DESCRIPTION

[0043] Various aspects and features of the present invention are described herein with reference to the accompanying drawings.

[0044] It should be understood that various modifications may be made to the embodiments of the present application. Therefore, the above description should not be considered as limiting, but only as an example of the embodiments. Other modifications within the scope and spirit of the present invention will occur to those skilled in the art.

[0045] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the invention and, together with the general description of the invention given above and the detailed description of the embodiments given below, serve to explain the principles of the invention.

[0046] These and other characteristics of the invention will become apparent from the following description of a preferred form of embodiment given as a non-limiting example, with reference to the accompanying drawings.

[0047] It should also be understood that, although the invention has been described with reference to some specific examples, those skilled in the art will be able to realize many other equivalent forms of the invention that have the characteristics recited in the claims and are therefore within the scope of protection defined thereby.

[0048] The above and other aspects, features and advantages of the present invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.

[0049] Specific embodiments of the present invention are described hereinafter with reference to the accompanying drawings; however, it should be understood that the embodiments claimed are merely examples of the present invention, which may be implemented in a variety of ways. Well-known and / or repeated functions and structures are not described in detail to avoid obscuring the present invention with unnecessary or redundant details. Therefore, the specific structural and functional details claimed herein are not intended to be limiting, but merely serve as a basis and representative basis for the claims to teach those skilled in the art to use the present invention in a variety of ways with substantially any suitable detailed structure.

[0050] In the description of the present invention, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0051] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

[0052] Example

[0053] like Figure 1 , Figure 2 and Figure 3 As shown, this embodiment provides an improved single-phase phase-locked loop based on a generalized second-order integral and a notch filter, comprising a phase detector (PD), a notch filter (NF), a loop filter (LF) and a voltage-controlled oscillator (VCO) which are electrically connected in series in sequence;

[0054] The input end of the phase detector is connected to the grid voltage sampling signal u g (t), whose angular frequency is ω g The phase detector processes the grid voltage sampling signal to obtain an error voltage signal u i (t); The phase detector inputs the error voltage signal into the notch filter for processing to obtain a voltage signal u d (t); The notch filter inputs the voltage signal into the loop filter for processing to obtain a control voltage signal u c(t); The loop filter inputs the control voltage signal into the voltage-controlled oscillator to obtain a phase-locked loop output signal u o (t); The voltage-controlled oscillator inputs the phase-locked loop output signal into the phase detector.

[0055] like Figure 2 As shown, according to another specific embodiment of the present invention, on the basis of the above embodiment, the phase detector includes a second-order generalized integrator and a Park transformation module connected to the output end of the second-order generalized integrator; the input grid voltage sampling signal is passed through the second-order generalized integrator to obtain a two-phase orthogonal signal, and then the voltage in the dq synchronous rotating coordinate system is obtained through the Park transformation module, and the error voltage signal is generated through the voltage in the dq synchronous rotating coordinate system.

[0056] According to another specific embodiment of the present invention, based on the above embodiment, the transfer function of the second-order generalized integrator is expressed as follows:

[0057]

[0058] Where: D(s) is the bandpass filter transfer function; Q(s) is the lowpass filter transfer function; ω′ is the frequency estimate of the phase-locked loop; k is the filter gain coefficient; s is the complex frequency variable; u α and u β are the components on the α-axis and β-axis of the stationary coordinate system respectively; u g is the grid voltage;

[0059] Specifically, the larger the k value, the larger the passband width and the faster the system response speed. For the harmonic signal contained in the input signal, it can be seen from the amplitude-frequency characteristics of the system that the second-order generalized integrator (SOGI) has a good ability to filter out high-order harmonics, and can also weaken the interference of low-order harmonics on the system. When the k value is larger, the filter's ability to suppress low-order harmonics will be weakened, so the selection of the k value should consider both filtering effect and response time. Generally speaking, the k value is selected as

[0060] The calculation formula of the grid voltage is:

[0061] u g =U m cosθ′

[0062] Where, θ′ is the angle between the grid voltage sampling signal and the α-axis of the stationary coordinate system; U m is the amplitude of the input voltage.

[0063] According to another specific embodiment of the present invention, based on the above embodiment, the calculation formula of the Park transformation module is as follows:

[0064]

[0065] Where, θ is the output phase of the voltage-controlled oscillator; u d and u q They are the components on the d-axis and q-axis of the dq synchronous rotating coordinate system respectively.

[0066] According to another specific embodiment of the present invention, based on the above embodiment, the calculation formulas of the components on the α-axis and the β-axis of the stationary coordinate system are:

[0067] u α =U m cosθ′

[0068] u β =U m sinθ′

[0069] The calculation formula of the component on the q axis of the dq synchronous rotating coordinate system is:

[0070] u q =U m sinθ′cosθ-U m cosθ′sinθ=U m sin(θ′-θ)

[0071] When the phase-locked loop works in the locked state, the error between the phase θ′ of the actual grid voltage and the phase θ of the voltage-controlled oscillator output is small and can be approximated as:

[0072] sin(θ′-θ)≈θ′-θ

[0073] This realizes the phase detector function.

[0074] Since the second-order generalized integrator (SOGI) is a nonlinear, adaptive filter that performs integration and differentiation processing on the input signal, when the sampling frequency is insufficient, the performance of the SOGI may be degraded and a large negative sequence component may appear. The present invention adds a three-parameter notch filter to the traditional phase-locked loop, which can filter out the negative sequence component generated by the second-order generalized integrator due to the insufficient sampling frequency.

[0075] The transfer function of the notch filter is:

[0076] The transfer function of the three-parameter notch filter is:

[0077]

[0078] Where: k1 is the first notch coefficient, k2 is the second notch coefficient; ω nis the notch bandwidth, in rad / s, which is twice the output frequency of the voltage-controlled oscillator;

[0079] In order to discretize the above formula, bilinear transformation is adopted and the trapezoidal algorithm is used to approximate the integral:

[0080]

[0081] Substituting formula (2) into formula (1), we can get

[0082]

[0083] By replacing the characters in formula (3), we can get:

[0084]

[0085] in,

[0086]

[0087] By using the signal hysteresis characteristics of z-transform, equation (4) can be transformed to obtain:

[0088] a1Y(z)+a2z -1 Y(z)+a3z -2 Y(z)=b1X(z)+b2z -1 X(z)+b3z -2 X(z) (6)

[0089] a1Y(z)+a2Y(z-1)+a3Y(z-2)=b1X(z)+b2X(z-1)+b3X(z-2) (7)

[0090] Finally, the discrete form of the three-parameter notch filter transfer function is as follows:

[0091]

[0092] Where: Y is the input signal; X is the output signal; n is an integer representing the time index of the sample; T s Represents the time interval between samples during the discretization process.

[0093] According to another specific embodiment of the present invention, on the basis of the above embodiment, the loop filter includes a PI controller, and the PI controller includes a proportional link k p and integral link k i, which is essentially a lead-lag filter. Among them, the main function of the proportional link is to linearly amplify the amplitude of the input error signal, and it can output a control signal proportional to the input. The main function of the integral link is to control the system output to gradually synchronize the input signal and eventually reach a steady state. The transfer function of the PI controller can be expressed as:

[0094]

[0095] Where s is the complex frequency variable and G is the transfer function of the PI controller.

[0096] According to another specific embodiment of the present invention, based on the above embodiment, the voltage controlled oscillator includes an adder and an integrator electrically connected to the adder. In the phase-locked loop, in order to speed up the dynamic response time of the phase-locked loop, ω n The value of is set to the rated frequency of the power grid. The frequency estimation value of the phase-locked loop is obtained through the adder, and the output phase of the voltage-controlled oscillator is obtained through the integrator.

[0097] like Figure 4 and Figure 5 In order to test the phase-locked accuracy of the improved single-phase phase-locked loop and the traditional phase-locked loop at low sampling frequencies, this embodiment built the improved single-phase phase-locked loop and the traditional phase-locked loop models in matlab / simulink, and tested the two phase-locked loops at different sampling frequencies.

[0098] The grid frequency is set to 50Hz. Figure 4 (a) and (b) are the phase-locked results of the traditional phase-locked loop and the improved single-phase phase-locked loop at a sampling frequency of 2k respectively; Figure 5 (a) and (b) in the figure are the phase-locked results of the traditional phase-locked loop and the improved single-phase phase-locked loop at a sampling frequency of 1k respectively.

[0099] From the test results, we can see that as the sampling frequency decreases, the phase-locked error of the traditional phase-locked loop increases significantly. At a sampling frequency of 1k, the phase-locked error has reached ±0.7Hz. However, the improved single-phase phase-locked loop can still maintain a high phase-locked accuracy even at a lower sampling frequency.

[0100] The above description is only a preferred embodiment of the present disclosure and an explanation of the technical principles used. Those skilled in the art should understand that the scope of disclosure involved in the present disclosure is not limited to the technical solutions formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the above disclosed concept. For example, the above features are replaced with the technical features with similar functions disclosed in the present disclosure (but not limited to) by each other to form a technical solution.

[0101] In addition, although each operation is described in a specific order, this should not be understood as requiring these operations to be performed in the specific order shown or in a sequential order. Under certain circumstances, multitasking and parallel processing may be advantageous. Similarly, although some specific implementation details are included in the above discussion, these should not be interpreted as limiting the scope of the present disclosure. Some features described in the context of a separate embodiment can also be implemented in a single embodiment in combination. On the contrary, the various features described in the context of a single embodiment can also be implemented in multiple embodiments individually or in any suitable sub-combination mode.

[0102] Although the subject matter has been described in language specific to structural features and / or methodological logical actions, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or actions described above. On the contrary, the specific features and actions described above are merely example forms of implementing the claims.

[0103] Multiple embodiments of the present disclosure are described in detail above, but the present disclosure is not limited to these specific embodiments. Those skilled in the art can make various variations and modifications to the embodiments based on the concepts of the present disclosure, and these variations and modifications should all fall within the scope of protection required by the present disclosure.

Claims

1. An improved single-phase phase-locked loop based on generalized second-order integration and notch filter, characterized in that: It includes a phase detector, a notch filter, a loop filter and a voltage-controlled oscillator which are electrically connected in series in sequence; The input end of the phase detector is connected to the grid voltage sampling signal u g (t), the phase detector processes the grid voltage sampling signal to obtain an error voltage signal u i (t); The phase detector inputs the error voltage signal into the notch filter for processing to obtain a voltage signal u d (t); The notch filter inputs the voltage signal into the loop filter for processing to obtain a control voltage signal u c (t); The loop filter inputs the control voltage signal into the voltage-controlled oscillator to obtain a phase-locked loop output signal u o (t); The voltage-controlled oscillator inputs the phase-locked loop output signal into the phase detector.

2. The improved single-phase phase-locked loop based on generalized second-order integration and notch filter according to claim 1, characterized in that: The phase detector includes a second-order generalized integrator and a Park transformation module connected to the output end of the second-order generalized integrator; the input grid voltage sampling signal is passed through the second-order generalized integrator to obtain a two-phase orthogonal signal, and then the voltage in the dq synchronous rotating coordinate system is obtained through the Park transformation module, and the error voltage signal is generated through the voltage in the dq synchronous rotating coordinate system.

3. The improved single-phase phase-locked loop based on generalized second-order integration and notch filter according to claim 2 is characterized in that: The expression of the transfer function of the second-order generalized integrator is as follows: Where: D(s) is the bandpass filter transfer function; Q(s) is the lowpass filter transfer function; ω′ is the frequency estimate of the phase-locked loop; k is the filter gain coefficient; s is the complex frequency variable; u α and u β are the components on the α-axis and β-axis of the stationary coordinate system respectively; u g is the grid voltage; The calculation formula of the grid voltage is: in g =U m cosθ′ Where, θ′ is the angle between the grid voltage sampling signal and the α-axis of the stationary coordinate system; U m is the amplitude of the input voltage.

4. The improved single-phase phase-locked loop based on generalized second-order integration and notch filter according to claim 3 is characterized in that: The calculation formula of the Park transformation module is as follows: Where, θ is the output phase of the voltage-controlled oscillator; u d and u q They are the components on the d-axis and q-axis of the dq synchronous rotating coordinate system respectively.

5. The improved single-phase phase-locked loop based on generalized second-order integration and notch filter according to claim 4, characterized in that: The calculation formula for the components on the α-axis and β-axis of the stationary coordinate system is: in α =U m cosθ′ u β =U m sinθ′ The calculation formula of the component on the q axis of the dq synchronous rotating coordinate system is: you q =U m sinθ′cosθ-U m cosθ′sinθ=U m sin(θ′-θ) sin(θ′-θ)≈θ′-θ.

6. The improved single-phase phase-locked loop based on generalized second-order integration and notch filter according to claim 1, characterized in that: The transfer function of the notch filter is: Where: k1 is the first notch coefficient, k2 is the second notch coefficient; ω n is the notch bandwidth in rad / s; Y is the input signal; X is the output signal; n is an integer representing the time index of the sample; T s Represents the time interval between samples during the discretization process.

7. The improved single-phase phase-locked loop based on generalized second-order integration and notch filter according to claim 1, characterized in that: The loop filter is implemented by a PI controller, and the PI controller includes a proportional link k p and integral link k i , the transfer function of the PI controller can be expressed as: Where s is the complex frequency variable and G is the transfer function of the PI controller.

8. The improved single-phase phase-locked loop based on generalized second-order integration and notch filter according to claim 1, characterized in that: The voltage controlled oscillator comprises an adder and an integrator electrically connected to the adder. The frequency estimation value of the phase locked loop is obtained by the adder, and the output phase of the voltage controlled oscillator is obtained by the integrator.

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