Ethernet test method and device, electronic equipment and storage medium

Abstract

The invention discloses an Ethernet test method and device, electronic equipment and a storage medium, and relates to the technical field of application communication, and the method comprises the steps: respectively obtaining a level signal and Ethernet link data of a target network through a level sampler and a physical layer chip; aligning the level signal and the Ethernet link data based on time to obtain fusion alignment information; and generating a test result of the target network according to the fusion alignment information. According to the embodiment of the invention, the data of a large number of nodes can be obtained simultaneously through the level sampler and the physical layer chip, the limitation of the traditional test method on the number of nodes is broken, the test efficiency is improved, the synchronization of the level signal and the Ethernet link data on time is ensured by aligning the level signal with the Ethernet link data, and the test accuracy is improved. And the test result is generated by analyzing the fusion alignment information, so that the specific state and performance condition of the node at each time can be intuitively and comprehensively known, and the convenience of monitoring, developing and debugging the Ethernet is improved.

Description

Technical Field

[0001] The present invention relates to the field of applied communication technology, and in particular to an Ethernet testing method, device, electronic equipment and storage medium. Background Art

[0002] Traditional industrial automation networks mainly rely on low-speed fieldbus technology. The frame structure of the link layer of this type of bus is simple and clear, and the physical layer directly uses high and low level identifiers, which is easy to understand. Usually, test equipment such as oscilloscopes and network testers can be used to directly obtain the data frame structure and application data bit value from the measured physical layer waveform. However, with the gradual expansion of industrial production scale, industrial automation networks have begun to gradually transform to real-time Ethernet technology. Compared with fieldbus, Ethernet has higher bandwidth and a more complete software ecosystem, which makes real-time Ethernet technology an ideal choice for multi-node, high-performance applications. However, although the oscilloscope can test the clock synchronization accuracy between different nodes and simply display the bus occupancy, it is unable to measure the clock synchronization accuracy of a large number of nodes at the same time due to its limited number of channels. When displaying the bus occupancy, the oscilloscope can only indicate whether the bus is occupied during a certain period of time through the level, but cannot synchronously parse the message data and identify the message type and device at the corresponding time point. On the other hand, although the network analyzer can analyze the transmission delay and packet loss rate of the network layer through message transmission and reception, it cannot pay attention to the synchronization accuracy and level signal quality. Moreover, the network analyzer test suite is mainly designed for switched networks, and has poor support for the protocols and communication mechanisms of industrial Ethernet, which makes the network analyzer ineffective when testing real-time Ethernet. Therefore, providing an Ethernet test method that breaks the limitation of the number of nodes in traditional test methods and can intuitively and comprehensively understand the specific status and performance status of the nodes at various times has become an urgent problem to be solved in the field of applied communication technology. Summary of the invention

[0003] The present invention provides an Ethernet testing method, device, electronic device and storage medium, which break the limitation of traditional testing methods in terms of the number of nodes, can intuitively and comprehensively understand the specific status and performance status of the nodes at various times, improve the testing efficiency, and improve the convenience of monitoring, developing and debugging Ethernet.

[0004] According to one aspect of an embodiment of the present invention, an Ethernet testing method is provided, including:

[0005] The level signal and Ethernet link data of the target network are obtained through the level sampler and the physical layer chip respectively;

[0006] Aligning the level signal and Ethernet link data based on time to obtain fused alignment information;

[0007] Generate the test results of the target network based on the fused alignment information.

[0008] Another aspect of an embodiment of the present invention provides an Ethernet testing device, including:

[0009] A data acquisition module is used to obtain the level signal and Ethernet link data of the target network through a level sampler and a physical layer chip respectively;

[0010] An information alignment module, used to align the level signal and Ethernet link data based on time to obtain fused alignment information;

[0011] The result analysis module is used to generate the test results of the target network based on the fused alignment information.

[0012] Another aspect of an embodiment of the present invention provides an electronic device, including:

[0013] at least one processor;

[0014] and a memory communicatively coupled to the at least one processor;

[0015] The memory stores a computer program that can be executed by at least one processor, and the computer program is executed by at least one processor so that the at least one processor can execute any one of the Ethernet testing methods in the embodiments of the present invention.

[0016] According to another aspect of the present invention, a computer-readable storage medium is provided. The computer-readable storage medium stores computer instructions. The computer instructions are used to enable a processor to implement the Ethernet testing method of any embodiment of the present invention when executed.

[0017] According to an embodiment of the present invention, when each node in a target network communicates, a level sampler and a physical layer chip can be used to respectively collect the level signal and Ethernet link data of each node. When the level sampler and the physical layer chip respectively obtain the level signal and Ethernet link data of the target network, the time when the level signal and the Ethernet link data are obtained can be recorded. Based on the recorded acquisition time, a corresponding time stamp can be added to the level signal and the Ethernet link data. According to the time stamp, the level signal and the Ethernet link data can be aligned in time, and the aligned level signal and the Ethernet link data can be used as fusion alignment information. The fusion alignment information can be parsed, and a series of indicators for quantifying the performance of the target network can be extracted from the parsed fusion alignment information. The series of indicators for quantifying the performance of the target network can be used as the test result of the target network. The embodiment of the present invention can simultaneously obtain the communication data of a large number of nodes through the level sampler and the physical layer chip, breaking the limitation of the traditional test method in terms of the number of nodes, and improving the network test efficiency. By aligning the level signal with the Ethernet link data, the time synchronization of the level signal and the Ethernet link data is ensured, so that the level signal and the Ethernet link data of each node can be obtained at the same time point, and the comprehensive monitoring of the network performance is realized. The test results are generated by parsing and fusing the alignment information. Based on the test results, the specific states and performance conditions of the nodes in the Ethernet at each time point can be intuitively and comprehensively understood, which improves the convenience of monitoring and developing and debugging the Ethernet, and further can achieve the beneficial effect of improving the overall performance of the Ethernet. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0019] Figure 1 This is a flow chart of an Ethernet testing method provided according to Embodiment 1 of the present invention;

[0020] Figure 2 is a flow chart of another Ethernet testing method provided according to Embodiment 2 of the present invention;

[0021] Figure 3 This is a schematic diagram of an Ethernet test device provided according to Embodiment 3 of the present invention;

[0022] Figure 4 This is a schematic diagram of an FPGA design framework in an Ethernet test device provided in Embodiment 3 of the present invention;

[0023] Figure 5This is a schematic diagram of a host computer window interface provided according to Embodiment 3 of the present invention;

[0024] Figure 6 It is a schematic diagram of the structure of a device for implementing an Ethernet testing method provided by an embodiment of the present invention;

[0025] Figure 7 It is a structural schematic diagram of an electronic device for implementing the Ethernet testing method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0026] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0027] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0028] Embodiment 1

[0029] Figure 1 The present invention provides a flow chart of an Ethernet testing method. The present invention is applicable to the following situations. The method can be performed by an Ethernet testing device. The Ethernet testing device can be implemented in the form of hardware and / or software. The Ethernet testing device can be configured in an electronic device. Figure 1 As shown, the method includes:

[0030] S101, respectively obtaining a level signal of a target network and Ethernet link data through a level sampler and a physical layer chip.

[0031] In the embodiment of the present invention, the level sampler may be understood as an electronic component that can be used to collect level signals in a network. For example, the level sampler may include: a level sampling circuit or an analog-to-digital conversion chip.

[0032] The physical layer chip can be understood as a hardware device that is responsible for collecting Ethernet link data in the network.

[0033] The target network refers to the network system that needs to be tested. It is understandable that the target network may be composed of a large number of nodes. For example, the level sampler and the physical layer chip may respectively collect the level signal and Ethernet link data of each node in the target network.

[0034] The topology of the target network may include: star, bus or ring, etc. The topology determines the connection method and data transmission path between nodes in the network.

[0035] The level signal can be understood as a signal represented by a level value. The level signal is transmitted in the target network. For example, the level signal includes but is not limited to: a link sending signal, a link receiving signal or a synchronization pulse signal.

[0036] The Ethernet link data refers to a data frame transmitted under the Ethernet protocol. For example, the Ethernet link data may include all information in the Ethernet link message, and the Ethernet link data may include: source address, destination address or cyclic check sequence and other information.

[0037] Specifically, the level sampler and the physical layer chip can be used to collect the level signal and Ethernet link data of each node when communicating with each node in the target network. By way of example, the method of collecting the level signal and Ethernet link data of each node may include: the level sampler and the physical layer chip can respectively obtain the level signal and the Ethernet link data through a network communication bus, or the level sampler and the physical layer chip can respectively directly obtain the level signal and the Ethernet link data through a network interface with each node.

[0038] S102: aligning the level signal and the Ethernet link data based on time to obtain fusion alignment information.

[0039] In the embodiment of the present invention, the fused alignment information may be understood as a comprehensive data set. For example, the fused alignment information may include: a level signal and Ethernet link data, etc. It can be understood that the level signal and Ethernet link data in the fused alignment information are synchronized in time.

[0040] Specifically, when the level sampler and the physical layer chip respectively obtain the level signal and Ethernet link data of the target network, the time when the level signal and the Ethernet link data are obtained can be recorded. Based on the recorded acquisition time, a corresponding time stamp can be added to the level signal and the Ethernet link data. According to the time stamp, the level signal and the Ethernet link data can be aligned in time, and the aligned level signal and Ethernet link data are used as fusion alignment information.

[0041] For example, the method for aligning the level signal and the Ethernet link data in time may include: aligning the level signal and the Ethernet link data in time based on a sliding window algorithm or an interpolation method.

[0042] S103: Generate a test result of the target network according to the fused alignment information.

[0043] In an embodiment of the present invention, the test results can be understood as a series of indicators for quantifying the performance of the target network. The test results can be obtained by analyzing and counting the test data of the target network. For example, the test results may include: node online status or bit error rate, etc.

[0044] Specifically, the fusion alignment information is obtained and parsed, and a series of indicators for quantifying the performance of the target network can be extracted from the parsed fusion alignment information, and the series of indicators are used as the test results of the target network.

[0045] For example, after obtaining the test results of the target network, the test results of the target network can also be transmitted to the host computer, and the host computer will visualize the test results in the host computer interface. The host computer interface can also provide interactive functions, and users can view the network node status in the host computer interface at any time through the interactive function.

[0046] For example, a method for parsing fused alignment information may include: using a machine learning algorithm or a deep learning algorithm to perform statistical analysis on various indicators in the fused alignment information, wherein the statistical analysis of various indicators in the fused alignment information may include: statistics on online status or statistics on bit error rate.

[0047] According to an embodiment of the present invention, when each node in a target network communicates, a level sampler and a physical layer chip can be used to respectively collect the level signal and Ethernet link data of each node. When the level sampler and the physical layer chip respectively obtain the level signal and Ethernet link data of the target network, the time when the level signal and the Ethernet link data are obtained can be recorded. Based on the recorded acquisition time, a corresponding time stamp can be added to the level signal and the Ethernet link data. According to the time stamp, the level signal and the Ethernet link data can be aligned in time, and the aligned level signal and the Ethernet link data can be used as fusion alignment information. The fusion alignment information can be parsed, and a series of indicators for quantifying the performance of the target network can be extracted from the parsed fusion alignment information. The series of indicators for quantifying the performance of the target network can be used as the test result of the target network. The embodiment of the present invention can simultaneously obtain the communication data of a large number of nodes through the level sampler and the physical layer chip, breaking the limitation of the traditional test method in terms of the number of nodes, and improving the network test efficiency. By aligning the level signal with the Ethernet link data, the time synchronization of the level signal and the Ethernet link data is ensured, so that the level signal and the Ethernet link data of each node can be obtained at the same time point, and the comprehensive monitoring of the network performance is realized. The test results are generated by parsing and fusing the alignment information. Based on the test results, the specific states and performance conditions of the nodes in the Ethernet at each time point can be intuitively and comprehensively understood, which improves the convenience of monitoring and developing and debugging the Ethernet, and further can achieve the beneficial effect of improving the overall performance of the Ethernet.

[0048] Embodiment 2

[0049] Figure 2 This is a flow chart of another Ethernet testing method provided by an embodiment of the present invention. Based on the above-mentioned embodiment, the embodiment of the present invention provides another Ethernet testing method. Figure 2 As shown, the method includes:

[0050] S201. Acquire a level signal of at least one node in a target network through a level sampler, and set a first timestamp of the level signal, wherein the level signal includes at least one of a macro cycle, a link sending signal, a link receiving signal, and a synchronization pulse signal.

[0051] In the embodiment of the present invention, the first timestamp may be understood as a time mark, which is used to indicate the time when the level signal is acquired.

[0052] A macrocycle refers to a periodic signal. For example, a macrocycle signal can be a complete process from a high level to a low level and then back to a high level, or a complete process from a low level to a high level and then back to a low level. The macrocycle signal can be used to maintain synchronization between network nodes.

[0053] The link sending signal refers to a level signal used to indicate the node sending status. For example, the link sending signal may include: a link sending high level signal or a link sending low level signal, wherein the link sending high level signal may indicate that the node is transmitting data on the communication link, and the link sending low level signal may indicate that the node is not transmitting data on the communication link.

[0054] The link reception signal refers to a level signal used to indicate the reception status of a node. For example, the link reception signal may include: a link reception high level signal or a link reception low level signal, wherein the link reception high level signal may indicate that the node is receiving data sent by other nodes on the communication link, and the link transmission low level signal may indicate that the node is not receiving data sent by other nodes on the communication link.

[0055] The synchronization pulse signal refers to a level signal used for clock synchronization. For example, a node may generate a synchronization pulse signal per second to calibrate and synchronize the clocks in the network nodes.

[0056] Specifically, in the target network, a level sampler is used to obtain a level signal when a node is communicating, and the time when the level sampler obtains the level signal is recorded. Based on the recorded time of obtaining the level signal, a timestamp is given to the level signal, and the timestamp is used as the first timestamp, wherein the level signal obtained by the level sampler is at least a level signal when a node is communicating, and the types of level signals when the node is communicating include but are not limited to: macro cycle, link sending signal, link receiving signal, and synchronization pulse signal and other level signals.

[0057] S202: Acquire Ethernet link data of a node in a target network through a physical layer chip, and set a second timestamp for the Ethernet link data.

[0058] In the embodiment of the present invention, the second timestamp may be understood as another time mark, which is used to indicate the time when the Ethernet link data is acquired.

[0059] Specifically, in the target network, the physical layer chip is used to obtain Ethernet link data when the node communicates, and the time when the physical layer chip obtains the Ethernet link data is recorded. Based on the recorded time of obtaining the Ethernet link data, the Ethernet link data is timestamped and the timestamp is used as the second timestamp.

[0060] S203: Compare the first timestamp of each level signal with the second timestamp of each Ethernet link data respectively, and when the first timestamp is the same as the second timestamp, determine that the target level signal of the first timestamp matches the target Ethernet link data of the second timestamp.

[0061] In the embodiment of the present invention, the target level signal can be understood as a level signal with the same timestamp as the Ethernet link data, and the target Ethernet link data can be understood as a data frame with the same timestamp as the level signal. It can be understood that both the target level signal and the target Ethernet link data can be based on the timestamp and are obtained by comparing each level signal with each Ethernet link data.

[0062] Specifically, the first timestamp and the second timestamp may be respectively stamped on the acquired level signal of each node and each Ethernet link data, the first timestamp of the level signal and the second timestamp of the Ethernet link data may be extracted, and the first timestamp and the second timestamp may be compared. If the first timestamp and the second timestamp are the same, the level signal corresponding to the first timestamp may be used as the target level signal, and the Ethernet link data corresponding to the second timestamp may be used as the target Ethernet link data. At this time, based on the timestamps, the target level signal corresponding to the first timestamp and the target Ethernet link data corresponding to the second timestamp are matched, and subsequent operations may be performed according to the matched target level signal and the target Ethernet link data.

[0063] S204: for the matched target level signal and target Ethernet link data, set an association relationship between the target level signal and the target Ethernet link data, and use the target level signal and the target Ethernet link data having the association relationship as fusion alignment information.

[0064] In the embodiment of the present invention, the association relationship refers to a corresponding relationship, which can indicate which physical signal corresponds to which Ethernet link data within a specified time. The association relationship is established based on the matching target level signal and the target Ethernet link data. By way of example, the association relationship may include: time association or logical association, etc. It can be understood that the time association means that the target level signal and the target Ethernet link data are consistent in time, and the logical association means that if the target level signal represents the transmission state of the data, the target Ethernet link data contains the actual content of the data under the transmission state.

[0065] Specifically, it is determined that the target level signal and the target Ethernet link data are matched. After the match is determined, a corresponding relationship between the target level signal and the target Ethernet link data is established for each pair of mutually matching target level signals and target Ethernet link data. The corresponding relationship can indicate that there is an association relationship between the target level signal and the target Ethernet link data. The association relationship can include: a time association relationship or a logical association relationship, etc. The target level signal and the target Ethernet link data that have an association relationship can be combined to form a comprehensive data set, and the comprehensive data set is used as fusion alignment information.

[0066] S205: Determine target fusion information of each node in the corresponding target network in each fusion alignment information.

[0067] In the embodiment of the present invention, the target fusion information may be understood as another comprehensive data set. For example, the target fusion information may include: a target level signal corresponding to each node itself and target Ethernet link data.

[0068] Specifically, the fusion alignment information in the target network is obtained, and the fusion alignment information can be parsed. From the parsed fusion alignment information, the target level signal and the target Ethernet link data corresponding to each node can be extracted, and the target level signal and the target Ethernet link data are integrated to form a comprehensive data set, and the comprehensive data set is used as the target fusion information.

[0069] S206: Extract the Ethernet link message of the target fusion information of each node.

[0070] In the embodiment of the present invention, the Ethernet link message can be understood as a data packet, which is the basic unit of Ethernet link data. For example, the components of the Ethernet link message may include: a preamble, a source address, a destination address or a data type.

[0071] Specifically, the target fusion information corresponding to each node is obtained, the target fusion information can be parsed to obtain the target level signal and target Ethernet link data corresponding to each node, the target Ethernet link data can be further parsed, and the Ethernet link message can be extracted from the parsed target Ethernet link data.

[0072] S207, analyzing each Ethernet link message belonging to the same node, and obtaining the scheduling information of the corresponding node as the test result, wherein the scheduling information includes the master-slave identification, the sending offset, the synchronization accuracy and the transmission delay.

[0073] In an embodiment of the present invention, scheduling information can be understood as a series of parameters that reflect the operating status of the node, and the node can be scheduled or managed based on the scheduling information. For example, the scheduling information may include parameters such as master-slave identification, sending offset, synchronization accuracy, and transmission delay, wherein the master-slave identification refers to a symbol that can be used to distinguish between master nodes and slave nodes in the network, the sending offset refers to the offset relative to a reference time point when the node sends a data frame, the synchronization accuracy refers to an indicator used to measure the accuracy of time synchronization between nodes in the network, and the transmission delay refers to the time required for the data frame to be transmitted from the sending node to the receiving node.

[0074] Specifically, the Ethernet link message of each node is obtained, and the Ethernet link message corresponding to the same node itself can be analyzed, and the master-slave identification, sending offset, synchronization accuracy and transmission delay can be extracted from the Ethernet link message. The extracted master-slave identification, sending offset, synchronization accuracy and transmission delay can be used as the scheduling information of the corresponding node, and the scheduling information can be used as the test result of this Ethernet test. Subsequent operations can be performed based on the test results.

[0075] In an embodiment of the present invention, in a target network, a level sampler is used to obtain a level signal when a node communicates, and the time when the level sampler obtains the level signal is recorded. Based on the recorded time of obtaining the level signal, a timestamp is added to the level signal, and the timestamp is used as a first timestamp. Ethernet link data when the node communicates is obtained by using a physical layer chip, and the time when the physical layer chip obtains the Ethernet link data is recorded. Based on the recorded time of obtaining the Ethernet link data, a timestamp is added to the Ethernet link data, and the timestamp is used as a second timestamp. The first timestamp of the level signal and the second timestamp of the Ethernet link data can be extracted, and the first timestamp of the level signal and the second timestamp of the Ethernet link data can be extracted. The timestamp is compared with the second timestamp. If the first timestamp and the second timestamp are the same, the level signal corresponding to the first timestamp can be used as the target level signal, and the Ethernet link data corresponding to the second timestamp can be used as the target Ethernet link data. At this time, based on the timestamp, the target level signal corresponding to the first timestamp and the target Ethernet link data corresponding to the second timestamp are matched. After determining that the target level signal and the target Ethernet link data are matched successfully, a corresponding relationship between the target level signal and the target Ethernet link data is established for each pair of mutually matching target level signals and target Ethernet link data. The corresponding relationship can indicate There is an association relationship between the target level signal and the target Ethernet link data, and the association relationship may include: a time association relationship or a logical association relationship, etc. The target level signal and the target Ethernet link data with an association relationship may be combined to form a comprehensive data set, and the comprehensive data set may be used as fusion alignment information, and the fusion alignment information may be parsed. From the parsed fusion alignment information, the target level signal and the target Ethernet link data corresponding to each node may be extracted, and the target level signal and the target Ethernet link data may be integrated to form a comprehensive data set, and the comprehensive data set may be used as target fusion information, and the target fusion information may be parsed to obtain the target level signal and the target Ethernet link data corresponding to each node itself, and the target Ethernet link data may be further parsed, and an Ethernet link message may be extracted from the parsed target Ethernet link data, and the Ethernet link message corresponding to the same node may be analyzed, and the master-slave identifier, the sending offset, the synchronization accuracy and the transmission delay may be extracted from the Ethernet link message, and the extracted master-slave identifier, the sending offset, the synchronization accuracy and the transmission delay may be used as the scheduling information of the corresponding node, and the scheduling information may be used as the test result of this Ethernet test, and subsequent operations may be performed based on the test result.In the embodiment of the present invention, by integrating the level sampler and the physical layer chip, the level signals and Ethernet link data of a large number of nodes in the target network can be captured simultaneously, breaking the limitation of the traditional test method on the number of nodes and improving the efficiency of network testing. In the data acquisition process, by comparing the timestamps, the level signal with the same first timestamp and second timestamp is matched with the Ethernet link data, and the correlation relationship between the level signal and the Ethernet link data is established, which can fully reflect the actual state of each node and ensure the accuracy of the network test. By determining the target fusion information of each node in the corresponding target network from each fusion alignment information, it can be ensured that the extracted information is for a specific node, avoiding interference between different nodes. By deeply analyzing the Ethernet link message to obtain the scheduling information of each node, the test results of the test Ethernet can be intuitively and comprehensively displayed. Through the test results, the user can clearly understand the specific state and performance status of each node in the Ethernet at each time point, which is very convenient for monitoring the network status, optimizing network performance, and developing and debugging the Ethernet.

[0076] Based on the above embodiments, steps S205, S206 and S207 in the embodiments of the present invention can be replaced by: extracting the target fusion alignment information corresponding to the test time from the fusion alignment information; counting the number of messages of the target fusion alignment information within the test time; extracting the cyclic redundancy check of the target fusion alignment information, counting the number of check failures and the number of checks of each cyclic redundancy check, and determining the bit error rate corresponding to the number of check failures and the number of checks; extracting the source address and / or destination address of the target fusion alignment information, and determining the online status of the corresponding node according to the source address and / or destination address.

[0077] In the embodiment of the present invention, the test time may be understood as a specified time interval, during which specified data may be collected or recorded for subsequent analysis or evaluation.

[0078] The target fusion alignment information can be understood as another comprehensive data set. The fusion alignment information obtained within the test time can be used as the target fusion alignment information. For example, the target fusion alignment information may include: number of messages, cyclic redundancy check, number of check failures, number of checks, source address and / or destination address and other information, wherein the number of messages refers to the total number of valid Ethernet link messages obtained within the test time, the cyclic redundancy check is a check code with error detection capability, the number of check failures can be understood as the number of Ethernet link message errors found through the cyclic redundancy check, the number of checks can be understood as the total number of Ethernet link messages that undergo cyclic redundancy check, and the source address and / or destination address refer to the address of sending or receiving the Ethernet link message, which is used to identify the source and destination of the data.

[0079] The bit error rate can be understood as a ratio, which can be obtained by comparing the number of failed checks with the number of checks.

[0080] The online state can be understood as a state identifier, which can be used to determine whether a node can perform normal data communication. For example, the online state can include: an online state identifier or an offline state identifier.

[0081] Specifically, the target level signal and the target Ethernet link data having an associated relationship can be used as fusion alignment information, the time interval for testing can be specified, and the time interval can be used as the test time. Based on the first timestamp of each level signal and the second timestamp of each Ethernet link data, the target information corresponding to the test time can be screened out from the fusion alignment information, and the target information can be used as the target fusion alignment information. The target fusion alignment information can be parsed, and the corresponding target Ethernet link data can be extracted from the parsed target fusion alignment information. The target Ethernet link data can be parsed, and the number of messages, redundant check codes, and source address and / or destination address information can be extracted from the parsed target Ethernet link data. The target Ethernet link message can be checked based on the cyclic redundancy check code, and the number of failed checks and the number of checks that are checked can be counted. The number of failed checks and the number of checks can be compared to obtain a bit error rate, and the online status of the corresponding node can be determined according to the extracted source address and / or destination address.

[0082] For example, the step of determining the online status of the corresponding node based on the extracted source address and / or destination address may include: parsing the source address and / or destination address to determine the corresponding node, querying the online status of the corresponding node in the node through a network protocol, or parsing the source address and / or destination address to determine the register corresponding to the corresponding node, and obtaining the online status of the corresponding node from the register through a network interface.

[0083] On the basis of the above embodiments, an embodiment of the present invention extracts the source address and / or destination address of the target fusion alignment information, and determines the online status of the corresponding node according to the source address and / or destination address, including: extracting the macro cycle of the target fusion alignment information, and classifying each target fusion alignment information according to the macro cycle to obtain a target information set; for each macro cycle, determining the node register corresponding to the source address and / or destination address in the target information set, and setting the status identification bit of the online status in the node register.

[0084] In an embodiment of the present invention, a target information set refers to a data set obtained by classifying target fusion alignment information according to macrocycles, and each target information set corresponds to a macrocycle. By way of example, the target information set may include: a source address of a node or a status identification bit of a node, wherein the status identification bit may be understood as a binary mark that can be used to determine whether the node is online.

[0085] The node register may be understood as a data structure for storing information related to each network node. For example, the node register may store a node status flag or a node configuration parameter.

[0086] Specifically, the target fusion alignment information can be obtained, the target fusion alignment information can be parsed, the target level signal can be extracted from the parsed target fusion alignment information, the target level signal can be parsed, the macro cycle can be extracted from the parsed target level signal, and the target fusion alignment information can be classified into different macro cycles according to the extracted macro cycles to form a target information set, and for each macro cycle target information set, the source address and / or destination address contained in the target information set is determined, and the corresponding node register can be found based on the source address and / or destination address, and in the determined node register, the status identification bit indicating the online status is queried, and the online status of the corresponding node can be obtained by reading the status identification bit in the node register.

[0087] Embodiment 3

[0088] The embodiment of the present invention provides another Ethernet testing method, which is applied to the field of real-time Ethernet. The existing real-time Ethernet testing method mainly adopts an oscilloscope and a network analyzer, wherein the oscilloscope can test the clock synchronization accuracy between different nodes and simply display the bus occupancy; however, the number of channels of the oscilloscope is generally 2-4, and the number of channels is relatively small, so it is impossible to measure the clock synchronization accuracy of a large number of nodes, and the bus occupancy can only be indicated by the level whether the bus is occupied for a certain period of time, and it is impossible to synchronously parse the message data and identify the message type and device at the corresponding time point; and the network analyzer can only analyze the transmission delay and packet loss rate of the network layer through message sending and receiving, and cannot pay attention to the synchronization accuracy and the level signal quality, and the current network analyzer test suite is mainly aimed at the switching network, and the protocol and communication mechanism of the industrial Ethernet are poorly supported. Therefore, the existing test equipment and method cannot intuitively combine and analyze the data frame and the channel signal, and it is difficult to perform intuitive testing on it, and it is impossible to facilitate the user's monitoring and development and debugging.

[0089] In view of the above problems, an embodiment of the present invention provides a real-time Ethernet test device, which can implement a real-time Ethernet test method based on the real-time Ethernet test device to achieve the test of the real-time Ethernet. Figure 3As shown, the hardware part of the real-time Ethernet test equipment mainly includes a field programmable gate array (FPGA) chip, a physical layer (PHY) chip and an analog-to-digital converter (ADC) chip, wherein the analog-to-digital converter chip can also be replaced by a level sampling circuit. It can be understood that the level sampler can be a general term for an analog-to-digital converter chip or a level sampling circuit, which is part of the hardware of the real-time Ethernet test equipment. The steps of using the real-time Ethernet test equipment for performance testing can include: the FPGA chip drives the PHY chip and the ADC chip at the same time, respectively obtains the communication message and the key level signal in the real-time Ethernet system, records the obtained channel number, original information, timestamp and other information in the FPGA, performs statistical calculations of indicators such as synchronization accuracy, transmission delay, channel utilization, bit error rate, etc. according to the extracted information, integrates the original data and the relevant results calculated by the FPGA into a standard interface and format, and delivers it to the host computer. In the host computer, the detailed content of the message from the PHY and the time information from the ADC are integrated and visualized in the host computer interface.

[0090] Among them, the design framework of FPGA can be as follows Figure 4 As shown, in Figure 4 In the protocol stack module, the communication message transmitted by the PHY chip is received. In the protocol stack module, the communication message can be parsed and key information can be extracted according to the real-time Ethernet communication protocol. For each received message, the receiving time is recorded, each received message is timestamped, and the source device number, master-slave identification, message type, message length and other information of each received message are identified.

[0091] The scheduling information statistics module is responsible for counting the online status, master-slave mode, and number of messages sent / received of each node according to the content of the parsed message given by the protocol stack, identifying the scheduling order of the nodes in each macrocycle and quantitatively calculating the offset of the nodes in each macrocycle, and uploading the statistical scheduling information to the host computer for display through the host interface module.

[0092] The traffic statistics module is mainly responsible for monitoring and analyzing the data traffic, bit error rate, port load of each node, etc. on the real-time Ethernet bus. The specific implementation steps of the traffic monitoring function are as follows: according to the message information parsed by the protocol stack, the number of all messages on the bus, the number of messages received / sent by each node, the load of the system and each node port are calculated, the number of messages with cyclic redundancy check (CRC) errors in the messages sent by each node is calculated, the bit error rate of each node is obtained, the total CRC error amount is counted, the system bit error rate is calculated, and the above-mentioned various information counted is uploaded to the host computer for display as traffic information.

[0093] The time information acquisition module is responsible for collecting all level signals from the ADC. On the one hand, it organizes the collected data and transmits it completely to the host computer. On the other hand, it performs corresponding monitoring and calculation according to the channel definition and calculation requirements given by the configuration management module, and sends the monitoring and calculation results to the host computer. The conflict monitoring module is used to compare the sampling signals of multiple ADC channels, identify conflicts in the bus by judging whether the time slices of each node overlap, whether two or more nodes simultaneously initiate bus occupancy enable signals, etc., and organize and upload them to the host computer. The time calculation module, based on the input of the configuration management module, counts different ADC level signals, calculates the differences between different level signals, completes the calculation of single-node time slice length, synchronization accuracy, transmission delay and other information, and uploads them to the host computer. The test results displayed in the host computer window are shown in the figure below. Figure 5 shown.

[0094] Embodiment 4

[0095] Figure 6 The present invention provides a schematic diagram of the structure of an Ethernet test device. Figure 6 As shown, the device comprises:

[0096] The data acquisition module 301 is used to acquire the level signal and Ethernet link data of the target network through the level sampler and the physical layer chip respectively;

[0097] An information alignment module 302, used to align the level signal and the Ethernet link data based on time to obtain fused alignment information;

[0098] The result analysis module 303 is used to generate the test result of the target network according to the fused alignment information.

[0099] According to an embodiment of the present invention, when each node in a target network communicates, a level sampler and a physical layer chip can be used to respectively collect the level signal and Ethernet link data of each node. When the level sampler and the physical layer chip respectively obtain the level signal and Ethernet link data of the target network, the time when the level signal and the Ethernet link data are obtained can be recorded. Based on the recorded acquisition time, a corresponding time stamp can be added to the level signal and the Ethernet link data. According to the time stamp, the level signal and the Ethernet link data can be aligned in time, and the aligned level signal and the Ethernet link data can be used as fusion alignment information. The fusion alignment information can be parsed, and a series of indicators for quantifying the performance of the target network can be extracted from the parsed fusion alignment information. The series of indicators for quantifying the performance of the target network can be used as the test result of the target network. The embodiment of the present invention can simultaneously obtain the communication data of a large number of nodes through the level sampler and the physical layer chip, breaking the limitation of the traditional test method in terms of the number of nodes, and improving the network test efficiency. By aligning the level signal with the Ethernet link data, the time synchronization of the level signal and the Ethernet link data is ensured, so that the level signal and the Ethernet link data of each node can be obtained at the same time point, and the comprehensive monitoring of the network performance is realized. The test results are generated by parsing and fusing the alignment information. Based on the test results, the specific states and performance conditions of the nodes in the Ethernet at each time point can be intuitively and comprehensively understood, which improves the convenience of monitoring and developing and debugging the Ethernet, and further can achieve the beneficial effect of improving the overall performance of the Ethernet.

[0100] On the basis of the above-mentioned embodiment, the level signal in the embodiment of the present invention includes at least one of a macro cycle, a link transmission signal, a link reception signal and a synchronization pulse signal.

[0101] On the basis of the above-mentioned embodiments, the data acquisition module 301 of the embodiment of the present invention is specifically used to obtain the level signal of at least one node in the target network through the level sampler, and set the first timestamp of the level signal; obtain the Ethernet link data of the node in the target network through the physical layer chip; parse the Ethernet link data to obtain the Ethernet link message, and set the second timestamp for the Ethernet link message.

[0102] On the basis of the above embodiment, the information alignment module 302 is specifically used to compare the first timestamp of each level signal with the second timestamp of each Ethernet link data respectively, and when the first timestamp is the same as the second timestamp, determine that the target level signal of the first timestamp matches the target Ethernet link data of the second timestamp; for the matched target level signal and target Ethernet link data, set the association relationship between the target level signal and the target Ethernet link data, and use the target level signal and the target Ethernet link data with the association relationship as the fusion alignment information.

[0103] On the basis of the above-mentioned embodiment, the result analysis module 303 is specifically used to determine the target fusion information of each node in the corresponding target network in each fusion alignment information; extract the Ethernet link message of the target fusion information of each node; analyze each Ethernet link message belonging to the same node, and obtain the scheduling information of the corresponding node as the test result, wherein the scheduling information includes the master-slave identification, the sending offset, the synchronization accuracy and the transmission delay.

[0104] On the basis of the above embodiment, the result analysis module 303 may further include: an alignment information testing unit, used to extract the target fusion alignment information corresponding to the test time in the fusion alignment information; a message number counting unit, used to count the number of messages of the target fusion alignment information within the test time; a bit error rate determination unit, used to extract the cyclic redundancy check of the target fusion alignment information, count the number of check failures and the number of checks of each cyclic redundancy check, and determine the bit error rate corresponding to the number of check failures and the number of checks; an online status determination unit, used to extract the source address and / or destination address of the target fusion alignment information, and determine the online status of the corresponding node according to the source address and / or destination address; a test result determination module, used to use the online status, the number of messages and the bit error rate as the test results.

[0105] On the basis of the above-mentioned embodiment, the online status determination unit is specifically used to extract the macrocycle of the target fusion alignment information, and classify each target fusion alignment information according to the macrocycle to obtain a target information set; for each macrocycle, determine the node register corresponding to the source address and / or destination address in the target information set, and set the status identification bit of the online status in the node register.

[0106] Embodiment 5

[0107] Figure 7 A schematic diagram of an electronic device that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown in the embodiments of the present invention, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the embodiments of the present invention described and / or required herein.

[0108] like Figure 7As shown, the electronic device includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the ROM 12 or the computer program loaded from the storage unit 18 to the RAM 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. The input / output (I / O) interface 15 is also connected to the bus 14.

[0109] A number of components in the electronic device are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0110] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit, a graphics processing unit, various special artificial intelligence computing chips, various processors running machine learning model algorithms, digital signal processors, and any appropriate processors, controllers, microcontrollers, etc. The processor 11 executes the various methods and processes described above, for example, the Ethernet test method.

[0111] In some embodiments, the Ethernet test method may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the Ethernet test method may be performed. Alternatively, in other embodiments, the processor 11 may be configured as the Ethernet test method in any other appropriate manner (e.g., by means of firmware).

[0112] Various implementations of the systems and techniques described above in the embodiments of the present invention may be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays, application specific integrated circuits, application specific standard products, systems on a chip, load programmable logic devices, computer hardware, firmware, software, and / or combinations thereof. These various implementations may include: being implemented in one or more computer programs, which may be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general programmable processor, which may receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0113] The computer programs for implementing the methods of the embodiments of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer programs are executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer programs may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0114] In the context of an embodiment of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by an instruction execution system, device or equipment or used in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a RAM, a ROM, an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0115] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a cathode ray tube or a liquid crystal display monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including: acoustic input, voice input, or tactile input).

[0116] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local area networks, wide area networks, blockchain networks, and the Internet.

[0117] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the respective computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and virtual private server services.

[0118] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0119] The above specific implementations do not constitute a limitation on the protection scope of the embodiments of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. An Ethernet testing method, characterized in that: The method comprises: The level signal and Ethernet link data of the target network are obtained through the level sampler and the physical layer chip respectively; Aligning the level signal and the Ethernet link data based on time to obtain fusion alignment information; A test result of the target network is generated according to the fused alignment information.

2. The method according to claim 1, characterized in that: The step of obtaining the level signal and Ethernet link data of the target network through the level sampler and the physical layer chip respectively includes: Acquire the level signal of at least one node in the target network through the level sampler, and set a first timestamp of the level signal; The Ethernet link data of the node is acquired in the target network through the physical layer chip, and a second timestamp is set for the Ethernet link data.

3. The method according to claim 2, characterized in that: The level signal includes at least one of a macro cycle, a link transmission signal, a link reception signal and a synchronization pulse signal.

4. The method according to claim 1 or 2, characterized in that: The step of aligning the level signal and the Ethernet link data based on time to obtain fusion alignment information includes: Comparing the first timestamp of each level signal with the second timestamp of each Ethernet link data respectively, and when the first timestamp is the same as the second timestamp, determining that the target level signal of the first timestamp matches the target Ethernet link data of the second timestamp; For the matched target level signal and the target Ethernet link data, an association relationship between the target level signal and the target Ethernet link data is set, and the target level signal and the target Ethernet link data having the association relationship are used as the fusion alignment information.

5. The method according to claim 1, characterized in that: The generating the test result of the target network according to the fusion alignment information includes: Determining target fusion information corresponding to each node in the target network in each of the fusion alignment information; Extracting the Ethernet link message of the target fusion information of each node; The Ethernet link messages belonging to the same node are analyzed to obtain the scheduling information corresponding to the node as the test result, wherein the scheduling information includes the master-slave identification, the sending offset, the synchronization accuracy and the transmission delay.

6. The method according to claim 1, characterized in that: The generating the test result of the target network according to the fusion alignment information includes: Extracting target fusion alignment information corresponding to the test time from the fusion alignment information; Counting the number of messages of the target fusion alignment information within the test time; Extracting the cyclic redundancy check of the target fusion alignment information, counting the number of check failures and the number of checks of each cyclic redundancy check, and determining the bit error rate corresponding to the number of check failures and the number of checks; Extracting the source address and / or destination address of the target fusion alignment information, and determining the online status of the corresponding node according to the source address and / or destination address; The online status, the number of messages and the bit error rate are used as the test results.

7. The method according to claim 6, characterized in that: The extracting the source address and / or the destination address of the target fusion alignment information, and determining the online status of the corresponding node according to the source address and / or the destination address, includes: Extracting the macrocycle of the target fusion alignment information, and classifying each target fusion alignment information according to the macrocycle to obtain a target information set; For each of the macro cycles, a node register corresponding to the source address and / or the destination address in the target information set is determined, and a state flag bit of the online state is set in the node register.

8. An Ethernet testing device, characterized in that: The device comprises: A data acquisition module, used to acquire the level signal and Ethernet link data of the target network through a physical layer chip and a level sampler respectively; An information alignment module, used for aligning the level signal and the Ethernet link data based on time to obtain fusion alignment information; A result analysis module is used to generate a test result of the target network according to the fusion alignment information.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can perform the Ethernet testing method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the Ethernet testing method according to any one of claims 1 to 7 when executed.

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