Preparation method of TOPCon battery

Abstract

The invention relates to a preparation method of a TOPCon battery, which comprises the following steps of: performing double-sided texturing on an N-type silicon substrate, and performing boron diffusion on the textured surface on the front surface to form a P + emitter layer and a borosilicate glass layer; polishing the back surface, and printing a mask layer on a non-metallization area on the polished surface; sequentially depositing a tunneling oxide layer and a phosphorus-doped polycrystalline silicon layer on the back surface of the N-type silicon substrate; scanning the non-metallization area on the back surface by using laser, and removing the phosphorosilicate glass layer, the phosphorus-doped polycrystalline silicon layer and the tunneling oxide layer on the surface by using alkali liquor; removing the borosilicate glass layer and the phosphorosilicate glass layer on the front surface of the N-type silicon substrate, the phosphorosilicate glass layer on the back surface of the N-type silicon substrate and the tunneling oxide layer and the mask layer remained in the non-metallization area; depositing an aluminum oxide layer and a silicon nitride layer on the front surface and the back surface of the N-type silicon substrate; and respectively printing metal electrodes on the metalized areas on the front surface and the back surface of the N-type silicon substrate to obtain the TOPCon battery. The invention has the effects of reducing the possibility that the N-type silicon substrate is damaged and improving the overall efficiency of the battery.

Description

Technical Field

[0001] The present application relates to the technical field of solar cells, and in particular to a method for preparing a TOPCon cell. Background Art

[0002] TOPCon (Tunnel Oxide Passivating Contact) is an N-type silicon substrate battery. An ultra-thin layer of silicon oxide is prepared on the back of the battery, and then a thick doped polysilicon layer is deposited. The two together form a passivating contact structure.

[0003] There is a Chinese invention patent with publication number CN118380508A, which discloses a solar cell and a preparation method thereof. The laser is used to process the position corresponding to the non-metallized area on the back of the silicon wafer, and the phosphorus-silicate glass layer on the surface of the phosphorus-doped polysilicon layer in this area is removed or the phosphorus-silicate glass layer on the surface of the phosphorus-doped polysilicon layer in this area is modified into a loose structure, and the polysilicon coating on the front and side surfaces is removed by alkali washing, and the phosphorus-doped polysilicon layer and the back tunneling oxide layer remaining in the non-metallized area irradiated by the back laser are removed, and the N-type silicon substrate is etched back 50nm to 5μm to ensure that the poly in the laser area is completely corroded to avoid the residual poly in the laser area causing the poly on the side to be not removed cleanly, causing leakage.

[0004] Although etching back the N-type silicon substrate can ensure that the poly in the laser area is cleanly removed, the silicon substrate is thinned and the silicon substrate tower base under the laser area is damaged, which easily forms small tower base stacking or tower base enlargement, thereby affecting the subsequent passivation effect and failing to maximize the overall efficiency of the battery. Summary of the invention

[0005] In order to reduce the possibility of damage to the silicon substrate tower base, the present application provides a TOPCon battery preparation method.

[0006] The present application provides a TOPCon battery preparation method, which adopts the following technical solution:

[0007] A TOPCon battery preparation method, comprising:

[0008] Double-sided texturing is performed on the N-type silicon substrate, and boron diffusion is performed on the texturing surface on the front side of the N-type silicon substrate to form a P+ emitter layer and a borosilicate glass layer, and the side junction is removed to retain the borosilicate glass layer on the front side;

[0009] The back side of the N-type silicon substrate is polished, and a layer of silicon oxide is printed on the non-metallized area of ​​the polished surface as a mask layer;

[0010] Depositing a tunneling oxide layer and a phosphorus-doped polysilicon layer in sequence on the back side of the N-type silicon substrate after forming the mask layer, wherein phosphorus is doped on the deposited polysilicon layer to form the phosphorus-doped polysilicon layer;

[0011] The non-metallized area on the back of the N-type silicon substrate is scanned by laser, and the phosphorus silicon glass layer, phosphorus-doped polysilicon layer and tunnel oxide layer on the surface are removed by alkaline solution;

[0012] The borosilicate glass layer and the phosphosilicate glass layer on the front side of the N-type silicon substrate, the phosphosilicate glass layer on the back side, and the tunnel oxide layer and the mask layer remaining in the non-metallized area are removed to expose the silicon substrate in the non-metallized area;

[0013] An aluminum oxide layer and a silicon nitride layer are sequentially deposited on the front and back sides of an N-type silicon substrate;

[0014] Metal electrodes are printed on the front and back metallization areas of the N-type silicon substrate to obtain a TOPCon cell.

[0015] Optionally, the mask layer has a thickness of 5 to 100 nm.

[0016] Optionally, an alkali washing method is used to polish the back side of the N-type silicon substrate.

[0017] Optionally, the thickness of the polysilicon layer is 50-200 nm.

[0018] Optionally, the thickness of the tunnel oxide layer is 1-3 nm.

[0019] Optionally, the concentration of the alkali solution in removing the phosphosilicate glass layer, the phosphorus-doped polysilicon layer and the tunnel oxide layer on the surface by using the alkali solution is 3-50%, and the processing time is 200-400s.

[0020] Optionally, when the laser is used to scan the non-metallized area on the back side of the N-type silicon substrate, the wavelength of the laser is 300-1100 nm, the frequency is 500-1000 kHz, the scanning speed is 10-200 m / s, and the spot size is >200 μm.

[0021] Optionally, the phosphorus doping concentration in the phosphorus doping on the deposited polysilicon layer is 1×10 19 cm -3 ~5x10 20 cm -3 .

[0022] Optionally, the area where the laser is used to scan the non-metallized area on the back side of the N-type silicon substrate is consistent in size with the mask layer area.

[0023] Optionally, wet double-sided acid is used to remove the borosilicate glass layer and the phosphosilicate glass layer on the front side of the N-type silicon substrate, the phosphosilicate glass layer on the back side, and the tunneling oxide layer and the mask layer remaining in the non-metallized area.

[0024] In summary, the present application includes at least one of the following beneficial technical effects:

[0025] By printing a thicker layer of silicon oxide slurry as a mask layer on the non-metallized area based on polishing the back of the N-type silicon substrate, the tunneling oxide layer and the phosphorus-doped polysilicon layer subsequently deposited on the back are isolated from contact with the silicon substrate. The phosphorus-doped polysilicon layer and the tunneling oxide layer in the non-metallized area can be completely removed by laser film opening technology and wet process, reducing damage to the silicon substrate while having no effect on the tower base on the silicon substrate. While ensuring the passivation contact structure in the metallized area, the efficiency of the battery is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a schematic diagram of the structure of the mask layer in the embodiment of the present application.

[0027] Figure 2 It is a schematic diagram of the structure of the tunnel oxide layer and the phosphorus-doped polysilicon layer in the embodiment of the present application.

[0028] Figure 3 It is a schematic diagram of the structure of the TOPCon battery in the embodiment of the present application.

[0029] In the figure, 1, N-type silicon substrate; 2, P+ emitter; 3, mask layer; 4, front aluminum oxide layer; 5, front silicon nitride layer; 6, front electrode; 7, tunneling oxide layer; 8, phosphorus-doped polysilicon layer; 9, back aluminum oxide layer; 10, back silicon nitride layer; 11, back electrode. DETAILED DESCRIPTION

[0030] The following is combined with Figure 1-3 This application is described in further detail.

[0031] This specific embodiment is merely an explanation of the present application and is not a limitation of the present application. After reading this specification, those skilled in the art may make modifications to the present embodiment without any creative contribution as needed, but such modifications are protected by the patent law as long as they are within the scope of the claims of the present application.

[0032] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0033] In addition, the term "and / or" in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article, unless otherwise specified, generally means that the associated objects before and after are in an "or" relationship.

[0034] The present application provides a TOPCon battery preparation method, comprising:

[0035] S1: Double-sided texturing is performed on the N-type silicon substrate, and boron diffusion is performed on the texturing surface on the front side of the N-type silicon substrate to form a P+ emitter layer and a borosilicate glass layer, and the side junction is removed to retain the borosilicate glass layer on the front side;

[0036] S2: polishing the back side of the N-type silicon substrate, and printing a layer of silicon oxide as a mask layer on the non-metallized area of ​​the polished surface;

[0037] S3: depositing a tunneling oxide layer and a phosphorus-doped polysilicon layer in sequence on the back side of the N-type silicon substrate after forming the mask layer, wherein phosphorus is doped on the deposited polysilicon layer to form a phosphorus-doped polysilicon layer;

[0038] S4: Scan the non-metallized area on the back of the N-type silicon substrate with a laser, and remove the phosphorus silicon glass layer, phosphorus-doped polysilicon layer and tunnel oxide layer on the surface with an alkaline solution;

[0039] S5: removing the borosilicate glass layer and the phosphosilicate glass layer on the front side of the N-type silicon substrate, the phosphosilicate glass layer on the back side, and the tunneling oxide layer and the mask layer remaining in the non-metallized area, exposing the silicon substrate in the non-metallized area;

[0040] S6: depositing an aluminum oxide layer and a silicon nitride layer on the front and back sides of the N-type silicon substrate in sequence;

[0041] S7: Print metal electrodes on the front and back metallization areas of the N-type silicon substrate to obtain a TOPCon battery.

[0042] In an embodiment of the present application, step S1 can use alkaline corrosion to perform double-sided texturing on the N-type silicon substrate to form a nano-scale texturing surface on the front and back sides of the N-type silicon substrate; step S1 can use any boron source to diffuse boron on the front side of the texturized N-type silicon substrate, without specific limitation, and optionally, BCl3 or BBr3 gas can be introduced for boron diffusion; in step S1, any chemical solution that can dissolve the edge junction without affecting the borosilicate glass layer can be used, without specific limitation, and optionally, HF solution can be used.

[0043] In the embodiment of the present application, step S2 can use any method to polish the back side of the N-type silicon substrate, which is not specifically limited. Optionally, an alkali cleaning method is used to polish the back side of the N-type silicon substrate. For example, a NaOH solution is used to polish the back side of the N-type silicon substrate. After polishing the back side of the N-type silicon substrate, Figure 1 As shown, a layer of silicon oxide slurry is printed on the non-metallized area on the polished surface of the back side of the N-type silicon substrate 1 as a mask layer 3, wherein the thickness of the mask layer is 5 to 100 nm, and optionally, the thickness of the mask layer can be 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, 50 nm, 55 nm, 60 nm, 65 nm, 70 nm, 75 nm, 80 nm, 85, 90 nm, 95 nm, 100 nm m or any value therebetween; by setting a mask layer, the process window of the laser can be made larger. At the same time, when the phosphorus-doped polysilicon layer is removed by wet alkali cleaning, the existence of the mask layer can make the alkali cleaning degree greater (alkali reacts slowly with silicon oxide), the time longer, and the cleaning effect more obvious; subsequently, HF is used to remove the residual oxide layer and silicon oxide mask; without adding a mask layer, the tower base in the non-metallized area becomes larger after the wet process, and there will be a tower base stacking phenomenon, the surface is uneven, and it affects the subsequent passivation.

[0044] In the embodiment of the present application, step S3 can use any method to sequentially deposit a tunnel oxide layer and a phosphorus-doped polysilicon layer on the back side of the N-type silicon substrate after forming the mask layer. Optionally, LPCVD technology, i.e., low pressure chemical vapor deposition technology, can be used, such as Figure 2 As shown, a tunnel oxide layer 7 and a phosphorus-doped polysilicon layer 8 are sequentially deposited on the back of an N-type silicon substrate 1 by using LPCVD technology; phosphorus is doped on the deposited polysilicon layer to obtain a phosphorus-doped polysilicon layer, and the phosphorus doping concentration is 1x10 19 cm -3 ~5x10 20 cm -3 , optionally, the phosphorus doping concentration can be 1x10 19 cm -3 , 2x10 19 cm -3 , 3x1019 cm -3 , 4x10 19 cm -3 , 5x10 19 cm -3 , 5x10 20 cm -3 or any value in between.

[0045] During the phosphorus doping process on the back side of the N-type substrate, the phosphorus source decomposes at high temperature to generate phosphorus pentoxide, which reacts with silicon in the polysilicon layer to generate phosphorus atoms and silicon dioxide, that is, the mixture is phosphosilicate glass, and the above-mentioned phosphosilicate glass layer is obtained.

[0046] In step S3, the thickness of the tunnel oxide layer is 1-3 nm. Optionally, the thickness of the tunnel oxide layer can be 1 nm, 1.5 nm, 2 nm, 2.5 nm, 3 nm or any value therebetween.

[0047] In step S3, the thickness of the polysilicon layer is 50-200 nm. Optionally, the thickness of the phosphorus-doped polysilicon layer can be 50 nm, 100 nm, 150 nm, 200 nm or any value therebetween.

[0048] In this embodiment, in step S4, the area where the laser is used to scan the non-metallized area on the back side of the N-type silicon substrate is consistent in size with the mask layer area.

[0049] In step S4, the wavelength of the laser is 300-1100nm, the frequency is 500-1000kHz, the scanning speed is 10-200m / s, and the spot size is >200μm. Optionally, the wavelength of the laser can be 300nm, 400nm, 500nm, 600nm, 700nm, 800nm, 900nm, 1000nm, 1110nm or any value therebetween, the frequency can be 500kHz, 600kHz, 700kHz, 800kHz, 900kHz, 100kHz or any value therebetween, and the spot size can be 210μm, 200μm or any value greater than 200μm.

[0050] In step S4, the concentration of the alkali solution is 3-50%, and the processing time is 200-400 s. Optionally, the concentration of the alkali solution can be 3%, 9%, 15%, 21%, 27%, 33%, 39%, 45%, 50% or any value therebetween; the processing time can be 200 s, 250 s, 300 s, 350 s, 400 s or any value therebetween.

[0051] In this embodiment, in step S5, wet double-sided acid is used to remove the borosilicate glass layer and the phosphosilicate glass layer on the front side of the N-type silicon substrate, the phosphosilicate glass layer on the back side, and the tunneling oxide layer and the mask layer remaining in the non-metallized area. Optionally, HF can be used for washing. HF reacts with silicon oxide and basically does not react with the silicon substrate, thereby ensuring clean removal.

[0052] In this embodiment, in step S6, an aluminum oxide layer is deposited on the front and back sides of the N-type silicon substrate by using ALD, and a silicon nitride layer is deposited by using PECVD.

[0053] In step S7, metal electrodes are respectively printed on the front and back metallized areas of the N-type silicon substrate processed in step S6 by screen printing, thereby obtaining a TOPCon battery.

[0054] Reference Figure 3 The TOPCon cell obtained through the above steps includes an N-type silicon substrate 1, on the front side of which a P+ emitter 2, a front aluminum oxide layer 4, a front silicon nitride layer 5 and a front electrode 6 are sequentially stacked, and on the back side of the N-type silicon substrate a back tunneling oxide layer 7, a phosphorus-doped polysilicon layer 8, a back aluminum oxide layer 9, a back silicon nitride layer 10 and a back electrode 11 are sequentially stacked.

[0055] Example 1

[0056] S1: Use alkaline corrosion to texture the double sides of the N-type silicon substrate, introduce BBr3 gas into the texture surface on the front side of the N-type silicon substrate for boron diffusion to form a P+ emitter layer and a borosilicate glass layer, remove the side junction and retain the borosilicate glass layer on the front side;

[0057] S2: polishing the back side of the N-type silicon substrate by alkaline washing, and printing a layer of silicon oxide coating with a thickness of 5 nm as a mask layer on the non-metallized area of ​​the polished surface;

[0058] S3: After forming the mask layer, a tunnel oxide layer with a thickness of 2 nm and a phosphorus-doped polysilicon layer with a thickness of 60 nm are sequentially deposited on the back of the N-type silicon substrate by LPCVD. 19 cm -3 Phosphorus is doped to form a phosphorus-doped polysilicon layer.

[0059] S4: Scan the non-metallized area on the back of the N-type silicon substrate with a laser having a wavelength of 400 nm, a frequency of 600 kHz, a scanning speed of 50 m / s, and a spot size of 210 μm, and treat the back of the N-type silicon substrate with an alkali solution having a concentration of 20% for 300 s to remove the phosphosilicate glass layer, the phosphorus-doped polysilicon layer, and the tunneling oxide layer on the surface;

[0060] S5: using HF to remove the borosilicate glass layer and the phosphosilicate glass layer on the front side of the N-type silicon substrate, the phosphosilicate glass layer on the back side, and the tunneling oxide layer and the mask layer remaining in the non-metallized area, exposing the silicon substrate in the non-metallized area;

[0061] S6: depositing an aluminum oxide layer on the front and back sides of the N-type silicon substrate by using an ALD method and depositing a silicon nitride layer by using a PECVD method;

[0062] S7: Printing metal electrodes on the front and back metallization areas of the N-type silicon substrate by screen printing to obtain a TOPCon battery.

[0063] Example 2

[0064] S1: Use alkaline corrosion to texture the double sides of the N-type silicon substrate, introduce BBr3 gas into the texture surface on the front side of the N-type silicon substrate for boron diffusion to form a P+ emitter layer and a borosilicate glass layer, remove the side junction and retain the borosilicate glass layer on the front side;

[0065] S2: polishing the back side of the N-type silicon substrate by alkaline washing, and printing a layer of silicon oxide coating with a thickness of 50 nm as a mask layer on the non-metallized area of ​​the polished surface;

[0066] S3: After forming the mask layer, a tunnel oxide layer with a thickness of 2 nm and a phosphorus-doped polysilicon layer with a thickness of 60 nm are sequentially deposited on the back of the N-type silicon substrate by LPCVD. 19 cm -3 Phosphorus is doped to form a phosphorus-doped polysilicon layer.

[0067] S4: Scan the non-metallized area on the back of the N-type silicon substrate with a laser having a wavelength of 400 nm, a frequency of 600 kHz, a scanning speed of 50 m / s, and a spot size of 210 μm, and treat the back of the N-type silicon substrate with an alkali solution having a concentration of 20% for 300 s to remove the phosphosilicate glass layer, the phosphorus-doped polysilicon layer, and the tunneling oxide layer on the surface;

[0068] S5: using HF to remove the borosilicate glass layer and the phosphosilicate glass layer on the front side of the N-type silicon substrate, the phosphosilicate glass layer on the back side, and the tunneling oxide layer and the mask layer remaining in the non-metallized area, exposing the silicon substrate in the non-metallized area;

[0069] S6: depositing an aluminum oxide layer on the front and back sides of the N-type silicon substrate by using an ALD method and depositing a silicon nitride layer by using a PECVD method;

[0070] S7: Printing metal electrodes on the front and back metallization areas of the N-type silicon substrate by screen printing to obtain a TOPCon battery.

[0071] Example 3

[0072] S1: Use alkaline corrosion to texture the double sides of the N-type silicon substrate, introduce BBr3 gas into the texture surface on the front side of the N-type silicon substrate for boron diffusion to form a P+ emitter layer and a borosilicate glass layer, remove the side junction and retain the borosilicate glass layer on the front side;

[0073] S2: polishing the back side of the N-type silicon substrate by alkaline washing, and printing a layer of silicon oxide coating with a thickness of 100 nm as a mask layer on the non-metallized area of ​​the polished surface;

[0074] S3: After forming the mask layer, a tunnel oxide layer with a thickness of 2 nm and a phosphorus-doped polysilicon layer with a thickness of 60 nm are sequentially deposited on the back of the N-type silicon substrate by LPCVD. 19 cm -3 Phosphorus is doped to form a phosphorus-doped polysilicon layer.

[0075] S4: Scan the non-metallized area on the back of the N-type silicon substrate with a laser having a wavelength of 400 nm, a frequency of 600 kHz, a scanning speed of 50 m / s, and a spot size of 210 μm, and treat the back of the N-type silicon substrate with an alkali solution having a concentration of 20% for 300 s to remove the phosphosilicate glass layer, the phosphorus-doped polysilicon layer, and the tunneling oxide layer on the surface;

[0076] S5: using HF to remove the borosilicate glass layer and the phosphosilicate glass layer on the front side of the N-type silicon substrate, the phosphosilicate glass layer on the back side, and the tunneling oxide layer and the mask layer remaining in the non-metallized area, exposing the silicon substrate in the non-metallized area;

[0077] S6: depositing an aluminum oxide layer on the front and back sides of the N-type silicon substrate by using an ALD method and depositing a silicon nitride layer by using a PECVD method;

[0078] S7: Printing metal electrodes on the front and back metallization areas of the N-type silicon substrate by screen printing to obtain a TOPCon battery.

[0079] Comparative Example 1

[0080] S1: Use alkaline corrosion to texture the double sides of the N-type silicon substrate, introduce BBr3 gas into the texture surface on the front side of the N-type silicon substrate for boron diffusion to form a P+ emitter layer and a borosilicate glass layer, remove the side junction and retain the borosilicate glass layer on the front side;

[0081] S2: polishing the back side of the N-type silicon substrate by alkaline washing;

[0082] S3: On the back of the N-type silicon substrate, a 2nm thick tunnel oxide layer and a 60nm thick phosphorus-doped polysilicon layer are sequentially deposited by LPCVD. The concentration of the deposited polysilicon layer is 1x1019 cm -3 Phosphorus is doped to form a phosphorus-doped polysilicon layer.

[0083] S4: Scan the non-metallized area on the back of the N-type silicon substrate with a laser having a wavelength of 400 nm, a frequency of 600 kHz, a scanning speed of 50 m / s, and a spot size of 210 μm, and treat the back of the N-type silicon substrate with an alkali solution having a concentration of 20% for 300 s to remove the phosphosilicate glass layer, the phosphorus-doped polysilicon layer, and the tunneling oxide layer on the surface;

[0084] S5: using HF to remove the borosilicate glass layer and the phosphosilicate glass layer on the front side of the N-type silicon substrate, the phosphosilicate glass layer on the back side, and the tunneling oxide layer and the mask layer remaining in the non-metallized area, exposing the silicon substrate in the non-metallized area;

[0085] S6: depositing an aluminum oxide layer on the front and back sides of the N-type silicon substrate by using an ALD method and depositing a silicon nitride layer by using a PECVD method;

[0086] S7: Printing metal electrodes on the front and back metallization areas of the N-type silicon substrate by screen printing to obtain a TOPCon battery.

[0087] Comparative Example 2

[0088] S1: Use alkaline corrosion to texture the double sides of the N-type silicon substrate, introduce BBr3 gas into the texture surface on the front side of the N-type silicon substrate for boron diffusion to form a P+ emitter layer and a borosilicate glass layer, remove the side junction and retain the borosilicate glass layer on the front side;

[0089] S2: polishing the back side of the N-type silicon substrate by alkaline washing, and printing a layer of silicon oxide coating with a thickness of 3 nm as a mask layer on the non-metallized area of ​​the polished surface;

[0090] S3: On the back of the N-type silicon substrate, a 2nm thick tunnel oxide layer and a 60nm thick phosphorus-doped polysilicon layer are sequentially deposited by LPCVD. The concentration of the deposited polysilicon layer is 1x10 19 cm -3 Phosphorus is doped to form a phosphorus-doped polysilicon layer.

[0091] S4: Scan the non-metallized area on the back of the N-type silicon substrate with a laser having a wavelength of 400 nm, a frequency of 600 kHz, a scanning speed of 50 m / s, and a spot size of 210 μm, and treat the back of the N-type silicon substrate with an alkali solution having a concentration of 20% for 300 s to remove the phosphosilicate glass layer, the phosphorus-doped polysilicon layer, and the tunneling oxide layer on the surface;

[0092] S5: using HF to remove the borosilicate glass layer and the phosphosilicate glass layer on the front side of the N-type silicon substrate, the phosphosilicate glass layer on the back side, and the tunneling oxide layer and the mask layer remaining in the non-metallized area, exposing the silicon substrate in the non-metallized area;

[0093] S6: depositing an aluminum oxide layer on the front and back sides of the N-type silicon substrate by using an ALD method and depositing a silicon nitride layer by using a PECVD method;

[0094] S7: Printing metal electrodes on the front and back metallization areas of the N-type silicon substrate by screen printing to obtain a TOPCon battery.

[0095] Comparative Example 3

[0096] S1: Use alkaline corrosion to texture the double sides of the N-type silicon substrate, introduce BBr3 gas into the texture surface on the front side of the N-type silicon substrate for boron diffusion to form a P+ emitter layer and a borosilicate glass layer, remove the side junction and retain the borosilicate glass layer on the front side;

[0097] S2: polishing the back side of the N-type silicon substrate by alkaline washing, and printing a layer of silicon oxide coating with a thickness of 110 nm as a mask layer on the non-metallized area of ​​the polished surface;

[0098] S3: On the back of the N-type silicon substrate, a 2nm thick tunnel oxide layer and a 60nm thick phosphorus-doped polysilicon layer are sequentially deposited by LPCVD. The concentration of the deposited polysilicon layer is 1x10 19 cm -3 Phosphorus is doped to form a phosphorus-doped polysilicon layer.

[0099] S4: Scan the non-metallized area on the back of the N-type silicon substrate with a laser having a wavelength of 400 nm, a frequency of 600 kHz, a scanning speed of 50 m / s, and a spot size of 210 μm, and treat the back of the N-type silicon substrate with an alkali solution having a concentration of 20% for 300 s to remove the phosphosilicate glass layer, the phosphorus-doped polysilicon layer, and the tunneling oxide layer on the surface;

[0100] S5: using HF to remove the borosilicate glass layer and the phosphosilicate glass layer on the front side of the N-type silicon substrate, the phosphosilicate glass layer on the back side, and the tunneling oxide layer and the mask layer remaining in the non-metallized area, exposing the silicon substrate in the non-metallized area;

[0101] S6: depositing an aluminum oxide layer on the front and back sides of the N-type silicon substrate by using an ALD method and depositing a silicon nitride layer by using a PECVD method;

[0102] S7: Printing metal electrodes on the front and back metallization areas of the N-type silicon substrate by screen printing to obtain a TOPCon battery.

[0103] Table 1 shows the tower base sizes corresponding to the mask layer thicknesses in Example 1, Example 2, Example 3 and Comparative Example 1, Comparative Example 2, Comparative Example 3.

[0104] Table 1

[0105] category Mask layer thickness (nm) Tower base size (μm) Comparative Example 1 0 20-24 Comparative Example 2 3 19-22 Comparative Example 3 110 8-9 Example 1 5 18-20 Example 2 50 12-16 Example 3 100 8-10

[0106] pass Figure 1 , Figure 2 , Figure 3 As shown in Table 1, a layer of silicon oxide slurry is printed on the non-metallized area of ​​the N-type silicon substrate as a mask layer. Through LPCVD deposition and thermal diffusion, the non-metallized area of ​​the N-type silicon substrate has a mask layer, a tunneling oxide layer, a phosphorus-doped polysilicon layer, and a phosphosilicate glass layer from the inside to the outside; the metallized area has a tunneling oxide layer, a phosphorus-doped polysilicon layer, and a phosphosilicate glass layer from the inside to the outside; the non-metallized area is scanned by laser, and the phosphosilicate glass layer, the phosphorus-doped polysilicon layer, and the tunneling oxide layer in the laser scanning area are removed by alkali washing; HF is used to remove the remaining tunneling oxide layer and the silicon oxide mask layer in the laser scanning area, and the complete silicon substrate is retained, that is, the tower base is not damaged.

[0107] By setting a mask layer, the process window of the laser can be made larger. At the same time, when the phosphorus-doped polysilicon layer is removed by wet alkali cleaning, the presence of the mask layer can make the alkali cleaning degree greater (alkali reacts slowly with silicon oxide), the time longer, and the cleaning effect more obvious. Subsequently, HF is used to remove the remaining oxide layer and silicon oxide mask. Without a mask layer, the tower base in the non-metallized area becomes larger after the wet process, and there will be a tower base stacking phenomenon, the surface is uneven, and it affects the subsequent passivation.

[0108] Performance Test:

[0109] The TOPCon battery electrodes of Example 1, Example 2, Example 3 and Comparative Example 1 and Comparative Example 2 were selected for performance testing, and the test results are shown in Table 2.

[0110] Table 2

[0111]

[0112]

[0113] Taking Example 1 of the present invention as an example; the TOPCon battery conversion efficiency (eta) obtained by testing the solar cell automatic sorting PL+IV integrated machine is 0.29% higher than the TOPCon battery obtained in Comparative Example 1, specifically, the opening voltage (uoc) is 2.45mV higher, the short current (isc) is increased by 90mA, and the filling (ff) is increased by 0.19%. The TOPCon battery obtained in Comparative Example 2 is 0.09% higher, specifically, the opening voltage (uoc) is 0.9mV higher, the short current (isc) is increased by 10mA, and the filling (ff) is increased by 0.17%. Therefore, the efficiency of the TOPCon battery obtained by the preparation method of the present invention is improved.

[0114] Performance Test:

[0115] The TOPCon battery electrodes of Example 3 and Comparative Example 3 were selected for performance testing, and the test results are shown in Table 3.

[0116] Table 3

[0117]

[0118] For Example 3 and Comparative Example 3, the TOPCon cell conversion efficiency (eta) tested by the solar cell automatic sorting PL+IV integrated machine is the same, the opening voltage (uoc) is the same, the short current (isc) is the same, the filling (ff) rise is the same, and only the thickness of the mask layer is different. The thicker the mask layer, the higher the cost. Since the effects achieved by Comparative Example 3 and Example 3 are the same, in order to save costs, the mask layer thickness is selected to be 100nm.

[0119] The terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion such that a process, method, article, or apparatus that includes a list of elements includes not only those elements but also other elements not expressly listed, or also includes elements inherent to such process, method, article, or apparatus.

[0120] The above description is only a preferred embodiment of the present application and an explanation of the technical principles used. Those skilled in the art should understand that the scope of application involved in the present application is not limited to the technical solution formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the aforementioned application concept. For example, the above features are replaced with (but not limited to) technical features with similar functions applied in the present application.

Claims

1. A method for preparing a TOPCon battery, characterized in that: include: Double-sided texturing is performed on the N-type silicon substrate, and boron diffusion is performed on the texturing surface on the front side of the N-type silicon substrate to form a P+ emitter layer and a borosilicate glass layer, and the side junction is removed to retain the borosilicate glass layer on the front side; The back side of the N-type silicon substrate is polished, and a layer of silicon oxide is printed on the non-metallized area of ​​the polished surface as a mask layer; Depositing a tunneling oxide layer and a phosphorus-doped polysilicon layer in sequence on the back side of the N-type silicon substrate after forming the mask layer, wherein phosphorus is doped on the deposited polysilicon layer to form the phosphorus-doped polysilicon layer; The non-metallized area on the back of the N-type silicon substrate is scanned by laser, and the phosphorus silicon glass layer, phosphorus-doped polysilicon layer and tunnel oxide layer on the surface are removed by alkaline solution; The borosilicate glass layer and the phosphosilicate glass layer on the front side of the N-type silicon substrate, the phosphosilicate glass layer on the back side, and the tunnel oxide layer and the mask layer remaining in the non-metallized area are removed to expose the silicon substrate in the non-metallized area; An aluminum oxide layer and a silicon nitride layer are sequentially deposited on the front and back sides of an N-type silicon substrate; Metal electrodes are printed on the front and back metallization areas of the N-type silicon substrate to obtain a TOPCon cell.

2. The method according to claim 1, characterized in that The thickness of the mask layer is 5-100 nm.

3. The method according to claim 1, characterized in that The back side of the N-type silicon substrate is polished by an alkali washing method.

4. The method according to claim 1, characterized in that The thickness of the polysilicon layer is 50-200 nm.

5. The method according to claim 1, characterized in that The thickness of the tunnel oxide layer is 1-3 nm.

6. The method according to claim 1, characterized in that The concentration of the alkali solution in removing the surface phosphorus silicon glass layer, phosphorus-doped polysilicon layer and tunnel oxide layer by using alkali solution is 3-50%, and the processing time is 200-400s.

7. The method according to claim 1, characterized in that In the laser scanning of the non-metallized area on the back of the N-type silicon substrate, the wavelength of the laser is 300-1100nm, the frequency is 500-1000kHz, the scanning speed is 10-200m / s, and the spot size is >200μm.

8. The method according to claim 1, characterized in that The concentration of phosphorus doping in the phosphorus doping on the deposited polysilicon layer is 1×10 19 cm -3 ~5x10 20 cm -3 .

9. The method according to claim 1, characterized in that: The area where the laser is used to scan the non-metallized area on the back of the N-type silicon substrate is consistent in size with the mask layer area.

10. The method according to claim 1, characterized in that Wet double-sided acid is used to remove the borosilicate glass layer and the phosphosilicate glass layer on the front side of the N-type silicon substrate, the phosphosilicate glass layer on the back side, and the tunneling oxide layer and the mask layer remaining in the non-metallized area.

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