Rectification memristor with synaptic simulation function and application thereof

Abstract

The invention discloses a rectification memristor with a synaptic simulation function and application thereof, and belongs to the field of artificial intelligence. The memristive device adopts a sandwich structure and is sequentially composed of an upper Ag electrode, an AgI and PbI2 functional layer and a lower ITO electrode. The memristor provided by the invention has a rectification characteristic, effectively solves the sneak current problem in crossbar integration, and ensures accurate reading of device data in an array. Meanwhile, good nerve synaptic functions including dipulse suppression, dipulse simplification, long and short range memory response and synaptic weight plasticity are achieved under circulating electric pulses, and human brain nerve synaptic processing, learning and working behaviors and the like can be simulated. According to the invention, the PbI2 material is successfully applied to integration of multiple functions of rectification, storage and neuromorphic simulation for the first time, and a new possibility is developed for application in the fields of neuromorphic simulation and artificial neural networks.

Description

Technical Field

[0001] The present invention relates to the field of artificial intelligence, and specifically proposes a rectifier memristor having a synaptic simulation function and a preparation method thereof, which can effectively solve the problem of sneak current in a crossbar array, aiming to achieve accurate reading of information and demonstrate its application potential in the fields of electronic synapse and neuromorphic simulation. Background Art

[0002] As a new computing architecture, neuromorphic simulation demonstrates significant advantages in parallel processing and in-memory computing by simulating the information processing mechanism of the human brain. Memristors are considered to be ideal devices for neuromorphic simulation because of their working characteristics similar to biological synapses. Especially in the crossbar array structure, memristors can efficiently simulate the connection strength between synapses, laying the foundation for building large-scale artificial neural networks.

[0003] However, the sneak current problem in the crossbar array severely restricts the accuracy of the device current reading and the accuracy of its neuromorphic signals. When a specific unit in the array is read, the current will generate crosstalk through non-target paths, resulting in distortion of the read signal. This distortion directly affects the precise expression of synaptic weights, thereby reducing the computational accuracy of the entire neural network. In pattern recognition tasks, weight reading errors caused by sneak currents may lead to a significant decrease in classification accuracy.

[0004] The rectifier memristor can effectively suppress sneak current through its nonlinear conductivity characteristics. Under forward bias, the device exhibits good conductivity, and under reverse bias, it exhibits a high resistance state. This characteristic ensures that the current flows only along the desired path. Compared with the traditional 1S1R or 1D1R structure, the rectifier memristor does not require additional gating elements, which not only maintains high integration, but also provides reliable synaptic weight storage and reading functions, thereby improving the computational accuracy of the neural network.

[0005] PbI2, as a low-melting-point ionic semiconductor material, exhibits excellent memristive properties due to its simple preparation process. However, in the crossbar high-density array structure, the inherent crosstalk current problem has become an obstacle that cannot be ignored, and has brought challenges to the data accuracy of the data reading and neuromorphic simulation of PbI2 memristors. Therefore, it is urgent to carefully design a device structure based on PbI2 materials, in order to realize a crossbar array architecture with rectification function based on PbI2 functional materials, and realize accurate and error-free reading of PbI2 data and its neuromorphic simulation function. Summary of the invention

[0006] The technical problem to be solved by the present invention is: a rectifier memristor with synaptic simulation function and its application disclosed in the present invention, the prepared device Ag / AgI / PbI2 / ITO has good rectification characteristics (rectification ratio) and storage characteristics (switching ratio) dual functions, wherein the rectification ratio is about 10 3 , the on / off ratio is about 10 3 , much larger than the commercial 10 2 At the same time, its synaptic properties: paired pulse inhibition; paired pulse facilitation; synaptic weight plasticity; short-term memory and long-term memory conversion, make it have great application potential in neuromorphic simulation.

[0007] In order to solve the technical problem of the present invention, a technical solution is proposed: a rectifying memristor with synaptic simulation function, the device structure has a four-layer structure, from top to bottom are strip-shaped Ag electrodes, AgI thin film layers, PbI2 thin film layers, and strip-shaped ITO electrodes, the upper and lower electrodes are arranged vertically and cross-arranged to form a crossbar cross array, and each node is a storage unit.

[0008] Preferably, the device comprises 8 Ag electrodes, an AgI layer, a PbI2 functional layer and 8 ITO electrode layers, which are stacked in sequence from top to bottom, and the upper and lower electrodes are arranged in a vertical crossbar array to form an 8×8 crossbar array structure. Each intersection constitutes a unit device integrating excellent memristive performance, rectification characteristics and neural synapse simulation functions due to the interface effect of AgI.

[0009] In order to solve the technical problem of the present invention, another technical solution is proposed: a method for preparing the rectifying memristor with synaptic simulation function, the method comprising the following steps:

[0010] (1) Cleaning the ITO electrode substrate: Use acetone, isopropanol and anhydrous ethanol to clean the ITO in an ultrasonic machine for 10 minutes each; then, place the ITO substrate in an oxygen plasma cleaning machine for plasma treatment to remove organic impurities;

[0011] (2) Thermal evaporation of functional layer film: PbI2 and AgI were evaporated on the ITO electrode substrate at a rate of 0.1 Å / s using a thermal evaporator;

[0012] (3) Thermal evaporation of Ag electrode: By using a mask with a hollow electrode engraved on it, the mask and the ITO electrode are laminated to the PbI2 film in a cross form, and Ag is evaporated on the AgI film at a rate of 0.5 Å / s using a vacuum coating apparatus as the upper electrode.

[0013] Preferably, the specific parameters include: the thickness of the PbI2 film is 80-150 nm, the thickness of the AgI film is 2-3 nm, the thickness of the Ag electrode is 60-80 nm, and the substrate is a commercial glass plate coated with an ITO strip electrode;

[0014] PbI2 and AgI thin films were prepared by thermal evaporation technology with a deposition rate of 0.1Å / s and a working pressure of 10 -6 -10 -5 Pa;

[0015] The Ag electrode was prepared by thermal evaporation and patterned deposition was achieved with the help of a mask. The specific process parameters were a deposition rate of 0.5 Å / s and a working pressure of 10 -6 - 10 -5 Pa.

[0016] Preferably, the width of the Ag electrode is 30-100 μm, the electrode spacing is 30-1000 μm, the thickness of the ITO electrode is 185 nm, the electrode width is 100 μm, and the electrode spacing is 1000 μm.

[0017] Preferably, step 1: cleaning the ITO electrode substrate, cutting a commercial ITO conductive glass with 8 strip electrode patterns into a 2 cm×2 cm square, gently wiping the surface of the ITO conductive substrate with a dust-free cloth to ensure that there are no impurities visible to the naked eye, using acetone, isopropanol and anhydrous ethanol in an ultrasonic machine for 10 minutes each to clean the ITO, then using a nitrogen gun to blow dry the ITO surface, and drying at 60°C for more than 1 hour, placing the ITO substrate in an oxygen plasma cleaning machine, vacuuming for about 10 minutes, and performing plasma treatment to remove organic impurities; the ITO electrode width is 100 μm, and the electrode spacing is 1000 μm;

[0018] Step 2: Thermal evaporation of binary metal iodide film; install the substrate etched with ITO conductive glass and the crucible containing PbI2 crystal particles into the fixed position area of ​​the evaporation coating instrument; start the evaporation coating instrument, gradually convert the PbI2 crystal particles into gas at a rate of 0.1 Å / s and start the evaporation process. When the thickness reaches 80 nm, stop the coating. After the evaporation process is completed, gradually reduce the operating temperature of the equipment to room temperature to completely solidify the PbI2 film on the substrate, and continue to evaporate a 2 nm thick AgI film on the PbI2 film in the same way;

[0019] Step 3: Thermal evaporation of silver electrodes; by using a mask with 8 hollow electrodes engraved on it, the mask and the ITO electrode are laminated to the AgI film in a cross form, and then fixed with high-temperature tape to ensure the stability of the electrode during subsequent processing; using a vacuum coating machine at 10 -5Pa, 80 nm of Ag was evaporated on the PbI2 film at a rate of 0.5 Å / s as the upper electrode, and finally an 8×8 cross-array integrated structure device with a "sandwich" structure of Ag / AgI / PbI2 / ITO was obtained; the thickness of the Ag electrode was 80 nm, the width was 100 μm, and the control electrode spacing was 1000 μm;

[0020] In order to solve the technical problem of the present invention, another technical solution is proposed: the application of the rectifying memristor with synaptic simulation function, wherein the rectifying memristor with synaptic simulation function has an increasing peak current under two consecutive negative pulses, that is, a double pulse facilitation function; under two consecutive positive pulses, the peak current has a decreasing trend, that is, a double pulse inhibition function; when a small number of pulses are applied, the current decreases rapidly; when a large number of pulses are applied, the current will be maintained at a high level; and it has the functional characteristics of converting short-term memory to long-term memory.

[0021] Preferably, after 100 enhancement pulses and 100 reduction pulses are continuously applied to the rectifying memristor with synaptic simulation function, the device current shows a continuous enhancement and reduction change, which proves that the device has continuous conductivity adjustability.

[0022] Preferably, the rectifying memristor with synapse simulation function has a rectifying mechanism originated from the pn junction formed between AgI and PbI2, the potential barrier is lowered during forward bias and increased during reverse bias, simulating the forward and reverse conduction asymmetry of the diode.

[0023] Preferably, in the rectifying memristor with synaptic simulation function, under the condition of positive bias of the Ag electrode, the appearance of the storage window is attributed to the increase in voltage prompting the migration of iodine ions to the Ag electrode, forming an iodine vacancy conductive channel, causing a surge in current and transition to a low-resistance state, and the storage window opens; subsequently, under the condition of negative bias of the Ag electrode, the conductive filament quickly melts, and the device changes from a low-resistance state to a high-resistance state.

[0024] A rectifying memristor with synaptic simulation function is a sandwich structure device composed of upper metal electrodes Ag, AgI and PbI2 functional layers and lower ITO electrodes. The upper and lower electrodes are arranged vertically and cross-arranged to form a crossbar array, and each node is a storage unit. Each storage unit in the array has both storage and rectification functions, which can effectively solve the sneak current problem and make data access more accurate. At the same time, the expanded synaptic characteristics make it extremely potential for application in the field of artificial neuromorphic simulation.

[0025] The rectifying memristor with synaptic simulation function is composed of a strip-shaped Ag electrode, an AgI thin film layer, a PbI2 thin film layer, and a strip-shaped ITO electrode layer from top to bottom. The upper and lower electrodes are arranged vertically and crosswise to form a crossbar array, and each cross node is a memristor storage node. The storage node not only has good storage performance, but also has rectification characteristics, which effectively solves the sneak current problem and makes information access more accurate.

[0026] The rectifying memristor with synaptic simulation function has synaptic simulation characteristics: when a pair of positive pulses (0.1V, 0.3V) with an interval of 20 ms are applied between the two electrodes, two peak response currents are observed. The second peak current is significantly suppressed after the first peak current, showing typical PPD behavior characteristics. On the contrary, when a pair of negative pulses (-0.1 V, -0.3V) with an interval of 20ms are applied, the device exhibits typical PPF behavior, in which the second peak current is significantly promoted after the first peak current. When 5 pulses (-0.1 V, -0.3V) with an interval of 20 ms are applied continuously, the postsynaptic current (PSC) generated drops rapidly to 38 μA, showing STM behavior. On the other hand, when 50 identical gate pulses are applied continuously, the PSC maintains a higher current of more than 46 μA, showing LTM behavior. Finally, the dynamic enhancement and inhibition behaviors of the compound device in response to continuous voltage pulses are demonstrated, depicting the gradual and stable changes in the PSC over the span of 100 negative and 100 positive pulses, illustrating the excellent synaptic plasticity characteristics of the artificial synaptic device, which is attributed to the flexible programming and erasing operations of ions within the PbI2 layer.

[0027] The rectifying memristor with synaptic simulation function, wherein the AgI and PbI2 form a pn junction, and the rectifying principle of the device is: when the pn junction is forward biased, the potential barrier is reduced, and when the pn junction is reverse biased, the potential barrier is increased, resulting in a diode-like asymmetric forward and reverse bias characteristics.

[0028] The rectifying memristor with synaptic simulation function is characterized in that the reason why the device has a storage window when the Ag electrode is forward biased is that as the voltage increases during forward bias, iodine ions move toward the Ag electrode, eventually forming iodine vacancy conductive filaments, the current increases instantaneously, the device changes from a high resistance state to a low resistance state, and a storage window is generated. Under the action of reverse bias, the iodine vacancy conductive filaments are quickly melted, the device is always in a high resistance state, and the rectifying characteristics are displayed under forward and reverse bias.

[0029] The method for preparing the rectifying memristor with synaptic simulation function comprises the following steps:

[0030] Step 1: Evaporating functional films such as PbI2 and AgI on the ITO electrode;

[0031] Step 2: evaporating a Ag electrode layer on the functional layer film.

[0032] The PbI2 and AgI films were prepared by thermal evaporation technology, and the process was as follows: deposition rate 0.1 Å / s, working pressure 10 -6 -10 -5 Pa.

[0033] The present invention discloses a rectifying memristor with synaptic simulation function, which is composed of an upper strip Ag electrode, AgI and PbI2 thin film functional layers, and a lower ITO electrode. The device has both storage and rectification functions and synaptic simulation characteristics, and has great application potential in neuromorphic simulation.

[0034] Beneficial Effects

[0035] The present invention provides a rectifying memristor with synaptic simulation function, which uses AgI and PbI2 as storage function layers, forms a pn junction using AgI and PbI2, and realizes a diode-like rectifying effect through the reverse cutoff effect of the pn junction. The rectifying effect of the present invention can effectively solve the crosstalk problem caused by sneak current in the crossbar array. The device has a simple structure, a simple preparation process, and low cost. At the same time, vertical cross integration and a set voltage as low as 0.4 V meet the market demand for high-integration, low-power chips.

[0036] The rectifier memristor Ag / AgI / PbI2 / ITO with synaptic simulation function prepared in this embodiment, when a pair of positive pulses (0.1V, 0.3V) with an interval of 20 ms were applied between the two electrodes, two peak response currents were observed. The second peak current was significantly suppressed after the first peak current, showing typical PPD behavior characteristics. On the contrary, when a pair of negative pulses (-0.1 V, -0.3V) with an interval of 20 ms were applied, the device showed typical PPF behavior, in which the second peak current was significantly promoted after the first peak current. When 5 pulses (-0.1 V, -0.3V) with an interval of 20 ms were applied continuously, the postsynaptic current (PSC) generated dropped rapidly to 3 8μA, showing STM behavior. On the other hand, when 50 identical gate pulses were applied continuously, PSC maintained a higher current of more than 46 μA, showing LTM behavior. Finally, we demonstrate the dynamic enhancing and inhibiting behaviors of the compound device in response to continuous voltage pulses, with gradual and stable changes in the PSC over a span of 100 negative and 100 positive pulses, illustrating the excellent synaptic plasticity features of the artificial synaptic device, which is attributed to the flexible programming and erasing operations of ions within the PbI2 layer.

[0037] The rectifying memristor of the structure Ag / AgI / PbI2 / ITO prepared by the present invention has a rectifying mechanism in which AgI and PbI2 form a pn junction. When the pn junction is forward biased, the potential barrier decreases, and when the pn junction is reverse biased, the potential barrier increases, resulting in a diode-like forward and reverse bias asymmetry.

[0038] The present invention provides a rectifying memristor with synaptic simulation function, which is characterized by using the current highest integration density integration method - crossbar integration, and its rectifying characteristics effectively solve the crosstalk problem caused by sneak current in this integration method, making the integration more efficient and the information access more accurate.

[0039] The present invention provides a rectifier memristor with synaptic simulation function, which has the characteristics of simple structure, simple process, high-density integration, and integration of storage, rectification and synaptic functions, meeting the needs of building highly integrated and multifunctional integrated devices.

[0040] As described in Example 1, when the thickness of the PbI2 film prepared by thermal evaporation is 100 nm, the thickness of the AgI film is 2 nm, and the thickness of the silver electrode is 80 nm, the prepared Ag / AgI / PbI2 / ITO device has good rectification and storage functions, wherein the rectification ratio is about 10 3 , the on / off ratio is about 10 3 .

[0041] As described in Example 1, the prepared rectifying memristor Ag / AgI / PbI2 / ITO with synaptic simulation function has an increasing peak current under two consecutive negative pulses, that is, a double pulse facilitation function; and a decreasing peak current under two consecutive positive pulses, that is, a double pulse inhibition function.

[0042] As described in Example 1, the prepared rectifying memristor Ag / AgI / PbI2 / ITO with synaptic simulation function has a rapid decrease in current when a small number of pulses are applied, and a high level of current when a large number of pulses are applied, showing the conversion from short-term memory to long-term memory.

[0043] As described in Example 1, the prepared rectifying memristor Ag / AgI / PbI2 / ITO with synaptic simulation function, after continuous application of 100 enhancement pulses and 100 weakening pulses, the device current showed continuous enhancement and weakening changes, confirming that the device has continuous conductivity adjustability.

[0044] The prepared memristor Ag / PbI2 / ITO as described in Example 2 exhibits a symmetrically large storage window with an on / off ratio of 10 2 , but the device does not have rectification characteristics.

[0045] As described in Example 3, the prepared memristor In / PbI2 / ITO exhibits good rectification and storage characteristics, with a switching ratio of 300 and a rectification ratio of 900. However, the performance of this device is still far behind that of Example 1. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 : Schematic diagram of crosstalk problem caused by sneak current in crossbar array.

[0047] Figure 2 : Preparation flow chart of the rectifier memristor of the present invention.

[0048] Figure 3 : Schematic diagram of the structure of the rectifier memristor Ag / AgI / PbI2 / ITO.

[0049] Figure 4 : IV characteristic curve of the memristor Ag / AgI / PbI2 / ITO in Example 1 of the present invention.

[0050] Figure 5 : The switching ratio and rectification ratio of the memristor Ag / AgI / PbI2 / ITO in Example 1 of the present invention.

[0051] Figure 6 : Double pulse facilitation and double pulse suppression function diagram of the memristor Ag / AgI / PbI2 / ITO in Example 1 of the present invention.

[0052] Figure 7 : Schematic diagram of short-term and long-term memory conversion (STD to LTD) of the synaptic characteristics of the memristor Ag / AgI / PbI2 / ITO in Example 1 of the present invention.

[0053] Figure 8 : Graph showing the continuous adjustability of the conductivity of the memristor Ag / AgI / PbI2 / ITO in Example 1 of the present invention.

[0054] Fig. 9 : IV characteristic curve of the memristor Au / PbI2 / ITO in Example 2 of the present invention.

[0055] Fig.10 : IV characteristic curve of the memristor In / PbI2 / ITO according to Example 3 of the present invention.

[0056] Fig.11 : Comparative Example 1 of the present invention, IV characteristic curve of memristor Ag / PbI2 / ITO. DETAILED DESCRIPTION

[0057] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the embodiments of the invention. The described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0058] Example 1

[0059] The rectifier memristor with synapse simulation function and the preparation method thereof proposed in this embodiment have the ability to solve the crosstalk problem caused by sneak current in the crossbar array.

[0060] like Figure 1 As shown in the figure, in the memory cell of the pure passive crossbar array structure, the total current measured in the adjacent 2 × 2 memory cells is the combination of the current through the selected cell and the parasitic current through the other three cells, which makes it impossible to read the selected cell current correctly, which is called the crosstalk phenomenon. When reading the resistance of the (1,1) cell, the measured resistance is almost equivalent to the resistance of the ON state due to the encirclement of the three adjacent cells (1,2), (2,2) and (2,1). Therefore, this leakage current through the sneak path prevents the selective reading operation of the memory cell because it is much larger than the OFF state. When the memory cell has a rectifying characteristic, the parallel path of the surrounding interference will be cut off, the sneak current can be ignored, the crosstalk problem is solved, and the information can be read accurately.

[0061] This embodiment provides a rectifying memristor with synaptic simulation function and a preparation method thereof, wherein the structure of each storage unit is Ag / AgI / PbI2 / ITO. Figure 2 As shown, from top to bottom are Ag electrode, AgI film, PbI2 film, and ITO electrode.

[0062] The preparation process of the memristor device with Crossbar architecture is as follows Figure 3 As shown:

[0063] Step 1: Clean the ITO electrode substrate. Cut the commercial ITO conductive glass with 8 strip electrode patterns into 2 cm × 2 cm squares. First, gently wipe the surface of the ITO conductive substrate with a dust-free cloth to ensure that there are no impurities visible to the naked eye. Then, use acetone, isopropanol, and anhydrous ethanol to clean the ITO in an ultrasonic machine for 10 minutes each. Next, blow dry the ITO surface with a nitrogen gun and dry it at 60 ° C for more than 1 hour. Finally, place the ITO substrate in an oxygen plasma cleaner, vacuum for about 10 minutes, and perform plasma treatment to remove impurities such as organic matter.

[0064] Step 2: Thermal evaporation of binary metal iodide film. Install the substrate etched with ITO conductive glass and the crucible containing PbI2 crystal particles into the fixed position area of ​​the evaporation coating machine. Start the evaporation coating machine and heat it at 10 -5 Pa, 0.1 Å / s rate, gradually converting PbI2 crystal particles into gas and starting the evaporation process. When the thickness reaches 80 nm, the coating is stopped. After the evaporation process is completed, the operating temperature of the equipment is gradually reduced to room temperature to completely solidify the PbI2 film on the substrate. Then, a 2 nm thick AgI film is evaporated on the PbI2 film in the same way.

[0065] Step 3: Thermal evaporation of silver electrodes. Using a mask with eight hollow electrodes, the mask and ITO electrodes are laminated to the AgI film in a cross form, and then fixed with high-temperature tape to ensure the stability of the electrode during subsequent processing. Use a vacuum coating machine at 10 -5 Pa, 80 nm of Ag was evaporated on the PbI2 film at a rate of 0.5 Å / s as the upper electrode, and finally an 8×8 cross array integrated structure device with a "sandwich" structure of Ag / AgI / PbI2 / ITO was obtained.

[0066] In this embodiment, the thickness of the Ag electrode is 80 nm, the width is 100 μm, and the control electrode spacing is 1000 μm. The thickness of the ITO electrode is 185 nm, the width is 100 μm, and the electrode spacing is 1000 μm.

[0067] This example uses 2612B source meter to test the IV characteristic curve of Ag / AgI / PbI2 / ITO device, such as Figure 4 As shown in Figure 2, under positive voltage on the Ag electrode, the device shows a storage window consisting of high and low resistance states; under negative voltage, the device maintains a high resistance state and shows rectification characteristics.

[0068] The device Ag / AgI / PbI2 / ITO prepared in this embodiment has good rectification and storage dual functions, such as Figure 5 , where the rectification ratio is about 10 3 , the on / off ratio is about 10 3 .

[0069] The rectifying memristor Ag / AgI / PbI2 / ITO prepared in this embodiment has the following rectifying mechanism: AgI and PbI2 form a pn junction. When the pn junction is forward biased, the potential barrier is reduced, and when the pn junction is reverse biased, the potential barrier is increased, resulting in a diode-like forward and reverse bias asymmetry.

[0070] The rectifier memristor Ag / AgI / PbI2 / ITO prepared in this embodiment was tested for double pulse suppression and double pulse facilitation using 2612B. Figure 6 When a pair of positive pulses (0.1 V, 0.3 V) with an interval of 20 ms were applied between the two electrodes, two peak response currents were observed, in which the second peak current was significantly suppressed after the first peak current, showing typical double pulse depression (PPD) behavior characteristics. In contrast, when a pair of negative pulses (-0.1 V, -0.3 V) with an interval of 20 ms were applied, the device showed typical double pulse facilitation (PPF) behavior, in which the second peak current was significantly promoted after the first peak current.

[0071] The rectifier memristor Ag / AgI / PbI2 / ITO prepared in this embodiment was tested for long-term and short-term memory conversion using 2612B. Figure 7 When five pulses (-0.1 V, -0.3 V) were applied continuously with an interval of 20 ms, the postsynaptic current (PSC) dropped rapidly to 38 μA, showing STM behavior. When 50 identical gate pulses were applied continuously, the current size of PSC remained above 46 μA, showing LTM behavior. The conversion from short-term memory (STM) to long-term memory (LTM) was achieved by increasing the number of pulses.

[0072] The rectifier memristor Ag / AgI / PbI2 / ITO prepared in this embodiment is tested for the continuous adjustability of the synaptic conductance using 2612B. Figure 8, demonstrating the dynamic enhancement and inhibition behaviors of the compound device in response to continuous voltage pulses, and the gradual and stable changes in the PSC over the span of 100 applied negative and 100 positive pulses, illustrating the excellent synaptic plasticity characteristics of the artificial synaptic device, which is attributed to the flexible programming and erasing operations of ions within the PbI2 layer.

[0073] Example 2

[0074] The memristor and its preparation method proposed in this embodiment, its device structure and its preparation process are basically the same as those in Embodiment 1, except that:

[0075] The upper electrode of this embodiment is Au, the electrode thickness is 80 nm, the electrode width is 100 μm, and the electrode spacing is controlled to be 1000 μm by thermal evaporation. The process conditions are: pressure 10 -5 Pa, rate 0.1 Å / s.

[0076] The functional layer of this embodiment is a single layer of PbI2 with a thickness of 100 nm, which is prepared by thermal evaporation. The process conditions are: pressure 10 -5 Pa, rate 0.1 Å / s.

[0077] The memristor Au / PbI2 / ITO prepared in this embodiment is tested using 2612B for device IV characteristics. Fig. 9 ; Shows a symmetrically large storage window with an on / off ratio of 10 2 , but the device does not have rectification characteristics.

[0078] Example 3

[0079] The rectifying memristor and its preparation method proposed in this embodiment have the same device structure and preparation process as those in Embodiment 1, except that:

[0080] The upper electrode of this embodiment is In, the electrode thickness is 80 nm, the electrode width is 100 μm, and the electrode spacing is controlled to be 1000 μm by thermal evaporation. The process conditions are: pressure 10 -5 Pa, rate 0.1 Å / s.

[0081] The functional layer of this embodiment is a single layer of PbI2 with a thickness of 100 nm, which is prepared by thermal evaporation. The process conditions are: pressure 10 -5 Pa, rate 0.1 Å / s.

[0082] The memristor In / PbI2 / ITO prepared in this embodiment is tested using 2612B and the IV characteristics of the device are as follows: Fig.10; It exhibits good rectification and storage characteristics, with a switching ratio of 300 and a rectification ratio of 900, but the performance of this device is significantly different from that of Example 1.

[0083] Comparative Example 1

[0084] The device preparation process of this embodiment is the same as that of Embodiment 1, the only difference being that when the functional layer film is evaporated by thermal evaporation, only a 100 nm PbI2 film is evaporated, and the resulting device structure includes three layers, namely Ag, PbI2, and ITO from top to bottom.

[0085] The device of this comparative example is tested in the same manner as in Example 1. The IV characteristic curve of the obtained device is shown in FIG. Fig. 9 As shown, the rectification ratio is 70 and the switching ratio is 40.

[0086] The overall performance of the device in this comparative example is worse than that in the embodiment: in the IV characteristics, the overall curve is similar to that in the embodiment 1, especially in the high impedance state, which is basically the same. It is judged that AgI is generated at the interface between PbI2 and Ag during the operation of the device, which is helpful for us to further understand the device mechanism of the embodiment 1. In terms of synaptic characteristics, the synaptic characteristics are weaker than those in the embodiment 1, and the double pulse inhibition (facilitation) only produces less than 10% inhibition (enhancement) effect; in the long-short-term memory conversion, after 50 pulses, the current still drops to a level similar to that after 5 pulses.

Claims

1. A rectifying memristor with synaptic simulation function, characterized in that: The device structure has a four-layer structure, which includes a strip-shaped Ag electrode, an AgI thin film layer, a PbI2 thin film layer, and a strip-shaped ITO electrode from top to bottom. The upper and lower electrodes are arranged vertically and cross-arranged to form a crossbar array, and each node is a storage unit.

2. The rectifying memristor with synaptic simulation function according to claim 1, characterized in that: The device consists of 8 Ag electrodes, an AgI layer, a PbI2 functional layer and 8 ITO electrode layers, which are stacked from top to bottom, and the upper and lower electrodes are arranged vertically in a crossbar array to form an 8×8 crossbar structure. Each intersection forms a unit device with excellent memristor performance, rectification characteristics and neural synapse simulation functions due to the interface effect of AgI.

3. The method for preparing a rectifier memristor with synaptic simulation function according to claim 1, characterized in that: The method comprises the following steps: (1) Cleaning the ITO electrode substrate: Use acetone, isopropanol and anhydrous ethanol to clean the ITO in an ultrasonic machine for 10 minutes each; then, place the ITO substrate in an oxygen plasma cleaning machine for plasma treatment to remove organic impurities; (2) Thermal evaporation of functional layer film: PbI2 and AgI were evaporated on the ITO electrode substrate at a rate of 0.1 Å / s using a thermal evaporator; (3) Thermal evaporation of Ag electrode: By using a mask with a hollow electrode engraved on it, the mask and the ITO electrode are laminated to the PbI2 film in a cross form, and Ag is evaporated on the AgI film at a rate of 0.5 Å / s using a vacuum coating apparatus as the upper electrode.

4. The method for preparing a rectifier memristor with synaptic simulation function according to claim 3, characterized in that: The specific parameters include: the thickness of PbI2 film is 80-150 nm, the thickness of AgI film is 2-3 nm, the thickness of Ag electrode is 60-80 nm, and the substrate is a commercial glass plate coated with ITO strip electrodes; PbI2 and AgI thin films were prepared by thermal evaporation technology with a deposition rate of 0.1Å / s and a working pressure of 10 -6 -10 -5 Pa; The Ag electrode was prepared by thermal evaporation and patterned deposition was achieved with the help of a mask. The specific process parameters were a deposition rate of 0.5 Å / s and a working pressure of 10 -6 - 10 -5 Pa.

5. The method for preparing a rectifier memristor with synaptic simulation function according to claim 3, characterized in that: The width of the Ag electrode is 30-100 μm, the electrode spacing is 30-1000 μm, the width of the ITO electrode is 100 μm, and the electrode spacing is 1000 μm.

6. The method for preparing a rectifier memristor with synaptic simulation function according to claim 3, characterized in that: The following steps are involved: Step 1: Clean the ITO electrode substrate. Cut the commercial ITO conductive glass with 8 strip electrode patterns into 2 cm × 2 cm squares. Gently wipe the surface of the ITO conductive substrate with a dust-free cloth to ensure that there are no impurities visible to the naked eye. Use acetone, isopropanol and anhydrous ethanol to clean the ITO in an ultrasonic machine for 10 minutes each. Then use a nitrogen gun to blow dry the ITO surface and dry it at 60°C for more than 1 hour. Put the ITO substrate into an oxygen plasma cleaning machine and vacuum for about 10 minutes to perform plasma treatment to remove organic impurities. The thickness of the ITO electrode is 185nm, the electrode width is 100 μm, and the electrode spacing is 1000 μm. Step 2: thermal evaporation of binary metal iodide thin film; installing the substrate etched with ITO conductive glass and the crucible containing PbI2 crystal particles into the fixed position area of ​​the evaporation coating apparatus; starting the evaporation coating apparatus and heating it at 10 -5 Pa, at a rate of 0.1 Å / s, gradually converting the PbI2 crystal particles into gas and starting the evaporation process. When the thickness reaches 80 nm, the coating is stopped. After the evaporation process is completed, the operating temperature of the equipment is gradually lowered to room temperature to completely solidify the PbI2 film on the substrate. A 2 nm thick AgI film is continuously evaporated on the PbI2 film in the same way. Step 3: Thermal evaporation of silver electrodes; by using a mask with 8 hollow electrodes engraved on it, the mask and the ITO electrode are laminated to the AgI film in a cross form, and then fixed with high-temperature tape to ensure the stability of the electrode during subsequent processing; using a vacuum coating machine at 10 -5 Pa, 80 nm of Ag was evaporated on the PbI2 film at a rate of 0.5 Å / s as the upper electrode, and finally an 8×8 cross-array integrated structure device with a "sandwich" structure of Ag / AgI / PbI2 / ITO was obtained; the Ag electrode thickness was 80 nm, the width was 100 μm, and the control electrode spacing was 1000 μm.

7. The application of the rectifying memristor with synaptic simulation function according to claim 1, characterized in that: The rectifier memristor with synaptic simulation function has an increasing peak current under two consecutive negative pulses, that is, a double pulse facilitation function; the peak current has a decreasing trend under two consecutive positive pulses, that is, a double pulse inhibition function; when a small number of pulses are applied, the current decreases rapidly; when a large number of pulses are applied, the current will be maintained at a high level; and it has the functional characteristics of converting short-term memory to long-term memory.

8. The application of the rectifying memristor with synaptic simulation function according to claim 1, characterized in that: After 100 enhancement pulses and 100 reduction pulses are continuously applied to the rectifying memristor with synaptic simulation function, the device current shows continuous enhancement and reduction changes, which proves that the device has continuous conductivity adjustability.

9. The application of the rectifying memristor with synaptic simulation function according to claim 1, characterized in that: The rectifying memristor with synapse simulation function has a rectifying mechanism originated from the pn junction formed between AgI and PbI2. The potential barrier is reduced during forward bias and increased during reverse bias, simulating the forward and reverse conduction asymmetry of the diode.

10. The application of the rectifying memristor with synapse simulation function according to claim 1, characterized in that: Under the condition of positive bias of the Ag electrode, the appearance of the storage window of the rectifying memristor with synaptic simulation function is attributed to the increase in voltage prompting the migration of iodine ions to the Ag electrode, forming an iodine vacancy conductive channel, causing the current to surge and transform into a low resistance state, and the storage window is opened; Subsequently, under the negative bias condition of the Ag electrode, the conductive filament quickly melts and the device changes from a low-resistance state to a high-resistance state.

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