Code model generation method, code model verification method and related devices
By determining the attributes called during the UVM verification process and generating the target code model, the problem of large resource consumption and slow speed of complex code models in UVM verification is solved, and the efficiency and speed of simulation verification are improved.
Patent Information
- Application Number
- CN202411654886.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-18
- Publication Date
- 2025-03-14
- Estimated Expiration
- 2044-11-18
AI Technical Summary
In integrated circuit and SoC design, when using UVM verification method to simulate complex code models, resource consumption is high and slow, resulting in inefficient verification.
By obtaining the original code model, determine the attributes called during the simulation verification process, and select the implemented code based on these attributes to form the object code model, thereby simplifying the size of the object code model run during the simulation process.
It reduces unused attributes during simulation verification, simplifies the composition of the target code model, makes it more concise, and improves the efficiency and speed of simulation verification.
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Figure CN119623367A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of computer technology, and in particular to a code model generation method, a code model verification method, and related devices. Background Art
[0002] In the design of integrated circuits, SoC (system-on-chip), etc., UVM verification (Universal Verification Methodology) is required to perform functional verification on the design. The code model is an abstract model that describes the behavior and function of the design of integrated circuits, SoC, etc., such as the Register Abstract Layer (RAL) model, etc. The Register Abstract Layer model is also called the register model, which is a code model that describes the structure, behavior, and function of the registers in the design.
[0003] When the code model is relatively complex, using UVM to verify that the code model is emulated requires a lot of resources, resulting in a slow emulation speed. Therefore, how to provide a technical solution to provide a basis for improving UVM verification efficiency has become a problem that needs to be solved urgently by those skilled in the art. Summary of the invention
[0004] In view of this, the embodiments of the present application provide a code model generation method, a code model verification method and related devices to provide a basis for improving UVM verification efficiency.
[0005] To achieve the above objectives, the embodiments of the present invention provide the following technical solutions:
[0006] The present application provides a method for generating a code model, including:
[0007] Acquire an original code model, wherein the original code model includes at least one attribute;
[0008] Based on the original code model, determining the attribute of the original code model being called during the simulation verification process;
[0009] According to the called attribute, codes for implementing the called attribute are selected to form a target code model.
[0010] Optionally, after the step of determining, based on the original code model, the attribute of the original code model being called during the simulation verification process, the method further includes:
[0011] Acquire an attribute information file, wherein the attribute information file records a first correspondence relationship, where the first correspondence relationship is a correspondence relationship between the original code model and the called attribute;
[0012] The step of composing a target code model according to the called attributes comprises:
[0013] According to the attribute information file, a code combination that realizes the called attribute is selected to obtain a target code model.
[0014] Optionally, the first corresponding relationship includes: properties of each of the original code models called during the simulation verification process.
[0015] Optionally, the step of selecting a code combination that implements the called attribute to obtain a target code model according to the attribute information file includes:
[0016] Traversing the attribute information file, searching and generating a code snippet corresponding to the attribute called by each original code model;
[0017] The code snippet corresponding to the called attribute is written into the class of the target code model to obtain the target code model.
[0018] Optionally, the step of determining, based on the original code model, a property of the original code model that is called during the simulation verification process includes:
[0019] A test case is run once using the original code model, and an attribute code of an attribute of the original code model called during the test case running process is obtained.
[0020] Optionally, before the step of selecting, according to the simulation function, a functional module corresponding to the simulation function to form a target code model, the step further includes:
[0021] The original code model is disassembled based on the attributes to obtain a second corresponding relationship; wherein the second corresponding relationship is a corresponding relationship between the attributes of the original code model and the code fragments of the original code model.
[0022] Optionally, the second correspondence includes a one-to-one correspondence between an attribute of each of the original code models and a code fragment of the original code model.
[0023] Optionally, the original code model and the target code model are storage units based on RAL;
[0024] The file type of the attribute information file includes a hash table file.
[0025] Optionally, it also includes: obtaining addresses that have not been accessed during the running of the test case;
[0026] The unaccessed addresses are deleted from a memory included in the target code model.
[0027] The present application also provides a code model verification method, including:
[0028] Acquire an original code model, wherein the original code model includes at least one attribute;
[0029] Based on the original code model, determining the attribute of the original code model being called during the simulation verification process;
[0030] According to the called attribute, codes for realizing the called attribute are selected to form a target code model; and the target code model is used to perform simulation verification on a code device to be verified.
[0031] Optionally, it also includes: monitoring and outputting the attributes called during the simulation verification process of the original code model.
[0032] The embodiment of the present application also provides a code model generation device, including:
[0033] An original code model acquisition module, used to acquire an original code model, wherein the original code model includes at least one attribute;
[0034] A called attribute acquisition module, used to determine the attribute of the original code model called during the simulation verification process based on the original code model;
[0035] The target code model generation module is used to select codes for implementing the called attributes according to the called attributes to form a target code model.
[0036] Optionally, also include:
[0037] An attribute information file acquisition module, used to acquire an attribute information file, wherein the attribute information file records a first corresponding relationship, wherein the first corresponding relationship is a corresponding relationship between the original code model and the called attribute;
[0038] The target code model generation module is used to select a code combination that implements the called attribute according to the attribute information file to obtain a target code model.
[0039] Optionally, the target code model generation module is used to traverse the attribute information file, find and generate code snippets corresponding to each attribute called by the original code model; write the code snippets corresponding to the called attributes into the class of the target code model to obtain the target code model.
[0040] Optionally, the called attribute acquisition module is used to obtain a test case; use the original code model to run a test case, and obtain the attribute code of the attribute called by the original code model during the test case running process.
[0041] Optionally, also include:
[0042] The attribute decomposition module is used to decompose the original code model based on the attributes to obtain a second corresponding relationship; wherein the second corresponding relationship is a corresponding relationship between the attributes of the original code model and the code fragments of the original code model.
[0043] Optionally, also include:
[0044] An unaccessed address acquisition module, used to acquire addresses that have not been accessed during the running of the test case;
[0045] The address deleting module is used to delete the unaccessed addresses in the memory included in the target code model.
[0046] The embodiment of the present application also provides a code model verification device, including:
[0047] The target code model acquisition module is used to acquire an original code model, wherein the original code model includes at least one attribute; based on the original code model, determine the attribute of the original code model that is called during the simulation verification process; and according to the called attribute, select a code that implements the called attribute to form a target code model;
[0048] The simulation verification module is used to use the original code model or the target code model to perform simulation verification on the code device to be verified.
[0049] Optionally, it also includes: a property monitoring module, used to monitor and output the properties of the original code model called during the simulation verification process.
[0050] The embodiment of the present application also provides a code model verification system, including: the code model generation device as described above and the code model verification device as described above.
[0051] The embodiment of the present application also provides a computing system for executing the code model generation method and the code model verification method as described above.
[0052] An embodiment of the present application further provides a storage medium, wherein the storage medium stores computer instructions, and when the computer instructions are executed, the code model generation method and the code model verification method as described above are implemented.
[0053] The code model generation method provided in the embodiment of the present application includes obtaining an original code model, wherein the original code model includes at least one attribute; based on the original code model, determining the attribute of the original code model called during the simulation verification process; and according to the called attribute, selecting a code composition target code model that implements the called attribute.
[0054] In this way, after obtaining the original code model for simulation verification, the attributes called in the UVM verification process are determined based on the original code model, and the code combination for realizing the called attributes in the original code model is used to obtain the target code model. It is made that there are no unused attributes in the simulation verification process in the target code model. And under the condition that the target code model and the original code model can realize the same attributes, the composition of the target code model is more concise. Thereby, by using the target code model to simulate in the simulation verification process, the purpose of reducing the amount of operation when simulating the original code model is achieved, thereby accelerating the simulation speed in the simulation verification process and improving the simulation verification efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0055] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.
[0056] Figure 1 A schematic diagram of a flow chart of a code model generation method provided in an embodiment of the present application;
[0057] Figure 2 A structural diagram of the original code model provided for the embodiment of the present application;
[0058] Figure 3 Another flowchart of the code model generation method provided in the embodiment of the present application;
[0059] Figure 4 A further flowchart of the code model generation method provided in an embodiment of the present application;
[0060] Figure 5 A schematic diagram of the structure of the target code model provided in the embodiment of the present application;
[0061] Figure 6 A further flowchart of the code model generation method provided in the embodiment of the present application;
[0062] Figure 7 A schematic diagram of a flow chart of a code model verification method provided in an embodiment of the present application;
[0063] Figure 8 A schematic diagram of the structure of a code model generating device provided in an embodiment of the present application;
[0064] Fig. 9A schematic diagram of the structure of a code model verification device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0065] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0066] In the UVM verification environment, RAL is the most basic component, including the following: initialization of registers and memories, dynamic acquisition of register and memory values by reference models, comparison and check of updated data, final check of register and memory values before the end of simulation, etc. These functions of RAL provide great convenience for the UVM verification environment, but also bring problems: each register and memory has a corresponding reference model and a large number of functions. When the number of registers becomes large, such as at the SoC level, these codes consume a lot of resources and reduce the speed of simulation. In some special occasions, many functions are redundant, and there is no other benefit except affecting the speed of simulation.
[0067] In the simulation environment, in order to reduce the impact of increased complexity brought by the use of RAL, some verification environments will choose to build their own code models to replace the built-in register model in UVM, thereby speeding up the simulation. However, the self-built model is not a standard underlying UVM register model, which will cause ambiguity to upper-level SoC users and may bring learning costs. The private register models built by different IP groups may be different, making them more difficult for upper-level SoC users to use. Within the IP, if new requirements are introduced, model updates will also cause trouble.
[0068] Based on the above description, there is an urgent need for a SoC simulation method that not only simplifies the construction of the register model within the IP, but also facilitates the introduction and modification of the IP level by the upper layer at the SoC level.
[0069] To solve the above problems, the embodiment of the present application provides a code model generation method, which obtains a target code model by combining the codes of the attributes used by the original code model, thereby simplifying the size of the target code model running in the simulation process and improving the verification efficiency. As an optional implementation, Figure 1 FIG. 1 is a flow chart showing a method for generating a code model according to an embodiment of the present application. Figure 1 As shown, the code model generation method provided in the embodiment of the present application includes the following steps.
[0070] Step S10: Acquire an original code model, where the original code model includes at least one attribute.
[0071] It should be noted that the original code model is the code model of the SoC system that needs to be verified in the UVM test. In the UVM test, it is necessary to run multiple test cases by using the original code model to carry out simulation verification to the original code model.
[0072] Furthermore, in an optional implementation, the model of the original code model is a code model implemented based on RAL (Register Abstraction Layer). The RAL code abstracts the hardware registers and memories into software models, so that verification engineers can operate the registers without considering the underlying implementation details. In addition, RAL adopts an object-oriented programming (OOP) method, and each RAL of a register or memory corresponds to a class. Then, based on the modular design of the code, the RAL class is implemented by encapsulating code modules with different attributes, so as to facilitate repeated use and maintenance.
[0073] Specifically, in an optional implementation, a structural diagram of the original code model is as follows: Figure 2 shown. Figure 2 The multiple original code models shown include at least one register 11 and at least one memory 21. The register 11 and the memory 21 are both RAL. The register 11 includes at least 4 attributes, namely initialization, mirroring, real-time monitoring and value checking; the memory 21 also includes at least 4 attributes, namely initialization, mirroring, decoding and value checking. Further, based on RAL, an object-oriented programming method is adopted, and each attribute in the register 11 and the memory 21 is composed of attribute codes that implement different attributes. For example, initialization attribute code, mirroring attribute code, decoding attribute code, etc.
[0074] Step S20: Based on the original code model, determine the attributes of the original code model that are called during the simulation verification process.
[0075] As can be seen from the foregoing, not all attributes of the original code model are called in the UVM verification process, and the code for realizing these uncalled attributes, if appearing in the original code model, will increase the complexity of the code of the original code model, causing the code of the original code model to be tedious and chaotic in structure, and reducing the readability and maintainability of the original code model. Secondly, redundant code can consume extra computing resources, increase simulation time, and reduce verification efficiency. In addition, unused attributes may include potential errors or conflicts, which increases the difficulty of debugging and locating problems.
[0076] After determining the attribute of the original code model called in the UVM verification process, the original code model can be simplified based on the called attribute, retaining the attribute that is only called in the UVM verification process, so that the simplified original code model (i.e., the target code model) can be more streamlined, with a clear structure, easy to understand and maintain, and the development and use efficiency are improved, the redundant code is reduced, the computing resources required for the simulation are reduced, the simulation speed is accelerated, and the verification efficiency is improved. It can also reduce the difficulty of debugging and improve the reliability and stability of the code.
[0077] Furthermore, the properties of the original code model called during the UVM verification process cannot be directly determined based on the original code model, but need to be determined based on the specific operating conditions of the original code model during the UVM verification process. Specifically, Figure 3 As shown, in an optional implementation, the step S20 includes step S21: obtaining a test case. Step S22: running the test case once using the original code model, and obtaining the attribute code of the attribute called by the original code model during the running of the test case. In this way, by using a test case, the called attribute can be easily determined, thereby facilitating the subsequent simplification of the original code model.
[0078] Furthermore, in an optional implementation, the method for obtaining the attribute code of the attribute called by the original code model during operation may include using a callback function in RAL, or setting a monitoring module for the original code model, so that after the attribute is called, the information of the attribute used can be output and recorded. Specifically, a callback function can be added to the code of each attribute in the original code model, or a monitoring module can be additionally configured for the original code model when configuring the original code model, and the monitoring module is used to monitor which attributes are used and output during each read and write operation, and record and output them in the log information of the monitoring module.
[0079] Furthermore, after obtaining the attribute code of the called attribute, it is necessary to sort out the attribute code of the called attribute so as to facilitate the subsequent determination of the called attribute. Figure 3 As shown, in an optional implementation, it also includes step S23: obtaining an attribute information file, wherein the attribute information file records a first corresponding relationship, and the first corresponding relationship is a corresponding relationship between the secondary model and the called attribute.
[0080] It should be noted that the attribute information file is a file obtained by arranging the attribute codes of the called attributes obtained in the step S22. Specifically, in an optional implementation, the attribute codes of the called attributes are arranged by a preset script file, and the results of the arrangement are saved in a specific file format, and the obtained file is the attribute information file. The preset script file can automatically compare the already obtained called attribute codes with the known attribute codes that can realize different attributes in the pre-stored code library, so as to determine which attributes are called by the original code model and record them. For example, for two original code models, their called attributes can be recorded in the following format: original code model 1, attribute: {initialization}, original code model 2, attribute: {mirror}. Furthermore, in order to facilitate the storage and use of the attribute information file, in an optional implementation, the file type of the attribute information file is a hash table.
[0081] Please continue to refer to Figure 1 The code model generation method provided in the embodiment of the present application further includes step S30: according to the called attribute, selecting the code that implements the called attribute to form a target code model.
[0082] It should be noted that, as can be seen from the above content, the implementation of the original code model is based on RAL of the object-oriented programming (OOP) method. Therefore, in the original code model, in addition to transmitting the attribute information that needs to be processed, the code that implements each attribute can run independently. Therefore, the code that implements the called attribute is selected, and the code that implements the called attribute is used to recompose the target code model, so that the redundant attributes in the original code model can be removed in the target code model, thereby obtaining a simplified target code model.
[0083] Further, after obtaining the attribute information file, the attribute to be called and the code of the attribute to be called can be easily determined according to the attribute information file. Figure 3 As shown, in an optional implementation, the step S30 includes a step S31: according to the attribute information file, selecting a code combination that implements the called attribute to obtain a target code model.
[0084] Specifically, based on the use of the attribute information file, such as Figure 4As shown, in an optional implementation, the step S31 includes step S311: traversing the attribute information file, searching and generating a code snippet corresponding to each attribute called by the original code model. It should be noted that, in an optional implementation, the attribute information file is further processed by the above script file to obtain the target register. After the called attribute is found in the attribute information file, it is necessary to search the code snippet corresponding to the called attribute in the pre-stored code library and generate the code snippet.
[0085] Step S312: writing the code snippet corresponding to the called attribute into the class of the target code model to obtain the target code model.
[0086] It should be noted that the class of the target code model is the class that represents the target code model during the code implementation process. "Class" is a code structure that provides a complete register and memory modeling framework, so as to facilitate modeling, access and verification of hardware registers or memories in a high-level abstract manner. By writing the attribute code of the called attribute into the class of the target code model, the required target code model can be obtained.
[0087] At this time, relative to Figure 2 Taking the target code model as an example, the simplified target code model is as follows: Figure 5 As shown in . In these improved RALs, relative to the register, only the initialization attribute remains in the register 11, and the attributes of the registers 12 and 13 are reduced; relative to the memory, only the initialization attribute remains in the memory 21, and the attributes in the memory 22 and the memory 23 are reduced. It can be seen that the code model generation method provided in the embodiment of the present application can effectively simplify the complexity of the original code model.
[0088] In this way, after obtaining the original code model for simulation verification, the attributes called in the UVM verification process are determined based on the original code model, and the code combination for realizing the called attributes in the original code model is used to obtain the target code model. It is made that there are no unused attributes in the simulation verification process in the target code model. And under the condition that the target code model and the original code model can realize the same attributes, the composition of the target code model is more concise. Thereby, by using the target code model to simulate in the simulation verification process, the purpose of reducing the amount of operation when simulating the original code model is achieved, thereby accelerating the simulation speed in the simulation verification process and improving the simulation verification efficiency.
[0089] Furthermore, for an unfamiliar original code model, there may not be a pre-stored code library storing attributes and attribute codes, so it is necessary to generate a pre-stored code library based on the original code model. Figure 6 As shown, in an optional implementation, before step S20, step S11 is also included: disassembling the original code model based on the attribute to obtain a second correspondence. The second correspondence is the correspondence between the attribute of the original code model and the code fragment of the original code model. Specifically, in an optional implementation, the second correspondence includes a one-to-one correspondence between the attribute of each original code model and the code fragment of the original code model.
[0090] In this way, after obtaining the second corresponding relationship of the original code model, the attributes of the original code model and the code snippets of the original code model can be stored to obtain a pre-stored code library, or directly recorded in a cache for subsequent use.
[0091] Furthermore, if the original code model is a simulation model of the memory, when the memory is initialized, all possible address spaces of the memory are usually simulated according to the design specifications or memory specifications. In these address spaces, there may be addresses that will not be accessed in the current test scenario, so the addresses that will not be accessed can also be simplified.
[0092] Specifically, Figure 6 As shown, in an optional implementation, the code model generation method provided by the embodiment of the present application also includes step S41: obtaining addresses that have not been accessed during the running of the test case. Specifically, during the running of the test, a coverage collection module can be added to the original code model to monitor the read, write and access bits of the original code model to obtain a coverage analysis file of the address of the original code model. The coverage analysis file can display the access rate of the address, and the address with an access rate of zero is an unaccessed address. Alternatively, the log and report mechanism of the original code model is used to obtain all the addresses accessed during the running of the test case, and compared with all the addresses of the original code model to determine the unaccessed addresses.
[0093] Step S42: Deleting the unaccessed address in the memory included in the target code model. It should be noted that since the unaccessed address will not be accessed during the verification process, even if the unaccessed address is deleted, it will not affect the operation of the target register. After deleting the unaccessed address, the target code model can be simplified to improve the simulation efficiency.
[0094] The embodiment of the present application also provides a code model verification method, which uses a simplified target code model to verify the code model, thereby simplifying the size of the target code model running during the simulation process and improving the verification efficiency. As an optional implementation, Figure 7 FIG. 1 is a flow chart showing a code model verification method provided by an embodiment of the present application. Figure 7 As shown, the code model verification method provided in the embodiment of the present application includes the following steps.
[0095] Step S51: Acquire an original code model, wherein the original code model includes at least one attribute; based on the original code model, determine the attribute of the original code model that is called during the simulation verification process; and according to the called attribute, select a code that implements the called attribute to form a target code model.
[0096] Step S52: using the target code model to perform simulation verification on the code to be verified.
[0097] Furthermore, in order to facilitate the determination of the properties of the original code model called during the simulation verification process, in an optional implementation, while executing step S52, step S53 is also included: monitoring and outputting the properties of the original code model called during the simulation verification process.
[0098] In this way, after obtaining the original code model for simulation verification, the attributes called in the UVM verification process are determined based on the original code model, and the code combination for realizing the called attributes in the original code model is used to obtain the target code model. It is made that there are no unused attributes in the simulation verification process in the target code model. And under the condition that the target code model and the original code model can realize the same attributes, the composition of the target code model is more concise. And then by using the target code model in the simulation verification process, the amount of operation during the simulation operation of the target code model can be reduced, thereby accelerating the simulation speed in the simulation verification process and improving the simulation verification efficiency.
[0099] The embodiment of the present application also provides a code model generation device, which obtains a target code model by combining the codes of the attributes used by the original code model, thereby simplifying the size of the target code model running in the simulation process and improving the verification efficiency. As an optional implementation, Figure 8 The schematic diagram of the structure of the code model generation device provided in the embodiment of the present application is shown. Figure 8 As shown, the code model generation device provided in the embodiment of the present application includes the following structure.
[0100] The original code model acquisition module 100 is used to acquire the original code model, where the original code model includes at least one attribute;
[0101] The called attribute acquisition module 200 is used to determine the attribute of the original code model called during the simulation verification process based on the original code model.
[0102] The target code model generation module 300 is used to select codes that implement the called attributes to form a target code model according to the called attributes.
[0103] Furthermore, in an optional implementation, if Figure 8 As shown, the code model generation device provided in the embodiment of the present application also includes:
[0104] The attribute information file acquisition module 400 is used to acquire an attribute information file, wherein the attribute information file records a first corresponding relationship, and the first corresponding relationship is a corresponding relationship between the original code model and the called attribute.
[0105] The target code model generation module 300 is used to select a code combination that implements the called attribute according to the attribute information file to obtain a target code model.
[0106] Furthermore, in an optional implementation, the target code generation acquisition module 300 is used to traverse the attribute information file, find and generate a code snippet corresponding to each attribute called by the original code model; and write the code snippet corresponding to the called attribute into the class of the target code model to obtain the target code model.
[0107] Furthermore, in an optional implementation, the called attribute acquisition module 200 is used to obtain a test case; use the original code model to run a test case, and obtain the attribute code of the attribute called by the original code model during the test case running process.
[0108] Furthermore, in an optional implementation, if Figure 8 As shown, the code model generation device provided in the embodiment of the present application also includes:
[0109] The attribute decomposition module 500 is used to decompose the original code model based on the attributes to obtain a second corresponding relationship; wherein the second corresponding relationship is a corresponding relationship between the attributes of the original code model and the code fragments of the original code model.
[0110] Furthermore, in an optional implementation, if Figure 8 As shown, the code model generation device provided in the embodiment of the present application also includes:
[0111] The unaccessed address acquisition module 610 is used to acquire addresses that are not accessed during the running of the test case.
[0112] The address deleting module 620 is used to delete the unaccessed addresses in the memory included in the target code model.
[0113] The embodiment of the present application also provides a code model verification device, which uses a simplified target code model to verify the code model, thereby simplifying the size of the target code model running during the simulation process and improving the verification efficiency. As an optional implementation, Fig. 9 The schematic diagram of the structure of the code model verification device provided by the embodiment of the present application is shown. Fig. 9 As shown, the code model verification device provided in the embodiment of the present application includes the following structure.
[0114] The target code model acquisition module 700 is used to acquire the target code model generated by the above-mentioned code model generation device.
[0115] The simulation verification module 800 is used to perform simulation verification on the code device to be verified using the target code model.
[0116] An embodiment of the present application also provides a code model verification system, including: a target code model acquisition module, used to obtain an original code model, the original code model including at least one attribute; based on the original code model, determining the attribute of the original code model called during the simulation verification process; according to the called attribute, selecting the code that implements the called attribute to form a target code model.
[0117] Furthermore, in an optional implementation, the code model verification system further includes: an attribute monitoring module, configured to monitor and output attributes of the original code model that are called during the simulation verification process.
[0118] The embodiment of the present application also provides a computing system for executing the code model generation method and the code model verification method as described above.
[0119] An embodiment of the present application further provides a storage medium, wherein the storage medium stores computer instructions, and when the computer instructions are executed, the code model generation method and the code model verification method as described above are implemented.
[0120] Although the embodiments of the present application are disclosed above, the present application is not limited thereto. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be subject to the scope defined by the claims.
Claims
1. A code model generation method, characterized in that: include: Acquire an original code model, wherein the original code model includes at least one attribute; Based on the original code model, determining the attribute of the original code model being called during the simulation verification process; According to the called attribute, codes for implementing the called attribute are selected to form a target code model.
2. The code model generation method according to claim 1, characterized in that: After the step of determining the attribute of the original code model being called in the simulation verification process based on the original code model, the method further includes: Acquire an attribute information file, wherein the attribute information file records a first correspondence relationship, where the first correspondence relationship is a correspondence relationship between the original code model and the called attribute; The step of composing a target code model according to the called attributes comprises: According to the attribute information file, a code combination that realizes the called attribute is selected to obtain a target code model.
3. The code model generation method according to claim 2, characterized in that: The first corresponding relationship includes: the attributes of each of the original code models that are called during the simulation verification process.
4. The code model generation method according to claim 3, characterized in that: The step of selecting a code combination that implements the called attribute to obtain a target code model according to the attribute information file comprises: Traversing the attribute information file, searching and generating a code snippet corresponding to the attribute called by each original code model; The code snippet corresponding to the called attribute is written into the class corresponding to the target code model to obtain the target code model.
5. The code model generation method according to claim 2, characterized in that: The step of determining the attribute of the original code model being called during the simulation verification process based on the original code model comprises: A test case is run once using the original code model, and an attribute code of an attribute of the original code model called during the test case running process is obtained.
6. The code model generation method according to claim 1, characterized in that: Before the step of selecting, according to the simulation function, a functional module corresponding to the simulation function to form a target code model, the step further includes: The original code model is disassembled based on the attributes to obtain a second corresponding relationship; wherein the second corresponding relationship is a corresponding relationship between the attributes of the original code model and the code fragments of the original code model.
7. The code model generation method according to claim 6, characterized in that: The second correspondence includes a one-to-one correspondence between an attribute of each of the original code models and a code segment of the original code model.
8. The code model generation method according to claim 3, characterized in that: The original code model and the target code model are storage units based on RAL; The file type of the attribute information file includes a hash table file.
9. The code model generation method according to claim 5, characterized in that: Also includes: Obtaining addresses that have not been accessed during the running of the test case; The unaccessed addresses are deleted from a memory included in the target code model.
10. A code model verification method, characterized in that: include: Acquire an original code model, wherein the original code model includes at least one attribute; Based on the original code model, determining the attribute of the original code model being called during the simulation verification process; According to the called attribute, select the code for realizing the called attribute to form a target code model; The code device to be verified is simulated and verified using the original code model or the target code model.
11. The code model verification method according to claim 10, characterized in that: Also includes: Monitor and output the attributes called during the simulation verification process of the original code model.
12. A code model generating device, characterized in that: include: An original code model acquisition module, used to acquire an original code model, wherein the original code model includes at least one attribute; A called attribute acquisition module, used to determine the attribute of the original code model called during the simulation verification process based on the original code model; The target code model generation module is used to select codes for implementing the called attributes according to the called attributes to form a target code model.
13. The code model generating device according to claim 12, characterized in that: Also includes: An attribute information file acquisition module, used to acquire an attribute information file, wherein the attribute information file records a first corresponding relationship, wherein the first corresponding relationship is a corresponding relationship between the original code model and the called attribute; The target code model generation module is used to select a code combination that implements the called attribute according to the attribute information file to obtain a target code model.
14. The code model generating device according to claim 13, characterized in that: The target code model generation module is used to traverse the attribute information file, find and generate a code snippet corresponding to each attribute called by the original code model; write the code snippet corresponding to the called attribute into the class of the target code model to obtain the target code model.
15. The code model generating device according to claim 12, characterized in that: The called attribute acquisition module is used to acquire a test case; use the original code model to run the test case once, and acquire the attribute code of the attribute called by the original code model during the test case running process.
16. The code model generating device according to claim 12, characterized in that: Also includes: The attribute decomposition module is used to decompose the original code model based on the attributes to obtain a second corresponding relationship; wherein the second corresponding relationship is a corresponding relationship between the attributes of the original code model and the code fragments of the original code model.
17. The code model generating device according to claim 13, characterized in that: Also includes: An unaccessed address acquisition module, used to acquire addresses that have not been accessed during the running of the test case; The address deleting module is used to delete the unaccessed addresses in the memory included in the target code model.
18. A code model verification device, characterized in that: include: A target code model acquisition module, used to acquire an original code model, wherein the original code model includes at least one attribute; Based on the original code model, determining the attribute of the original code model that is called during the simulation verification process; according to the called attribute, selecting the code that realizes the called attribute to form a target code model; The simulation verification module is used to use the original code model or the target code model to perform simulation verification on the code device to be verified.
19. The code model verification device according to claim 18, characterized in that: Also includes: The property monitoring module is used to monitor and output the properties of the original code model called during the simulation verification process.
20. A code model verification system, characterized in that: include: A code model generating device as described in any one of claims 12-17 and a code model verifying device as described in any one of claims 18-19.
21. A computing system, characterized in that: Execute the code model generation method as described in any one of claims 1-9 and the code model verification method as described in any one of claims 10-11.
22. A storage medium, characterized in that: The storage medium stores computer instructions, and when the computer instructions are executed, the code model generation method according to any one of claims 1 to 9 and the code model verification method according to any one of claims 10 to 11 are implemented.
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