Automatic layout and wiring method, device and equipment of printed circuit board and medium

Abstract

The invention discloses an automatic layout and wiring method and device for a printed circuit board, equipment and a medium, and relates to the technical field of printed circuit board design. The method comprises the following steps: analyzing a circuit structure according to a design file of a printed circuit board to be wired to generate a layout constraint file and a wiring constraint file; calling a target electronic component required by the to-be-wired printed circuit board from a component library pre-constructed based on a knowledge graph, and based on the layout constraint file, determining a global layout of the target electronic component on the to-be-wired printed circuit board when a first optimization target is satisfied so as to obtain an automatic layout result; and according to the automatic layout result, performing automatic wiring between the target electronic components, and based on a wiring constraint file, determining global wiring of the target electronic components on the printed circuit board to be wired when a second optimization target is satisfied so as to obtain an automatic wiring result. According to the technical scheme, the rapid and automatic layout and wiring effect of the printed circuit board can be achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of printed circuit board design, and in particular to an automatic layout and wiring method, device, equipment and medium for a printed circuit board. Background Art

[0002] PCB (Printed Circuit Board) layout and routing is a key step in PCB design. Its function is to arrange components on the board and connect components through wires to achieve specific functions. The traditional PCB design process takes a lot of time in the process of principle design and PCB layout. After the automatic routing process, manual adjustments are required. The entire process is not highly automated, and most of the work is done manually, which is inefficient. At the same time, for PCBs with complex structures, many layers, and many types of components, the automatic routing results are often difficult to meet the routing requirements.

[0003] Therefore, how to provide a solution to the above technical problems is a problem that those skilled in the art need to solve at present. Summary of the invention

[0004] In view of this, the purpose of the present invention is to provide a method, device, equipment and medium for automatic layout and wiring of a printed circuit board, which can achieve a fast layout and wiring effect of the PCB to solve the technical problems of low wiring efficiency and poor layout effect in the prior art. The specific scheme is as follows:

[0005] In a first aspect, the present application discloses an automatic layout and routing method for a printed circuit board, comprising:

[0006] Obtaining a design file of a printed circuit board to be wired, and analyzing the circuit structure according to the design file to generate a layout constraint file and a wiring constraint file;

[0007] Calling target electronic components required for the printed circuit board to be wired from a component library pre-built based on the knowledge graph, and determining the global layout of the target electronic components on the printed circuit board to be wired when the first optimization goal is met based on the layout constraint file, so as to obtain an automatic layout result;

[0008] According to the automatic layout result, automatic routing is performed between the target electronic components, and based on the routing constraint file, the global routing of the target electronic components on the printed circuit board to be routed is determined when the second optimization goal is met to obtain an automatic routing result.

[0009] Optionally, the step of acquiring a design file of a printed circuit board to be wired and analyzing the circuit structure according to the design file to generate a layout constraint file and a wiring constraint file includes:

[0010] Obtaining a circuit file and a rule file of a printed circuit board to be wired, and analyzing the circuit structure according to the circuit file and the rule file to generate different node files; the node file includes performance rules, circuit netlist, process file, and electronic component classification;

[0011] Analyzing the node file to determine the layout constraints and routing constraints of the target electronic components;

[0012] Generate the layout constraint file and the wiring constraint file using the layout constraint condition and the wiring constraint condition respectively;

[0013] Accordingly, calling the target electronic components required for the printed circuit board to be wired from the component library pre-built based on the knowledge graph includes:

[0014] Determine the device calling parameters of the target electronic component according to the node file;

[0015] According to the device calling parameter, the target electronic component is called from a component library pre-built based on the knowledge graph.

[0016] Optionally, build a component library based on the knowledge graph, including:

[0017] Acquire board information of a wired printed circuit board, and determine each electronic component in the wired printed circuit board according to the board information;

[0018] digitizing each of the electronic components to obtain electronic component data, and storing the electronic component data in a structured database;

[0019] Performing data cleaning and formatting processing on the electronic component data in the structured database to obtain processed data;

[0020] Extracting information from the processed data through a graph data model to obtain a plurality of component entities and relationships between the plurality of component entities;

[0021] The component library is constructed based on a plurality of the component entities and the mutual relationships.

[0022] Optionally, calling the target electronic components required for the printed circuit board to be wired from the component library pre-built based on the knowledge graph, and determining the global layout of the target electronic components on the printed circuit board to be wired when the first optimization goal is met based on the layout constraint file to obtain the automatic layout result, including:

[0023] Calling target electronic components required for the printed circuit board to be wired from a component library pre-built based on the knowledge graph, and determining the coordinate position and association relationship of the target electronic components;

[0024] Based on the layout constraint file, the global layout of the target electronic components on the printed circuit board to be wired is determined according to the coordinate positions and the association relationship when the first optimization goal is met to obtain an automatic layout result.

[0025] Optionally, determining, based on the layout constraint file, a global layout of the target electronic components on the printed circuit board to be wired when a first optimization goal is satisfied to obtain an automatic layout result includes:

[0026] According to the functional types of the target electronic components, the target electronic components are grouped using a preset classification algorithm to obtain a grouping result;

[0027] Based on the grouping result, the target electronic components are hashed on the printed circuit board to be routed according to the layout constraint file to obtain an initial global layout result;

[0028] A first optimization target is determined, and a corresponding optimization algorithm is selected according to the first optimization target to optimize the initial global layout result, so as to determine the layout corresponding to the target electronic components on the printed circuit board to be wired when the first optimization target is optimal as the automatic layout result.

[0029] Optionally, determining the global routing of the target electronic components on the printed circuit board to be routed when the second optimization goal is met to obtain an automatic routing result includes:

[0030] Determine a second optimization target, and analyze the wire net and allocate a wiring area according to the second optimization target to obtain a wiring direction of the wire net;

[0031] A corresponding routing algorithm is selected according to the wire network routing direction to perform global routing between the target electronic components, and the routing corresponding to the target electronic components on the printed circuit board to be routed when the second optimization target is optimal is determined as the automatic routing result.

[0032] Optionally, after determining the global routing of the target electronic components on the printed circuit board to be routed when the second optimization goal is met to obtain the automatic routing result, the method further includes:

[0033] Generate an initial layout using the automatic layout result and the automatic routing result, and check and verify the initial layout using a preset verification method;

[0034] When the initial layout is verified to be correct, the final layout is determined, and the final layout is output in a preset data format according to the type of printed circuit board design software.

[0035] In a second aspect, the present application discloses an automatic layout and routing device for a printed circuit board, comprising:

[0036] A constraint file generation module, used for acquiring a design file of a printed circuit board to be wired, and analyzing the circuit structure according to the design file to generate a layout constraint file and a wiring constraint file;

[0037] An automatic layout module, used to call the target electronic components required for the printed circuit board to be wired from a component library pre-built based on the knowledge graph, and determine the global layout of the target electronic components on the printed circuit board to be wired when the first optimization goal is met based on the layout constraint file, so as to obtain an automatic layout result;

[0038] The automatic routing module is used to perform automatic routing between the target electronic components according to the automatic layout result, and determine the global routing of the target electronic components on the printed circuit board to be routed when the second optimization goal is met based on the routing constraint file to obtain the automatic routing result.

[0039] In a third aspect, the present application discloses an electronic device, comprising a processor and a memory; wherein the memory is used to store a computer program, and the computer program is loaded and executed by the processor to implement the automatic layout and routing method of a printed circuit board as described above.

[0040] In a fourth aspect, the present application discloses a computer-readable storage medium for storing a computer program; wherein the computer program, when executed by a processor, implements the automatic layout and routing method for a printed circuit board as described above.

[0041] The present application provides an automatic layout and routing method for a printed circuit board, comprising: obtaining a design file of a printed circuit board to be wired, and analyzing a circuit structure according to the design file to generate a layout constraint file and a routing constraint file; calling target electronic components required for the printed circuit board to be wired from a component library pre-constructed based on a knowledge graph, and determining, based on the layout constraint file, a global layout of the target electronic components on the printed circuit board to be wired when a first optimization goal is met, so as to obtain an automatic layout result; performing automatic routing between the target electronic components according to the automatic layout result, and determining, based on the routing constraint file, a global routing of the target electronic components on the printed circuit board to be wired when a second optimization goal is met, so as to obtain an automatic routing result.

[0042] The beneficial technical effect of the present application is: the circuit structure is analyzed according to the designed circuit, and the generated layout and routing constraint files are respectively transmitted to the modules for layout and routing for automatic layout and routing. Since the corresponding results in the process of automatic layout and routing vary according to the optimization targets, the present application can use the first optimization target and the second optimization target when the optimization target is optimal to respectively determine the automatic layout results and automatic routing results of the target electronic components on the printed circuit board to be wired while ensuring that the basic performance of the original circuit remains unchanged. In this way, the rapid layout and routing effect of the printed circuit board to be wired is achieved, the layout and routing efficiency is improved, and good layout and routing effects are achieved. In addition, a component library is pre-built based on the knowledge graph, and the logic and relationships pre-defined for electronic components in the knowledge graph can enhance the advancement ability of the automatic layout algorithm, so that it can make more logical reasoning and decision-making on complex layout problems. Through the technical solution of the present application, it is possible to improve design efficiency, promote standardization, and optimize circuit performance; it is possible to quickly generate layout and routing schemes, significantly reduce the time of manual processing, and greatly improve design efficiency.

[0043] In addition, the present application provides an automatic layout and routing device, equipment and storage medium for a printed circuit board, which correspond to the above-mentioned automatic layout and routing method for a printed circuit board, and have the same effect as above. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0045] Figure 1 A flow chart of an automatic layout and routing method for a printed circuit board disclosed in the present application;

[0046] Figure 2 A schematic diagram of the composition of an automatic layout and routing system disclosed in this application;

[0047] Figure 3 A schematic diagram of a specific automatic layout and routing process disclosed in this application;

[0048] Figure 4 A schematic diagram of a specific automatic layout and routing process disclosed in this application;

[0049] Figure 5 A schematic diagram of the structure of an automatic layout and wiring device for a printed circuit board disclosed in the present application;

[0050] Figure 6This is a structural diagram of an electronic device disclosed in this application. DETAILED DESCRIPTION

[0051] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0052] At present, the mainstream software related to common PCB design has the function of PCB automatic layout and routing. Due to the different functions, underlying logic and core algorithms used by each software, the algorithms and implementation methods of the automatic layout and routing functions of these software are different. At the same time, the performance of each software also varies greatly. Therefore, in the current PCB layout and routing work, layout and routing are mainly carried out manually, which is just repetitive work and consumes a lot of manpower.

[0053] To this end, the present application provides an automatic layout and wiring solution for a printed circuit board, which can achieve rapid layout and wiring effects for the PCB, so as to solve the technical problems of low wiring efficiency and poor layout effects in the prior art.

[0054] The embodiment of the present invention discloses a method for automatic layout and routing of a printed circuit board. Figure 1 As shown, the method includes:

[0055] Step S11: obtaining a design file of a printed circuit board to be wired, and analyzing the circuit structure according to the design file to generate a layout constraint file and a wiring constraint file.

[0056] In the embodiment of the present application, the printed circuit board to be wired is a PCB board that needs to be automatically laid out and wired. Its design file includes the circuit file of the PCB board and the relevant rule file. Among them, the circuit file may contain all the information required to convert the circuit schematic into an actual manufacturable circuit board. For example, it may include elements such as the actual physical position, wiring path, and pads of electronic components. The circuit file can be used to guide the manufacture and assembly of the PCB to ensure the performance, reliability, and cost-effectiveness of the circuit board. The rule file can be used to check whether the design meets the manufacturing requirements. These rules may include line width and spacing, number of layers and layout, signal integrity, minimum aperture and hole spacing, component placement, etc. Following these rules can ensure the quality and reliability of the PCB design.

[0057] Analyze the circuit structure according to the design file of the PCB board to be wired, and generate the layout constraint file and the wiring constraint file. The layout constraint file is applied to the automatic layout process of the PCB board to be wired, and guides the layout rules and restrictions of the PCB board to be wired; the wiring constraint file is applied to the automatic wiring process of the PCB board to be wired, and guides the wiring rules and restrictions of the PCB board to be wired.

[0058] Step S12: Call the target electronic components required for the printed circuit board to be wired from the component library pre-built based on the knowledge graph, and determine the global layout of the target electronic components on the printed circuit board to be wired when the first optimization goal is met based on the layout constraint file to obtain an automatic layout result.

[0059] In an embodiment of the present application, a knowledge graph-based method is used to construct a component library, and electronic components in different PCB boards are componentized and abstracted according to electronic component parameters, and packaged into different components to construct a component library.

[0060] It is understandable that electronic components can be divided into multiple sub-components for management, or multiple simple electronic components can be combined into an integrated circuit chip to achieve a specific function; electronic components can be classified and managed according to modules or pages, so that they can be quickly placed according to their management attributes during PCB layout, thereby improving design efficiency. Abstraction of electronic components can expand electronic components with the same interface or functional sub-class after determining the current electronic components, and manage complex components at an abstract level, thereby simplifying the design process.

[0061] It should be pointed out that the relevant parameters and characteristics of the electronic components can be parsed in the design file of the PCB board to be wired. Therefore, the required target electronic components are selected from the component library according to the relevant parameters and characteristics of the electronic components.

[0062] Furthermore, in the layout process, according to the component information parsed from the circuit, the components are referenced to the wiring software, and these target electronic components are placed in the optimal position based on the layout constraint file. The layout process varies according to the optimization target. While ensuring that the performance of the original circuit remains basically unchanged, the optimal situation of the optimization target is output as the result. That is, the first optimization target corresponds to the optimal result output under the current optimization target. Then the global layout of the target electronic components on the printed circuit board to be wired is realized, and the automatic layout result is obtained.

[0063] Step S13: performing automatic routing between the target electronic components according to the automatic layout result, and determining the global routing of the target electronic components on the printed circuit board to be routed when the second optimization goal is met based on the routing constraint file to obtain an automatic routing result.

[0064] In the embodiment of the present application, according to the situation after the layout is completed, the target electronic components are wired and connected based on the wiring constraint file. The wiring process is the same as the layout process, and it varies according to the optimization target. During the wiring connection process, while satisfying the basic performance of the original circuit, the optimal situation of the optimization target is output as the result. That is, the second optimization target corresponds to the optimal result output of the wiring under the current optimization target. Then the global wiring of the target electronic components on the printed circuit board to be wired is realized, and the automatic wiring result is obtained.

[0065] The present application provides an automatic layout and routing method for a printed circuit board, comprising: obtaining a design file of a printed circuit board to be wired, and analyzing a circuit structure according to the design file to generate a layout constraint file and a routing constraint file; calling target electronic components required for the printed circuit board to be wired from a component library pre-constructed based on a knowledge graph, and determining, based on the layout constraint file, a global layout of the target electronic components on the printed circuit board to be wired when a first optimization goal is met, so as to obtain an automatic layout result; performing automatic routing between the target electronic components according to the automatic layout result, and determining, based on the routing constraint file, a global routing of the target electronic components on the printed circuit board to be wired when a second optimization goal is met, so as to obtain an automatic routing result.

[0066] The beneficial technical effect of the present application is: the circuit structure is analyzed according to the designed circuit, and the generated layout and routing constraint files are respectively transmitted to the modules for layout and routing for automatic layout and routing. Since the corresponding results in the process of automatic layout and routing vary according to the optimization targets, the present application can use the first optimization target and the second optimization target when the optimization target is optimal to respectively determine the automatic layout results and automatic routing results of the target electronic components on the printed circuit board to be wired while ensuring that the basic performance of the original circuit remains unchanged. In this way, the rapid layout and routing effect of the printed circuit board to be wired is achieved, the layout and routing efficiency is improved, and good layout and routing effects are achieved. In addition, a component library is pre-built based on the knowledge graph, and the logic and relationships pre-defined for electronic components in the knowledge graph can enhance the advancement ability of the automatic layout algorithm, so that it can make more logical reasoning and decision-making on complex layout problems. Through the technical solution of the present application, it is possible to improve design efficiency, promote standardization, and optimize circuit performance; it is possible to quickly generate layout and routing schemes, significantly reduce the time of manual processing, and greatly improve design efficiency.

[0067] In a feasible implementation, based on the above embodiment, in order to further reduce the error rate and improve the design efficiency of the PCB board, the generated automatic layout results and automatic routing results are verified and the results are exported in the embodiment of the present application. Specifically, the following steps may be included:

[0068] Generate an initial layout using the automatic layout result and the automatic routing result, and check and verify the initial layout using a preset verification method;

[0069] When the initial layout is verified to be correct, the final layout is determined, and the final layout is output in a preset data format according to the type of printed circuit board design software.

[0070] In an embodiment of the present application, for the initial layout generated by the completed layout and wiring diagram, the initial layout is checked and verified by a preset verification method. For example, the design rules of the initial layout, whether the layout is consistent with the schematic diagram, the parameters of the components, the wiring rules, etc. are manually confirmed and checked, and the final layout is output after the inspection is correct. If unreasonable layout and wiring are found during the inspection and verification, adjustments can be made or the layout and wiring can be automatically re-laid out and re-wired. In addition, in a feasible implementation method, the grade standard can be set for the PCB board when it fails the inspection and verification, and a graded warning can be performed according to the grade standard to give priority to the conflicts and unreasonableness of the layout and wiring that may cause serious situations during the actual construction process, so as to ensure the accuracy and safety of the layout and wiring.

[0071] Furthermore, after the final layout is determined, the confirmed results can be exported to the system. For existing mainstream PCB design software such as Altium Designer, Cadence, Edwin, etc., it is exported in a specific data format, and the device and wiring coordinate network data after layout and routing are designed and exported to facilitate other design software to read and import data.

[0072] It can be seen that through this embodiment, software coordinate drawing can be performed according to the PCB design software layout data to solve the problems of quickly verifying whether the layout and wiring are compliant, etc.

[0073] like Figure 2 The figure shows a specific schematic diagram of the system composition for automatic layout and routing implemented in combination with the above embodiment. It includes seven modules, namely, circuit analysis module, constraint analysis module, device reference module, automatic layout module, automatic routing module, verification module, and result export module. Figure 3As shown, it is a schematic diagram of a specific process of realizing automatic layout and routing according to the above modules. For example, in the layout process, the k-means clustering algorithm can be used to realize the clustering grouping process, the particle algorithm can be used to realize the layout optimization process, and the sparrow search algorithm can be used to optimize the routing during the routing process. Among them, for more specific processing processes of other processing flows, reference can be made to the corresponding contents disclosed in the aforementioned embodiments, which will not be repeated here.

[0074] It can be seen that the present invention can automatically detect potential conflicts and unreasonable aspects in layout and wiring, avoid line interference, short circuit and other problems in actual construction, and ensure the accuracy and safety of the layout. At the same time, it can also help enterprises effectively control costs, avoid material waste and optimize resource allocation during automatic wiring through accurate cable length calculation and material management.

[0075] Based on the above embodiment, this embodiment will specifically explain S11 in the above embodiment. The process of obtaining the design file of the printed circuit board to be wired and analyzing the circuit structure according to the design file to generate the layout constraint file and the wiring constraint file may include the following steps:

[0076] Obtaining a circuit file and a rule file of a printed circuit board to be wired, and analyzing the circuit structure according to the circuit file and the rule file to generate different node files;

[0077] Analyzing the node file to determine the layout constraints and routing constraints of the target electronic components;

[0078] The layout constraint file and the wiring constraint file are generated using the layout constraint conditions and the wiring constraint conditions respectively.

[0079] In this embodiment, for a PCB board that needs to be automatically laid out and routed, its circuit file and related rule file are obtained. Through the circuit file and the rule file, the circuit is analyzed according to the designed circuit to generate a series of node files, including performance rules, circuit netlists, process files, electronic component classifications, etc. These node files are analyzed and classified to generate layout constraints and routing constraints respectively; then the analyzed layout and routing constraints are output to the corresponding constraint files to obtain layout constraint files and routing constraint files.

[0080] It should be pointed out that during the layout process, the device calling parameters of the required target electronic components will also be determined based on the input node file; further, based on the device calling parameters, the target electronic components are called from the component library pre-built based on the knowledge graph.

[0081] Based on the above embodiments, in a feasible implementation, a method based on knowledge graph is used to build a component library, and the predefined logic and relationships in the knowledge graph are used to enhance the advancement ability of the automatic layout algorithm, so that it can perform more logical reasoning and decision-making on complex layout problems. Specifically, the process of building a component library based on knowledge graph can include the following steps:

[0082] Acquire board information of a wired printed circuit board, and determine each electronic component in the wired printed circuit board according to the board information;

[0083] digitizing each of the electronic components to obtain electronic component data, and storing the electronic component data in a structured database;

[0084] Performing data cleaning and formatting processing on the electronic component data in the structured database to obtain processed data;

[0085] Extracting information from the processed data through a graph data model to obtain a plurality of component entities and relationships between the plurality of component entities;

[0086] The component library is constructed based on a plurality of the component entities and the mutual relationships.

[0087] In the embodiment of the present application, data collection is first performed, and the PCB board information that has been laid out is read through the system software to obtain the component relationship of various devices, the entity data of the devices, etc., and the devices are digitized and stored in a structured database. Secondly, the electronic component data in the structured database is processed, mainly including the process of cleaning dirty data, duplicate data, etc., and the process of data formatting. Finally, based on the relationship between the components, entity extraction and relationship extraction are performed through the data model of the graph structure to form a component library.

[0088] It should be pointed out that in the process of building a component library using the knowledge graph, the coordinate range of the components is relatively coordinateized. During the layout process, the system will select the required components from the component library based on the input node file and calculate the absolute coordinate position. In addition, since the component library predefines the relationship between multiple component entities when managing electronic components, during the layout process, based on the knowledge graph algorithm, the component entities and the direct connections between the components are structured, the relationship between the components is drawn, and the layout between the components is performed through the association relationship.

[0089] Specifically, the target electronic components required for the printed circuit board to be wired are called from a component library pre-constructed based on the knowledge graph, and the coordinate positions and association relationships of the target electronic components are determined; based on the layout constraint file, the global layout of the target electronic components on the printed circuit board to be wired is determined according to the coordinate positions and the association relationships when the first optimization goal is met, so as to obtain an automatic layout result.

[0090] Based on the above embodiment, this embodiment will specifically explain S12 in the above embodiment. The process of determining the global layout of the target electronic components on the printed circuit board to be wired when the first optimization goal is met based on the layout constraint file to obtain the automatic layout result may include the following steps:

[0091] According to the functional types of the target electronic components, the target electronic components are grouped using a preset classification algorithm to obtain a grouping result;

[0092] Based on the grouping result, the target electronic components are hashed on the printed circuit board to be routed according to the layout constraint file to obtain an initial global layout result;

[0093] A first optimization target is determined, and a corresponding optimization algorithm is selected according to the first optimization target to optimize the initial global layout result, so as to determine the layout corresponding to the target electronic components on the printed circuit board to be wired when the first optimization target is optimal as the automatic layout result.

[0094] It should be pointed out that PCB layout is the process of placing electronic components on the PCB board. The quality of the layout directly affects the efficiency of subsequent wiring and the overall performance of the circuit board. Reasonable layout needs to consider factors such as component arrangement, heat dissipation, signal flow, power supply and ground distribution to ensure the appearance, functionality and reliability of the circuit board. The process of automatic layout is actually the process of layout optimization. During the optimization process, the layout position is continuously modified until the best layout position that meets the constraints is found.

[0095] like Figure 4As shown in the figure, the layout process is generally divided into three steps: clustering and grouping, global averaging, and reasonable optimization. The main purpose of clustering and grouping is to divide large-scale problems into small-scale problems, and to group components according to certain business rules such as functions and attributes. The purpose of global averaging is to make each grouping module more evenly hashed in the layout area based on the clustering and grouping results, and to make the line length close to the optimal solution. After the global layout is completed, the global layout needs to be further optimized and rationalized, including removing layout overlaps and optimizing the line length. For overlaps after layout, the overlapping modules need to be hashed, and after the hashing is completed, global movement is performed to optimize the semi-circumference line length, and finally local optimization is performed to further reduce the line length to achieve the optimal line length.

[0096] In the embodiment of the present application, in the layout process, the electronic components can be grouped using a classification algorithm according to the functions of the electronic components (power supply, clock network, signal source, resistor, inductor, etc.). The initial global layout result is obtained through secondary layout. For the initial global layout result, the optimization algorithm is selected according to different optimization goals (electrical performance such as electromagnetic compatibility and signal integrity, reliability such as temperature and vibration, etc.) for further optimization. The layout process varies according to the optimization goal. While ensuring that the original circuit performance remains basically unchanged, the optimal optimization goal is output as the result.

[0097] Furthermore, for the overlapping modules that may exist after optimization, hashing can be performed using a hashing method based on additional force or optimization can be performed manually.

[0098] Based on the above embodiment, in order to solve the problem that the optimization path is inefficient and it is difficult to find a suitable path in the existing methods of PCB automatic wiring, a method with simple principle, few parameters, simple implementation and more stable performance is proposed in this embodiment. This embodiment will specifically explain S13 in the above embodiment. Among them, the process of determining the global wiring of the target electronic components on the printed circuit board to be wired when the second optimization goal is met to obtain the automatic wiring result may include the following steps:

[0099] Determine a second optimization target, and analyze the wire net and allocate a wiring area according to the second optimization target to obtain a wiring direction of the wire net;

[0100] A corresponding routing algorithm is selected according to the wire network routing direction to perform global routing between the target electronic components, and the routing corresponding to the target electronic components on the printed circuit board to be routed when the second optimization target is optimal is determined as the automatic routing result.

[0101] It should be pointed out that PCB wiring is the design and implementation process of connecting wires (or signal paths) between various electronic components on the PCB board. Wiring needs to follow certain rules, such as line width, spacing, routing direction, etc., to ensure the integrity of signal transmission and reduce interference.

[0102] like Figure 4 As shown in the figure, the process of automatic routing can be divided into two parts: global routing and detailed routing. Global routing is to roughly route the entire circuit after the layout is completed. There is no need to pay too much attention to the specific location of the routing, and the main purpose is to ensure a high routing rate. Before global routing, it is necessary to determine the optimization goals, including routing rate, congestion, etc. The results of global routing determine the quality of detailed routing, which is the basis of detailed routing and an important link in the entire routing process. The purpose of global routing is to provide global routing guidance for detailed routing based on the optimization goals. Detailed routing is to connect the same signal pins together according to a certain algorithm program in the routing area after the global routing is completed, while meeting the corresponding design rules and related parameters, and determine the actual position of the wire net to complete the connection of the wire net endpoints.

[0103] In an embodiment of the present application, automatic wiring is performed between components after the layout is completed. The wire network is analyzed according to different optimization goals such as routing rate, interconnection line length, congestion, channel capacity, etc., and the wiring area is allocated to obtain the approximate wiring direction of the wire network. Global wiring adopts a serial method or a parallel method, and selects different wiring algorithms according to different goals (such as finding the shortest path between two end points under a planar rectangular grid, the shortest distance between two points when there are obstacles, etc.). The wiring process is the same as the layout process, and it is different due to different optimization goals. In the wiring connection process, the optimal result of the optimization goal is used as the output while meeting the basic performance of the original circuit.

[0104] Furthermore, after the global routing is completed, the search algorithm is used to perform detailed routing optimization in different regions and modules.

[0105] Correspondingly, the embodiment of the present application also discloses an automatic layout and wiring device for a printed circuit board, see Figure 5 As shown, the device comprises:

[0106] The constraint file generation module 11 is used to obtain the design file of the printed circuit board to be wired, and analyze the circuit structure according to the design file to generate a layout constraint file and a wiring constraint file;

[0107] The automatic layout module 12 is used to call the target electronic components required for the printed circuit board to be wired from the component library pre-built based on the knowledge graph, and determine the global layout of the target electronic components on the printed circuit board to be wired when the first optimization goal is met based on the layout constraint file, so as to obtain the automatic layout result;

[0108] The automatic routing module 13 is used to perform automatic routing between the target electronic components according to the automatic layout results, and determine the global routing of the target electronic components on the printed circuit board to be routed when the second optimization goal is met based on the routing constraint file to obtain the automatic routing results.

[0109] Among them, for more specific working processes of the above-mentioned modules, please refer to the corresponding contents disclosed in the aforementioned embodiments, which will not be repeated here.

[0110] It can be seen that the above scheme of this embodiment includes: obtaining the design file of the printed circuit board to be wired, and analyzing the circuit structure according to the design file to generate a layout constraint file and a wiring constraint file; calling the target electronic components required for the printed circuit board to be wired from the component library pre-constructed based on the knowledge graph, and based on the layout constraint file, determining the global layout of the target electronic components on the printed circuit board to be wired when the first optimization goal is met, so as to obtain an automatic layout result; according to the automatic layout result, automatic wiring is performed between the target electronic components, and based on the wiring constraint file, determining the global wiring of the target electronic components on the printed circuit board to be wired when the second optimization goal is met, so as to obtain an automatic wiring result.

[0111] The beneficial technical effect of the present application is: the circuit structure is analyzed according to the designed circuit, and the generated layout and routing constraint files are respectively transmitted to the modules for layout and routing for automatic layout and routing. Since the corresponding results in the process of automatic layout and routing vary according to the optimization targets, the present application can use the first optimization target and the second optimization target when the optimization target is optimal to respectively determine the automatic layout results and automatic routing results of the target electronic components on the printed circuit board to be wired while ensuring that the basic performance of the original circuit remains unchanged. In this way, the rapid layout and routing effect of the printed circuit board to be wired is achieved, the layout and routing efficiency is improved, and good layout and routing effects are achieved. In addition, a component library is pre-built based on the knowledge graph, and the logic and relationships pre-defined for electronic components in the knowledge graph can enhance the advancement ability of the automatic layout algorithm, so that it can make more logical reasoning and decision-making on complex layout problems. Through the technical solution of the present application, it is possible to improve design efficiency, promote standardization, and optimize circuit performance; it is possible to quickly generate layout and routing schemes, significantly reduce the time of manual processing, and greatly improve design efficiency.

[0112] Furthermore, the present application also discloses an electronic device. Figure 6 This is a structural diagram of an electronic device 20 according to an exemplary embodiment, and the content in the diagram cannot be regarded as any limitation on the scope of use of the present application.

[0113] Figure 6 The present invention provides a schematic diagram of the structure of an electronic device 20 provided in an embodiment of the present application. The electronic device 20 may specifically include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 is used to store a computer program, and the computer program is loaded and executed by the processor 21 to implement the relevant steps in the automatic layout and routing method of the printed circuit board disclosed in any of the aforementioned embodiments. In addition, the electronic device 20 in this embodiment may specifically be a computer.

[0114] In this embodiment, the power supply 23 is used to provide working voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and the external device, and the communication protocol it follows is any communication protocol that can be applied to the technical solution of the present application, and is not specifically limited here; the input and output interface 25 is used to obtain external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs and is not specifically limited here.

[0115] In addition, the memory 22 as a carrier for resource storage may be a read-only memory, a random access memory, a disk or an optical disk, etc. The resources stored thereon may include an operating system 221, a computer program 222 and data 223, etc. The data 223 may include various data. The storage method may be temporary storage or permanent storage.

[0116] The operating system 221 is used to manage and control the hardware devices and computer program 222 on the electronic device 20, and can be Windows Server, Netware, Unix, Linux, etc. In addition to the computer program that can be used to complete the automatic layout and routing method of the printed circuit board performed by the electronic device 20 disclosed in any of the aforementioned embodiments, the computer program 222 can further include computer programs that can be used to complete other specific tasks.

[0117] Furthermore, the embodiment of the present application also discloses a computer-readable storage medium, wherein the computer-readable storage medium mentioned here includes a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a magnetic disk or an optical disk, or any other form of storage medium known in the technical field. Wherein, when the computer program is executed by the processor, the aforementioned automatic layout and wiring method of the printed circuit board is implemented. For the specific steps of the method, reference can be made to the corresponding contents disclosed in the aforementioned embodiment, and no further description will be given here.

[0118] Furthermore, an embodiment of the present application also provides a computer program product, including a computer program / instruction, which, when executed by a processor, implements any one of the above-mentioned methods for automatic layout and routing of a printed circuit board.

[0119] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0120] The steps of the automatic layout and routing method or algorithm for a printed circuit board described in conjunction with the embodiments disclosed herein can be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module can be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the technical field.

[0121] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0122] The above is a detailed introduction to the automatic layout and wiring method, device, equipment and medium of a printed circuit board provided by the present invention. Specific examples are used in this article to illustrate the principle and implementation method of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; at the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A method for automatic layout and routing of a printed circuit board, characterized in that: include: Obtaining a design file of a printed circuit board to be wired, and analyzing the circuit structure according to the design file to generate a layout constraint file and a wiring constraint file; Calling target electronic components required for the printed circuit board to be wired from a component library pre-built based on the knowledge graph, and determining the global layout of the target electronic components on the printed circuit board to be wired when the first optimization goal is met based on the layout constraint file, so as to obtain an automatic layout result; According to the automatic layout result, automatic routing is performed between the target electronic components, and based on the routing constraint file, the global routing of the target electronic components on the printed circuit board to be routed is determined when the second optimization goal is met to obtain an automatic routing result.

2. The automatic layout and routing method for a printed circuit board according to claim 1, characterized in that: The step of obtaining a design file of a printed circuit board to be wired and analyzing the circuit structure according to the design file to generate a layout constraint file and a wiring constraint file includes: Obtaining a circuit file and a rule file of a printed circuit board to be wired, and analyzing the circuit structure according to the circuit file and the rule file to generate different node files; the node file includes performance rules, circuit netlist, process file, and electronic component classification; Analyzing the node file to determine the layout constraints and routing constraints of the target electronic components; Generate the layout constraint file and the wiring constraint file using the layout constraint condition and the wiring constraint condition respectively; Accordingly, calling the target electronic components required for the printed circuit board to be wired from the component library pre-built based on the knowledge graph includes: Determine the device calling parameters of the target electronic component according to the node file; According to the device calling parameter, the target electronic component is called from a component library pre-built based on the knowledge graph.

3. The automatic layout and routing method of a printed circuit board according to claim 1, characterized in that: Build a component library based on the knowledge graph, including: Acquire board information of a wired printed circuit board, and determine each electronic component in the wired printed circuit board according to the board information; digitizing each of the electronic components to obtain electronic component data, and storing the electronic component data in a structured database; Performing data cleaning and formatting processing on the electronic component data in the structured database to obtain processed data; Extracting information from the processed data through a graph data model to obtain a plurality of component entities and relationships between the plurality of component entities; The component library is constructed based on a plurality of the component entities and the mutual relationships.

4. The automatic layout and routing method of a printed circuit board according to claim 1, characterized in that: The step of calling the target electronic components required for the printed circuit board to be wired from the component library pre-built based on the knowledge graph, and determining the global layout of the target electronic components on the printed circuit board to be wired when the first optimization goal is met based on the layout constraint file, so as to obtain the automatic layout result, includes: Calling target electronic components required for the printed circuit board to be wired from a component library pre-built based on the knowledge graph, and determining the coordinate position and association relationship of the target electronic components; Based on the layout constraint file, the global layout of the target electronic components on the printed circuit board to be wired is determined according to the coordinate positions and the association relationship when the first optimization goal is met to obtain an automatic layout result.

5. The automatic layout and routing method for a printed circuit board according to claim 1, characterized in that: The step of determining the global layout of the target electronic components on the printed circuit board to be wired when the first optimization goal is met based on the layout constraint file to obtain an automatic layout result includes: According to the functional types of the target electronic components, the target electronic components are grouped using a preset classification algorithm to obtain a grouping result; Based on the grouping result, the target electronic components are hashed on the printed circuit board to be routed according to the layout constraint file to obtain an initial global layout result; A first optimization target is determined, and a corresponding optimization algorithm is selected according to the first optimization target to optimize the initial global layout result, so as to determine the layout corresponding to the target electronic components on the printed circuit board to be wired when the first optimization target is optimal as the automatic layout result.

6. The automatic layout and routing method for a printed circuit board according to claim 1, characterized in that: The step of determining the global routing of the target electronic components on the printed circuit board to be routed when the second optimization target is met to obtain an automatic routing result includes: Determine a second optimization target, and analyze the wire net and allocate a wiring area according to the second optimization target to obtain a wiring direction of the wire net; A corresponding routing algorithm is selected according to the wire network routing direction to perform global routing between the target electronic components, and the routing corresponding to the target electronic components on the printed circuit board to be routed when the second optimization target is optimal is determined as the automatic routing result.

7. The automatic layout and routing method for a printed circuit board according to any one of claims 1 to 6, characterized in that: After determining that the global routing of the target electronic components on the printed circuit board to be routed when the second optimization goal is met to obtain the automatic routing result, the method further includes: Generate an initial layout using the automatic layout result and the automatic routing result, and check and verify the initial layout using a preset verification method; When the initial layout is verified to be correct, the final layout is determined, and the final layout is output in a preset data format according to the type of printed circuit board design software.

8. An automatic layout and routing device for a printed circuit board, characterized in that: include: A constraint file generation module, used for acquiring a design file of a printed circuit board to be wired, and analyzing the circuit structure according to the design file to generate a layout constraint file and a wiring constraint file; An automatic layout module, used to call the target electronic components required for the printed circuit board to be wired from a component library pre-built based on the knowledge graph, and determine the global layout of the target electronic components on the printed circuit board to be wired when the first optimization goal is met based on the layout constraint file, so as to obtain an automatic layout result; The automatic routing module is used to perform automatic routing between the target electronic components according to the automatic layout result, and determine the global routing of the target electronic components on the printed circuit board to be routed when the second optimization goal is met based on the routing constraint file to obtain the automatic routing result.

9. An electronic device, characterized in that: The electronic device comprises a processor and a memory; wherein the memory is used to store a computer program, and the computer program is loaded and executed by the processor to implement the automatic layout and routing method of a printed circuit board as claimed in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: Used to store computer programs; wherein when the computer program is executed by a processor, the method for automatic layout and routing of a printed circuit board as claimed in any one of claims 1 to 7 is implemented.

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