Parallel decoding bar code decoding chip and method, electronic equipment and storage medium

Abstract

The invention discloses a bar code decoding chip and method for parallel decoding, electronic equipment and a storage medium. The chip comprises an MCU control unit, an XIP FLASH, a program RAM, a DVP / MIPI interface controller, a core decoding unit and a UART / USB communication interface. The MCU control unit carries out unified scheduling work; the XIP FLASH is used for storing a program operated by the MCU control unit; the program RAM is used for storing a program variable in a running process; the DVP / MIPI interface controller is used for receiving image data transmitted by the CMOS image sensor and transferring the image data to the core decoding unit; the core decoding unit is used for decoding parallel bar codes; and the UART / USB communication interface is used for communication between the bar code decoding chip and an upper computer. According to the invention, the problems that the decoding speed is reduced and a high-mobility adaptive scene cannot be competent due to a serial decoding mode are solved.

Description

Technical Field

[0001] This invention belongs to the field of barcode recognition technology, and specifically relates to a parallel decoding barcode decoding chip, method, electronic device, and storage medium. Background Art

[0002] Barcode technology, short for barcode auto-identification technology, is an automatic symbol recognition technology developed based on modern information technology. It integrates symbol encoding, data collection, automatic identification, input, and information storage, effectively solving the problem of collecting and automatically inputting large amounts of data in real-world work and life. Barcode technology has been widely used in retail, intelligent traceability, logistics, engineering and warehousing management, hospitals, and pharmaceuticals. Currently, the most commonly used barcodes are one-dimensional and two-dimensional barcodes.

[0003] A one-dimensional barcode is a graphic symbol composed of a set of regularly arranged black and white stripes. Barcode information is transmitted through the varying widths and positions of the black and white stripes; this graphic symbol represents information such as numbers, characters, and symbols. This barcode technology can only store information in one direction through the arrangement of black and white stripes, hence the name "one-dimensional barcode."

[0004] Two-dimensional barcodes record data symbols using alternating black and white patterns distributed according to a certain pattern on a plane (horizontally and vertically). In its coding, it cleverly utilizes the concept of a bitstream of 0s and 1s, the foundation of computer logic, using several geometric shapes corresponding to binary to represent textual and numerical information. Error-correcting encoding is employed during the generation of two-dimensional barcodes, giving them strong resistance to damage. Two-dimensional barcodes can express information simultaneously in both horizontal and vertical directions, thus conveying a large amount of information within a very small area.

[0005] Barcode reading is a technology that converts barcode images into data information, mainly consisting of two parts: barcode image acquisition and decoding processing. Barcode image acquisition involves scanning the barcode image using an optical image sensor, converting the light signal into an electrical signal. Decoding processing translates the acquired electrical signal into corresponding data information according to certain rules. Barcode reading devices can be categorized based on their reading principles into laser reading devices, linear CCD reading devices, and area array CMOS / CCD reading devices.

[0006] Currently, decoding core chips primarily rely on CPUs for decoding. These CPUs employ the von Neumann architecture, characterized by sequential program execution. This architecture prevents CPUs from performing parallel decoding of multiple barcode types. To improve decoding speed, the only common approach is to increase the CPU's clock speed, but this leads to increased overall power consumption during the decoding process.

[0007] Chinese Patent Publication No. CN101908134A discloses a serial bus-type barcode decoding chip and a barcode decoding device. This serial bus-type barcode decoding chip includes a data memory, a register group, a barcode decoding pipeline, a main control logic module, a serial bus interface, and a serial command interpreter. The serial bus interface receives serial bus commands and serial bus data from the serial bus and temporarily stores the serial bus data in a data register. The serial command interpreter obtains the serial bus commands from the serial bus interface, interprets the serial bus commands into commands readable by the main control logic module, and stores the commands in a command register. Under the control of these commands, the main control logic module stores the serial bus data in the data memory. This invention cannot achieve efficient parallel decoding processing, limiting decoding speed and processing capacity. Summary of the Invention

[0008] The purpose of this invention is to provide a barcode decoding chip, method, electronic device, and storage medium for parallel decoding, so as to solve the problems of reduced decoding speed and inability to handle highly mobile and adaptable scenarios caused by serial decoding.

[0009] The technical solutions of the present invention are as follows: On one hand, the present invention provides a barcode decoding chip for parallel decoding, comprising: an MCU control unit, an XIPFLASH, a program RAM, a DVP / MIPI interface controller, a core decoding unit, and a UART / USB communication interface.

[0010] The MCU control unit performs unified scheduling of the barcode decoding chip via the AMBA bus; the XIPFLASH is used to store the program running by the MCU control unit, which is connected to the XIPFLASH via CACHE; the program RAM is used to store program variables during the operation of the MCU control unit, which reads and writes variables in the program RAM via the AHB bus; the DVP / MIPI interface controller receives image data transmitted from the CMOS image sensor and transfers it to the core decoding unit via a dedicated DMA channel; the core decoding unit specifically includes an image BMP storage unit and a barcode hardware decoding logic unit. The image BMP storage unit stores image data in parallel, and the barcode hardware decoding logic unit carries the core barcode decoding algorithm and performs barcode decoding based on the image data transmitted in parallel by the image BMP storage unit; the UART / USB communication interface is used for communication between the barcode decoding chip and the host computer.

[0011] Preferably, the image BMP storage unit includes: a parallel copying unit and several BMP RAM units; the barcode hardware decoding logic unit includes several decoding logic units and a control / status register; each BMP RAM unit corresponds to one decoding logic unit.

[0012] The parallel copying unit is connected in parallel with all BMP RAM units; the decoding logic units corresponding to each BMP RAM unit are connected to each other; the control / status register is connected in parallel with all decoding logic units.

[0013] Preferably, the parallel copying unit is used to connect to the DVP / MIPI interface controller to copy the image data transmitted by the DVP / MIPI interface controller in parallel to all BMP RAM units; each BMP RAM unit contains RAM of the same size, and each RAM stores image data from the same transmission process.

[0014] Preferably, the image BMP storage unit includes: a plurality of parallel arbiters and corresponding block RAM units; the barcode hardware decoding logic unit includes a plurality of address parsing units, a plurality of decoding logic units and a control / status register; each parallel arbiter corresponds to a block RAM unit; each address parsing unit corresponds to a decoding logic unit.

[0015] Each parallel arbiter is connected to a corresponding block RAM unit; each address resolution unit is connected to all parallel arbiters; and each address resolution unit is connected to a corresponding decoding logic unit.

[0016] Preferably, the parallel arbiter performs arbitration control on the image data stored in the block RAM unit according to the first-in-first-out principle. The total size of all the block RAM units is equal to the size of the image data in the same transmission process. The number of block RAM units is determined by the preset number of image division regions or the number of image rows.

[0017] Accordingly, the present invention provides a parallel decoding method for barcodes, comprising the following steps: After the barcode decoding chip is powered on, the MCU control unit obtains program instructions from the XIP FLASH and performs initialization operations on the various modules inside the barcode decoding chip and the external CMOS image sensor.

[0018] The MCU control unit controls the DVP / MIPI interface controller to read image data from the external CMOS image sensor and store it in the image BMP storage unit. The parallel copying unit copies the image data sent by the DVP / MIPI interface controller in parallel and inputs it into the BMP RAM unit corresponding to each barcode decoding unit.

[0019] The MCU control unit initiates the barcode hardware decoding logic unit to perform parallel decoding operations on the image data: The MCU control unit enables one or more barcode type decoding logic units according to the user configuration and writes the start signal to the corresponding control / status register. Each decoding logic unit accesses the image BMP storage unit according to its own decoding algorithm. After each decoding logic unit completes decoding, it sends the completion flag and the decoding success flag to the control / status register to generate an interrupt signal.

[0020] The decoding logic unit notifies the MCU control unit of the barcode decoding result through an interrupt signal. The MCU control unit then sends the barcode decoding result to the host computer through the UART / USB communication interface, completing one decoding operation.

[0021] Furthermore, the present invention provides a parallel decoding method for barcodes, comprising the following steps: After the barcode decoding chip is powered on, the MCU control unit obtains program instructions from the XIP FLASH and performs initialization operations on the various modules inside the barcode decoding chip and the external CMOS image sensor.

[0022] The MCU control unit controls the DVP / MIPI interface controller to read image data from an external CMOS image sensor and store it in the block RAM unit of the image BMP storage unit.

[0023] The MCU control unit initiates the barcode hardware decoding logic unit to perform parallel decoding operations on the image data: according to the user configuration, it enables one or more barcode type decoding logic units and writes the start signal to the corresponding control / status register. Each decoding logic unit accesses the corresponding block RAM unit according to its own decoding algorithm.

[0024] If the addresses of the block RAM cells accessed by each decoding logic unit are different, the image data is directly output to the address resolution unit corresponding to each decoding logic unit for barcode decoding after the next machine cycle of access. If multiple decoding logic units access the same block RAM cell, the parallel arbiter outputs the accessed image data to the address resolution unit corresponding to each decoding logic unit according to the first-in-first-out principle. After each decoding logic unit completes decoding, it sends the completion flag and the decoding success flag to the control / status register to generate an interrupt signal.

[0025] The decoding logic unit notifies the MCU control unit of the barcode decoding result through an interrupt signal. The MCU control unit then sends the barcode decoding result to the host computer through the UART / USB communication interface, completing one decoding operation.

[0026] In another aspect, the present invention also provides an electronic device comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement a barcode decoding method for parallel decoding as described in any embodiment of the present invention.

[0027] In another aspect, the present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements a barcode decoding method for parallel decoding as described in any embodiment of the present invention.

[0028] Compared with the prior art, the present invention has the following technical effects: The barcode decoding chip proposed in this invention significantly improves the processing speed and overall system performance of barcode decoding through its efficient modular design and parallel decoding mechanism. The chip, centrally scheduled by the MCU control unit, coordinates the collaborative work of various functional modules, achieving efficient acquisition, storage, and decoding of image data. It supports efficient parallel decoding of different types of barcodes, ensuring real-time performance and accuracy in the decoding process. Simultaneously, it improves the response speed and accuracy of barcode scanning applications, making it particularly suitable for scenarios requiring rapid decoding and high-concurrency processing, demonstrating significant technical advantages. Attached Figure Description

[0029] Figure 1 This is an overall architecture diagram of the barcode decoding chip with parallel decoding as described in this invention; Figure 2 This is the overall architecture diagram of the core decoding unit in Embodiment 2; Figure 3 This is the overall architecture diagram of the core decoding unit in Embodiment 3. DETAILED DESCRIPTION

[0030] To make the objectives, technical solutions, and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below in conjunction with specific embodiments of the present application and with reference to the accompanying drawings.

[0031] Example 1 This embodiment provides a barcode decoding chip for parallel decoding. (See attached document.) Figure 1 As shown, the barcode decoding chip includes: an MCU control unit, an XIP FLASH, a program RAM, a DVP / MIPI interface controller, a core decoding unit, and a UART / USB communication interface.

[0032] The MCU control unit performs unified scheduling of the barcode decoding chip via the AMBA bus. The XIPFLASH stores the program executed by the MCU control unit. The MCU control unit is connected to the XIPFLASH via a CACHE, which significantly improves the speed at which the MCU control unit reads instructions and data from the XIPFLASH. The storage capacity of the CACHE is not limited, but a 32K CACHE is preferred in practical applications. The program RAM stores program variables during the operation of the MCU control unit. The MCU control unit reads and writes variables to the program RAM via the AHB bus. The DVP / MIPI interface controller receives image data transmitted from the CMOS image sensor and transfers it to the core decoding unit via a dedicated DMA channel. The core decoding unit specifically includes an image BMP storage unit and a barcode hardware decoding logic unit. The image BMP storage unit stores image data in parallel, and the barcode hardware decoding logic unit carries the core barcode decoding algorithm and performs barcode decoding based on the image data transmitted in parallel from the image BMP storage unit. The UART / USB communication interface is used for communication between the barcode decoding chip and the host computer.

[0033] Example 2 This embodiment provides a parallel decoding barcode decoding chip. Based on Embodiment 1, the image BMP storage unit includes a parallel copying unit and several BMP RAM units; the barcode hardware decoding logic unit includes several decoding logic units and a control / status register; each BMP RAM unit corresponds to one decoding logic unit. The BMP RAM units are RAM of the image size, and each RAM block stores the same image data. Furthermore, this embodiment does not impose specific restrictions on the decoding type or decoding algorithm of the decoding logic units; the most suitable decoding algorithm for each decoding logic unit can be freely configured according to actual application requirements. See also... Figure 2 As shown, the decoding logic unit can be selected from 1D decoding logic, QR decoding logic, DM decoding logic, PDF417 decoding logic, etc.

[0034] The parallel copying unit is connected in parallel with all BMP RAM units; the decoding logic units corresponding to each BMP RAM unit are connected to each other; the control / status register is connected in parallel with all decoding logic units.

[0035] In a preferred embodiment of this invention, the parallel copying unit is used to connect to the DVP / MIPI interface controller and copy the image data transmitted by the DVP / MIPI interface controller in parallel to all BMP RAM units; each BMP RAM unit contains RAM of the same size, and each RAM stores image data from the same transmission process.

[0036] Example 3 This embodiment provides a parallel decoding barcode decoding chip. Based on Embodiment 1, the image BMP storage unit includes: several parallel arbiters and corresponding block-based RAM units; the barcode hardware decoding logic unit includes several address parsing units, several decoding logic units, and a control / status register; each parallel arbiter corresponds to a block-based RAM unit; each address parsing unit corresponds to a decoding logic unit. Furthermore, this embodiment does not impose specific restrictions on the decoding type or decoding algorithm of the decoding logic units; the most suitable decoding algorithm for each decoding logic unit can be freely configured according to actual application requirements. See also... Figure 3 As shown, the decoding logic unit can be selected from 1D decoding logic, QR decoding logic, DM decoding logic, PDF417 decoding logic, etc.

[0037] Each parallel arbiter is connected to a corresponding block RAM unit; each address resolution unit is connected to all parallel arbiters; and each address resolution unit is connected to a corresponding decoding logic unit.

[0038] In a preferred embodiment of this invention, since the addresses of the image data accessed by each decoding logic unit may differ, and a block RAM storage unit can only output data from one address per clock cycle, the parallel arbitrator performs arbitration control on the image data stored in the block RAM units according to the first-in-first-out principle to reduce the number of arbitrations and speed up decoding. The total size of all the block RAM units is equal to the size of the image data in the same transmission process, and the number of block RAM units is determined by the preset number of image division regions or image rows. This parallel decoding architecture can accelerate the decoding speed without increasing RAM overhead.

[0039] Example 4 Accordingly, this embodiment provides a parallel decoding barcode decoding method, which is implemented based on the barcode decoding chip described in Embodiment 2, and includes the following steps: After the barcode decoding chip is powered on, the MCU control unit obtains program instructions from the XIP FLASH and performs initialization operations on the various modules inside the barcode decoding chip and the external CMOS image sensor.

[0040] The MCU control unit controls the DVP / MIPI interface controller to read image data from the external CMOS image sensor and store it in the image BMP storage unit. The parallel copying unit copies the image data sent by the DVP / MIPI interface controller in parallel and inputs it into the BMP RAM unit corresponding to each barcode decoding unit. The parallel copying unit is a purely parallel processing unit, which does not require additional time overhead, and the image data in each BMP RAM unit is consistent.

[0041] The MCU control unit initiates the barcode hardware decoding logic unit to perform parallel decoding of image data. Based on user configuration, the MCU control unit activates one or more barcode type decoding logic units and writes a start signal to the corresponding control / status register. Each decoding logic unit accesses the image BMP storage unit according to its own decoding algorithm. Each BMP RAM unit has independent storage content and interface, and access is independent of each other. Therefore, all decoding is completely parallel and independent, and the decoding processes of each decoding logic unit do not conflict. This allows all decoding core units to be activated simultaneously, greatly accelerating the decoding speed. After each decoding logic unit completes decoding, it sends a completion flag and a decoding success flag to the status register of the control / status register, generating an interrupt signal.

[0042] The decoding logic unit notifies the MCU control unit of the barcode decoding result through an interrupt signal. The MCU control unit then sends the barcode decoding result to the host computer through the UART / USB communication interface, completing one decoding operation.

[0043] Example 5 Accordingly, this embodiment provides a parallel decoding barcode decoding method, which is implemented based on the barcode decoding chip described in Embodiment 3, and includes the following steps: After the barcode decoding chip is powered on, the MCU control unit obtains program instructions from the XIP FLASH and performs initialization operations on the various modules inside the barcode decoding chip and the external CMOS image sensor.

[0044] The MCU control unit controls the DVP / MIPI interface controller to read image data from an external CMOS image sensor and store it in the block RAM unit of the image BMP storage unit.

[0045] The MCU control unit initiates the barcode hardware decoding logic unit to perform parallel decoding operations on the image data: according to the user configuration, it enables one or more types of barcode decoding logic units and writes the start signal to the control register of the corresponding control / status register. Each decoding logic unit accesses the corresponding block RAM unit according to its own decoding algorithm.

[0046] If the addresses of the block RAM cells accessed by each decoding logic unit are different, the image data is directly output to the address resolution unit corresponding to each decoding logic unit for barcode decoding after the next machine cycle of the access. If multiple decoding logic units access the same block RAM cell, the parallel arbiter outputs the accessed image data to the address resolution unit corresponding to each decoding logic unit according to the first-in-first-out principle, and gives each accessed address resolution unit a data validity indication signal. After each decoding logic unit completes decoding, it sends a completion flag and a decoding success flag to the status register of the control / status register to generate an interrupt signal.

[0047] The decoding logic unit notifies the MCU control unit of the barcode decoding result through an interrupt signal. The MCU control unit then sends the barcode decoding result to the host computer through the UART / USB communication interface, completing one decoding operation.

[0048] Example 6 This embodiment provides an electronic device, which includes: a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements a barcode decoding method with parallel decoding as described in any embodiment of the present invention.

[0049] Example 7 This embodiment provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements a barcode decoding method with parallel decoding as described in any embodiment of the present invention.

[0050] In this application embodiment, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent the existence of A alone, A and B simultaneously, or B alone. A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" and similar expressions refer to any combination of these items, including any combination of singular or plural items. For example, at least one of a, b, and c can represent: a, b, c, a and b, a and c, b and c, or a and b and c, where a, b, and c can be single or multiple.

[0051] Those skilled in the art will recognize that the units and algorithm steps described in the embodiments disclosed herein can be implemented using electronic hardware, computer software, or a combination of electronic hardware and software. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0052] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0053] In the several embodiments provided in this application, any function, if implemented as a software functional unit and sold or used as an independent product, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0054] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention's description and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A barcode decoding chip for parallel decoding, characterized in that: include: MCU control unit, XIP FLASH, program RAM, DVP / MIPI interface controller, core decoding unit, UART / USB communication interface; The MCU control unit performs unified scheduling of the barcode decoding chip through the AMBA bus; the XIP FLASH is used to store the program run by the MCU control unit, and the MCU control unit is connected to the XIP FLASH through CACHE; the program RAM is used to store program variables during the operation of the MCU control unit, and the MCU control unit reads and writes variables in the program RAM through the AHB bus; the DVP / MIPI interface controller is used to receive image data transmitted by the CMOS image sensor and transfer it to the core decoding unit through a dedicated DMA channel; The core decoding unit specifically includes: an image BMP storage unit and a barcode hardware decoding logic unit. The image BMP storage unit is used to store image data in parallel. The barcode hardware decoding logic unit is used to carry the barcode decoding core algorithm and perform barcode decoding according to the image data transmitted in parallel by the image BMP storage unit. The UART / USB communication interface is used for the barcode decoding chip to communicate with the host computer.

2. The barcode decoding chip for parallel decoding according to claim 1, characterized in that: The image BMP storage unit includes: a parallel copy unit and a plurality of BMP RAM units; the barcode hardware decoding logic unit includes a plurality of decoding logic units and a control / status register; each BMP RAM unit corresponds to a decoding logic unit; The parallel copy unit is connected in parallel with all the BMP RAM units; the decoding logic units corresponding to each BMP RAM unit are connected to each other; and the control / status register is connected in parallel with all the decoding logic units.

3. The barcode decoding chip for parallel decoding according to claim 2, characterized in that: The parallel copy unit is used to connect with the DVP / MIPI interface controller to copy the image data transmitted by the DVP / MIPI interface controller to all BMP RAM units in parallel; each BMP RAM unit contains a RAM of the same size, and each RAM stores image data in the same transmission process.

4. The barcode decoding chip for parallel decoding according to claim 1, characterized in that: The image BMP storage unit includes: a plurality of parallel arbiters and corresponding block RAM units; the barcode hardware decoding logic unit includes a plurality of address resolution units, a plurality of decoding logic units and a control / status register; each parallel arbiter corresponds to a block RAM unit; each address resolution unit corresponds to a decoding logic unit; Each parallel arbiter is connected to a corresponding block RAM unit; each address resolution unit is connected to all parallel arbiters; and each address resolution unit is connected to a corresponding decoding logic unit.

5. The barcode decoding chip for parallel decoding according to claim 4, characterized in that: The parallel arbitrator performs arbitration control on the image data stored in the block RAM unit according to the first-in-first-out principle. The sum of the sizes of all the block RAM units is the image data size of the same transmission process. The number of block RAM units is determined by the preset number of image division areas or the number of image rows.

6. A barcode decoding method for parallel decoding, characterized in that: The method is implemented based on the barcode decoding chip for parallel decoding according to any one of claims 2-3, and comprises the following steps: After the barcode decoding chip is powered on, the MCU control unit obtains program instructions from the XIP FLASH and initializes each module inside the barcode decoding chip and the external CMOS image sensor; The MCU control unit controls the DVP / MIPI interface controller to read image data from the external CMOS image sensor and store it in the image BMP storage unit. The parallel copy unit copies the image data sent by the DVP / MIPI interface controller in parallel and inputs it into the BMP RAM unit corresponding to each barcode decoding unit. The MCU control unit starts the barcode hardware decoding logic unit to perform parallel decoding operations on the image data: the MCU control unit starts one or more barcode decoding logic units according to the user configuration, and writes the start signal to the corresponding control / status register. Each decoding logic unit accesses the image BMP storage unit according to its own decoding algorithm. After each decoding logic unit completes decoding, it sends the completion flag and the decoding success flag to the control / status register to generate an interrupt signal; The decoding logic unit notifies the MCU control unit of the barcode decoding result through an interrupt signal. The MCU control unit sends the barcode decoding result to the host computer through the UART / USB communication interface to complete a decoding operation.

7. A barcode decoding method for parallel decoding, characterized in that: The method is implemented based on the barcode decoding chip for parallel decoding as described in any one of claims 4 and 5, and comprises the following steps: After the barcode decoding chip is powered on, the MCU control unit obtains program instructions from the XIP FLASH to initialize the various modules inside the barcode decoding chip and the external CMOS image sensor; The MCU control unit controls the DVP / MIPI interface controller to read image data from the external CMOS image sensor and store it in the block RAM unit of the image BMP storage unit; The MCU control unit starts the barcode hardware decoding logic unit to perform parallel decoding operations on the image data: one or more barcode type decoding logic units are started according to the user configuration, and the start signal is written to the corresponding control / status register. Each decoding logic unit accesses the corresponding block RAM unit according to its own decoding algorithm; If the addresses of the block RAM units accessed by the decoding logic units are different, the image data is directly output to the address resolution unit corresponding to each decoding logic unit for barcode decoding after the next machine cycle of the access; if multiple decoding logic units access the same block RAM unit, the parallel arbiter outputs the accessed image data to the address resolution unit corresponding to each decoding logic unit according to the first-in-first-out principle, and after each decoding logic unit completes decoding, it sends the completion flag and the flag of whether the decoding is successful to the control / status register to generate an interrupt signal; The decoding logic unit notifies the MCU control unit of the barcode decoding result through an interrupt signal. The MCU control unit sends the barcode decoding result to the host computer through the UART / USB communication interface to complete a decoding operation.

8. An electronic device, comprising: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the barcode decoding method of parallel decoding as described in claim 6 or 7 when executing the computer program.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the barcode decoding method of parallel decoding as claimed in claim 6 or 7 is implemented.

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