Display panel, control method of display panel and electronic equipment

Abstract

The invention provides a display panel, a control method of the display panel and electronic equipment, and relates to the technical field of display. The display panel comprises a first reset signal line connected with a pixel circuit in a first display area and a second reset signal line connected with a pixel circuit in a second display area, when the display panel is in a folded state, the first reset signal line is configured to provide a first reset voltage for the pixel circuit in the first display area, and the second reset signal line is configured to provide a second reset voltage for the pixel circuit in the second display area. The second reset signal line is configured to provide a second reset voltage for the pixel circuit in the second display area, the first reset voltage is different from the second reset voltage, and the second reset voltage enables the second display area to be in a black state when the second display area is in a folded state. By means of the arrangement, differential reset voltage control can be conducted on the first display area and the second display area in the folded state of the display panel, normal display of the first display area is ensured, meanwhile, power consumption of the second display area is reduced, and the cruising ability of the display panel is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel, a control method for a display panel, and an electronic device. Background Art

[0002] At present, the foldable display panels on the market can be mainly divided into two types: inner foldable and outer foldable. In the prior art, the outer foldable display panel is generally displayed through a display screen. When it is unfolded, the display panel can present a full-screen display state; when it is folded, the display panel automatically adjusts to a half-screen display state, in which the unused half-screen part will receive a black state voltage to display a black screen, which will result in a higher power consumption of the entire display panel. Summary of the invention

[0003] In order to at least overcome the above-mentioned deficiencies in the prior art, an object of the present application is to provide a display panel, a control method of a display panel and an electronic device.

[0004] In a first aspect, an embodiment of the present application provides a display panel, wherein the display panel includes a first display area and a second display area;

[0005] The display panel further includes a first reset signal line and a second reset signal line; wherein,

[0006] When the display panel is in a folded state, the first reset signal line is configured to provide a first reset voltage to the pixel circuit corresponding to the first display area, and the second reset signal line is configured to provide a second reset voltage to the pixel circuit corresponding to the second display area, wherein the first reset voltage is different from the second reset voltage, and the second reset voltage causes the second display area to be in a black state when in the folded state.

[0007] In a possible implementation, the display panel further includes a first control circuit and a second control circuit;

[0008] The first control circuit is configured to provide a control signal to a pixel circuit corresponding to the first display area;

[0009] The second control circuit is configured to repeatedly and intermittently provide control signals to pixel circuits in the second display area when the display panel is in a folded state.

[0010] In a possible implementation, the first control circuit includes a first light-emitting control circuit and a first scanning circuit, and the second control circuit includes a second light-emitting control circuit and a second scanning circuit;

[0011] When the display panel is in the folded state, the second display area switches alternately between a first power saving state and a second power saving state, wherein the second power saving state is maintained for a longer time than the first power saving state;

[0012] The first light emitting control circuit and the first scanning circuit are configured to provide a light emitting control signal and a scanning signal to the pixel circuits in the first display area;

[0013] The second light emitting control circuit and the second scanning circuit are configured to provide a light emitting control signal and a scanning signal to the pixel circuit in the second display area in the first power saving state, and are configured to stop working in the second power saving state.

[0014] In a possible implementation manner, the display panel further includes a switch unit, and the first reset signal line and the second reset signal line are connected through the switch unit;

[0015] When the display panel is in a non-folding state, the switch unit is configured to be in a conducting state, and the reset voltages of the first reset signal line and the second reset signal line are the same;

[0016] When the display panel is in a folded state, the switch unit is configured to be in an off state, and a reset voltage of the first reset signal line is different from a reset voltage of the second reset signal line;

[0017] Preferably, when the display panel is in a folded state, a reset voltage of the second reset signal line is smaller than a reset voltage of the first reset signal line.

[0018] In a possible implementation, the display panel further includes a first clock signal line and a second clock signal line;

[0019] The first clock signal line is connected to the first light emitting control circuit and the second light emitting control circuit, and is used to provide the same clock signal to the first light emitting control circuit and the second light emitting control circuit;

[0020] The second clock signal line is connected to the first scanning circuit and the second scanning circuit, and is used to provide the same clock signal to the first scanning circuit and the second scanning circuit.

[0021] In a possible implementation, the pixel circuit in the second display area includes a first reset module, a data writing module, a storage module, a threshold compensation module, a driving module, a light emitting control module, a light emitting module and a second reset module, and the second reset signal line includes a gate voltage reset signal line and an electrode voltage reset signal line;

[0022] The storage module is connected between the control terminal of the driving module and the first power signal line;

[0023] The first reset module and the storage module are connected in series between the gate reset signal line and the first power signal line, wherein the gate voltage reset signal line provides a reset voltage signal for the first reset module, and the control end of the driving module is reset by the first reset module;

[0024] The threshold compensation module is connected between the control end of the driving module and the first end of the driving module, and the threshold compensation module is used to perform threshold compensation on the driving module;

[0025] The data writing module is connected to the second end of the driving module, and the driving module, the light emitting control module and the light emitting module are connected in series between a first power signal line and a second power signal line, wherein the second power signal line is connected to a second electrode of the light emitting module;

[0026] The electrode voltage reset signal line is connected to the first electrode of the light emitting module through the second reset module, and the first electrode of the light emitting module is reset through the second reset module.

[0027] In a possible implementation, when the display panel is in a folded state, the reset voltage of the gate voltage reset signal line is greater than the reset voltage provided by the electrode voltage reset signal line;

[0028] Preferably, when the display panel is in a folded state, a difference between a reset voltage provided by the electrode voltage reset signal line and a power supply voltage provided by the second power supply signal line is -7V to 0V.

[0029] In a second aspect, an embodiment of the present application further provides a method for controlling a display panel, wherein the display panel includes a foldable first display area and a foldable second display area, and the method includes:

[0030] detecting whether the display panel is in a folded state;

[0031] When it is detected that the display panel is in a folded state, a first reset signal line is used to provide a first reset voltage for the pixel circuit in the first display area, and a second reset signal line is used to provide a second reset voltage for the pixel circuit in the second display area, wherein the first reset voltage and the second reset voltage are different.

[0032] In a possible implementation, the first reset signal line and the second reset signal line are connected through a switch unit, and when it is detected that the display panel is in a folded state, the first reset signal line is used to provide a first reset voltage for the pixel circuit in the first display area, and the second reset signal line is used to provide a second reset voltage for the pixel circuit in the second display area, wherein the first reset voltage and the second reset voltage are different, the step includes:

[0033] When it is detected that the display panel is in a folded state, the switch unit is controlled to be disconnected, a first reset signal line is used to provide a first reset voltage for the pixel circuit in the first display area, and a second reset signal line is used to provide a second reset voltage for the pixel circuit in the second display area;

[0034] Preferably, the method further comprises:

[0035] When it is detected that the display panel is in the unfolded state, the switch unit is controlled to be turned on, and the first reset signal line and the second reset signal line are used to provide the same reset voltage to the pixel circuits in the first display area and the pixel circuits in the second display area respectively.

[0036] In a third aspect, an embodiment of the present application further provides an electronic device, comprising a display panel as described in any one of the first aspects.

[0037] Based on any of the above aspects, the display panel, the control method of the display panel and the electronic device provided in the embodiments of the present application include a first reset signal line connected to the pixel circuit in the first display area, and a second reset signal line connected to the pixel circuit in the second display area. When the display panel is in a folded state, the first reset signal line is configured to provide a first reset voltage to the pixel circuit in the first display area, and the second reset signal line is configured to provide a second reset voltage to the pixel circuit in the second display area, wherein the first reset voltage and the second reset voltage are different, and the second reset voltage makes the second display area in a black state when in the folded state. With such a configuration, the reset voltage control of the first display area and the second display area can be differentiated in the folded state of the display panel, and while ensuring the normal display of the first display area, the power consumption of the second display area is reduced, thereby improving the battery life of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0039] Figure 1 This is one of the schematic diagrams of the circuit connection structure of the display panel provided in the embodiment of the present application;

[0040] Figure 2 A second schematic diagram of the circuit connection structure of the display panel provided in an embodiment of the present application;

[0041] Figure 3 is a timing diagram of the operation of the second display area in a black state;

[0042] Figure 4 The third schematic diagram of the circuit connection structure of the display panel provided in the embodiment of the present application;

[0043] Figure 5 A possible schematic diagram of a pixel circuit provided in an embodiment of the present application;

[0044] Figure 6 A flow chart of the steps of a method for controlling a display panel provided in an embodiment of the present application. DETAILED DESCRIPTION

[0045] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0046] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0047] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0048] In the description of this application, it should be noted that the terms "upper", "lower", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product of the application is usually placed when in use, which is only for the convenience of describing this application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application. In addition, the terms "first", "second", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0049] In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "disposed", "connected", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal connection of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0050] It should be noted that, in the absence of conflict, different features in the embodiments of the present application may be combined with each other.

[0051] The inventors found that in the related art, the foldable display panel includes a first display area and a second display area. In the folded state, the above display panel usually provides the same voltage to the two display areas, which may cause that even if only the first display area is displaying the picture, the pixel circuit in the second display area is still in a standby state, and it is necessary to continuously transmit the light control signal and / or data signal (i.e., black state signal) to the pixel circuit in the second display area through the signal line to make it in a black screen state, that is, the second display area is still in an energy consumption state.

[0052] In some related technologies, the gate drive circuit (GIP circuit) may include a light-emitting control circuit (EM circuit) and a scanning circuit (Scan circuit), and the light-emitting control circuit and the scanning circuit may reduce the power consumption of the second display area in the folded state by repeatedly and intermittently providing a light-emitting control signal to the light-emitting control circuit in the second display area. Specifically, the power consumption may be reduced by interleaving the display area in a black state (i.e., the first power-saving state described later) and the display area being turned off (i.e., the second power-saving state described later). In the black state of the display area, the EM circuit and the Scan circuit provide a light-emitting control signal and a scanning signal to the pixel circuit, respectively, and at the same time, by writing a black state data signal (Data), the second display area displays a black screen (i.e., each pixel in the second display area displays black). In the display area being turned off, the EM circuit and the Scan circuit stop providing the pixel circuit with a light-emitting control signal and a scanning signal, i.e., the EM circuit and the Scan circuit do not work, thereby reducing the power consumption of the display panel.

[0053] However, if the pixel circuit of the second display area is in the display area closed state for a long time, the switch transistor in the pixel circuit will also be in a high potential state for a long time, and the switch transistor may be affected by the negative bias stress and the threshold voltage may be biased. When the display panel switches to the full-screen display state, the first display area and the second display area may have a significant difference in display brightness due to the large deviation of the threshold voltage of the switch transistors in different display areas, thereby affecting the display effect. In addition, if the pixel circuit of the second display area is in the display area closed state for a long time, the switch transistor in the pixel circuit may have leakage current due to factors such as temperature. When the leakage current reaches the start-up voltage of the light-emitting device, the second display area may have a stealth phenomenon.

[0054] To solve the above problems, please refer to Figure 1 An embodiment of the present application provides a display panel 10 , which includes a foldable first display area 100 and a second display area 200 , and a pixel circuit for driving each pixel in the first display area 100 and the second display area 200 .

[0055] The display panel 10 further includes a first reset signal line 110 connected to the pixel circuits in the first display area 100 , and a second reset signal line 210 connected to the pixel circuits in the second display area 200 .

[0056] When the display panel 10 is in the folded state, the first reset signal line 110 is configured to provide a first reset voltage to the pixel circuit in the first display area 100, and the first reset voltage can make the first display area 100 display the picture normally in the folded state. The second reset signal line 210 is configured to provide a second reset voltage to the pixel circuit in the second display area 200, and the first reset voltage is different from the second reset voltage. The second reset voltage can make the second display area 200 in the black state when in the folded state, wherein the black state includes the second display area 200 displaying a black picture and the second display area 200 being turned off (not displaying). The second reset signal line 210 can provide a lower reset voltage for the second display area 200, so that the second display area 200 can maintain the closed state for a longer time, reducing the stealing of light while achieving the purpose of reducing power consumption.

[0057] In this embodiment, by setting a first reset signal line 110 and a second reset signal line 210 that are independent of each other, differentiated reset voltage control can be performed on the first display area 100 and the second display area 200 in the folded state of the display panel 10, thereby ensuring the normal display of the first display area 100 while reducing the power consumption of the second display area 200 and improving the battery life of the display panel 10.

[0058] Further, please refer again to Figure 2The display panel 10 may further include a first control circuit 120 connected to the pixel circuit in the first display area 100, and a second control circuit 220 connected to the pixel circuit in the second display area 200, wherein the first control circuit 120 and the second control circuit 220 are not connected.

[0059] The first control circuit 120 is configured to provide control signals to the pixel circuits in the first display area 100, and the second control circuit 220 is configured to repeatedly and intermittently provide control signals to the pixel circuits in the second display area 200 when the display panel 10 is in the folded state. When the display panel 10 is in the unfolded state, the first control circuit 120 and the second control circuit 220 are respectively configured to provide control signals to the pixel circuits in the first display area 100 and the second display area 200, so that the first display area 100 and the second display area 200 display the picture together.

[0060] For further information, please refer to Figure 2 The first control circuit 120 may include a first light emitting control circuit 121 and a first scanning circuit 122 , and the second control circuit 220 may include a second light emitting control circuit 221 and a second scanning circuit 222 .

[0061] When the display panel 10 is in the folded state, the second display area 200 switches alternately between the first power saving state A and the second power saving state B, wherein please refer to Figure 3 The second power saving state A is maintained for a longer time than the first power saving state B. For example, the first power saving state A may be maintained for a time t1 of 5 seconds, and the second power saving state B may be maintained for a time t2 of 25 seconds.

[0062] The first light-emitting control circuit 121 and the first scanning circuit 122 are configured to provide light-emitting control signals and scanning signals to the pixel circuits in the first display area 100. The second light-emitting control circuit 221 and the second scanning circuit 222 are configured to provide light-emitting control signals and scanning signals to the pixel circuits in the second display area 200 in the first power saving state A, and are configured to stop working in the second power saving state B, that is, the second display area 200 displays a black screen in the first power saving state A, and turns off the second light-emitting control circuit 221 and the second scanning circuit 222 in the second power saving state B.

[0063] In the above structure, by configuring the second control circuit 220 to provide repeated and intermittent control signals to the second display area 200 when the display panel 10 is in the folded state, the second display area 200 can be alternately switched between the first power saving state A and the second power saving state B, and the maintenance time of the second power saving state B is greater than the maintenance time of the first power saving state A, so that the working time of the second display area 200 can be effectively reduced, and the overall power consumption of the display panel 10 can be reduced. In addition, by configuring the second light-emitting control circuit 221 and the second scanning circuit 222 to stop working in the second power saving state B, the working time of the second light-emitting control circuit 221 and the second scanning circuit 222 can be reduced, and the overall power consumption of the display panel 10 can be further reduced, and the endurance of the display panel 10 can be improved.

[0064] Please refer again Figure 4 The display panel 10 further includes a switch unit 310, and the first reset signal line 110 is connected to the second reset signal line 210 through the switch unit 310. Optionally, the switch unit 310 includes a switch transistor, and a control electrode of the switch transistor can be connected to a state signal line Vrefn_SW.

[0065] When the display panel 10 is in a non-folding state, a low-level signal can be configured for the state signal line Vrefn_SW, and the switch unit 310 is configured to be in a conducting state, so that the reset voltages of the first reset signal line 110 and the second reset signal line 210 are the same, so as to ensure the voltage consistency during full-screen display and avoid display problems caused by voltage differences. Exemplarily, when the display panel 10 is in a non-folding state, the reset voltages of the first reset signal line 110 and the second reset signal line 210 can be -3V to 0V. Preferably, when the display panel 10 is in a non-folding state, the reset voltages of the first reset signal line 110 and the second reset signal line 210 can be -1V.

[0066] When the display panel 10 is in the folded state, a high-level signal may be configured for the state signal line Vrefn_SW, and the switch unit 310 may be configured to be in the off state, so that the reset voltage of the first reset signal line 110 is different from the reset voltage of the second reset signal line 210. Preferably, when the display panel 10 is in the folded state, the reset voltage of the second reset signal line 210 is less than the reset voltage of the first reset signal line 110. Exemplarily, when the display panel 10 is in the folded state, the reset voltage of the first reset signal line 110 may be -3V to 0V, and the reset voltage of the second reset signal line 210 may be -10V to -3V. Preferably, when the display panel 10 is in the folded state, the reset voltage of the first reset signal line 110 may be -1V, and the reset voltage of the second reset signal line 210 may be -5V.

[0067] Such a configuration can not only ensure that the reset voltages of the first reset signal line 110 and the second reset signal line 210 are the same in the unfolded state, thereby improving display uniformity, but also provide different reset voltages for the first display area 100 and the second display area 200 in the folded state. The second reset signal line 210 can provide a lower reset voltage for the second display area 200 than the first reset signal line 110, so that the second display area 200 can maintain a closed state for a longer period of time, thereby achieving the purpose of reducing power consumption.

[0068] Further, please refer again to Figure 4 The display panel 10 may further include a first clock signal line 321 and a second clock signal line 322. The first clock signal line 321 is connected to the first light emitting control circuit 121 and the second light emitting control circuit 221, and is used to provide the same clock signal to the first light emitting control circuit 121 and the second light emitting control circuit 221. The second clock signal line 322 is connected to the first scanning circuit 122 and the second scanning circuit 222, and is used to provide the same clock signal to the first scanning circuit 122 and the second scanning circuit 222.

[0069] Such a configuration ensures that the first display area 100 and the second display area 200 remain synchronized during refreshing, data loading, scanning, etc., avoiding image tearing or misalignment caused by display asynchrony. At the same time, the working modes of the two display areas can be flexibly adjusted according to the first clock signal line 321 and the second clock signal line 322.

[0070] Please refer to Figure 5 The pixel circuit in the second display area 200 includes a first reset module 430, a data writing module 450, a storage module 420, a threshold compensation module 440, a driving module 410, a light emitting control module 460, a light emitting module 470 and a second reset module 480, and the second reset signal line 210 includes a gate voltage reset signal line Vrefn1 and an electrode voltage reset signal line Vrefn2.

[0071] The storage module 420 is connected between the control terminal of the driving module 410 and the first power signal line ELVDD. Optionally, the storage module 420 includes a storage capacitor C, and the driving module 410 includes a first transistor T1.

[0072] The first reset module 430 and the storage module 420 are connected in series between the gate reset signal line Vrefn1 and the first power signal line ELVDD, wherein the gate voltage reset signal line Vrefn1 provides a first reset voltage for the first reset module 430, and the control terminal of the driving module 410 is reset by the first reset module 430. Optionally, the first reset module 430 includes a second transistor T2, and the control electrode of the second transistor T2 can be connected to the first scan signal line Scan1.

[0073] The threshold compensation module 440 is connected between the control terminal of the driving module 410 and the first terminal of the driving module 410, and is used to perform threshold compensation on the driving module 410. Optionally, the threshold compensation module 440 includes a third transistor T3, and the control electrode of the third transistor T3 can be connected to the second scan signal line Scan2.

[0074] The data writing module 450 is connected to the second end of the driving module 410, and the driving module 410, the light emitting control module 460 and the light emitting module 470 are connected in series between the first power signal line ELVDD and the second power signal line ELVSS, wherein the second power signal line ELVSS is connected to the second electrode of the light emitting module 470. Optionally, the data writing module 450 may include a fourth transistor T4, the control electrode of the fourth transistor T4 may be connected to the second scan signal line Scan2, one end of the fourth transistor T4 is connected to the data signal line Data, and the other end is connected to the second end of the driving module 410. The light emitting control module 460 may include a fifth transistor T5 and a sixth transistor T6. The control end of the fifth transistor T5 is connected to the light emitting control signal line EM, one end of the fifth transistor T5 is connected to the first power signal line ELVDD, and the other end is connected to one end of the data writing module 450 connected to the driving module 410. The control end of the sixth transistor T6 is connected to the light-emitting control signal line EM, one end of the sixth transistor T6 is connected to the first end of the driving transistor, and the other end is connected to the first electrode of the light-emitting module 470. The fifth transistor T5 and the sixth transistor T6 work based on the light-emitting control signal provided by the light-emitting control signal line EM.

[0075] Alternatively, one of the voltage on the first power signal line ELVDD and the voltage on the second power signal line ELVSS is a high voltage, and the other is a low voltage.

[0076] The electrode voltage reset signal line Vrefn2 is connected to the first electrode of the light emitting module 470 through the second reset module 480, and the first electrode of the light emitting module 470 is reset through the second reset module 480. Optionally, the second reset module 480 includes a seventh transistor T7, and the control electrode of the seventh transistor T7 can be connected to the third scan signal line Scan3. The light emitting module 470 can be a light emitting diode, the first electrode of the light emitting module 470 can be an anode, and the second electrode can be a cathode.

[0077] The working cycle of the above pixel circuit may include a first reset phase, a data writing phase, a second reset phase and a light emitting phase. The above pixel circuit is introduced below in combination with different phases of the working cycle and the connection relationship of each module.

[0078] In the first reset stage, the first scan signal on the first scan signal line Scan1 controls the first reset module 430 (the second transistor T2) to turn on, so that the reset voltage provided by the gate voltage reset signal line Vrefn1 is transmitted to the gate of the driving module 410 (the first transistor T1) through the first reset module 430 (the second transistor T2), thereby initializing the gate of the driving module 410 (the first transistor T1).

[0079] In the data writing stage, the second scanning signal on the second scanning signal line Scan2 controls the threshold compensation module 440 (the third transistor T3) and the data writing module 450 (the fourth transistor T4) to be turned on, and the data voltage on the data signal line Data is transmitted to the gate of the driving module 410 (the first transistor T1) through the data writing module 450 (the fourth transistor T4), the first and second electrodes of the driving module 410 (the first transistor T1), and the threshold compensation module 440 (the third transistor T3).

[0080] In the second reset stage, the third scan signal on the third scan signal line Scan3 controls the second reset module 480 (seventh transistor T7) to turn on, so that the first initialization voltage Vref2 is transmitted to the first electrode of the light-emitting module 470 through the second initialization transistor (seventh transistor T7), thereby initializing the first electrode of the light-emitting module 470.

[0081] In the light-emitting stage, the light-emitting control signal on the light-emitting control signal line EM controls the light-emitting control module 460 (the fifth transistor T5 and the sixth transistor T6) to turn on, and the driving module 410 (the first transistor T1) generates a driving current according to its gate potential to drive the light-emitting module 470 to emit light.

[0082] Among them, when the display panel 10 is in a folded state, the reset voltage provided by the gate voltage reset signal line Vrefn1 is greater than the reset voltage provided by the electrode voltage reset signal line Vrefn2, and the difference between the reset voltage provided by the electrode voltage reset signal line Vrefn2 and the power supply voltage provided by the second power supply signal line ELVSS is -7V to 0V. In this way, the gate voltage reset signal line Vrefn1 can provide a higher gate voltage to the control end of the driving module 410, relieve the negative bias stress of the fifth transistor T5 and the sixth transistor T6, and avoid leakage. In addition, the electrode voltage reset signal line Vrefn2 can also provide a lower reference voltage than the first reset signal line 110 to the first electrode of the light-emitting module 470, so that the light-emitting module 470 is difficult to reach the start-up voltage, and the charging time of the light-emitting module 470 is extended, so that the second display area 200 can maintain a closed state for a longer time, thereby achieving the purpose of reducing power consumption.

[0083] Illustratively, when the display panel 10 is in a folded state, the reset voltage provided by the gate voltage reset signal line Vrefn1 is -3V to 0V, and the reset voltage provided by the electrode voltage reset signal line Vrefn2 is -10V to -3V. Preferably, the reset voltage provided by the gate voltage reset signal line Vrefn1 may be -1V, and the reset voltage provided by the electrode voltage reset signal line Vrefn2 may be -5V.

[0084] It should be noted that the pixel circuit structure in the first display area 100 may be consistent with the pixel circuit structure in the second display area 200, or may be inconsistent with the pixel circuit structure in the second display area 200. Preferably, the pixel circuit structure in the first display area 100 is consistent with the pixel circuit structure in the second display area 200.

[0085] Based on the same inventive concept, the present application can also provide a method for controlling a display panel, wherein the display panel 10 includes a foldable first display area 100 and a second display area 200. Figure 6 , Figure 6 A flow chart of a method for controlling a display panel is shown below. Figure 6 , each step of the display panel control method is described in detail.

[0086] Step S110: Detect whether the display panel is in a folded state.

[0087] Step S120: when it is detected that the display panel is in the folded state, a first reset signal line is used to provide a first reset voltage for the pixel circuit in the first display area, and a second reset signal line is used to provide a second reset voltage for the pixel circuit in the second display area.

[0088] In this step, the first reset voltage may be different from the second reset voltage. The first reset voltage may enable the first display area 100 to display the image normally in the folded state, and the second reset voltage may enable the second display area 200 to be in a black state in the folded state. The second reset signal line 210 may provide a lower reset voltage for the second display area 200, so that the second display area 200 may maintain a closed state for a longer period of time, thereby reducing the brightness while achieving the purpose of reducing power consumption.

[0089] In this embodiment, the first reset voltage and the second reset voltage are provided to the pixel circuits in the first display area 100 and the second display area 200 respectively through the first reset signal line 110 and the second reset signal line 210. The first display area 100 and the second display area 200 can be differentiated in the folded state of the display panel 10. This ensures the normal display of the first display area while reducing the power consumption of the second display area 200 and improving the battery life of the display panel 10.

[0090] Further, in step S120, when it is detected that the display panel 10 is in the unfolded state, the switch unit 310 is controlled to be turned on, and the first reset signal line 110 and the second reset signal line 210 are used to provide the same reset voltage to the pixel circuits in the first display area 100 and the pixel circuits in the second display area 200. When it is detected that the display panel 10 is in the folded state, the switch unit 310 can be controlled to be turned off, and the first reset signal line 110 is used to provide the first reset voltage to the pixel circuits in the first display area 100, and the second reset signal line 210 is used to provide the second reset voltage to the pixel circuits in the second display area 200.

[0091] When it is detected that the display panel 10 is in the folded state, the second light-emitting control circuit 221 and the second scanning circuit 222 can repeatedly and intermittently provide light-emitting control signals and scanning signals to the pixel circuits in the second display area 200, so that the second display area 200 alternately enters the first power saving state and the second power saving state, wherein the maintenance time of the second power saving state is greater than the maintenance time of the first power saving state, and the second display area 200 displays a black screen in the first power saving state, and turns off the second light-emitting control circuit 221 and the second scanning circuit 222 in the second power saving state to reduce the overall power consumption of the display panel 10.

[0092] In addition, an embodiment of the present application further provides an electronic device, comprising any one of the display panels 10 in the above embodiments. The above display panel 10 has low overall power consumption, which can effectively improve the battery life of the electronic device.

[0093] In summary, the embodiments of the present application provide a display panel, a control method for a display panel, and an electronic device. The above-mentioned display panel includes a first reset signal line connected to a pixel circuit in a first display area, and a second reset signal line connected to a pixel circuit in a second display area. When the display panel is in a folded state, the first reset signal line is configured to provide a first reset voltage to the pixel circuit in the first display area, and the second reset signal line is configured to provide a second reset voltage to the pixel circuit in the second display area, wherein the first reset voltage and the second reset voltage are different, and the second reset voltage causes the second display area to be in a black state when in a folded state. With such a configuration, differentiated reset voltage control can be performed on the first display area and the second display area in the folded state of the display panel, thereby reducing the power consumption of the second display area while ensuring the normal display of the first display area, thereby improving the battery life of the display panel.

[0094] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A display panel, characterized in that: The display panel includes a first display area and a second display area; The display panel further includes a first reset signal line and a second reset signal line; wherein, When the display panel is in a folded state, the first reset signal line is configured to provide a first reset voltage to the pixel circuit corresponding to the first display area, and the second reset signal line is configured to provide a second reset voltage to the pixel circuit corresponding to the second display area, wherein the first reset voltage is different from the second reset voltage, and the second reset voltage causes the second display area to be in a black state when in the folded state.

2. The display panel according to claim 1, characterized in that: The display panel further includes a first control circuit and a second control circuit; The first control circuit is configured to provide a control signal to a pixel circuit corresponding to the first display area; The second control circuit is configured to repeatedly and intermittently provide a control signal to the pixel circuit corresponding to the second display area when the display panel is in a folded state.

3. The display panel according to claim 2, characterized in that: The first control circuit includes a first light-emitting control circuit and a first scanning circuit, and the second control circuit includes a second light-emitting control circuit and a second scanning circuit; When the display panel is in the folded state, the second display area switches alternately between a first power saving state and a second power saving state, wherein the second power saving state is maintained for a longer time than the first power saving state; The first light emitting control circuit and the first scanning circuit are configured to provide a light emitting control signal and a scanning signal to the pixel circuits in the first display area; The second light emitting control circuit and the second scanning circuit are configured to provide a light emitting control signal and a scanning signal to the pixel circuit in the second display area in the first power saving state, and are configured to stop working in the second power saving state.

4. The display panel according to claim 3, characterized in that: The display panel further includes a switch unit, and the first reset signal line and the second reset signal line are connected through the switch unit; When the display panel is in a non-folding state, the switch unit is configured to be in a conducting state, and the reset voltages of the first reset signal line and the second reset signal line are the same; When the display panel is in a folded state, the switch unit is configured to be in an off state, and a reset voltage of the first reset signal line is different from a reset voltage of the second reset signal line; Preferably, when the display panel is in a folded state, a reset voltage of the second reset signal line is smaller than a reset voltage of the first reset signal line.

5. The display panel according to claim 4, characterized in that: The display panel further includes a first clock signal line and a second clock signal line; The first clock signal line is connected to the first light emitting control circuit and the second light emitting control circuit, and is used to provide the same clock signal to the first light emitting control circuit and the second light emitting control circuit; The second clock signal line is connected to the first scanning circuit and the second scanning circuit, and is used to provide the same clock signal to the first scanning circuit and the second scanning circuit.

6. The display panel according to claim 5, characterized in that: The pixel circuit in the second display area includes a first reset module, a data writing module, a storage module, a threshold compensation module, a driving module, a light emitting control module, a light emitting module and a second reset module, and the second reset signal line includes a gate voltage reset signal line and an electrode voltage reset signal line; The storage module is connected between the control terminal of the driving module and the first power signal line; The first reset module and the storage module are connected in series between the gate reset signal line and the first power signal line, wherein the gate voltage reset signal line provides a reset voltage signal for the first reset module, and the control end of the driving module is reset by the first reset module; The threshold compensation module is connected between the control end of the driving module and the first end of the driving module, and the threshold compensation module is used to perform threshold compensation on the driving module; The data writing module is connected to the second end of the driving module, and the driving module, the light emitting control module and the light emitting module are connected in series between a first power signal line and a second power signal line, wherein the second power signal line is connected to a second electrode of the light emitting module; The electrode voltage reset signal line is connected to the first electrode of the light emitting module through the second reset module, and the first electrode of the light emitting module is reset through the second reset module.

7. The display panel according to claim 6, characterized in that: When the display panel is in a folded state, the reset voltage of the gate voltage reset signal line is greater than the reset voltage provided by the electrode voltage reset signal line; Preferably, when the display panel is in a folded state, a difference between a reset voltage provided by the electrode voltage reset signal line and a power supply voltage provided by the second power supply signal line is -7V to 0V.

8. A method for controlling a display panel, characterized in that: The display panel includes a first display area and a second display area, and the method includes: detecting whether the display panel is in a folded state; When it is detected that the display panel is in a folded state, a first reset signal line is used to provide a first reset voltage for the pixel circuit in the first display area, and a second reset signal line is used to provide a second reset voltage for the pixel circuit in the second display area, wherein the first reset voltage and the second reset voltage are different.

9. The control method of the display panel according to claim 8, characterized in that: The first reset signal line and the second reset signal line are connected through a switch unit, and when it is detected that the display panel is in a folded state, the first reset signal line is used to provide a first reset voltage for the pixel circuit in the first display area, and the second reset signal line is used to provide a second reset voltage for the pixel circuit in the second display area, wherein the first reset voltage and the second reset voltage are different, the step comprises: When it is detected that the display panel is in a folded state, the switch unit is controlled to be disconnected, a first reset signal line is used to provide a first reset voltage for the pixel circuit in the first display area, and a second reset signal line is used to provide a second reset voltage for the pixel circuit in the second display area; Preferably, the method further comprises: When it is detected that the display panel is in the unfolded state, the switch unit is controlled to be turned on, and the first reset signal line and the second reset signal line are used to provide the same reset voltage to the pixel circuits in the first display area and the pixel circuits in the second display area respectively.

10. An electronic device, characterized in that: A display panel comprising any one of claims 1 to 7.

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