Coding multilayer film filter array structure, spectral imaging chip and preparation method of spectral imaging chip

Abstract

The invention discloses a coding multilayer film filter array structure, a spectral imaging chip and a preparation method of the spectral imaging chip. The coding multilayer film filtering array structure comprises a plurality of filtering units which are arranged in an array along a working plane, each filtering unit comprises a plurality of dielectric layers and metal layers which are arranged in a stacked mode in the specified direction, and at least one dielectric layer is distributed between every two adjacent metal layers; different filtering units have different codes, and each code is related to the number of the metal layers contained in the corresponding filtering unit and / or the positions of the contained metal layers in the specified direction; the numbers of the dielectric layers contained in different filtering units are the same, and each dielectric layer in each filtering unit and a corresponding dielectric layer in the other filtering units are distributed on the same layer plane; the specified direction is perpendicular to the working plane and the layer plane. The coding multilayer film filtering array structure has the advantages of being flat in structure, easy to process and capable of effectively improving the spatial resolution and the spectral resolution of a spectral imaging chip.

Description

Technical Field

[0001] The present application relates to a spectral imaging chip, and more specifically to a spectral imaging chip with a coded multilayer film filter and a preparation method and application thereof. The chip utilizes a coded multilayer film filter array structure to achieve on-chip integrated spectral imaging, and belongs to the technical field of optoelectronic devices. Background Art

[0002] Spectral imaging technology has the ability to obtain unique information in both spatial and spectral fields, and has a wide range of applications in remote sensing, such as medical diagnosis, biomedical engineering, archaeology, and food inspection. This technology combines spectral technology with imaging technology to simultaneously obtain two-dimensional spatial information and one-dimensional spectral information. Traditional spectral imaging technology generally adopts spatial scanning or wavelength scanning modes, and usually relies on hardware equipment to capture spatial and spectral information at the same time. It is difficult to apply to dynamic scenes, and it is costly, bulky, has a large amount of data, and has a slow acquisition speed. In order to solve the above shortcomings, on-chip integrated spectral imaging technology has received widespread attention in recent years.

[0003] The on-chip integrated spectroscopy technologies that have been reported so far generally have problems such as the difficulty in preparing on-chip dispersion structures and the difficulty in coexistence of high spatial resolution and high spectral resolution. Bandpass filtering technology based on Fabry-Perot cavities is the most common technology for on-chip integrated spectral detection. By adjusting the thickness of the cavity between two parallel reflectors, the central wavelength of the transmission band can be changed, thereby achieving spectral information sampling within a certain wavelength range through a series of filter arrays with different cavity thicknesses. The reflectors usually include metal reflectors or Bragg reflectors. When preparing such devices, each cavity of different thicknesses requires an alignment lithography and deposition / etching process. Since spectral detection usually requires dozens or even hundreds of spectral channels, the preparation difficulty is very high. In order to increase the alignment tolerance, each pixel size is larger. For example, the visible light band products launched by IMEC require each pixel to be 5μm, that is, a spectral sampling unit needs to occupy 25 1μm detector physical pixels, which greatly reduces the resolution of spatial imaging. In addition, in this type of design, long-wavelength sampling corresponds to a thick cavity, and short-wavelength sampling corresponds to a thin cavity. The height of the entire filter array is inconsistent, with the maximum drop reaching the micron level, forming periodic fluctuations on the chip surface. This increases the difficulty of each step of deposition and etching processes, and also causes scattering and diffraction of the incident light, affecting the results of spectral sampling. Summary of the invention

[0004] The main purpose of this application is to provide a coded multilayer film filter array structure, a spectral imaging chip and a preparation method thereof, so as to overcome the deficiencies of the prior art.

[0005] In order to achieve the aforementioned invention objectives, the technical solutions adopted in this application include:

[0006] The first aspect of the present application provides a coded multilayer film filter array structure, which includes a plurality of filter units arranged in an array along a working plane, wherein the filter units include a plurality of dielectric layers and a plurality of metal layers stacked along a specified direction, wherein at least one dielectric layer is distributed between two adjacent metal layers; different filter units have different first codes, and each of the first codes is related to the number of metal layers contained in the corresponding filter unit and / or the position of the metal layers contained in the specified direction; and different filter units contain the same number of dielectric layers, wherein each dielectric layer in each filter unit is distributed on the same layer plane as the corresponding dielectric layer in the remaining filter units; the specified direction is perpendicular to the working plane and the layer plane.

[0007] In one embodiment, the plurality of dielectric layers and the plurality of metal layers in the filter unit cooperate to form a plurality of cascade-coupled Fabry-Pérot cavities.

[0008] In one embodiment, the spectral correlation of the plurality of filtering units is c<0.5, preferably, c<0.3.

[0009] Furthermore, if two of the plurality of filter units are defined to correspond to spectrum A and spectrum B respectively, the calculation formula of C is as follows:

[0010]

[0011] Among them A i , B i are the intensities of spectrum A and spectrum B at the i-th wavelength, represents the average value of spectrum A, It represents the average value of spectrum B, n is the number of wavelengths of spectrum A and spectrum B in the wavelength range under discussion, and i ≥ 1.

[0012] In one embodiment, the thicknesses of the plurality of dielectric layers in the same layer plane are the same.

[0013] Furthermore, the thicknesses of the plurality of dielectric layers in different layer planes are the same or different.

[0014] Furthermore, the thickness of the dielectric layer is 50-500 nm.

[0015] Furthermore, the material of the dielectric layer may include but is not limited to one or more combinations of SiO2, SiN, ZnS, Al2O3 or TiO2.

[0016] In one embodiment, the thicknesses of the metal layers in the plurality of filter units are the same.

[0017] Furthermore, the thickness of the metal layer may be 10-30 nm.

[0018] Furthermore, the material of the metal layer may include but is not limited to one or a combination of gold, silver, aluminum or copper.

[0019] Furthermore, the surface undulation of the coded multilayer film filter array structure is below 90 nm, preferably below 60 nm, and more preferably below 40 nm.

[0020] Furthermore, each of the multiple metal layers on the same plane is spliced ​​together with one or more other metal layers. Preferably, one of the metal layers is spliced ​​together with two or more other metal layers. For example, one of the metal layers may be spliced ​​together with three other metal layers. The "splicing" means that two adjacent metal layers are combined in an edge-to-edge manner.

[0021] Furthermore, the outermost layer of the filter unit is a dielectric layer.

[0022] In one embodiment, the filter unit further includes a substrate, and the dielectric layer and the metal layer are stacked on the substrate.

[0023] The second aspect of the present application provides a spectral imaging chip, including a plurality of supercells arranged in an array, wherein the supercell includes a detector array and a filter array, each filter array is arranged on a corresponding detector array, and cooperates with each other to form a spectral sampling unit, and the filter array includes the encoded multilayer membrane filter array structure.

[0024] The third aspect of the present application provides a method for manufacturing a mask set, wherein the mask set is used to prepare the spectral imaging chip, and the method comprises:

[0025] The coded multilayer film filter array structure is set to include x×y filter units arranged in an array of x rows and y columns along a working plane, and a plurality of metal layers are distributed on z layer planes;

[0026] On each of the z layer planes, x×y coding bits arranged in an array of x rows and y columns are defined, and a plurality of the coding bits are set as valid coding bits, each valid coding bit is used to set a metal layer, and the remaining coding bits are blank coding bits;

[0027] Combining and optimizing the arrangement positions of multiple valid coding bits and blank coding bits on the corresponding layer plane, so that each valid coding bit is spliced ​​with one or more other valid coding bits, thereby obtaining an optimized two-dimensional coding bit matrix corresponding to the layer plane;

[0028] After matrix expansion and transformation of the optimized two-dimensional coding bit matrix, a coding array pattern is obtained, and then a corresponding mask is produced based on the coding array pattern.

[0029] In the present application, x and y are both positive integers ≥2.

[0030] In one embodiment, the manufacturing method specifically includes: optimizing the arrangement positions of the plurality of valid coding bits and blank coding bits on the corresponding layer planes by random arrangement and sub-matrix condition checking, thereby obtaining the optimized two-dimensional coding bit matrix.

[0031] Furthermore, the production method specifically includes:

[0032] For a two-dimensional coding bit array containing x×y coding bits, the valid coding bits and blank coding bits are randomly arranged, and the codes 1 and 0 are assigned to the valid coding bits and the blank coding bits respectively;

[0033] Excluding the code bits located at the outermost circle of the two-dimensional code bit array, and checking the remaining code bit array according to the sub-matrix condition, so as to screen out the optimized two-dimensional code bit matrix;

[0034] The submatrix condition includes: for each valid coding bit in the remaining coding bit array, analyzing the four 2×2 coding bit matrices where the valid coding bit is located, if at least one of the four coding bit matrices has two valid coding bits in non-diagonal positions, it is marked as meeting the filtering condition, otherwise it is marked as not meeting the filtering condition.

[0035] In some more preferred cases, the submatrix condition includes: if the codes on the diagonal of a 2×2 coding bit matrix to which each valid coding bit belongs are [1, 1; 1, 1], it is marked as satisfying the screening condition.

[0036] In one embodiment, the matrix expansion and transformation specifically includes: flipping each optimized two-dimensional coding bit matrix according to its two orthogonal sides, and then rotating 180° around the intersection of the two sides to obtain an extended coding bit matrix containing 4x×4y coding bits, and periodically arranging multiple extended coding bit matrices on the corresponding layer plane to obtain the coding array pattern.

[0037] The fourth aspect of the present application provides a mask set designed by the manufacturing method.

[0038] The fifth aspect of the present application provides a method for preparing the spectral imaging chip, which includes: alternately depositing dielectric materials and metal materials on a substrate to form multiple dielectric layers and multiple metal material layers, and during or after the formation of each metal material layer, using a corresponding mask to perform graphical processing on the metal material layer.

[0039] Exemplarily, the patterning process may be achieved by processes such as metal etching, metal stripping, and metal mask deposition.

[0040] The sixth aspect of the present application provides a use of the spectral imaging chip in spectral imaging.

[0041] Compared with the prior art, this application has at least the following beneficial effects:

[0042] Firstly, the provided coded multilayer film filter array structure has a flattened structural feature, is easy to process, can effectively avoid problems such as surface scattering, and when applied to spectral imaging chips, can effectively improve the spatial resolution and spectral resolution of spectral imaging chips.

[0043] Secondly, the provided coded multilayer film filter array structure can be designed and manufactured in a coding manner, thereby greatly reducing the difficulty of the processing technology, significantly saving costs, and being conducive to the promotion and application of high-resolution spectral imaging chips. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 is a top view of a coding multilayer film filter array structure in a typical implementation scheme of the present application;

[0045] Figure 2 is a cross-sectional view of a coding multilayer film filter array structure in a typical implementation scheme of the present application;

[0046] Figure 3 It is a transmission spectrum diagram of 25 spectral sampling channels of a coded multilayer film filter array structure in a typical implementation scheme of the present application;

[0047] Figure 4 It is a spectral correlation statistical diagram of 25 spectral sampling channels of a coded multilayer film filter array structure in one embodiment of the present application;

[0048] Figure 5 yes Figure 4 Spectral reconstruction of 25 spectral sampling channels;

[0049] Figure 6 It is a schematic diagram of metal layer coding on five layer planes in a coded multilayer film filter array structure in one embodiment of the present application;

[0050] Figure 7This is a schematic diagram of a 5×5 spectrum sampling unit array structure in one embodiment of the present application;

[0051] Figure 8 This is a design layout of a mask set in one embodiment of the present application. DETAILED DESCRIPTION

[0052] In view of these shortcomings of the prior art, the inventors of this case have proposed the technical solution of the present application after long-term research and extensive practice. It mainly relates to a spectral imaging chip based on a coded metal-dielectric multilayer film filter array. The chip utilizes metal-dielectric multilayer films (i.e., the aforementioned coded multilayer film filter array structure) to realize sampling channels with low spectral correlation, thereby improving the spectral sampling efficiency and resolution. One spectral sampling channel corresponds to a pixel on the detector array, thereby achieving high spatial resolution. In addition, the coded multilayer film filter array structure also has the structural characteristics of a flattened structure, is easy to process, and can effectively avoid problems such as surface scattering.

[0053] The technical solution of this application, its implementation process and principle are further explained as follows.

[0054] See also Figure 1 As shown, in a typical embodiment of the present application, a coded multilayer film filter array structure (hereinafter referred to as filter array) includes M×N filter units (hereinafter referred to as units, i.e., filters) arranged in an array in the horizontal direction, where M and N are both positive integers ≥ 2, and may include, for example, 5×5 units. Each filter array corresponds to a pixel of a detector array, i.e., a filter array and a corresponding detector array constitute a spectral sampling unit. The detector array may be arranged directly below the corresponding filter array. M×N spectral sampling units constitute an equivalent imaging pixel.

[0055] Furthermore, the filter array is a metal-dielectric multilayer film architecture, in which L layers of metal and dielectric are stacked at intervals, and all metal layers can have the same thickness. If the dielectric layers in each filter are sorted in order from bottom to top or from top to bottom, the dielectric layers with the same serial number can have the same thickness in different filters, and the dielectric layers with different serial numbers can have different thicknesses. Moreover, the dielectric layers with the same serial number are basically distributed on the same horizontally arranged plane. Generally speaking, the thickness of the metal layer has a relatively small effect on the spectral shape of the filter, but mainly affects its transmittance. Exemplarily, the thickness of the metal layer can be 10-30nm. The thickness of the dielectric layer mainly determines the optical path and will affect the transmission spectrum of the filter. The thickness of different dielectric layers varies, which can increase the design freedom of the filter.

[0056] Multiple filters in the same filter array are different from each other. If a first code is assigned to each filter, the first codes of different filter units are also different. The first code is related to the number of metal layers contained in the corresponding filter unit and / or the position of the metal layers contained in the specified direction, that is, the structure of the dielectric / metal layer of each filter can be understood as the corresponding first code.

[0057] For example, each filter includes L dielectric layers, but the number of metal layers K is 1 to L-1 layers, and the difference between different filters lies in the number of metal layers and their positions. Specifically, in the initial design architecture of each filter, there are L metal layers, that is, L positions, but the actual number of metal layers in each filter is not L, and different filters can lack corresponding metal layers at different positions (mainly the position in the thickness direction of the filter array). There should be at least 1 metal layer in each filter to form interference, and there can be at most (L-1) metal layers. In a filter containing multiple metal layers, multiple dielectric layers and multiple metal layers cooperate to form multiple Fabry-Perot optical cavities with cascade coupling. If all L metal layers exist, one more filter is bound to be required, but this filter structure is the thickest, which will significantly increase the height difference between the filters, so it is generally not selected. Therefore, the number of metal layers K of each filter is limited to between 1 and L-1, and K is generally preferred to be between 1-4. A larger K will result in lower transmittance.

[0058] For example, Figure 2 The following is a schematic diagram of the layer structure of an optimized 5×5 filter array. The layer structure of the filter in the filter array is mainly formed by stacking five layers of metal and five layers of dielectric (L=5). Theoretically, there are 32 designs (C(5,0)+C(5,1)+C(5,2)+C(5,3)+C(5,4)+C(5,5)=32). If L=5 and K=1-4, the possible combinations are C(5,1)+C(5,2)+C(5,3)+C(5,4)=30. If L=6 and K=1-5, the possible combinations are C(6,1)+C(6,2)+C(6,3)+C(6,4)+C(6,4)=62. This is the total number of optional filter designs. In practice, you don't have to select all of them.

[0059] Please continue reading Figure 2, taking the case of L = 5 and K = 1 - 5 as an example, according to the preset selection principle, only a part can be taken. For example, 25 designs. Among these 25 different designs, all include five dielectric layers, but the number and positions of the metal layers are different. Only 5 photolithography steps are required to achieve 32 different spectral sampling channels. While using the conventional manufacturing method of FP cavity, 32 photolithography steps are needed to achieve 32 different thicknesses. In contrast, the method of the present application significantly reduces the process difficulty. In actual work, a part of the structures (which can be 10, 15, 18...) can be preferably selected. For example, 25 with relatively low spectral correlation are selected as the filter array units.

[0060] In Figure 2 the filter array shown, the number of dielectric layers of each filter and their positions in the vertical direction are the same. The difference is whether there is a metal layer between every two adjacent dielectric layers. If there is a metal layer, its code is set to 1, otherwise, its code is set to 0. Thus, if the filters in the filter array shown in Figure 2 are sorted from left to right, and the metal layer codes in the first filter are set in the order from top to bottom, the first code of the first filter obtained can be expressed as (0, 0, 0, 1, 1). By analogy, the first code of the second filter can be expressed as (0, 0, 1, 0, 1).

[0061] In this typical embodiment, the material of the metal layer can be selected from gold, silver, aluminum, copper, etc., or their alloys or single-metal laminated structures, and the material of the dielectric layer can be SiO2, SiN, ZnS, Al2O3, TiO2, etc., or their composite structures.

[0062] Further, in Figure 2 the filter array shown, the bottom layer can be a substrate such as quartz glass for integration with the detector array patch, or it can be the detector array, that is, the filter array is directly integrated on the surface of the detector array.

[0063] In the present application, the definition of spectral correlation is as follows: Spectral correlation is usually used to measure the similarity between two spectra. The higher the spectral correlation, the more similar the two spectra are. The calculation formula of spectral correlation is as described above. Generally speaking, c < 0.3 is weakly correlated, 0.3 < c < 0.5 is lowly correlated, 0.5 < c < 0.8 is significantly correlated, and 0.8 < c < 1 is highly correlated. From the perspective of spectral reconstruction, the lower the correlation between spectral sampling channels (filters), the more effective the sampling is, the more information is included, and the more accurate the spectral detection is. In this typical embodiment, c is preferably < 0.5, and more preferably < 0.3.

[0064] The technical solution of the present application is described below with a more specific implementation case. In this embodiment, the material of the metal layer is Ag, the material of the dielectric layer is SiO2, and the substrate is quartz glass. The thicknesses of the five dielectric layers from bottom to top are about 230nm, 80nmm, 300nm, 270nm, and 80nmm, respectively, and the thickness of each metal layer is about 20nmm.

[0065] In this embodiment, 25 spectral sampling channels with low average spectral correlation are selected by encoding the metal layer, and the transmission spectra thereof are as follows: Figure 3 As shown in Figure 2, it can be seen that these spectral sampling channels have obvious distinction between each other. The correlation coefficients between these 25 spectral sampling channels are shown in Figure 2. Figure 4 As shown in Figure 1, the average correlation is 0.28, which is in the low correlation category, and the spectral sampling efficiency is high. Based on the sampling of these 25 spectral sampling channels, the spectral reconstruction results obtained using the compressed sensing algorithm are shown in Figure 1. Figure 5 Compared with the original spectrum results, the peak deviation of the reconstructed spectrum is less than 1nm. In addition, the maximum height difference of these 25 filters is only 40am, which is less than 4% of the 1-2μm pixel size of conventional image sensors, and is process-friendly for thin film deposition, stripping and etching processes.

[0066] In this embodiment, the metal layers of the 25 filters are position-encoded in a two-dimensional plane, and the optimal metal layer arrangement on each plane is optimized by combination to further reduce the process difficulty. If the multiple filters in the filter array are defined to be arranged in an array along the working plane, there are five first-layer planes and five second-layer planes in the filter array, and the five first-layer planes are used to set the metal layers at different heights, and the five second-layer planes are used to set the dielectric layers at different heights. And each metal layer is defined as a small metal block of size 1×1, then the arrangement principle of the metal layer on each first-layer plane in this embodiment is to merge the small metal blocks as much as possible to form a large metal block, thereby improving the integrity of the metal layer structure and improving the tolerance of the patterning, deposition, stripping and etching processes. The 25 positions (i.e., the aforementioned coding bits) arranged in the array on each first-layer plane can be coded with 0 and 1, 0 represents the absence of a metal layer and corresponds to the aforementioned blank coding bit, and 1 represents the presence of a metal layer and corresponds to the aforementioned valid coding bit. These codes can be defined as the second code. The effective coding bits on the five first-layer planes are basically gathered together, that is, the metal layers on each first-layer plane are basically gathered together, and multiple optimized two-dimensional coding bit matrices can be obtained, such as Figure 6 As shown, they can be named as matrix 1, matrix 2, matrix 3, matrix 4, and matrix 5. Then, corresponding multiple masks can be made based on these optimized two-dimensional coding bit matrices.

[0067] Combining the five first-layer planes with metal layers and the five second-layer planes with fixed-thickness dielectric layers, we can get Figure 7 The 5×5 spectral sampling unit array shown is a filter array.

[0068] The combination optimization scheme adopted in this embodiment may include: screening the qualified permutations and combinations through randomization and sub-matrix condition checking. Among them, the sub-matrix condition is a condition for determining whether the random permutation meets the requirements. The basic principle of the sub-matrix condition in this embodiment is to avoid the combination design with isolated metal layers, that is, at least two metal layers are spliced ​​side by side to reduce the processing difficulty.

[0069] Furthermore, for each 5×5 coding bit array on the first plane, only the middle 3×3 coding bit array (referred to as the middle array) can be selected for evaluation. Because when the 5×5 coding bit array is subsequently converted into a mask suitable for actual production, the outermost circle of coding bits generally needs to be mirrored, that is, no matter which of the coding bits in the outermost circle of the 5×5 coding bit array is a valid coding bit, its mirror position must also be a valid coding bit, and the two mirrored valid coding bits must be side by side. For the aforementioned middle array, first find each valid coding bit in it. There are four 2×2 matrix units containing this valid coding bit. If at least one of the four matrix units has two 1s in non-diagonal positions, it meets the screening conditions and can be retained. Otherwise, it does not meet the screening conditions. For example, when the diagonal is [0, 1; 1, 0] or [1, 0; 0, 1], that is, two 1s on the diagonal, an isolated metal layer appears, and it is marked as not meeting the screening conditions. When all valid coding bits satisfy the above conditions, this combinatorial design is available, that is, an optimized two-dimensional coding bit matrix is ​​obtained.

[0070] As one of the preferred implementations, the sub-matrix condition can be further improved, or more process-friendly. For example, it can be stipulated that all valid coding bits must belong to a 2×2 matrix unit composed entirely of valid coding bits, that is, at least 4 metal layers are stitched together.

[0071] After completing the above-mentioned combination optimization work, the corresponding multiple masks, that is, the mask set, can be further produced based on the obtained multiple optimized two-dimensional coding bit matrices. There are many ways to convert the aforementioned coding array pattern into the corresponding mask, such as printing, photolithography, etc. Exemplarily, if the mask is made based on the photolithography process, the pattern can be defined by first exposing and developing the photoresist based on the coding array pattern, and then performing metal deposition, etching / stripping and other processes to convert it into a patterned mask. In some cases, the mask can be quartz glass with a metal pattern.

[0072] Considering that the spectral imaging chip usually includes multiple supercells arranged in an array, each supercell includes a detector array and a corresponding filter array. In order to simplify the manufacturing process of the spectral imaging chip, it is usually necessary to complete the manufacturing of multiple filter arrays at one time. In this case, on the basis of obtaining each of the aforementioned optimized two-dimensional coding bit matrices, operations such as matrix expansion and transformation can be performed on it, and then the corresponding mask suitable for actual production can be obtained by conversion.

[0073] Specifically, the filter array of this embodiment can be tiled in the pixel plane of the image sensor to form a spectral imaging chip. In order to further improve process friendliness, the tiled expansion can adopt the symmetry principle, that is, Figure 8 The five optimized two-dimensional coding bit matrices are flipped according to their two orthogonal sides, and then rotated 180° around the intersection of the two sides to obtain a combined array structure with twice the side length. This combined array structure is then arranged periodically to form the final coding array pattern, which can then be transformed into Figure 8 The five mask plates shown are Mask 1, Mask 2, Mask 3, Mask 4, and Mask 5. Each mask plate may have a plurality of mask bit matrices arranged in an array, and each mask bit matrix may include 5×5 mask bits arranged in an array, and these mask bits include effective mask bits and blank mask bits, and each effective mask bit is set corresponding to an effective coding bit. By adopting the aforementioned scheme, the effective mask bits corresponding to the metal layer in the mask plate obtained in this embodiment are more concentrated, which is conducive to processing.

[0074] Furthermore, these masks can be used to quickly and efficiently prepare spectral imaging chips.

[0075] For example, in this embodiment, multiple dielectric layers and multiple metal material layers are formed by alternately depositing dielectric materials and metal materials on a substrate, and during or after the formation of each metal material layer, the corresponding mask and conventional processes such as metal etching, metal stripping, and metal mask deposition can be used to achieve graphical processing of the metal material layer.

[0076] Exemplarily, if a metal mask deposition process is used, mask one can be first covered on a quartz glass substrate to deposit metal materials, wherein the effective mask position is a through-hole structure, so that the metal material at the corresponding position is directly bonded to the substrate, and then the first continuous dielectric layer is deposited, and then mask two is covered on the first continuous dielectric layer, and the metal material is continued to be deposited, and then the second continuous dielectric layer is deposited, and so on, until the deposition of the metal material is completed using mask five, and finally the fifth continuous dielectric layer is deposited, thereby completing the production of a coded multilayer film filter array structure in a spectral imaging chip.

[0077] By adopting the aforementioned coding design method, this embodiment can greatly reduce the difficulty of the processing technology of the filter array in the on-chip integrated spectral imaging chip, and can achieve a one-to-one correspondence between a single filter channel and a single pixel of the image sensor, thereby improving the spatial resolution. In addition, the spectral correlation of the coding filter array is low, which effectively improves the spectral resolution.

[0078] It should be understood that the above embodiments are only for illustrating the technical concept and features of the present application, and their purpose is to enable people familiar with the technology to understand the content of the present application and implement it accordingly, and they cannot be used to limit the protection scope of the present application. Any equivalent changes or modifications made according to the spirit of the present application should be included in the protection scope of the present application.

Claims

1. A coded multilayer film filter array structure, characterized in that: It comprises a plurality of filter units arranged in an array along a working plane, wherein the filter units comprise a plurality of dielectric layers and a plurality of metal layers stacked along a specified direction, wherein at least one dielectric layer is distributed between two adjacent metal layers; different filter units have different first codes, each of the first codes is related to the number of metal layers contained in the corresponding filter unit and / or the position of the metal layers contained in the specified direction; and different filter units have the same number of dielectric layers, wherein each dielectric layer in each filter unit is distributed on the same layer plane as a corresponding dielectric layer in the remaining filter units; and the specified direction is perpendicular to the working plane and the layer plane.

2. The coded multilayer film filter array structure according to claim 1, characterized in that: The plurality of dielectric layers and the plurality of metal layers in the filter unit cooperate to form a plurality of cascade-coupled Fabry-Perot optical cavities; and / or, the spectral correlation of the plurality of filter units c<0.5, preferably, c<0.3; if two of the filter units are defined to correspond to spectrum A and spectrum B respectively, the calculation formula of c is as follows: Among them A i , B i are the intensities of spectrum A and spectrum B at the i-th wavelength, represents the average value of spectrum A, represents the average value of spectrum B, n is the number of wavelengths of spectrum A and spectrum B in the wavelength range under discussion, i ≥ 1.

3. The coded multilayer film filter array structure according to claim 1, characterized in that: The thickness of the plurality of dielectric layers in the same layer plane is the same; and / or the thickness of the metal layers in the plurality of filter units is the same; and / or the thickness of the plurality of dielectric layers in different layer planes is the same or different; and / or the thickness of the dielectric layer is 50-500nm; and / or the thickness of the metal layer is 10-30nm; and / or the material of the metal layer includes gold, silver, aluminum or copper; and / or the material of the dielectric layer includes SiO2, SiN, ZnS, Al2O3 or TiO2; And / or, the surface undulation of the coded multilayer film filter array structure is below 90nm; and / or, each of the multiple metal layers on the same plane is spliced ​​together with one or more other metal layers; and / or, the outermost layer of the filter unit is a dielectric layer; and / or, the filter unit also includes a substrate, and the dielectric layer and the metal layer are stacked on the substrate.

4. A spectral imaging chip, comprising a plurality of supercells arranged in an array, wherein the supercell comprises a detector array and a filter array, each filter array is arranged on a corresponding detector array, and cooperates with each other to form a spectral sampling unit, characterized in that: The filter array comprises the coded multilayer film filter array structure described in any one of claims 1-3.

5. A method for manufacturing a mask set, characterized in that: The mask set is used to prepare the spectral imaging chip according to claim 4, and the method comprises: The coded multilayer film filter array structure is assumed to include x×y filter units arranged in an array of x rows and y columns along a working plane, and a plurality of metal layers therein are distributed on z layer planes, where x and y are both positive integers ≥ 2; On each of the z layer planes, x×y coding bits arranged in an array of x rows and y columns are defined, and a plurality of the coding bits are set as valid coding bits, each valid coding bit is used to set a metal layer, and the remaining coding bits are blank coding bits; Combining and optimizing the arrangement positions of multiple valid coding bits and blank coding bits on the corresponding layer plane, so that each valid coding bit is spliced ​​with one or more other valid coding bits, thereby obtaining an optimized two-dimensional coding bit matrix corresponding to the layer plane; After matrix expansion and transformation of the optimized two-dimensional coding bit matrix, a coding array pattern is obtained, and then a corresponding mask is produced based on the coding array pattern.

6. The method according to claim 5, characterized in that: Specifically include: The arrangement positions of the plurality of valid coding bits and blank coding bits on the corresponding layer planes are combined and optimized through random arrangement and sub-matrix condition checking, so as to obtain the optimized two-dimensional coding bit matrix.

7. The manufacturing method according to claim 6, characterized in that: Specifically include: For a two-dimensional coding bit array containing x×y coding bits, the valid coding bits and blank coding bits are randomly arranged, and the codes 1 and 0 are assigned to the valid coding bits and the blank coding bits respectively; Excluding the code bits located at the outermost circle of the two-dimensional code bit array, and checking the remaining code bit array according to the sub-matrix condition, so as to screen out the optimized two-dimensional code bit matrix; The submatrix condition includes: for each valid coding bit in the remaining coding bit array, analyzing the four 2×2 coding bit matrices where the valid coding bit is located, if at least one of the four coding bit matrices has two valid coding bits in non-diagonal positions, it is marked as meeting the filtering condition, otherwise it is marked as not meeting the filtering condition.

8. The manufacturing method according to claim 5, characterized in that: The matrix expansion and transformation specifically includes: flipping each optimized two-dimensional coding bit matrix according to its two orthogonal sides respectively, and then rotating 180° around the intersection of the two sides to obtain an extended coding bit matrix containing 4x×4y coding bits, and periodically arranging multiple extended coding bit matrices on the corresponding layer plane to obtain the coding array pattern.

9. A mask set designed by the method according to any one of claims 5 to 8.

10. The method for preparing a spectral imaging chip according to claim 4, characterized in that: include: Dielectric materials and metal materials are alternately deposited on the substrate to form multiple dielectric layers and multiple metal material layers, and during or after the formation of each metal material layer, a corresponding mask is used to implement a graphic treatment of the metal material layer.

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