Light-emitting diode and light-emitting diode preparation method

Abstract

The invention provides a light emitting diode and a light emitting diode preparation method. The method comprises the following steps: manufacturing a groove in the bottom surface of a substrate; bonding the surface of the substrate with the epitaxial structure through a bonding layer; and the substrate is thinned, and the groove is removed. Before the substrate and the epitaxial structure are bonded through the bonding layer, the groove is formed in the bottom face of the substrate, the groove can disperse or reduce stress concentration in the bonding process, the effect of releasing stress is achieved, the bending problem after bonding is effectively solved, and therefore the yield of the light-emitting diode is improved; after the bonding is completed, the groove is removed by thinning the substrate, and the subsequent process and the chip are not influenced.

Description

Technical Field

[0001] The present disclosure relates to the field of light-emitting devices, and in particular to a light-emitting diode and a method for preparing the light-emitting diode. Background Art

[0002] Light Emitting Diode (LED), with its efficient electro-optical conversion capability, has become the cornerstone of modern lighting and display technology. It has shown great potential and advantages in energy saving, environmental protection and innovative applications. With the continuous advancement of technology, LED is expected to play a more critical role in the optoelectronic field in the future.

[0003] The related art provides a micro light emitting diode, including: a substrate, a bonding layer and an epitaxial structure. During the manufacturing process, the substrate needs to be bonded to the epitaxial structure through the bonding layer.

[0004] Due to the difference in expansion coefficients between the substrate and the epitaxial structure, stress will be generated during the bonding process. Excessive stress will cause the chip to bend and the substrate to crack. In the subsequent laser stripping process, when the laser acts on the epitaxial structure, some areas will be defocused, resulting in poor stripping effects, increasing the difficulty of chip operations, and having a significant impact on chip yield and finished product rate. Summary of the invention

[0005] The embodiments of the present disclosure provide a light emitting diode and a method for preparing the light emitting diode, which are conducive to relieving stress, improving the bending of the light emitting diode after bonding, and improving the yield of the light emitting diode. The technical solution is as follows:

[0006] In one aspect, a method for preparing a light emitting diode is provided, the method comprising:

[0007] forming a groove on a bottom surface of the substrate;

[0008] Bonding the surface of the substrate and the epitaxial structure via a bonding layer;

[0009] The substrate is thinned to remove the groove.

[0010] Optionally, the depth of the groove is less than the thickness difference of the substrate before and after thinning.

[0011] Optionally, the projection of the groove on the surface of the substrate is a centrally symmetrical figure.

[0012] Optionally, the groove comprises a plurality of concentrically arranged annular grooves.

[0013] Optionally, the spacing between adjacent annular grooves in the plurality of concentrically arranged annular grooves is larger than the size of a tool for sucking the substrate, or the diameter of the innermost annular groove is larger than the size of the tool for sucking the substrate.

[0014] Optionally, the step of making a groove on the bottom surface of the substrate includes:

[0015] Making grooves on the bottom surface of the substrate by laser;

[0016] soaking the substrate in a BOE solution;

[0017] The substrate was rinsed with water and shaken dry.

[0018] Optionally, bonding the surface of the substrate and the epitaxial structure through a bonding layer includes:

[0019] forming a first bonding layer on the surface of the substrate;

[0020] forming a second bonding layer on the epitaxial structure;

[0021] The first bonding layer and the second bonding layer are bonded together to form the bonding layer.

[0022] Optionally, bonding the first bonding layer and the second bonding layer together comprises:

[0023] The first bonding layer and the second bonding layer are bonded together at a temperature of 220-320° C.

[0024] Optionally, the first bonding layer is an Au layer and the second bonding layer is a bonding layer made of one or more materials selected from Au, Sn, Ni and In layers.

[0025] On the other hand, a light emitting diode is provided. The light emitting diode is manufactured by the method described in any one of the preceding items.

[0026] The technical solution provided by the embodiments of the present disclosure has the following beneficial effects:

[0027] In the embodiment of the present disclosure, before bonding the substrate and the epitaxial structure through a bonding layer, a groove is made on the bottom surface of the substrate. The groove can disperse or reduce stress concentration during the bonding process, play a role in releasing stress, and effectively improve the bending problem after bonding, thereby improving the yield of the light-emitting diode; after the bonding is completed, the groove is removed by thinning the substrate, which will not affect the subsequent processes and chips. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0029] Figure 1 is a flow chart of a method for preparing a light emitting diode provided by an embodiment of the present disclosure;

[0030] Figure 2 is a flow chart of a method for preparing a light emitting diode provided by an embodiment of the present disclosure;

[0031] Figure 3 is a schematic diagram of a top view structure of a substrate provided by an embodiment of the present disclosure;

[0032] Figure 4 It is a schematic diagram comparing bonding of a related technology provided by an embodiment of the present disclosure and an epitaxial structure of an embodiment of the present disclosure;

[0033] Figure 5 It is a structural schematic diagram of a light emitting diode provided in an embodiment of the present disclosure.

[0034] The reference numerals are as follows:

[0035] 100: substrate; 101: first semiconductor layer; 102: active layer; 103: second semiconductor layer; 104: current spreading layer; 105: first electrode; 106: second electrode;

[0036] 200: bonding layer; 201: first bonding layer; 202: second bonding layer;

[0037] 300: epitaxial structure; 400: electrode structure;

[0038] 1000: groove; 2000: tool; 3000: temporary substrate. DETAILED DESCRIPTION

[0039] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0040] Figure 1 is a flow chart of a method for preparing a light emitting diode provided by an embodiment of the present disclosure. Figure 1 The method steps include:

[0041] S11, making a groove on the bottom surface of the substrate.

[0042] Exemplarily, the substrate is a Si substrate.

[0043] The light-emitting diode provided in the embodiment of the present disclosure is a light-emitting diode with a vertical structure, and the Si substrate can be used as a light-emitting diode with a vertical structure.

[0044] S12, bonding the surface of the substrate and the epitaxial structure via a bonding layer.

[0045] Exemplarily, the bonding layer may be a bonding layer made of one or more materials selected from Au, Sn, Ni and In layers.

[0046] Illustratively, the epitaxial structure may include a first semiconductor layer, an active layer, and a second semiconductor layer that are sequentially stacked.

[0047] The first semiconductor layer may be an N-type GaN layer. The first semiconductor layer may be a P-type GaN layer. The active layer may be a multi-quantum well layer, such as an InGaN / GaN multi-quantum well structure.

[0048] In the disclosed embodiment, the growth of the semiconductor layer can be achieved by using VeecoK465i or C4 or RB metal organic chemical vapor deposition (MOCVD) equipment or AIXTRON metal organic chemical vapor deposition equipment. High purity H2 (hydrogen) or high purity N2 (nitrogen) or a mixture of high purity H2 and high purity N2 is used as a carrier gas, high purity NH3 is used as an N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) are used as gallium sources, silane (SiH4) is used as an N-type dopant, and bis(cyclopentadienyl) magnesium (CP2Mg) is used as a P-type dopant.

[0049] That is, the epitaxial structure is a GaN-based epitaxial structure.

[0050] Of course, in other embodiments, the epitaxial structure may also be other epitaxial structures, and the embodiments of the present disclosure are not limited to this.

[0051] S13, thinning the substrate to remove the groove.

[0052] In the embodiment of the present disclosure, before bonding the substrate and the epitaxial structure through a bonding layer, a groove is made on the bottom surface of the substrate. The groove can disperse or reduce stress concentration during the bonding process, play a role in releasing stress, and effectively improve the bending problem after bonding, thereby improving the yield of the light-emitting diode; after the bonding is completed, the groove is removed by thinning the substrate, which will not affect the subsequent processes and chips.

[0053] Figure 2 is a flow chart of a method for preparing a light emitting diode provided by an embodiment of the present disclosure. Figure 2 The method steps include:

[0054] S21. Fabricating an epitaxial structure on a temporary substrate.

[0055] In the embodiment of the present disclosure, the temporary substrate may be a sapphire substrate.

[0056] In the embodiment of the present disclosure, the epitaxial structure may include a first semiconductor layer, an active layer, and a second semiconductor layer stacked in sequence.

[0057] In one example, step S21 includes:

[0058] In the first step, a first semiconductor layer is formed on a temporary substrate.

[0059] In a possible implementation of the present disclosure, the first semiconductor layer is an N-type semiconductor layer.

[0060] Exemplarily, the first semiconductor layer may be an N-type GaN layer.

[0061] In another possible implementation manner, the first semiconductor layer is a P-type semiconductor layer.

[0062] Exemplarily, the first semiconductor layer may be a P-type GaN layer.

[0063] The second step is to make the active layer.

[0064] In the embodiment of the present disclosure, the active layer may be a multi-quantum well layer, such as an InGaN / GaN multi-quantum well structure.

[0065] The third step is to make the second semiconductor layer.

[0066] In a possible implementation of the present disclosure, the second semiconductor layer is a P-type semiconductor layer.

[0067] Exemplarily, the second semiconductor layer may be a P-type GaN layer.

[0068] In another possible implementation, the second semiconductor layer is an N-type semiconductor layer.

[0069] Exemplarily, the second semiconductor layer may be an N-type GaN layer.

[0070] In the disclosed embodiment, the growth of the semiconductor layer can be achieved by using VeecoK465i or C4 or RB metal organic chemical vapor deposition (MOCVD) equipment or AIXTRON metal organic chemical vapor deposition equipment. High purity H2 (hydrogen) or high purity N2 (nitrogen) or a mixture of high purity H2 and high purity N2 is used as a carrier gas, high purity NH3 is used as an N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) are used as gallium sources, silane (SiH4) is used as an N-type dopant, and bis(cyclopentadienyl) magnesium (CP2Mg) is used as a P-type dopant.

[0071] S22, making a groove on the bottom surface of the substrate.

[0072] In the embodiment of the present disclosure, the substrate is a Si substrate.

[0073] The light-emitting diode provided in the embodiment of the present disclosure is a light-emitting diode with a vertical structure, and the Si substrate can be used as a light-emitting diode with a vertical structure.

[0074] In one example, step S22 includes:

[0075] In the first step, grooves are made on the bottom surface of the substrate by laser.

[0076] In another example, the grooves may be formed on the bottom surface of the substrate by a cutting machine.

[0077] In the disclosed embodiment, the depth of the groove is less than the thickness difference of the substrate before and after thinning.

[0078] In this implementation, the groove depth can be removed when the substrate is subsequently thinned, which will not affect the subsequent process and the chip itself, thereby improving the yield of the light-emitting diode.

[0079] In the embodiment of the present disclosure, the projection of the groove on the surface of the substrate is a centrally symmetrical figure.

[0080] In this implementation, the central symmetric pattern can evenly diffuse the stress on the substrate, effectively improving the bending problem after bonding caused by stress generated by different thermal expansion coefficients of materials.

[0081] In one example, the groove may include a plurality of concentrically disposed annular grooves.

[0082] In this implementation, a plurality of concentrically arranged annular grooves can make the stress on the substrate diffuse more evenly.

[0083] In another example, the groove may also include a plurality of rectangular grooves of the same size and arranged evenly.

[0084] In other embodiments, the projection of the groove on the surface of the substrate may also be an axisymmetric pattern, an irregular pattern, etc.

[0085] Figure 3 is a schematic diagram of a top view of a substrate provided by an embodiment of the present disclosure. Figure 3 The groove 1000 includes a plurality of concentrically arranged annular grooves, the spacing between adjacent grooves in the plurality of concentrically arranged annular grooves is greater than the size of the tool 2000 for sucking the substrate 100, or the diameter of the innermost annular groove is greater than the size of the tool 2000 for sucking the substrate 100. The tool for sucking the substrate can be used to quickly and accurately pick up and place small parts or components, improve the efficiency, accuracy and safety of automated and manual operations, and reduce component damage and contamination.

[0086] In the above implementation, by setting the spacing between adjacent grooves to be larger than the size of the tool for sucking the substrate, the multiple concentrically arranged annular grooves on the bottom surface of the substrate will not affect the gripping operation of the tool for sucking the substrate, thereby ensuring that the manufacturing process is not affected.

[0087] In the second step, the substrate is immersed in a buffered oxide etchant (BOE) solution.

[0088] Exemplarily, the substrate with grooves cut on the back side is immersed in a buffered oxide etching solution for 4 to 6 minutes.

[0089] In this implementation, the substrate is immersed in a BOE solution, which is beneficial for the subsequent evaporation of a metal bonding layer on the surface of the substrate.

[0090] Exemplarily, the substrate with grooves scratched on the back side is immersed in a buffered oxide etching solution for 5 minutes.

[0091] In the third step, the substrate is rinsed with water and dried.

[0092] In this implementation, the substrate is rinsed with water and then dried to remove the residual BOE solution to prevent contamination and affect subsequent process steps.

[0093] S23, forming a first bonding layer on the surface of the substrate.

[0094] A first bonding layer is evaporated on the surface of the substrate.

[0095] In the embodiment of the present disclosure, the first bonding layer may be a bonding layer formed of one or more materials selected from Au, Sn, Ni and In layers.

[0096] In the embodiments of the present disclosure, the bonding layer composed of one or more materials among the Au, Sn, Ni and In layers has good stability, and can improve the strength and stability of the bonding.

[0097] Exemplarily, the first bonding layer is Ni.

[0098] S24, forming a second bonding layer on the epitaxial structure.

[0099] A second bonding layer is evaporated on the surface of the epitaxial structure.

[0100] In the embodiment of the present disclosure, the second bonding layer may be a bonding layer formed of one or more materials selected from Au, Sn, Ni and In layers.

[0101] In the embodiments of the present disclosure, the bonding layer composed of one or more materials among the Au, Sn, Ni and In layers has good stability, and can improve the strength and stability of the bonding.

[0102] Exemplarily, the second bonding layer is Sn.

[0103] S25. The first bonding layer and the second bonding layer are bonded together to form a bonding layer, so that the surface of the substrate and the epitaxial structure are bonded.

[0104] In the disclosed embodiment, the substrate and the epitaxial structure are bonded by a key and a machine.

[0105] In the disclosed embodiment, the bonding temperature should be controlled to be as low as possible under the condition that the bonding metal can be melted, so as to reduce the post-bonding bending caused by the stress generated by the different thermal expansion coefficients of different materials.

[0106] For example, the first bonding layer and the second bonding layer are bonded together at a temperature of 220 to 320°C.

[0107] Exemplarily, the first bonding layer and the second bonding layer are bonded together at a temperature of 300°C.

[0108] In this implementation, the bonding temperature should be controlled to be as low as possible under the condition that the bonding metal can be melted, so as to reduce the post-bonding bending caused by the stress generated by the different thermal expansion coefficients of different materials.

[0109] S26, thinning the substrate and removing the grooves.

[0110] In the embodiment of the present disclosure, the thinned thickness is greater than the depth of the groove during thinning, thereby removing the groove.

[0111] S27, peeling off the temporary substrate.

[0112] In the disclosed embodiment, the sapphire substrate is peeled off by using the laser lift-off principle.

[0113] S28, manufacturing a current spreading layer, wherein the current spreading layer covers the second semiconductor layer.

[0114] In the disclosed embodiment, the current spreading layer is evaporated on the entire surface by metal evaporation equipment.

[0115] In the disclosed embodiment, the current spreading layer may be an indium tin oxide (ITO) layer. ITO has good transparency and conductivity and can conduct current to form an electrical connection while allowing light to pass through.

[0116] S29, making a first electrode on the current spreading layer.

[0117] In the disclosed embodiment, the first electrode is manufactured on the current spreading layer by metal evaporation.

[0118] In a possible implementation of the present disclosure, the first electrode may be an Al electrode.

[0119] In another possible implementation of the present disclosure, the first electrode may also be an AlCu electrode. AlCu has good stability and is not easily deformed.

[0120] S30, manufacturing a second electrode on a side of the substrate away from the epitaxial structure.

[0121] In the embodiment of the present disclosure, the second electrode may be a TiAu electrode or an Au / AuGeNi / Au / Pt / Au electrode.

[0122] In the embodiment of the present disclosure, the second electrode is evaporated by metal evaporation equipment.

[0123] In the disclosed embodiment, the reason why the wafer bends after bonding is mainly because a higher temperature is required to melt the bonding metal during the bonding process, and the thermal expansion coefficients of the bonding substrate, the epitaxial structure and the sapphire Al2O3 substrate are quite different, which are 2.6ppm / ℃, 5.6ppm / ℃ and 7.6ppm / ℃ respectively. When the Si wafer is used as the bonding substrate, since the thermal expansion coefficient of the Si wafer is much smaller than that of the epitaxial structure, the shrinkage of the Si wafer is smaller than that of the epitaxial structure, and the Si wafer will generate a thermal tensile stress on the epitaxial structure. When this thermal tensile stress acts on the epitaxial structure, the edge of the epitaxial structure layer will bend away from the Si substrate, and the GaN layer in the epitaxial structure is originally bent in the direction of the GaN protrusion. Therefore, the two substrates have the same bending direction for GaN, resulting in the aggravation of the bending of the wafer after bonding. Scratching a shallow groove on the back of the silicon wafer can release stress, thereby improving the bending of the wafer after bonding, and since the depth of the groove is relatively shallow, the shallow groove can be removed by thinning and grinding later, which will not affect the subsequent process and the chip itself.

[0124] Figure 4 Schematic diagram of bonding comparison between a related technology provided by the embodiment of the present disclosure and the epitaxial structure of the embodiment of the present disclosure. Figure 4 In the related art, there is no groove on the back of the substrate 100 during the bonding process of the epitaxial structure 300, the stress on the substrate 100 cannot be evenly diffused, and the curvature of the epitaxial structure 300 is significantly larger. In the embodiment of the present disclosure, the substrate 100 has grooves 1000 with a symmetrical pattern. The central symmetrical pattern can make the stress on the substrate 100 evenly diffuse, effectively improving the bending problem after bonding caused by stress generated by different thermal expansion coefficients of materials, and the curvature of the epitaxial structure 300 is significantly reduced. As shown in the figure, the groove 1000 can be in the form of multiple concentrically arranged annular grooves on the left side, and multiple concentrically arranged annular grooves can make the stress on the substrate 100 diffuse more evenly; the groove 1000 can also be in the form of multiple rectangular grooves of the same size and evenly arranged on the right side.

[0125] Figure 5 is a schematic diagram of the structure of a light emitting diode provided by an embodiment of the present disclosure. The light emitting diode adopts Figure 1 or Figure 2 See Figure 5 The light emitting diode includes: a substrate 100 , a bonding layer 200 and an epitaxial structure 300 .

[0126] The substrate 100 and the epitaxial structure 300 are bonded via a bonding layer 200 .

[0127] In the embodiment of the present disclosure, the epitaxial structure 300 includes a first semiconductor layer 101 , an active layer 102 , and a second semiconductor layer 103 stacked in sequence, and the first semiconductor layer 101 is bonded to the substrate 100 via a bonding layer 200 .

[0128] In the embodiment of the present disclosure, the substrate 100 is a Si substrate.

[0129] In the disclosed embodiment, the Si substrate has good stability, which facilitates the cutting of grooves to release stress.

[0130] In the embodiment of the present disclosure, the first semiconductor layer 101 may be an N-type semiconductor layer, and the second semiconductor layer 103 may be a P-type semiconductor layer.

[0131] For example, the first semiconductor layer 101 may be an N-type GaN layer, and the second semiconductor layer 103 may be a P-type GaN layer.

[0132] In another example, the first semiconductor layer 101 may be a P-type semiconductor layer, and the second semiconductor layer 103 may be an N-type semiconductor layer.

[0133] For example, the first semiconductor layer 101 may be a P-type GaN layer, and the second semiconductor layer 103 may be an N-type GaN layer.

[0134] In the disclosed embodiment, the growth of the semiconductor layer can be achieved by using VeecoK465i or C4 or RB metal organic chemical vapor deposition (MOCVD) equipment or AIXTRON metal organic chemical vapor deposition equipment. High purity H2 (hydrogen) or high purity N2 (nitrogen) or a mixture of high purity H2 and high purity N2 is used as a carrier gas, high purity NH3 is used as an N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) are used as gallium sources, silane (SiH4) is used as an N-type dopant, and bis(cyclopentadienyl) magnesium (CP2Mg) is used as a P-type dopant.

[0135] In the embodiment of the present disclosure, the active layer 102 may be a multi-quantum well layer. For example, the multi-quantum well layer may include a plurality of periodically alternately stacked AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0136] In the embodiment of the present disclosure, the first bonding layer 201 and the second bonding layer 202 may be bonding layers made of one or more materials selected from Au, Sn, Ni and In layers.

[0137] Exemplarily, the first bonding layer 201 is Ni, and the second bonding layer 202 is Sn.

[0138] In the embodiment of the present disclosure, the light emitting diode may further include a current spreading layer 106 and an electrode structure 10 .

[0139] In the embodiment of the present disclosure, the current spreading layer 104 covers the second semiconductor layer 103 .

[0140] In the disclosed embodiment, the current spreading layer 104 may be an indium tin oxide (ITO) layer. ITO has good transparency and conductivity and can conduct current to form an electrical connection while allowing light to pass through.

[0141] In the embodiment of the present disclosure, the electrode structure 400 includes a first electrode 105 and a second electrode 106 .

[0142] In the embodiment of the present disclosure, the first electrode 105 is located on the current spreading layer 104 .

[0143] In a possible implementation of the present disclosure, the first electrode 105 may be an Al electrode.

[0144] In another possible implementation of the present disclosure, the first electrode 105 may also be an AlCu electrode. Compared with Al, AlCu has a higher hardness and is less prone to deformation.

[0145] In the embodiment of the present disclosure, the second electrode 106 is located on a side of the substrate 100 away from the epitaxial structure 300 .

[0146] Exemplarily, the second electrode 106 may be a TiAu electrode or an Au / AuGeNi / Au / Pt / Au electrode.

[0147] In one example, the first electrode 105 may be a P electrode, and the second electrode 106 may be an N electrode.

[0148] In another example, the first electrode 105 may be a P electrode, and the second electrode 106 may be an N electrode.

[0149] It is worth noting that in the embodiments of the present disclosure, structures may be selectively increased or decreased based on the structure of the above-mentioned light emitting diode, and the present disclosure does not impose any limitation on this.

[0150] The above description is only an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A method for preparing a light emitting diode, characterized in that: The method comprises: Making a groove (1000) on the bottom surface of the substrate (100); Bonding the surface of the substrate (100) and the epitaxial structure (300) via a bonding layer (200); The substrate (100) is thinned to remove the groove (1000).

2. The method for preparing a light emitting diode according to claim 1, characterized in that: The depth of the groove (1000) is less than the thickness difference of the substrate (100) before and after thinning.

3. The method for preparing a light emitting diode according to claim 1, characterized in that: The projection of the groove (1000) on the surface of the substrate (100) is a centrally symmetrical figure.

4. The method for preparing a light emitting diode according to claim 3, characterized in that: The groove (1000) comprises a plurality of concentrically arranged annular grooves.

5. The method for preparing a light emitting diode according to claim 4, characterized in that: The spacing between adjacent annular grooves in the plurality of concentrically arranged annular grooves is greater than the size of a tool (2000) for sucking the substrate (100), or the diameter of the innermost annular groove is greater than the size of the tool (2000) for sucking the substrate (100).

6. The method for preparing a light emitting diode according to any one of claims 1 to 5, characterized in that: The method of making a groove (1000) on the bottom surface of the substrate (100) comprises: Making a groove (1000) on the bottom surface of the substrate (100) by laser; soaking the substrate (100) in a BOE solution; The substrate (100) is rinsed with water and spin-dried.

7. The method for preparing a light emitting diode according to any one of claims 1 to 5, characterized in that: The step of bonding the surface of the substrate (100) and the epitaxial structure (300) via a bonding layer (200) comprises: forming a first bonding layer (201) on the surface of the substrate (100); forming a second bonding layer (202) on the epitaxial structure (300); The first bonding layer (201) and the second bonding layer (202) are bonded together to form the bonding layer (200).

8. The method for preparing a light emitting diode according to claim 7, characterized in that: The step of bonding the first bonding layer (201) and the second bonding layer (202) together comprises: The first bonding layer (201) and the second bonding layer (202) are bonded together at a temperature of 220 to 320°C.

9. The method for preparing a light emitting diode according to claim 7, characterized in that: The first bonding layer (201) and the second bonding layer (202) are bonding layers made of one or more materials selected from the group consisting of Au, Sn, Ni and In layers.

10. A light emitting diode, characterized in that: The light emitting diode is manufactured by the method according to any one of claims 1 to 9.

Images