Secure storage method and system for low-voltage power distribution control chip

Abstract

The invention relates to the technical field of chip secure storage, and discloses a secure storage method and system for a low-voltage power distribution control chip, and the method comprises the steps: encrypting to-be-written data submitted by a user through employing a data encryption algorithm in response to a request type being a write-in request, storing the encrypted to-be-written data, and storing the to-be-written data. Scrambling the storage address by adopting an address scrambling algorithm to obtain a scrambled address; and in response to the request type being a reading request, acquiring a scrambling address of to-be-read data submitted by a user, descrambling the scrambling address by adopting an address descrambling algorithm to obtain a descrambling address, extracting the encrypted to-be-read data according to the descrambling address, and decrypting the encrypted to-be-read data by adopting a data decryption algorithm. According to the method, the security of data storage is improved through multi-level security measures, and the security of data in the storage unit is improved through an address scrambling mode, so that the security and the stability of operation of a power system are ensured.

Description

Technical Field

[0001] The present invention relates to the field of chip security storage technology, and in particular to a security storage method and system for a low-voltage power distribution control chip. Background Art

[0002] Low-voltage power distribution control chips play a vital role in modern power systems. These chips are responsible for real-time control of various parameters and operations of low-voltage power distribution systems. In order to ensure the security and reliability of the system, sensitive data and control information inside the chip must be protected. Sensitive data and control information such as keys, certificates, and configuration data are stored in the chip. The leakage of this data may cause serious security problems in the power system. Secure storage is an important part of chip security and device security. It improves the security of data in the storage unit by encrypting the physical storage address of the data in the memory. The chip memory protection unit (MPU) is a hardware component of the chip that is used to protect the security and integrity of the chip memory, as well as define and manage access rights to memory areas to prevent unauthorized operations.

[0003] However, with the progress of information intelligence, the growth of computing needs, the complexity of chips, and the continuous advancement of chip memory protection unit technology, a single memory protection unit cannot cope with complex storage read and write requirements. Some old software may not be fully compatible with modern memory protection mechanisms, resulting in compatibility issues or performance degradation. In addition, the chip memory protection unit lacks identity authentication and encryption algorithm mechanisms when managing storage through memory, which may be easier to be hacked by attackers. The use of a single encryption algorithm during encryption lacks the encryption and hashing of the national secret algorithm, and data is vulnerable to attack and tampering during transmission and storage. Summary of the invention

[0004] In order to solve the above technical problems, the present invention provides a secure storage method and system for a low-voltage power distribution control chip, which achieves the effect of improving the security and reliability of the chip's data storage through multiple security mechanisms of identity authentication, data encryption and address scrambling.

[0005] In a first aspect, the present invention provides a safe storage method for a low-voltage power distribution control chip, the method comprising:

[0006] Obtain the user's identity authority in the low-voltage power distribution control chip through identity authentication, and determine whether the identity authority matches the request type submitted by the user. If so, perform corresponding data processing according to the request type, which includes write request and read request;

[0007] In response to the request type being a write request, using a data encryption algorithm to encrypt the data to be written submitted by the user, storing the encrypted data to be written, and using an address scrambling algorithm to scramble the storage address to obtain a scrambled address;

[0008] In response to a request type of a read request, a scrambled address of the data to be read submitted by the user is obtained, the scrambled address is descrambled using an address descrambling algorithm to obtain a descrambled address, the encrypted data to be read is extracted according to the descrambled address, the encrypted data to be read is decrypted using a data decryption algorithm, and the decrypted data to be read is sent to the user.

[0009] Furthermore, the step of obtaining the user's identity authority in the low-voltage power distribution control chip through identity authentication includes:

[0010] Determine whether the user has the first identity authority based on the user's input password, and if so, determine whether the user has the second identity authority based on the user's scanned fingerprint;

[0011] The first identity permission is access permission, and the second identity permission is read and write permission.

[0012] Furthermore, the step of using a data encryption algorithm to encrypt the data to be written submitted by the user includes:

[0013] Use the SM3 algorithm to calculate the hash value of the data to be written submitted by the user to obtain the verification hash value;

[0014] According to the preset bytes, the data to be written is divided into several data blocks, and each data block is encrypted using the SM4 algorithm to obtain an encrypted data block.

[0015] Furthermore, the step of scrambling the storage address using an address scrambling algorithm to obtain a scrambled address includes:

[0016] Rearranging the storage address and the preset hash value respectively by using a median sorting algorithm, wherein the hash value is consistent with the number of bytes of the storage address;

[0017] The arranged storage address and the arranged hash value are XORed to obtain the scrambled address.

[0018] Furthermore, the step of using an address descrambling algorithm to descramble the scrambled address to obtain the descrambled address includes:

[0019] The median sort algorithm is used to rearrange the hash value, and the scrambled address is XORed with the arranged hash value to obtain the intermediate address;

[0020] The intermediate addresses are rearranged using a reverse median sorting algorithm to obtain a descrambled address.

[0021] Furthermore, the sorting step of the median sorting algorithm includes:

[0022] According to the forward direction of the data to be sorted, a first sequence is selected through a sliding window, where the length of the sliding window is half of the total length of the data to be sorted;

[0023] Extracting the median from the first sequence based on the number of bytes, and using the extracted median as the first byte of the rearranged sequence, sequentially moving the sliding window to update the first sequence, extracting the median again from the updated first sequence, and using the median extracted again as the second byte of the rearranged sequence, and repeating the above steps until the length of the rearranged sequence reaches the length of the sliding window;

[0024] The rearranged sequence is removed from the data to be sorted to obtain a second sequence, and the second sequence is concatenated after the rearranged sequence to obtain a sorted sequence corresponding to the data to be sorted.

[0025] Furthermore, the sorting step of the reverse median sorting algorithm includes:

[0026] According to the reverse direction of the data to be sorted, a third sequence is selected through a sliding window, where the length of the sliding window is half of the total length of the data to be sorted;

[0027] Selecting a median from the third sequence based on the number of bytes, and shifting the first byte in the data to be sorted to the front of the selected median, to obtain updated data to be sorted;

[0028] Move the sliding window sequentially to update the third sequence, select the median again from the updated third sequence, and shift the first byte of the updated data to be sorted to the front of the median selected again, repeat the above steps until the length of the shifted data reaches the length of the sliding window, and obtain the sorting sequence corresponding to the data to be sorted.

[0029] Furthermore, the step of using a data decryption algorithm to decrypt the encrypted data to be read includes:

[0030] Use the SM4 decryption key to decrypt the encrypted data block to obtain the decrypted data, and use the SM3 algorithm to calculate the hash value of the decrypted data;

[0031] The calculated hash value is compared with the extracted verification hash value, and based on the comparison result, it is determined whether the decrypted data is complete.

[0032] In a second aspect, the present invention provides a safe storage system for a low-voltage power distribution control chip, the system comprising:

[0033] The authority verification module is used to obtain the user's identity authority in the low-voltage power distribution control chip through identity authentication, and determine whether the identity authority matches the request type submitted by the user. If so, the corresponding data processing is performed according to the request type, and the request type includes write request and read request;

[0034] The encryption and scrambling module is used to, in response to a request type of a write request, encrypt the data to be written submitted by the user using a data encryption algorithm, store the encrypted data to be written, and scramble the storage address using an address scrambling algorithm to obtain a scrambled address;

[0035] The decryption and descrambling module is used to respond to a request type of a read request, obtain the scrambled address of the data to be read submitted by the user, use the address descrambling algorithm to descramble the scrambled address to obtain the descrambling address, extract the encrypted data to be read according to the descrambling address, use the data decryption algorithm to decrypt the encrypted data to be read, and send the decrypted data to be read to the user.

[0036] The present invention provides a secure storage method and system for a low-voltage power distribution control chip. The present invention improves the security of data storage by using data encryption and identity authentication and authorization mechanisms, and increases the difficulty of modifying the stored content to a specific target value by address scrambling, thereby improving the security of data in the storage unit, thereby ensuring the safety and stability of the power system operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 It is a flow chart of a safe storage method for a low-voltage power distribution control chip in an embodiment of the present invention;

[0038] Figure 2 It is a structural schematic diagram of a safe storage system for a low-voltage power distribution control chip in an embodiment of the present invention. DETAILED DESCRIPTION

[0039] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0040] See also Figure 1 The first embodiment of the present invention provides a safe storage method for a low-voltage power distribution control chip, which includes steps S10 to S30:

[0041] Step S10, obtaining the user's identity authority in the low-voltage power distribution control chip through identity authentication, and determining whether the identity authority matches the request type submitted by the user. If so, performing corresponding data processing according to the request type, the request type includes a write request and a read request;

[0042] Step S20, in response to the request type being a write request, encrypt the data to be written submitted by the user using a data encryption algorithm, store the encrypted data to be written, and scramble the storage address using an address scrambling algorithm to obtain a scrambled address;

[0043] Step S30, in response to the request type being a read request, obtaining the scrambled address of the data to be read submitted by the user, using an address descrambling algorithm to descramble the scrambled address to obtain a descrambled address, extracting the encrypted data to be read according to the descrambled address, using a data decryption algorithm to decrypt the encrypted data to be read, and sending the decrypted data to be read to the user.

[0044] In the present invention, for the low-voltage power distribution control chip, the memory unit is divided into different areas through the memory protection unit MPU in the chip, and different access rights are assigned to each area. The access rights include read-write, read-only and inaccessible. For areas storing critical information, such as power system configuration, protection parameters, real-time data, etc., it is necessary to strictly control the user's access rights to ensure the security of the stored information. Therefore, the present invention provides a chip security storage method based on the chip's memory protection unit.

[0045] In a preferred embodiment, the present invention provides a method for performing dual identity authentication on a user to determine the user's access rights, the specific steps comprising:

[0046] Determine whether the user has the first identity authority based on the user's input password, and if so, determine whether the user has the second identity authority based on the user's scanned fingerprint;

[0047] The first identity permission is access permission, and the second identity permission is read and write permission.

[0048] In this embodiment, before accessing sensitive data, the user's identity is first verified, and the user's memory access rights (read / write, read-only, and inaccessible) are determined according to the user's different identity levels to ensure that only authorized users have access rights to enter the corresponding area. The authentication and authorization method uses multi-factor authentication, combining two different types of authentication, namely passwords and fingerprints, to distinguish between high-authority users and low-authority users, thereby improving efficiency and increasing security.

[0049] Among them, password verification is to verify the password entered by the user. The password is a login password pre-assigned to the user with the permission to access the chip. When the password verification fails, the user will be identified as a user with no access rights, and the memory protection unit MPU will be used to intercept its operation; when the password verification passes, the user will be identified as having access rights to the chip. This access right belongs to a low right and cannot read or write the data stored in the chip. If the user makes a read or write request, it is necessary to further verify the user's rights, that is, fingerprint scanning verification. The scanned fingerprint is used to determine whether the user has a higher level of read and write rights. Only when the user's rights match the request submitted by the user, will the corresponding data processing be performed according to the user's request.

[0050] For data stored in the chip, user requests can be divided into write requests and read requests. For write requests, if the user identity and authority are verified, the data submitted by the user is first encrypted using an encryption algorithm. The specific encryption steps include:

[0051] Use the SM3 algorithm to calculate the hash value of the data to be written submitted by the user to obtain the verification hash value;

[0052] According to the preset bytes, the data to be written is divided into several data blocks, and each data block is encrypted using the SM4 algorithm to obtain an encrypted data block.

[0053] In this embodiment, data encryption uses the national secret algorithms SM3 and SM4, where SM3 is used to calculate the hash value of the original data, and the hash value is used to verify the integrity of the data. At the same time, the original data is processed in blocks, such as dividing the data into 128-bit (16-byte) data blocks. If the size of the data block is less than 128 bits, it needs to be padded to meet the data block size requirement of SM4, and each data block is encrypted using the SM4 algorithm to obtain an encrypted data block.

[0054] In actual applications, attackers may bypass the access control of the MPU and directly obtain encrypted data through the storage address. In order to further improve the security of data storage, this embodiment uses an address scrambling algorithm to scramble the storage address of the encrypted data, thereby improving the security of the storage address of the data. Even if the attacker obtains the storage address, the address is scrambled and the data cannot be directly read through the address. The steps of scrambling the storage address using the address scrambling algorithm include:

[0055] Rearranging the storage address and the preset hash value respectively by using a median sorting algorithm, wherein the hash value is consistent with the number of bytes of the storage address;

[0056] The arranged storage address and the arranged hash value are XORed to obtain the scrambled address.

[0057] In this embodiment, according to the number of bytes of the storage address, a hash value with the same length as the storage address is first set, and then the storage address and the hash value are reordered using the median sorting algorithm to obtain two reordered sequences, and the two sequences are bit-wise XORed to obtain the scrambled address. The sorting steps of the median sorting algorithm include:

[0058] According to the forward direction of the data to be sorted, a first sequence is selected through a sliding window, where the length of the sliding window is half of the total length of the data to be sorted;

[0059] Extracting the median from the first sequence based on the number of bytes, and using the extracted median as the first byte of the rearranged sequence, sequentially moving the sliding window to update the first sequence, extracting the median again from the updated first sequence, and using the median extracted again as the second byte of the rearranged sequence, and repeating the above steps until the length of the rearranged sequence reaches the length of the sliding window;

[0060] The rearranged sequence is removed from the data to be sorted to obtain a second sequence, and the second sequence is concatenated after the rearranged sequence to obtain a sorted sequence corresponding to the data to be sorted.

[0061] In this embodiment, taking the storage address as an example, the steps of the median sorting algorithm are explained. If the length of the storage address is N bytes, then the sliding window is set to N / 2 bytes, and the first sequence with a length of N / 2 is selected through the sliding window, and the median in the first sequence, that is, the (N / 2) / 2th byte, is extracted as the first byte of the rearrangement address, and then the sliding window is moved to update the first sequence, and the median of the updated first sequence is used as the second byte of the rearrangement address, and so on, until the length of the rearrangement sequence reaches the length of the sliding window, that is, half of the bytes are involved in the rearrangement. It should be noted that in this embodiment, the division of N is rounded down, and the byte refers to the data corresponding to the byte position.

[0062] Assuming that the storage address is 0x12345678, which is 4 bytes in total, the sliding window is 2 bytes. The first sequence is selected in the forward direction of the stored address. Therefore, the first sequence is 1234, and its length is two bytes. The median of the two bytes is the second byte, which is 34. Then 34 will be used as the first byte of the rearranged sequence, that is, the data at the first byte position in the rearranged sequence. The sliding window is moved to update the first sequence. At this time, the first sequence is updated to 3456. At this time, the median is the second byte, and the corresponding data is 56, that is, the second byte of the rearranged sequence is obtained. It can be seen that the rearranged sequence is 3456 at this time, with a total of two bytes, which reaches the length of the sliding window. The sliding window is no longer moved, but the rearranged sequence is removed from the storage address to obtain the second sequence, which is 1278. Finally, the second sequence is spliced ​​behind the rearranged sequence to obtain the reordered storage address, which is 0x34561278. Similarly, assuming the hash value is 0x01ABCDEF, according to the median sort algorithm, the reordered hash value is 0xABCD01EF, and then the reordered storage address and the reordered hash value are XORed, that is, 0x34561278 and 0xABCD01EF, so that the scrambled address is 0x9F9B1397.

[0063] The data encryption and address scrambling method of this embodiment not only improves the security of the stored data itself, but also improves the security of the physical storage address. Through the dual security mechanism, the reliability of the safe storage of the low-voltage power distribution control chip is ensured.

[0064] In this embodiment, the memory protection unit is used to securely manage the storage information. The MPU can detect unexpected storage accesses, such as stack overflow, array out-of-bounds, etc., and trigger exceptions or interrupts so that the system can take corresponding processing measures. Ensure memory isolation between different tasks to prevent unnecessary access and malicious attacks. In the chip system, sensitive data is stored in a memory area protected by the MPU and encrypted. In the present invention, an authentication mechanism is used to ensure that only authenticated users can access these areas, and operations can only be performed at the moment when the data is decrypted and descrambled.

[0065] Based on the above encryption and scrambling steps, when a user submits a read request, after the user identity verification is passed, the corresponding descrambling algorithm and decryption algorithm will be used to process the address and data. Among them, the step of descrambling the scrambled address using the address descrambling algorithm includes:

[0066] The median sort algorithm is used to rearrange the hash value, and the scrambled address is XORed with the arranged hash value to obtain the intermediate address;

[0067] The intermediate addresses are rearranged using a reverse median sorting algorithm to obtain a descrambled address.

[0068] In this embodiment, a hash value is first obtained, and the hash value is reordered according to the median sorting algorithm. Taking the storage address and hash value in the above step as an example, it can be seen that the reordered hash value is 0xABCD01EF, and the scrambled address is 0x9F9B1397. The two are XORed to obtain an intermediate address, that is, 0x34561278. It can be seen that the intermediate address is the storage address after the median sorting process in the address scrambling step. Then, the intermediate address is sorted by the reverse median sorting algorithm, that is, it can be restored to the original storage address. The reverse median sorting algorithm here can be regarded as a reverse operation of the median sorting, and its specific steps include:

[0069] According to the reverse direction of the data to be sorted, a third sequence is selected through a sliding window, where the length of the sliding window is half of the total length of the data to be sorted;

[0070] Selecting a median from the third sequence based on the number of bytes, and shifting the first byte in the data to be sorted to the front of the selected median, to obtain updated data to be sorted;

[0071] Move the sliding window sequentially to update the third sequence, select the median again from the updated third sequence, and shift the first byte of the updated data to be sorted to the front of the median selected again, repeat the above steps until the length of the shifted data reaches the length of the sliding window, and obtain the sorting sequence corresponding to the data to be sorted.

[0072] In this embodiment, the selection direction of the sliding window is opposite to the sorting direction in the median sorting algorithm. Taking the middle address 0x34561278 as an example, in the reverse median sorting algorithm, the third sequence is reversely selected by the sliding window, and the obtained third sequence is 1278. The median of the third sequence is the second byte, that is, 78. The first byte of the middle address is inserted in front of the median, that is, 34 is inserted in front of 78. At this time, the middle address becomes 0x56123478. At this time, the data selected by the sliding window is 1234. The sliding window is moved sequentially, that is, the sliding window is The third sequence selected by the moving window is the second half of the intermediate address. At this time, the third sequence is updated to 3478, and the median number is still 78. The first byte 56 of the current intermediate address is inserted before the median 78, and the intermediate address obtained is 0x12345678. At this time, the shifted data length is consistent with the length of the sliding window, that is, half of the data of the intermediate address is shifted. It can be seen that the shifted intermediate address is the storage address before scrambling, that is, the intermediate address is sorted by the reverse median sorting algorithm to obtain the descrambling address.

[0073] Then, the encrypted data is extracted by descrambling the address. Based on the above encryption steps, the encrypted data includes the encrypted data block and the hash value. The corresponding decryption steps specifically include:

[0074] Use the SM4 decryption key to decrypt the encrypted data block to obtain the decrypted data, and use the SM3 algorithm to calculate the hash value of the decrypted data;

[0075] The calculated hash value is compared with the extracted verification hash value, and based on the comparison result, it is determined whether the decrypted data is complete.

[0076] The decryption operation in this embodiment is the opposite step of the encryption operation. First, the encrypted data block is decrypted using the decryption key of SM4 to obtain the original data. In order to verify the integrity of the stored data, the hash value of the decrypted data is calculated using the SM3 algorithm, and the calculated hash value is compared with the extracted hash value. If the two hash values ​​are consistent, the decrypted data is considered to be the complete original data. Only then will the original data be sent to the user, thereby completing the user's read request.

[0077] The present embodiment provides a secure storage method for a low-voltage power distribution control chip. The present invention uses data encryption and identity authentication and authorization mechanisms in combination to ensure the step-by-step startup of codes and the step-by-step transmission of trust. It uses multi-level security measures to efficiently manage the reading and writing of chip memory, thereby improving the security of data storage. It also uses address scrambling to increase the difficulty of modifying storage content to a specific target value, protect sensitive information inside the chip, and improve the security of data in the storage unit, thereby ensuring the safety and stability of power system operation.

[0078] See also Figure 2 Based on the same inventive concept, a second embodiment of the present invention proposes a safe storage system for a low-voltage power distribution control chip, comprising:

[0079] The authority verification module 10 is used to obtain the identity authority of the user in the low-voltage power distribution control chip through identity authentication, and determine whether the identity authority matches the request type submitted by the user. If so, corresponding data processing is performed according to the request type, and the request type includes a write request and a read request;

[0080] The encryption and scrambling module 20 is used to, in response to a request type of a write request, encrypt the data to be written submitted by the user using a data encryption algorithm, store the encrypted data to be written, and scramble the storage address using an address scrambling algorithm to obtain a scrambled address;

[0081] The decryption and descrambling module 30 is used to respond to a request type of a read request, obtain a scrambled address of the data to be read submitted by the user, descramble the scrambled address using an address descrambling algorithm to obtain a descrambled address, extract the encrypted data to be read according to the descrambled address, decrypt the encrypted data to be read using a data decryption algorithm, and send the decrypted data to be read to the user.

[0082] Furthermore, the encryption and scrambling module 10 also includes an address scrambling module;

[0083] The address scrambling module is used to rearrange the storage address and the preset hash value respectively by using a median sorting algorithm, wherein the hash value is consistent with the number of bytes of the storage address;

[0084] The arranged storage address and the arranged hash value are XORed to obtain the scrambled address.

[0085] The technical features and technical effects of the secure storage system for low-voltage power distribution control chip proposed in the embodiment of the present invention are the same as the method proposed in the embodiment of the present invention, and will not be repeated here. Each module in the above-mentioned secure storage system for low-voltage power distribution control chip can be implemented in whole or in part by software, hardware and a combination thereof. The above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory in the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.

[0086] In summary, an embodiment of the present invention proposes a secure storage method and system for a low-voltage power distribution control chip. The method obtains the user's identity authority in the low-voltage power distribution control chip through identity authentication, and determines whether the identity authority matches the request type submitted by the user. If so, corresponding data processing is performed according to the request type, and the request type includes a write request and a read request; in response to the request type being a write request, a data encryption algorithm is used to encrypt the data to be written submitted by the user, the encrypted data to be written is stored, and an address scrambling algorithm is used to scramble the storage address to obtain a scrambled address; in response to the request type being a read request, a scrambled address of the data to be read submitted by the user is obtained, an address descrambling algorithm is used to descramble the scrambled address to obtain a descrambled address, and according to the descrambling address, the encrypted data to be read is extracted, the encrypted data to be read is decrypted by a data decryption algorithm, and the decrypted data to be read is sent to the user. The present invention ensures the step-by-step startup of codes and the step-by-step transmission of trust through the coordinated use of data encryption and identity authentication and authorization mechanisms, efficiently manages the reading and writing of chip memory through multi-level security measures, improves the security of data storage, and increases the difficulty of modifying storage content to a specific target value through address scrambling, thereby protecting sensitive information inside the chip and improving the security of data in the storage unit, thereby ensuring the safety and stability of power system operation.

[0087] Each embodiment in this specification is described in a progressive manner, and the same or similar parts of each embodiment can be directly referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment. It should be noted that the technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, all possible combinations of the technical features in the above-mentioned embodiments are not described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0088] The above-mentioned embodiments only express several preferred implementation modes of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in the technical field, several improvements and substitutions can be made without departing from the technical principles of the present invention, and these improvements and substitutions should also be regarded as the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be based on the protection scope of the claims.

Claims

1. A safe storage method for a low voltage power distribution control chip, characterized in that: include: Obtain the user's identity authority in the low-voltage power distribution control chip through identity authentication, and determine whether the identity authority matches the request type submitted by the user. If so, perform corresponding data processing according to the request type, which includes write request and read request; In response to the request type being a write request, using a data encryption algorithm to encrypt the data to be written submitted by the user, storing the encrypted data to be written, and using an address scrambling algorithm to scramble the storage address to obtain a scrambled address; In response to a request type of a read request, a scrambled address of the data to be read submitted by the user is obtained, the scrambled address is descrambled using an address descrambling algorithm to obtain a descrambled address, the encrypted data to be read is extracted according to the descrambled address, the encrypted data to be read is decrypted using a data decryption algorithm, and the decrypted data to be read is sent to the user.

2. The safe storage method for a low voltage power distribution control chip according to claim 1, characterized in that: The step of obtaining the user's identity authority in the low-voltage power distribution control chip through identity authentication includes: Determine whether the user has the first identity authority based on the user's input password, and if so, determine whether the user has the second identity authority based on the user's scanned fingerprint; The first identity permission is access permission, and the second identity permission is read and write permission.

3. The safe storage method for a low voltage power distribution control chip according to claim 1, characterized in that: The step of using a data encryption algorithm to encrypt the data to be written submitted by the user includes: Use the SM3 algorithm to calculate the hash value of the data to be written submitted by the user to obtain the verification hash value; According to the preset bytes, the data to be written is divided into several data blocks, and each data block is encrypted using the SM4 algorithm to obtain an encrypted data block.

4. The safe storage method for a low voltage power distribution control chip according to claim 1, characterized in that: The step of scrambling the storage address using the address scrambling algorithm to obtain the scrambled address includes: Rearranging the storage address and the preset hash value respectively by using a median sorting algorithm, wherein the hash value is consistent with the number of bytes of the storage address; The arranged storage address and the arranged hash value are XORed to obtain the scrambled address.

5. The safe storage method for low voltage power distribution control chip according to claim 4 is characterized in that: The step of using an address descrambling algorithm to descramble the scrambled address to obtain the descrambled address comprises: The median sort algorithm is used to rearrange the hash value, and the scrambled address is XORed with the arranged hash value to obtain the intermediate address; The intermediate addresses are rearranged using a reverse median sorting algorithm to obtain a descrambled address.

6. The safe storage method for low voltage power distribution control chip according to claim 4, characterized in that: The sorting steps of the median sorting algorithm include: According to the forward direction of the data to be sorted, a first sequence is selected through a sliding window, where the length of the sliding window is half of the total length of the data to be sorted; Extracting the median from the first sequence based on the number of bytes, and using the extracted median as the first byte of the rearranged sequence, sequentially moving the sliding window to update the first sequence, extracting the median again from the updated first sequence, and using the median extracted again as the second byte of the rearranged sequence, and repeating the above steps until the length of the rearranged sequence reaches the length of the sliding window; The rearranged sequence is removed from the data to be sorted to obtain a second sequence, and the second sequence is concatenated after the rearranged sequence to obtain a sorted sequence corresponding to the data to be sorted.

7. The safe storage method for low voltage power distribution control chip according to claim 4, characterized in that: The sorting steps of the reverse median sorting algorithm include: According to the reverse direction of the data to be sorted, a third sequence is selected through a sliding window, where the length of the sliding window is half of the total length of the data to be sorted; Selecting a median from the third sequence based on the number of bytes, and shifting the first byte in the data to be sorted to the front of the selected median, to obtain updated data to be sorted; Move the sliding window sequentially to update the third sequence, select the median again from the updated third sequence, and shift the first byte of the updated data to be sorted to the front of the median selected again, repeat the above steps until the length of the shifted data reaches the length of the sliding window, and obtain the sorting sequence corresponding to the data to be sorted.

8. The safe storage method for a low voltage power distribution control chip according to claim 3, characterized in that: The step of using a data decryption algorithm to decrypt the encrypted data to be read includes: Use the SM4 decryption key to decrypt the encrypted data block to obtain the decrypted data, and use the SM3 algorithm to calculate the hash value of the decrypted data; The calculated hash value is compared with the extracted verification hash value, and based on the comparison result, it is determined whether the decrypted data is complete.

9. A safe storage system for a low voltage power distribution control chip, characterized in that: include: The authority verification module is used to obtain the user's identity authority in the low-voltage power distribution control chip through identity authentication, and determine whether the identity authority matches the request type submitted by the user. If so, the corresponding data processing is performed according to the request type, and the request type includes write request and read request; The encryption and scrambling module is used to, in response to a request type of a write request, encrypt the data to be written submitted by the user using a data encryption algorithm, store the encrypted data to be written, and scramble the storage address using an address scrambling algorithm to obtain a scrambled address; The decryption and descrambling module is used to respond to a request type of a read request, obtain the scrambled address of the data to be read submitted by the user, use the address descrambling algorithm to descramble the scrambled address to obtain the descrambling address, extract the encrypted data to be read according to the descrambling address, use the data decryption algorithm to decrypt the encrypted data to be read, and send the decrypted data to be read to the user.

10. The secure storage system for a low voltage power distribution control chip according to claim 9, characterized in that: The encryption and scrambling module also includes an address scrambling module; The address scrambling module is used to rearrange the storage address and the preset hash value respectively by using a median sorting algorithm, wherein the hash value is consistent with the number of bytes of the storage address; The arranged storage address and the arranged hash value are XORed to obtain the scrambled address.

Images