Method for improving ESF (epitaxial stacking failure)
By performing specific heat treatment and gas treatment steps on the silicon wafer, the epitaxial stacking fault ESF is optimized, the performance problems caused by this defect in the prior art are solved, and the number of epitaxial stacking fault ESFs is significantly reduced and the device performance is improved.
Patent Information
- Application Number
- CN202411823895.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-11
- Publication Date
- 2025-03-21
AI Technical Summary
In the prior art, the epitaxial stacking fault ESF exists, resulting in an increase in the reverse leakage current of the diode and a decrease in the breakdown voltage, which seriously affects the performance of electronic devices.
By performing specific heat treatment and gas treatment steps on the silicon wafer, it includes passing H2 at a temperature of 700°C to 720°C, then rapidly heating to 1120°C, followed by HCl gas to optimize the surface pits, and finally passing through SiHCl3 long film at 1130°C to form a 3.5 μm thick polycrystalline silicon film.
The number of epitaxial stacking fault ESF is effectively reduced, reducing it to below 0.1/cm2, improving the performance and reliability of the device.
Smart Images
Figure CN119673758A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of silicon wafer epitaxial processing, and in particular to a method for improving epitaxial stacking faults (ESF). Background Art
[0002] Epitaxy is one of the semiconductor processes. Epitaxy refers to the process of growing a single crystal thin film on a single crystal substrate according to the substrate crystal orientation. The new single crystal layer is called an epitaxial layer, and the substrate with the epitaxial layer is called an epitaxial wafer. Epitaxial wafers have certain electrical properties that polished wafers do not have and eliminate many surface / near-surface defects introduced during crystal growth and subsequent wafer processing. Epitaxial silicon wafers used for power MOS transistors require very low substrate resistivity. Epitaxy is the process of growing one or more new silicon single crystal layers with specific doping type, resistivity, thickness and lattice structure on the polished surface by chemical vapor deposition. Epitaxy technology can reduce defects in silicon wafers caused by crystal growth, and has lower defect density and oxygen content.
[0003] Power devices are often used in high-power and high-voltage environments. The low resistivity of the silicon substrate can reduce the on-resistance, and the high-resistivity epitaxial layer can increase the breakdown voltage of the device. Epitaxial wafers improve the reliability of devices and reduce their energy consumption, so they are widely used in industrial electronics, automotive electronics and other fields.
[0004] Stacking fault ESF is a surface defect that increases the reverse leakage current of the diode and reduces the breakdown voltage, seriously affecting the performance of the device. The stacking fault defect not only increases the reverse leakage current of the diode, but also reduces the breakdown voltage, seriously affecting the performance of the electronic device.
[0005] In the original epitaxial process, when a polysilicon film is formed on the back of a silicon wafer, a large number of stacking faults (hereinafter referred to as SF) will appear in the epitaxial film. These SFs are square in shape on the surface of the silicon wafer. At the same time, it was found that the LPD (Light Point Defect) level on the surface was seriously deteriorated. Before the formation of the polysilicon film, oxygen and red phosphorus exist between the crystal lattices of the silicon wafer. If the concentration of red phosphorus in the silicon wafer is increased in order to reduce the resistivity of the substrate, it will cause supersaturated red phosphorus between the crystal lattices. Starting from this state, when the silicon wafer is heated to form a polysilicon film, the diffusion coefficient of oxygen is greater than the diffusion coefficient of red phosphorus, forming phosphorus clusters (microprecipitates). Summary of the invention
[0006] The present invention mainly solves the deficiencies in the prior art and provides a method for improving epitaxial stacking faults (ESFs), which has the advantages of convenient operation and good operating stability. It solves the problem of stacking faults and reduces the number of epitaxial stacking faults (ESFs) to 0.1 / cm 2 the following.
[0007] The above technical problems of the present invention are mainly solved by the following technical solutions:
[0008] A method for improving epitaxial stacking fault ESF comprises the following steps:
[0009] Step 1: Start at 700℃~720℃, and heat the whole process. 2 , and then quickly heated to 1120°C.
[0010] Step 2: Continue heating from 1120℃ for 55s, and then add HCl to raise the temperature to 1130℃.
[0011] Step 3: Maintain 1130℃ for 80s and pass SiHCl 3 Long film, film thickness is 3.5μm.
[0012] Step 4: Finally cool down to the original temperature of 700℃~720℃.
[0013] Preferably, the concentration of the introduced HCl is 1000 sccm.
[0014] Preferably, the particles of the epitaxial wafers were tested by SP machine under two conditions: long epitaxy with HCL introduced and long epitaxy without HCL introduced under normal conditions. The particle diagrams were compared and it was clearly seen that the number of particles was reduced after HCL was introduced.
[0015] Preferably, when pre-baking is performed in an HCl atmosphere before epitaxial growth, oxygen and red phosphorus in the outermost layer of the silicon wafer diffuse outward, but the clusters remain in the outermost layer because they are in a stable state.
[0016] Preferably, when hydrogen etching is performed, the clusters are selectively etched to form minute pits due to a difference in etching rate between the outermost layer of the silicon wafer and the clusters.
[0017] Preferably, when epitaxial growth is performed on a silicon wafer having these tiny pits formed thereon, stacking faults ESF originate from the pits on the surface of the polished wafer; after the HCl gas is introduced, the pits on the surface are optimized, so that the stacking faults ESF are reduced.
[0018] The present invention can achieve the following effects:
[0019] The present invention provides a method for improving epitaxial stacking faults (ESFs), which has the advantages of convenient operation and good running stability compared with the prior art. The stacking fault problem is solved. The number of epitaxial stacking faults (ESFs) is reduced to 0.1 / cm 2 the following. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 It is a schematic diagram of the epitaxial process of the present invention.
[0021] Figure 2 This is a comparison chart of particles tested by the machine of the present invention. DETAILED DESCRIPTION
[0022] The technical solution of the invention is further specifically described below through embodiments and in conjunction with the accompanying drawings.
[0023] Example: Figure 1 and Figure 2 As shown, a method for improving epitaxial stacking fault ESF includes the following steps:
[0024] Step 1: Start at 700℃~720℃, and heat the whole process. 2 , and then quickly heated to 1120°C.
[0025] When hydrogen etching is performed, the clusters are selectively etched to form minute pits due to the difference in etching rate between the outermost layer of the silicon wafer and the clusters.
[0026] Step 2: Continue heating from 1120°C for 55s, and then pass HCl to raise the temperature to 1130°C. The concentration of HCl passed is 1000 sccm.
[0027] When pre-baking before epitaxial growth is carried out in an HCl atmosphere, oxygen and red phosphorus in the outermost layer of the silicon wafer diffuse outward, but the clusters remain in the outermost layer because they are in a stable state.
[0028] When epitaxial growth is performed on a silicon wafer having these tiny pits formed thereon, stacking faults (ESFs) originate from the pits on the polished wafer surface; after the HCl gas is introduced, the pits on the surface are optimized, resulting in a reduction in the stacking faults (ESFs).
[0029] Step 3: Maintain 1130℃ for 80s and pass SiHCl 3 Long film, film thickness is 3.5μm.
[0030] Step 4: Finally cool down to the original temperature of 700℃~720℃.
[0031] The particles of epitaxial wafers were tested with SP machine under two conditions: long epitaxy with HCL passed through and long epitaxy under normal conditions without HCL passed through. The particle images were compared and it was clearly seen that the number of particles decreased after HCL was passed through.
[0032] In summary, the method for improving epitaxial stacking faults (ESF) has the advantages of convenient operation and good running stability. The stacking fault problem is solved. The number of epitaxial stacking faults (ESF) is reduced to 0.1 / cm 2 the following.
[0033] The above description is only a specific embodiment of the present invention, but the structural features of the present invention are not limited thereto. Any changes or modifications made by any technician in the field of the present invention are included in the patent scope of the present invention.
Claims
1. A method for improving epitaxial stacking fault ESF, characterized in that The steps are as follows: Step 1: The starting temperature is 700℃~720℃, H2 is passed throughout the process, and then the temperature is quickly raised to 1120℃; Step 2: Continue heating from 1120℃ for 55s, and then pass HCl to raise the temperature to 1130℃; Step 3: Maintain 1130℃ for 80s and pass SiHCl3 to grow film, with a film thickness of 3.5μm; Step 4: Finally cool down to the original temperature of 700℃~720℃.
2. The method for improving epitaxial stacking fault ESF according to claim 1, characterized in that: The concentration of HCl introduced was 1000 sccm.
3. The method for improving epitaxial stacking fault ESF according to claim 2, characterized in that: The particles of epitaxial wafers were tested with SP machine under two conditions: long epitaxy with HCL passed through and long epitaxy under normal conditions without HCL passed through. The particle images were compared and it was clearly seen that the number of particles decreased after HCL was passed through.
4. The method for improving epitaxial stacking fault ESF according to claim 1, characterized in that: When pre-baking before epitaxial growth is carried out in an HCl atmosphere, oxygen and red phosphorus in the outermost layer of the silicon wafer diffuse outward, but the clusters remain in the outermost layer because they are in a stable state.
5. The method for improving epitaxial stacking fault ESF according to claim 4, characterized in that: When hydrogen etching is performed, the clusters are selectively etched to form minute pits due to the difference in etching rate between the outermost layer of the silicon wafer and the clusters.
6. The method for improving epitaxial stacking fault ESF according to claim 5, characterized in that: When epitaxial growth is performed on a silicon wafer having these tiny pits formed thereon, stacking faults (ESFs) originate from the pits on the polished wafer surface; after the HCl gas is introduced, the pits on the surface are optimized, resulting in a reduction in the stacking faults (ESFs).