Semiconductor device, manufacturing method thereof and electronic device
By forming trenches and low dielectric constant lining layers in the semiconductor substrate and forming metal plugs therein, the parasitic capacitance and resistance problems during high-frequency signal transmission in the silicon substrate are solved, and the effect of reducing losses and improving signal transmission efficiency is achieved.
CN119673894APending Publication Date: 2025-03-21NINGBO SEMICON INT CORP
Patent Information
- Application Number
- CN202411793047.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-06
- Publication Date
- 2025-03-21
AI Technical Summary
Technical Problem
When using the TSV process to integrate high-frequency signals in silicon substrates, large parasitic capacitances and resistances will be generated, resulting in increased losses.
Method used
A trench through the substrate is formed in the semiconductor substrate, and a liner layer with a dielectric constant less than the substrate is formed on the side walls of the trench, and a metal plug is formed in the liner layer so that the metal plug and the substrate are completely separated by the liner layer, thereby increasing the resistance.
Benefits of technology
By reducing the parasitic capacitance and resistance between the metal plug and the substrate, the loss of high-frequency signals is reduced and signal transmission efficiency is improved.
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Figure CN119673894A_ABST
Abstract
The invention discloses a semiconductor device, a manufacturing method thereof and an electronic device, and the semiconductor device comprises a semiconductor substrate which comprises a first surface and a second surface which are opposite to each other; a groove penetrating through the semiconductor substrate is formed in the semiconductor substrate, a lining layer is formed on the side wall of the groove, and the dielectric constant of the lining layer is smaller than that of the semiconductor substrate; a metal plug is formed in the lining layer, the first end of the metal plug is electrically connected with the first wiring layer located on one side of the first surface, and the second end of the metal plug is electrically connected with the second wiring layer located on one side of the second surface. The parasitic capacitance and resistance generated by the high-frequency signal in the semiconductor substrate are reduced so as to reduce the loss when the high-frequency signal is transmitted in the metal plug.
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Citation Information
Cited By
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