Chip load isolation control circuit
By adopting the cascaded design of three sets of optocoupling isolation circuits and port expansion chips, the problem of large usage and high cost of electronic components in the existing isolation control circuits is solved, and efficient multi-load isolation control and cost reduction are achieved.
Patent Information
- Application Number
- CN202411753342.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-02
- Publication Date
- 2025-03-21
AI Technical Summary
When implementing electrical isolation control circuits, existing isolation control circuits require a large number of optocouplers and transistors, resulting in large usage of electronic components and high overall cost.
Three sets of optocouple isolation circuits are used to replace the original eight-way isolated optocouple plus transistor structure, and a control system is built through port expansion chip cascade to simplify circuit wiring and reduce unnecessary grounding loops.
Isolation control of multiple loads is realized, which significantly reduces the usage of electronic components and the overall cost, while improving the anti-interference performance and reliability of the system.
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Figure CN119675658A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of control circuits, and in particular to a chip load isolation control circuit. Background Art
[0002] In the washing machine control system, the isolation control circuit plays a vital role, which ensures safe operation and improves the reliability and durability of the system; the isolation control circuit is mainly used to separate the low-voltage control signal (such as the signal from the microcontroller) from the high-voltage drive part (such as the motor, heating element, etc.), thereby preventing the high voltage from damaging the sensitive electronic components.
[0003] In the prior art, commonly used isolation control circuits usually implement isolation at the output end, such as the attached Figure 1 As shown; when the output load needs to be isolated from the input signal, electrical isolation is achieved by adding an optocoupler; for the thyristor control circuit, since the weak current ground (AVSS) needs to be on the same line as the neutral line (N line) of the power supply to ensure that the thyristor can be turned on, an optocoupler must be used at the front end to isolate the MCU ground (VSS).
[0004] However, this method has some limitations: each time a thyristor load is controlled, an additional optocoupler and a transistor need to be added, because the output current of a single optocoupler is not enough to directly drive the thyristor; if a port expansion chip with eight outputs (also known as a shift register chip), such as the 595 chip, is used, each port expansion chip needs to be equipped with eight optocouplers and corresponding transistors; and as the number of port expansion chips increases, the number of required optocouplers and transistors also increases, resulting in a significant increase in the use of electronic components, which in turn increases the overall cost. Summary of the invention
[0005] In order to overcome the above technical problems, the purpose of the present invention is to provide a chip load isolation control circuit to solve the problem of large amount of electronic components used and high overall cost in the isolation control circuit proposed in the above background technology.
[0006] The purpose of the present invention can be achieved through the following technical solutions:
[0007] A chip load isolation control circuit comprises a micro control unit, a port expansion chip and a plurality of groups of thyristors, wherein three groups of optocoupler isolation circuits are arranged between the micro control unit and the port expansion chip; the three groups of optocoupler isolation circuits are connected to the input end of the port expansion chip to realize isolation control between the micro control unit and the port expansion chip.
[0008] Preferably, each group of the optical coupling isolation circuits includes an optical coupler, and the three optical couplers are respectively connected to the three input terminals of the port expansion chip.
[0009] Preferably, the secondary side of the optical coupler is connected to the input end of the port expansion chip through a resistor.
[0010] Preferably, a pull-up resistor is provided on the optocoupler secondary of the optocoupler, and the pull-up resistor is connected to the analog circuit power supply; when the micro control unit outputs a high level, the port expansion chip synchronously receives the high level through the pull-up resistor; when the micro control unit outputs a low level, the port expansion chip synchronously receives the low level.
[0011] Preferably, a capacitor is connected below the pull-up resistor for signal filtering.
[0012] Preferably, the output end of the port expansion chip is directly connected to a thyristor for controlling a load.
[0013] Preferably, the ground of the micro control unit, the port expansion chip and the ground of the thyristor are on the same line, and the ground of the thyristor is on the same line with the neutral line of the power supply, forming a floating ground structure.
[0014] Preferably, the maximum output current of the port expansion chip is 20 mA to drive the thyristor to conduct.
[0015] Preferably, there are multiple port expansion chips to form cascade control.
[0016] Preferably, it further comprises a plurality of protection diodes connected to the output end of the port expansion chip.
[0017] Beneficial effects of the present invention:
[0018] 1. By using three sets of optocoupler isolation circuits to replace the original eight-way isolation optocoupler plus transistor structure, this solution can achieve isolation control of eight-way loads with fewer components, greatly reducing the number of electronic components required; if the control system is further constructed by cascading port expansion chips, the cost can be further reduced; this design not only maintains the effectiveness of multi-load isolation control, but also significantly reduces the material cost and the complexity of the overall system;
[0019] 2. By connecting the MCU ground (VSS), port expansion chip and thyristor ground (AVSS) in the same line, and connecting AVSS to the power neutral line, this layout simplifies circuit wiring, reduces unnecessary ground loops, and reduces circuit complexity; at the same time, the ground separation design of the digital control part and the power drive part achieves effective electrical isolation, protecting sensitive digital components from damage by high voltage or current;
[0020] 3. By adding a pull-up resistor to +AVDD on the secondary side of the optocoupler and connecting a C3 capacitor in parallel under the resistor for filtering, this design ensures the stability and reliability of signal transmission; this not only achieves effective isolation control of the load, but also simplifies the circuit structure, making the overall design more concise and efficient. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] The present invention will be further described below in conjunction with the accompanying drawings.
[0022] Figure 1 It is a structural schematic diagram of a load isolation control circuit in the prior art;
[0023] Figure 2 It is a structural schematic diagram of a load isolation control circuit of the present invention;
[0024] Figure 3 This Figure 2 Schematic diagram of the enlarged structure of the middle part of the circuit.
[0025] In the figure: 1. Thyristor; 2. Optocoupler isolation circuit; MCU-microcontroller unit; R27-resistor; R26-pull-up resistor; +AVDD-analog circuit power supply; C3-capacitor; VSS-microcontroller ground; AVSS-thyristor ground. DETAILED DESCRIPTION
[0026] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0027] like Figure 2-3 As shown, taking the 595 chip with eight outputs as an example: a chip load isolation control circuit includes a microcontroller unit MCU, a port expansion chip (i.e., a 595 chip) and a plurality of groups of thyristors 1; three groups of optical coupling isolation circuits 2 are arranged between the microcontroller unit MCU and the 595 chip; the three groups of optical coupling isolation circuits 2 are connected to the input end of the 595 chip to realize isolation control between the microcontroller unit MCU and the 595 chip; each group of optical coupling isolation circuits 2 includes an optical coupler; and the three optical couplers are respectively connected to the three input ends of DATA, LCK and SCK of the 595 chip (e.g., Figure 2 As shown); it can be understood that the optocoupler is a prior art and will not be described in detail; the secondary side of the optocoupler is connected to the input end of the 595 chip through the resistor R27; the output end of the 595 chip is directly connected to the thyristor 1 for controlling the load connected to the thyristor 1.
[0028] It should be noted that after the control signal of the 595 chip is sent from the chip port of the microcontroller unit MCU (i.e., DATA-MCU, LCK-MCU, SCK-MCU), it reaches the primary of the optocoupler of the three sets of optocouplers. After receiving the electrical signal, the primary of the optocoupler emits light, making the secondary of the optocoupler conductive. The secondary of the optocoupler is connected to the three pins DATA, LCK and SCK of the 595 chip through resistors R27, R35 and R39. The three control pins DATA, LCK and SCK of the 595 receive the same level signal as that sent by the microcontroller unit MCU, and are signals isolated from the circuit of the microcontroller unit MCU.
[0029] In this way, isolation control is achieved, replacing the existing circuit structure of eight-way isolation optocoupler plus triode circuit. The present application only needs three sets of optocoupler isolation circuits 2 to control eight-way isolated load outputs. One 595 chip saves five sets of optocoupler isolation control circuits and eight triodes. When a control system with 595 chips in cascade is used, cost savings can be further achieved. Thus, the isolation control effect of multiple loads can be ensured while reducing the use of electronic components and reducing cost.
[0030] In the embodiments disclosed in the present application, a pull-up resistor R26 is provided on the optocoupler secondary of the optocoupler, and the pull-up resistor R26 is connected to the analog circuit power supply +AVDD; when the microcontroller unit MCU outputs a high level, the 595 chip synchronously receives the high level through the pull-up resistor R26; when the microcontroller unit MCU outputs a low level, the 595 chip synchronously receives the low level; a capacitor C3 is connected below the pull-up resistor R26 for signal filtering to ensure the reliability of signal transmission.
[0031] It should be noted that by setting the pull-up resistor R26 and connecting it to the analog circuit power supply +AVDD, the noise caused by power supply fluctuations or external interference can be effectively filtered out, thereby further stabilizing the transmission signal; therefore, such a circuit layout not only enhances the stability of the signal, but also significantly improves the anti-interference performance of the entire system, so that even in the presence of electromagnetic interference or other adverse conditions, data can be accurately transmitted from the microcontroller unit MCU to the 595 chip, ensuring the reliability and accuracy of the system operation.
[0032] In the embodiment disclosed in the present application, the ground VSS of the microcontroller unit, the ground AVSS of the 595 chip and the thyristor are on the same line, and the ground of the thyristor is connected to the neutral line of the power supply (i.e. Figure 2 The N line in the circuit) is co-linear to form a floating ground structure.
[0033] It should be noted that such a layout not only simplifies circuit wiring and reduces unnecessary ground loops, thereby reducing circuit complexity; at the same time, by separating the ground lines of the digital control part (microcontroller unit MCU side) and the power drive part (74HC595 chip and thyristor 1 side), electrical isolation is effectively achieved; this step is crucial to improving the safety of the system because it can prevent damage that may be caused to sensitive digital control components by high voltage or current; in addition, the design also enhances the system's anti-interference ability, ensuring stable operation even in adverse environments such as electromagnetic interference.
[0034] In the embodiment disclosed in the present application, the maximum output current of the 595 chip is 20 mA, which is sufficient to directly drive the thyristor 1 to conduct; therefore, the use of transistors can be eliminated, further reducing the number of circuit elements and reducing costs.
[0035] In the embodiments disclosed in the present application, there are multiple 595 chips to form cascade control; by adding more 595 chips, more loads can be controlled without proportionally increasing the number of optocouplers and transistors, further reducing costs.
[0036] The embodiments disclosed in the present application also include multiple protection diodes connected to the output end of the 595 chip. It is understandable that the protection diode is a prior art, which is not shown in the figure and will not be described in detail. By adding a protection diode to the output end of the 595 chip, reverse voltage can be prevented from damaging the chip. This design improves the safety and reliability of the circuit.
[0037] In the description of the present invention, it should be understood that the terms "upper", "lower", "left", "right", etc. indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction and a specific direction structure and operation, and therefore, cannot be understood as a limitation on the present invention. In addition, "first" and "second" are only for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.
[0038] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", etc. should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0039] The above is a detailed description of an embodiment of the present invention, but the content is only a preferred embodiment of the present invention and cannot be considered to limit the scope of implementation of the present invention. All equivalent changes and improvements made within the scope of the present invention should still fall within the scope of the patent coverage of the present invention.
Claims
1. A chip load isolation control circuit, comprising a micro control unit, a port expansion chip and a plurality of groups of thyristors, characterized in that: Three groups of optical coupling isolation circuits are arranged between the micro control unit and the port expansion chip; the three groups of optical coupling isolation circuits are connected to the input end of the port expansion chip to realize isolation control between the micro control unit and the port expansion chip.
2. A chip load isolation control circuit according to claim 1, characterized in that: Each group of the optical coupling isolation circuits includes an optical coupler, and the three optical couplers are respectively connected to the three input terminals of the port expansion chip.
3. A chip load isolation control circuit according to claim 2, characterized in that: The secondary side of the optical coupler is connected to the input terminal of the port expansion chip through a resistor.
4. A chip load isolation control circuit according to any one of claims 1 to 3, characterized in that: A pull-up resistor is arranged on the optical coupler secondary of the optical coupler, and the pull-up resistor is connected to the analog circuit power supply; when the micro control unit outputs a high level, the port expansion chip synchronously receives the high level through the pull-up resistor; when the micro control unit outputs a low level, the port expansion chip synchronously receives the low level.
5. A chip load isolation control circuit according to claim 4, characterized in that: A capacitor is connected below the pull-up resistor for signal filtering.
6. The chip load isolation control circuit according to claim 1, characterized in that: The output end of the port expansion chip is directly connected to the thyristor for controlling the load.
7. The chip load isolation control circuit according to claim 1, characterized in that: The ground of the micro control unit, the port expansion chip and the ground of the thyristor are in the same line, and the ground of the thyristor is in the same line with the zero line of the power supply to form a floating ground structure.
8. A chip load isolation control circuit according to any one of claims 6-7, characterized in that: The maximum output current of the port expansion chip is 20mA to drive the thyristor to conduct.
9. The chip load isolation control circuit according to claim 1, characterized in that: There are multiple port expansion chips to form cascade control.
10. The chip load isolation control circuit according to claim 1, characterized in that: It also includes a plurality of protection diodes connected to the output end of the port expansion chip.